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36#include <linux/version.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/init.h>
40#include <linux/pci.h>
41#include <linux/dma-mapping.h>
42#include <linux/netdevice.h>
43#include <linux/etherdevice.h>
44#include <linux/debugfs.h>
45#include <linux/ethtool.h>
46
47#include "t4vf_common.h"
48#include "t4vf_defs.h"
49
50#include "../cxgb4/t4_regs.h"
51#include "../cxgb4/t4_msg.h"
52
53
54
55
56#define DRV_VERSION "1.0.0"
57#define DRV_DESC "Chelsio T4 Virtual Function (VF) Network Driver"
58
59
60
61
62
63
64
65
66
67#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
68 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
69 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
70
71static int dflt_msg_enable = DFLT_MSG_ENABLE;
72
73module_param(dflt_msg_enable, int, 0644);
74MODULE_PARM_DESC(dflt_msg_enable,
75 "default adapter ethtool message level bitmap");
76
77
78
79
80
81
82
83
84
85
86
87
88
89#define MSI_MSIX 2
90#define MSI_MSI 1
91#define MSI_DEFAULT MSI_MSIX
92
93static int msi = MSI_DEFAULT;
94
95module_param(msi, int, 0644);
96MODULE_PARM_DESC(msi, "whether to use MSI-X or MSI");
97
98
99
100
101
102
103enum {
104 MAX_TXQ_ENTRIES = 16384,
105 MAX_RSPQ_ENTRIES = 16384,
106 MAX_RX_BUFFERS = 16384,
107
108 MIN_TXQ_ENTRIES = 32,
109 MIN_RSPQ_ENTRIES = 128,
110 MIN_FL_ENTRIES = 16,
111
112
113
114
115
116
117
118
119
120
121
122 EQ_UNIT = SGE_EQ_IDXSIZE,
123 FL_PER_EQ_UNIT = EQ_UNIT / sizeof(__be64),
124 MIN_FL_RESID = FL_PER_EQ_UNIT,
125};
126
127
128
129
130
131
132static struct dentry *cxgb4vf_debugfs_root;
133
134
135
136
137
138
139
140
141
142void t4vf_os_link_changed(struct adapter *adapter, int pidx, int link_ok)
143{
144 struct net_device *dev = adapter->port[pidx];
145
146
147
148
149
150 if (!netif_running(dev) || link_ok == netif_carrier_ok(dev))
151 return;
152
153
154
155
156
157 if (link_ok) {
158 const char *s;
159 const char *fc;
160 const struct port_info *pi = netdev_priv(dev);
161
162 netif_carrier_on(dev);
163
164 switch (pi->link_cfg.speed) {
165 case SPEED_10000:
166 s = "10Gbps";
167 break;
168
169 case SPEED_1000:
170 s = "1000Mbps";
171 break;
172
173 case SPEED_100:
174 s = "100Mbps";
175 break;
176
177 default:
178 s = "unknown";
179 break;
180 }
181
182 switch (pi->link_cfg.fc) {
183 case PAUSE_RX:
184 fc = "RX";
185 break;
186
187 case PAUSE_TX:
188 fc = "TX";
189 break;
190
191 case PAUSE_RX|PAUSE_TX:
192 fc = "RX/TX";
193 break;
194
195 default:
196 fc = "no";
197 break;
198 }
199
200 printk(KERN_INFO "%s: link up, %s, full-duplex, %s PAUSE\n",
201 dev->name, s, fc);
202 } else {
203 netif_carrier_off(dev);
204 printk(KERN_INFO "%s: link down\n", dev->name);
205 }
206}
207
208
209
210
211
212
213
214
215
216
217static void cxgb4vf_vlan_rx_register(struct net_device *dev,
218 struct vlan_group *grp)
219{
220 struct port_info *pi = netdev_priv(dev);
221
222 pi->vlan_grp = grp;
223 t4vf_set_rxmode(pi->adapter, pi->viid, -1, -1, -1, -1, grp != NULL, 0);
224}
225
226
227
228
229
230static int link_start(struct net_device *dev)
231{
232 int ret;
233 struct port_info *pi = netdev_priv(dev);
234
235
236
237
238
239 ret = t4vf_set_rxmode(pi->adapter, pi->viid, dev->mtu, -1, -1, -1, -1,
240 true);
241 if (ret == 0) {
242 ret = t4vf_change_mac(pi->adapter, pi->viid,
243 pi->xact_addr_filt, dev->dev_addr, true);
244 if (ret >= 0) {
245 pi->xact_addr_filt = ret;
246 ret = 0;
247 }
248 }
249
250
251
252
253
254
255 if (ret == 0)
256 ret = t4vf_enable_vi(pi->adapter, pi->viid, true, true);
257 return ret;
258}
259
260
261
262
263static void name_msix_vecs(struct adapter *adapter)
264{
265 int namelen = sizeof(adapter->msix_info[0].desc) - 1;
266 int pidx;
267
268
269
270
271 snprintf(adapter->msix_info[MSIX_FW].desc, namelen,
272 "%s-FWeventq", adapter->name);
273 adapter->msix_info[MSIX_FW].desc[namelen] = 0;
274
275
276
277
278 for_each_port(adapter, pidx) {
279 struct net_device *dev = adapter->port[pidx];
280 const struct port_info *pi = netdev_priv(dev);
281 int qs, msi;
282
283 for (qs = 0, msi = MSIX_IQFLINT; qs < pi->nqsets; qs++, msi++) {
284 snprintf(adapter->msix_info[msi].desc, namelen,
285 "%s-%d", dev->name, qs);
286 adapter->msix_info[msi].desc[namelen] = 0;
287 }
288 }
289}
290
291
292
293
294static int request_msix_queue_irqs(struct adapter *adapter)
295{
296 struct sge *s = &adapter->sge;
297 int rxq, msi, err;
298
299
300
301
302 err = request_irq(adapter->msix_info[MSIX_FW].vec, t4vf_sge_intr_msix,
303 0, adapter->msix_info[MSIX_FW].desc, &s->fw_evtq);
304 if (err)
305 return err;
306
307
308
309
310 msi = MSIX_IQFLINT;
311 for_each_ethrxq(s, rxq) {
312 err = request_irq(adapter->msix_info[msi].vec,
313 t4vf_sge_intr_msix, 0,
314 adapter->msix_info[msi].desc,
315 &s->ethrxq[rxq].rspq);
316 if (err)
317 goto err_free_irqs;
318 msi++;
319 }
320 return 0;
321
322err_free_irqs:
323 while (--rxq >= 0)
324 free_irq(adapter->msix_info[--msi].vec, &s->ethrxq[rxq].rspq);
325 free_irq(adapter->msix_info[MSIX_FW].vec, &s->fw_evtq);
326 return err;
327}
328
329
330
331
332static void free_msix_queue_irqs(struct adapter *adapter)
333{
334 struct sge *s = &adapter->sge;
335 int rxq, msi;
336
337 free_irq(adapter->msix_info[MSIX_FW].vec, &s->fw_evtq);
338 msi = MSIX_IQFLINT;
339 for_each_ethrxq(s, rxq)
340 free_irq(adapter->msix_info[msi++].vec,
341 &s->ethrxq[rxq].rspq);
342}
343
344
345
346
347static void qenable(struct sge_rspq *rspq)
348{
349 napi_enable(&rspq->napi);
350
351
352
353
354
355 t4_write_reg(rspq->adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS,
356 CIDXINC(0) |
357 SEINTARM(rspq->intr_params) |
358 INGRESSQID(rspq->cntxt_id));
359}
360
361
362
363
364static void enable_rx(struct adapter *adapter)
365{
366 int rxq;
367 struct sge *s = &adapter->sge;
368
369 for_each_ethrxq(s, rxq)
370 qenable(&s->ethrxq[rxq].rspq);
371 qenable(&s->fw_evtq);
372
373
374
375
376
377 if (adapter->flags & USING_MSI)
378 t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_GTS,
379 CIDXINC(0) |
380 SEINTARM(s->intrq.intr_params) |
381 INGRESSQID(s->intrq.cntxt_id));
382
383}
384
385
386
387
388static void quiesce_rx(struct adapter *adapter)
389{
390 struct sge *s = &adapter->sge;
391 int rxq;
392
393 for_each_ethrxq(s, rxq)
394 napi_disable(&s->ethrxq[rxq].rspq.napi);
395 napi_disable(&s->fw_evtq.napi);
396}
397
398
399
400
401static int fwevtq_handler(struct sge_rspq *rspq, const __be64 *rsp,
402 const struct pkt_gl *gl)
403{
404
405
406
407 struct adapter *adapter = rspq->adapter;
408 u8 opcode = ((const struct rss_header *)rsp)->opcode;
409 void *cpl = (void *)(rsp + 1);
410
411 switch (opcode) {
412 case CPL_FW6_MSG: {
413
414
415
416 const struct cpl_fw6_msg *fw_msg = cpl;
417 if (fw_msg->type == FW6_TYPE_CMD_RPL)
418 t4vf_handle_fw_rpl(adapter, fw_msg->data);
419 break;
420 }
421
422 case CPL_SGE_EGR_UPDATE: {
423
424
425
426
427
428
429
430
431
432 const struct cpl_sge_egr_update *p = (void *)cpl;
433 unsigned int qid = EGR_QID(be32_to_cpu(p->opcode_qid));
434 struct sge *s = &adapter->sge;
435 struct sge_txq *tq;
436 struct sge_eth_txq *txq;
437 unsigned int eq_idx;
438
439
440
441
442
443
444
445
446 eq_idx = EQ_IDX(s, qid);
447 if (unlikely(eq_idx >= MAX_EGRQ)) {
448 dev_err(adapter->pdev_dev,
449 "Egress Update QID %d out of range\n", qid);
450 break;
451 }
452 tq = s->egr_map[eq_idx];
453 if (unlikely(tq == NULL)) {
454 dev_err(adapter->pdev_dev,
455 "Egress Update QID %d TXQ=NULL\n", qid);
456 break;
457 }
458 txq = container_of(tq, struct sge_eth_txq, q);
459 if (unlikely(tq->abs_id != qid)) {
460 dev_err(adapter->pdev_dev,
461 "Egress Update QID %d refers to TXQ %d\n",
462 qid, tq->abs_id);
463 break;
464 }
465
466
467
468
469
470 txq->q.restarts++;
471 netif_tx_wake_queue(txq->txq);
472 break;
473 }
474
475 default:
476 dev_err(adapter->pdev_dev,
477 "unexpected CPL %#x on FW event queue\n", opcode);
478 }
479
480 return 0;
481}
482
483
484
485
486
487
488static int setup_sge_queues(struct adapter *adapter)
489{
490 struct sge *s = &adapter->sge;
491 int err, pidx, msix;
492
493
494
495
496
497 bitmap_zero(s->starving_fl, MAX_EGRQ);
498
499
500
501
502
503
504
505
506
507 if (adapter->flags & USING_MSI) {
508 err = t4vf_sge_alloc_rxq(adapter, &s->intrq, false,
509 adapter->port[0], 0, NULL, NULL);
510 if (err)
511 goto err_free_queues;
512 }
513
514
515
516
517 err = t4vf_sge_alloc_rxq(adapter, &s->fw_evtq, true, adapter->port[0],
518 MSIX_FW, NULL, fwevtq_handler);
519 if (err)
520 goto err_free_queues;
521
522
523
524
525
526
527
528 msix = MSIX_IQFLINT;
529 for_each_port(adapter, pidx) {
530 struct net_device *dev = adapter->port[pidx];
531 struct port_info *pi = netdev_priv(dev);
532 struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset];
533 struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset];
534 int qs;
535
536 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
537 err = t4vf_sge_alloc_rxq(adapter, &rxq->rspq, false,
538 dev, msix++,
539 &rxq->fl, t4vf_ethrx_handler);
540 if (err)
541 goto err_free_queues;
542
543 err = t4vf_sge_alloc_eth_txq(adapter, txq, dev,
544 netdev_get_tx_queue(dev, qs),
545 s->fw_evtq.cntxt_id);
546 if (err)
547 goto err_free_queues;
548
549 rxq->rspq.idx = qs;
550 memset(&rxq->stats, 0, sizeof(rxq->stats));
551 }
552 }
553
554
555
556
557 s->egr_base = s->ethtxq[0].q.abs_id - s->ethtxq[0].q.cntxt_id;
558 s->ingr_base = s->ethrxq[0].rspq.abs_id - s->ethrxq[0].rspq.cntxt_id;
559 IQ_MAP(s, s->fw_evtq.abs_id) = &s->fw_evtq;
560 for_each_port(adapter, pidx) {
561 struct net_device *dev = adapter->port[pidx];
562 struct port_info *pi = netdev_priv(dev);
563 struct sge_eth_rxq *rxq = &s->ethrxq[pi->first_qset];
564 struct sge_eth_txq *txq = &s->ethtxq[pi->first_qset];
565 int qs;
566
567 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
568 IQ_MAP(s, rxq->rspq.abs_id) = &rxq->rspq;
569 EQ_MAP(s, txq->q.abs_id) = &txq->q;
570
571
572
573
574
575
576
577
578
579
580 rxq->fl.abs_id = rxq->fl.cntxt_id + s->egr_base;
581 EQ_MAP(s, rxq->fl.abs_id) = &rxq->fl;
582 }
583 }
584 return 0;
585
586err_free_queues:
587 t4vf_free_sge_resources(adapter);
588 return err;
589}
590
591
592
593
594
595
596
597
598
599static int setup_rss(struct adapter *adapter)
600{
601 int pidx;
602
603 for_each_port(adapter, pidx) {
604 struct port_info *pi = adap2pinfo(adapter, pidx);
605 struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[pi->first_qset];
606 u16 rss[MAX_PORT_QSETS];
607 int qs, err;
608
609 for (qs = 0; qs < pi->nqsets; qs++)
610 rss[qs] = rxq[qs].rspq.abs_id;
611
612 err = t4vf_config_rss_range(adapter, pi->viid,
613 0, pi->rss_size, rss, pi->nqsets);
614 if (err)
615 return err;
616
617
618
619
620 switch (adapter->params.rss.mode) {
621 case FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL:
622
623
624
625
626
627
628
629 if (!adapter->params.rss.u.basicvirtual.tnlalllookup) {
630 union rss_vi_config config;
631 err = t4vf_read_rss_vi_config(adapter,
632 pi->viid,
633 &config);
634 if (err)
635 return err;
636 config.basicvirtual.defaultq =
637 rxq[0].rspq.abs_id;
638 err = t4vf_write_rss_vi_config(adapter,
639 pi->viid,
640 &config);
641 if (err)
642 return err;
643 }
644 break;
645 }
646 }
647
648 return 0;
649}
650
651
652
653
654
655
656
657
658static int adapter_up(struct adapter *adapter)
659{
660 int err;
661
662
663
664
665
666
667 if ((adapter->flags & FULL_INIT_DONE) == 0) {
668 err = setup_sge_queues(adapter);
669 if (err)
670 return err;
671 err = setup_rss(adapter);
672 if (err) {
673 t4vf_free_sge_resources(adapter);
674 return err;
675 }
676
677 if (adapter->flags & USING_MSIX)
678 name_msix_vecs(adapter);
679 adapter->flags |= FULL_INIT_DONE;
680 }
681
682
683
684
685 BUG_ON((adapter->flags & (USING_MSIX|USING_MSI)) == 0);
686 if (adapter->flags & USING_MSIX)
687 err = request_msix_queue_irqs(adapter);
688 else
689 err = request_irq(adapter->pdev->irq,
690 t4vf_intr_handler(adapter), 0,
691 adapter->name, adapter);
692 if (err) {
693 dev_err(adapter->pdev_dev, "request_irq failed, err %d\n",
694 err);
695 return err;
696 }
697
698
699
700
701 enable_rx(adapter);
702 t4vf_sge_start(adapter);
703 return 0;
704}
705
706
707
708
709
710
711static void adapter_down(struct adapter *adapter)
712{
713
714
715
716 if (adapter->flags & USING_MSIX)
717 free_msix_queue_irqs(adapter);
718 else
719 free_irq(adapter->pdev->irq, adapter);
720
721
722
723
724 quiesce_rx(adapter);
725}
726
727
728
729
730static int cxgb4vf_open(struct net_device *dev)
731{
732 int err;
733 struct port_info *pi = netdev_priv(dev);
734 struct adapter *adapter = pi->adapter;
735
736
737
738
739
740 if (adapter->open_device_map == 0) {
741 err = adapter_up(adapter);
742 if (err)
743 return err;
744 }
745
746
747
748
749 netif_set_real_num_tx_queues(dev, pi->nqsets);
750 err = netif_set_real_num_rx_queues(dev, pi->nqsets);
751 if (err)
752 goto err_unwind;
753 err = link_start(dev);
754 if (err)
755 goto err_unwind;
756
757 netif_tx_start_all_queues(dev);
758 set_bit(pi->port_id, &adapter->open_device_map);
759 return 0;
760
761err_unwind:
762 if (adapter->open_device_map == 0)
763 adapter_down(adapter);
764 return err;
765}
766
767
768
769
770
771static int cxgb4vf_stop(struct net_device *dev)
772{
773 struct port_info *pi = netdev_priv(dev);
774 struct adapter *adapter = pi->adapter;
775
776 netif_tx_stop_all_queues(dev);
777 netif_carrier_off(dev);
778 t4vf_enable_vi(adapter, pi->viid, false, false);
779 pi->link_cfg.link_ok = 0;
780
781 clear_bit(pi->port_id, &adapter->open_device_map);
782 if (adapter->open_device_map == 0)
783 adapter_down(adapter);
784 return 0;
785}
786
787
788
789
790static struct net_device_stats *cxgb4vf_get_stats(struct net_device *dev)
791{
792 struct t4vf_port_stats stats;
793 struct port_info *pi = netdev2pinfo(dev);
794 struct adapter *adapter = pi->adapter;
795 struct net_device_stats *ns = &dev->stats;
796 int err;
797
798 spin_lock(&adapter->stats_lock);
799 err = t4vf_get_port_stats(adapter, pi->pidx, &stats);
800 spin_unlock(&adapter->stats_lock);
801
802 memset(ns, 0, sizeof(*ns));
803 if (err)
804 return ns;
805
806 ns->tx_bytes = (stats.tx_bcast_bytes + stats.tx_mcast_bytes +
807 stats.tx_ucast_bytes + stats.tx_offload_bytes);
808 ns->tx_packets = (stats.tx_bcast_frames + stats.tx_mcast_frames +
809 stats.tx_ucast_frames + stats.tx_offload_frames);
810 ns->rx_bytes = (stats.rx_bcast_bytes + stats.rx_mcast_bytes +
811 stats.rx_ucast_bytes);
812 ns->rx_packets = (stats.rx_bcast_frames + stats.rx_mcast_frames +
813 stats.rx_ucast_frames);
814 ns->multicast = stats.rx_mcast_frames;
815 ns->tx_errors = stats.tx_drop_frames;
816 ns->rx_errors = stats.rx_err_frames;
817
818 return ns;
819}
820
821
822
823
824
825
826static inline unsigned int collect_netdev_uc_list_addrs(const struct net_device *dev,
827 const u8 **addr,
828 unsigned int offset,
829 unsigned int maxaddrs)
830{
831 unsigned int index = 0;
832 unsigned int naddr = 0;
833 const struct netdev_hw_addr *ha;
834
835 for_each_dev_addr(dev, ha)
836 if (index++ >= offset) {
837 addr[naddr++] = ha->addr;
838 if (naddr >= maxaddrs)
839 break;
840 }
841 return naddr;
842}
843
844
845
846
847
848
849static inline unsigned int collect_netdev_mc_list_addrs(const struct net_device *dev,
850 const u8 **addr,
851 unsigned int offset,
852 unsigned int maxaddrs)
853{
854 unsigned int index = 0;
855 unsigned int naddr = 0;
856 const struct netdev_hw_addr *ha;
857
858 netdev_for_each_mc_addr(ha, dev)
859 if (index++ >= offset) {
860 addr[naddr++] = ha->addr;
861 if (naddr >= maxaddrs)
862 break;
863 }
864 return naddr;
865}
866
867
868
869
870
871static int set_addr_filters(const struct net_device *dev, bool sleep)
872{
873 u64 mhash = 0;
874 u64 uhash = 0;
875 bool free = true;
876 unsigned int offset, naddr;
877 const u8 *addr[7];
878 int ret;
879 const struct port_info *pi = netdev_priv(dev);
880
881
882 for (offset = 0; ; offset += naddr) {
883 naddr = collect_netdev_uc_list_addrs(dev, addr, offset,
884 ARRAY_SIZE(addr));
885 if (naddr == 0)
886 break;
887
888 ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free,
889 naddr, addr, NULL, &uhash, sleep);
890 if (ret < 0)
891 return ret;
892
893 free = false;
894 }
895
896
897 for (offset = 0; ; offset += naddr) {
898 naddr = collect_netdev_mc_list_addrs(dev, addr, offset,
899 ARRAY_SIZE(addr));
900 if (naddr == 0)
901 break;
902
903 ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free,
904 naddr, addr, NULL, &mhash, sleep);
905 if (ret < 0)
906 return ret;
907 free = false;
908 }
909
910 return t4vf_set_addr_hash(pi->adapter, pi->viid, uhash != 0,
911 uhash | mhash, sleep);
912}
913
914
915
916
917
918static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok)
919{
920 int ret;
921 struct port_info *pi = netdev_priv(dev);
922
923 ret = set_addr_filters(dev, sleep_ok);
924 if (ret == 0)
925 ret = t4vf_set_rxmode(pi->adapter, pi->viid, -1,
926 (dev->flags & IFF_PROMISC) != 0,
927 (dev->flags & IFF_ALLMULTI) != 0,
928 1, -1, sleep_ok);
929 return ret;
930}
931
932
933
934
935static void cxgb4vf_set_rxmode(struct net_device *dev)
936{
937
938 set_rxmode(dev, -1, false);
939}
940
941
942
943
944
945static int closest_timer(const struct sge *s, int us)
946{
947 int i, timer_idx = 0, min_delta = INT_MAX;
948
949 for (i = 0; i < ARRAY_SIZE(s->timer_val); i++) {
950 int delta = us - s->timer_val[i];
951 if (delta < 0)
952 delta = -delta;
953 if (delta < min_delta) {
954 min_delta = delta;
955 timer_idx = i;
956 }
957 }
958 return timer_idx;
959}
960
961static int closest_thres(const struct sge *s, int thres)
962{
963 int i, delta, pktcnt_idx = 0, min_delta = INT_MAX;
964
965 for (i = 0; i < ARRAY_SIZE(s->counter_val); i++) {
966 delta = thres - s->counter_val[i];
967 if (delta < 0)
968 delta = -delta;
969 if (delta < min_delta) {
970 min_delta = delta;
971 pktcnt_idx = i;
972 }
973 }
974 return pktcnt_idx;
975}
976
977
978
979
980static unsigned int qtimer_val(const struct adapter *adapter,
981 const struct sge_rspq *rspq)
982{
983 unsigned int timer_idx = QINTR_TIMER_IDX_GET(rspq->intr_params);
984
985 return timer_idx < SGE_NTIMERS
986 ? adapter->sge.timer_val[timer_idx]
987 : 0;
988}
989
990
991
992
993
994
995
996
997
998
999
1000
1001static int set_rxq_intr_params(struct adapter *adapter, struct sge_rspq *rspq,
1002 unsigned int us, unsigned int cnt)
1003{
1004 unsigned int timer_idx;
1005
1006
1007
1008
1009
1010 if ((us | cnt) == 0)
1011 cnt = 1;
1012
1013
1014
1015
1016
1017
1018
1019 if (cnt) {
1020 int err;
1021 u32 v, pktcnt_idx;
1022
1023 pktcnt_idx = closest_thres(&adapter->sge, cnt);
1024 if (rspq->desc && rspq->pktcnt_idx != pktcnt_idx) {
1025 v = FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
1026 FW_PARAMS_PARAM_X(
1027 FW_PARAMS_PARAM_DMAQ_IQ_INTCNTTHRESH) |
1028 FW_PARAMS_PARAM_YZ(rspq->cntxt_id);
1029 err = t4vf_set_params(adapter, 1, &v, &pktcnt_idx);
1030 if (err)
1031 return err;
1032 }
1033 rspq->pktcnt_idx = pktcnt_idx;
1034 }
1035
1036
1037
1038
1039
1040 timer_idx = (us == 0
1041 ? SGE_TIMER_RSTRT_CNTR
1042 : closest_timer(&adapter->sge, us));
1043
1044
1045
1046
1047
1048 rspq->intr_params = (QINTR_TIMER_IDX(timer_idx) |
1049 (cnt > 0 ? QINTR_CNT_EN : 0));
1050 return 0;
1051}
1052
1053
1054
1055
1056
1057
1058static inline unsigned int mk_adap_vers(const struct adapter *adapter)
1059{
1060
1061
1062
1063 return 4 | (0x3f << 10);
1064}
1065
1066
1067
1068
1069static int cxgb4vf_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1070{
1071 int ret = 0;
1072
1073 switch (cmd) {
1074
1075
1076
1077
1078
1079
1080 default:
1081 ret = -EOPNOTSUPP;
1082 break;
1083 }
1084 return ret;
1085}
1086
1087
1088
1089
1090static int cxgb4vf_change_mtu(struct net_device *dev, int new_mtu)
1091{
1092 int ret;
1093 struct port_info *pi = netdev_priv(dev);
1094
1095
1096 if (new_mtu < 81)
1097 return -EINVAL;
1098
1099 ret = t4vf_set_rxmode(pi->adapter, pi->viid, new_mtu,
1100 -1, -1, -1, -1, true);
1101 if (!ret)
1102 dev->mtu = new_mtu;
1103 return ret;
1104}
1105
1106
1107
1108
1109static int cxgb4vf_set_mac_addr(struct net_device *dev, void *_addr)
1110{
1111 int ret;
1112 struct sockaddr *addr = _addr;
1113 struct port_info *pi = netdev_priv(dev);
1114
1115 if (!is_valid_ether_addr(addr->sa_data))
1116 return -EINVAL;
1117
1118 ret = t4vf_change_mac(pi->adapter, pi->viid, pi->xact_addr_filt,
1119 addr->sa_data, true);
1120 if (ret < 0)
1121 return ret;
1122
1123 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1124 pi->xact_addr_filt = ret;
1125 return 0;
1126}
1127
1128#ifdef CONFIG_NET_POLL_CONTROLLER
1129
1130
1131
1132
1133static void cxgb4vf_poll_controller(struct net_device *dev)
1134{
1135 struct port_info *pi = netdev_priv(dev);
1136 struct adapter *adapter = pi->adapter;
1137
1138 if (adapter->flags & USING_MSIX) {
1139 struct sge_eth_rxq *rxq;
1140 int nqsets;
1141
1142 rxq = &adapter->sge.ethrxq[pi->first_qset];
1143 for (nqsets = pi->nqsets; nqsets; nqsets--) {
1144 t4vf_sge_intr_msix(0, &rxq->rspq);
1145 rxq++;
1146 }
1147 } else
1148 t4vf_intr_handler(adapter)(0, adapter);
1149}
1150#endif
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163static int cxgb4vf_get_settings(struct net_device *dev,
1164 struct ethtool_cmd *cmd)
1165{
1166 const struct port_info *pi = netdev_priv(dev);
1167
1168 cmd->supported = pi->link_cfg.supported;
1169 cmd->advertising = pi->link_cfg.advertising;
1170 cmd->speed = netif_carrier_ok(dev) ? pi->link_cfg.speed : -1;
1171 cmd->duplex = DUPLEX_FULL;
1172
1173 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
1174 cmd->phy_address = pi->port_id;
1175 cmd->transceiver = XCVR_EXTERNAL;
1176 cmd->autoneg = pi->link_cfg.autoneg;
1177 cmd->maxtxpkt = 0;
1178 cmd->maxrxpkt = 0;
1179 return 0;
1180}
1181
1182
1183
1184
1185static void cxgb4vf_get_drvinfo(struct net_device *dev,
1186 struct ethtool_drvinfo *drvinfo)
1187{
1188 struct adapter *adapter = netdev2adap(dev);
1189
1190 strcpy(drvinfo->driver, KBUILD_MODNAME);
1191 strcpy(drvinfo->version, DRV_VERSION);
1192 strcpy(drvinfo->bus_info, pci_name(to_pci_dev(dev->dev.parent)));
1193 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1194 "%u.%u.%u.%u, TP %u.%u.%u.%u",
1195 FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.fwrev),
1196 FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.fwrev),
1197 FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.fwrev),
1198 FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.fwrev),
1199 FW_HDR_FW_VER_MAJOR_GET(adapter->params.dev.tprev),
1200 FW_HDR_FW_VER_MINOR_GET(adapter->params.dev.tprev),
1201 FW_HDR_FW_VER_MICRO_GET(adapter->params.dev.tprev),
1202 FW_HDR_FW_VER_BUILD_GET(adapter->params.dev.tprev));
1203}
1204
1205
1206
1207
1208static u32 cxgb4vf_get_msglevel(struct net_device *dev)
1209{
1210 return netdev2adap(dev)->msg_enable;
1211}
1212
1213
1214
1215
1216static void cxgb4vf_set_msglevel(struct net_device *dev, u32 msglevel)
1217{
1218 netdev2adap(dev)->msg_enable = msglevel;
1219}
1220
1221
1222
1223
1224
1225
1226
1227static void cxgb4vf_get_ringparam(struct net_device *dev,
1228 struct ethtool_ringparam *rp)
1229{
1230 const struct port_info *pi = netdev_priv(dev);
1231 const struct sge *s = &pi->adapter->sge;
1232
1233 rp->rx_max_pending = MAX_RX_BUFFERS;
1234 rp->rx_mini_max_pending = MAX_RSPQ_ENTRIES;
1235 rp->rx_jumbo_max_pending = 0;
1236 rp->tx_max_pending = MAX_TXQ_ENTRIES;
1237
1238 rp->rx_pending = s->ethrxq[pi->first_qset].fl.size - MIN_FL_RESID;
1239 rp->rx_mini_pending = s->ethrxq[pi->first_qset].rspq.size;
1240 rp->rx_jumbo_pending = 0;
1241 rp->tx_pending = s->ethtxq[pi->first_qset].q.size;
1242}
1243
1244
1245
1246
1247
1248
1249
1250static int cxgb4vf_set_ringparam(struct net_device *dev,
1251 struct ethtool_ringparam *rp)
1252{
1253 const struct port_info *pi = netdev_priv(dev);
1254 struct adapter *adapter = pi->adapter;
1255 struct sge *s = &adapter->sge;
1256 int qs;
1257
1258 if (rp->rx_pending > MAX_RX_BUFFERS ||
1259 rp->rx_jumbo_pending ||
1260 rp->tx_pending > MAX_TXQ_ENTRIES ||
1261 rp->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1262 rp->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1263 rp->rx_pending < MIN_FL_ENTRIES ||
1264 rp->tx_pending < MIN_TXQ_ENTRIES)
1265 return -EINVAL;
1266
1267 if (adapter->flags & FULL_INIT_DONE)
1268 return -EBUSY;
1269
1270 for (qs = pi->first_qset; qs < pi->first_qset + pi->nqsets; qs++) {
1271 s->ethrxq[qs].fl.size = rp->rx_pending + MIN_FL_RESID;
1272 s->ethrxq[qs].rspq.size = rp->rx_mini_pending;
1273 s->ethtxq[qs].q.size = rp->tx_pending;
1274 }
1275 return 0;
1276}
1277
1278
1279
1280
1281
1282
1283static int cxgb4vf_get_coalesce(struct net_device *dev,
1284 struct ethtool_coalesce *coalesce)
1285{
1286 const struct port_info *pi = netdev_priv(dev);
1287 const struct adapter *adapter = pi->adapter;
1288 const struct sge_rspq *rspq = &adapter->sge.ethrxq[pi->first_qset].rspq;
1289
1290 coalesce->rx_coalesce_usecs = qtimer_val(adapter, rspq);
1291 coalesce->rx_max_coalesced_frames =
1292 ((rspq->intr_params & QINTR_CNT_EN)
1293 ? adapter->sge.counter_val[rspq->pktcnt_idx]
1294 : 0);
1295 return 0;
1296}
1297
1298
1299
1300
1301
1302
1303static int cxgb4vf_set_coalesce(struct net_device *dev,
1304 struct ethtool_coalesce *coalesce)
1305{
1306 const struct port_info *pi = netdev_priv(dev);
1307 struct adapter *adapter = pi->adapter;
1308
1309 return set_rxq_intr_params(adapter,
1310 &adapter->sge.ethrxq[pi->first_qset].rspq,
1311 coalesce->rx_coalesce_usecs,
1312 coalesce->rx_max_coalesced_frames);
1313}
1314
1315
1316
1317
1318static void cxgb4vf_get_pauseparam(struct net_device *dev,
1319 struct ethtool_pauseparam *pauseparam)
1320{
1321 struct port_info *pi = netdev_priv(dev);
1322
1323 pauseparam->autoneg = (pi->link_cfg.requested_fc & PAUSE_AUTONEG) != 0;
1324 pauseparam->rx_pause = (pi->link_cfg.fc & PAUSE_RX) != 0;
1325 pauseparam->tx_pause = (pi->link_cfg.fc & PAUSE_TX) != 0;
1326}
1327
1328
1329
1330
1331static u32 cxgb4vf_get_rx_csum(struct net_device *dev)
1332{
1333 struct port_info *pi = netdev_priv(dev);
1334
1335 return (pi->rx_offload & RX_CSO) != 0;
1336}
1337
1338
1339
1340
1341static int cxgb4vf_set_rx_csum(struct net_device *dev, u32 csum)
1342{
1343 struct port_info *pi = netdev_priv(dev);
1344
1345 if (csum)
1346 pi->rx_offload |= RX_CSO;
1347 else
1348 pi->rx_offload &= ~RX_CSO;
1349 return 0;
1350}
1351
1352
1353
1354
1355static int cxgb4vf_phys_id(struct net_device *dev, u32 id)
1356{
1357 struct port_info *pi = netdev_priv(dev);
1358
1359 return t4vf_identify_port(pi->adapter, pi->viid, 5);
1360}
1361
1362
1363
1364
1365struct queue_port_stats {
1366 u64 tso;
1367 u64 tx_csum;
1368 u64 rx_csum;
1369 u64 vlan_ex;
1370 u64 vlan_ins;
1371 u64 lro_pkts;
1372 u64 lro_merged;
1373};
1374
1375
1376
1377
1378
1379
1380static const char stats_strings[][ETH_GSTRING_LEN] = {
1381
1382
1383
1384 "TxBroadcastBytes ",
1385 "TxBroadcastFrames ",
1386 "TxMulticastBytes ",
1387 "TxMulticastFrames ",
1388 "TxUnicastBytes ",
1389 "TxUnicastFrames ",
1390 "TxDroppedFrames ",
1391 "TxOffloadBytes ",
1392 "TxOffloadFrames ",
1393 "RxBroadcastBytes ",
1394 "RxBroadcastFrames ",
1395 "RxMulticastBytes ",
1396 "RxMulticastFrames ",
1397 "RxUnicastBytes ",
1398 "RxUnicastFrames ",
1399 "RxErrorFrames ",
1400
1401
1402
1403
1404
1405 "TSO ",
1406 "TxCsumOffload ",
1407 "RxCsumGood ",
1408 "VLANextractions ",
1409 "VLANinsertions ",
1410 "GROPackets ",
1411 "GROMerged ",
1412};
1413
1414
1415
1416
1417static int cxgb4vf_get_sset_count(struct net_device *dev, int sset)
1418{
1419 switch (sset) {
1420 case ETH_SS_STATS:
1421 return ARRAY_SIZE(stats_strings);
1422 default:
1423 return -EOPNOTSUPP;
1424 }
1425
1426}
1427
1428
1429
1430
1431static void cxgb4vf_get_strings(struct net_device *dev,
1432 u32 sset,
1433 u8 *data)
1434{
1435 switch (sset) {
1436 case ETH_SS_STATS:
1437 memcpy(data, stats_strings, sizeof(stats_strings));
1438 break;
1439 }
1440}
1441
1442
1443
1444
1445
1446static void collect_sge_port_stats(const struct adapter *adapter,
1447 const struct port_info *pi,
1448 struct queue_port_stats *stats)
1449{
1450 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[pi->first_qset];
1451 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[pi->first_qset];
1452 int qs;
1453
1454 memset(stats, 0, sizeof(*stats));
1455 for (qs = 0; qs < pi->nqsets; qs++, rxq++, txq++) {
1456 stats->tso += txq->tso;
1457 stats->tx_csum += txq->tx_cso;
1458 stats->rx_csum += rxq->stats.rx_cso;
1459 stats->vlan_ex += rxq->stats.vlan_ex;
1460 stats->vlan_ins += txq->vlan_ins;
1461 stats->lro_pkts += rxq->stats.lro_pkts;
1462 stats->lro_merged += rxq->stats.lro_merged;
1463 }
1464}
1465
1466
1467
1468
1469static void cxgb4vf_get_ethtool_stats(struct net_device *dev,
1470 struct ethtool_stats *stats,
1471 u64 *data)
1472{
1473 struct port_info *pi = netdev2pinfo(dev);
1474 struct adapter *adapter = pi->adapter;
1475 int err = t4vf_get_port_stats(adapter, pi->pidx,
1476 (struct t4vf_port_stats *)data);
1477 if (err)
1478 memset(data, 0, sizeof(struct t4vf_port_stats));
1479
1480 data += sizeof(struct t4vf_port_stats) / sizeof(u64);
1481 collect_sge_port_stats(adapter, pi, (struct queue_port_stats *)data);
1482}
1483
1484
1485
1486
1487static int cxgb4vf_get_regs_len(struct net_device *dev)
1488{
1489 return T4VF_REGMAP_SIZE;
1490}
1491
1492
1493
1494
1495static void reg_block_dump(struct adapter *adapter, void *regbuf,
1496 unsigned int start, unsigned int end)
1497{
1498 u32 *bp = regbuf + start - T4VF_REGMAP_START;
1499
1500 for ( ; start <= end; start += sizeof(u32)) {
1501
1502
1503
1504
1505
1506 if (start == T4VF_CIM_BASE_ADDR + CIM_VF_EXT_MAILBOX_CTRL)
1507 *bp++ = 0xffff;
1508 else
1509 *bp++ = t4_read_reg(adapter, start);
1510 }
1511}
1512
1513
1514
1515
1516static void cxgb4vf_get_regs(struct net_device *dev,
1517 struct ethtool_regs *regs,
1518 void *regbuf)
1519{
1520 struct adapter *adapter = netdev2adap(dev);
1521
1522 regs->version = mk_adap_vers(adapter);
1523
1524
1525
1526
1527 memset(regbuf, 0, T4VF_REGMAP_SIZE);
1528
1529 reg_block_dump(adapter, regbuf,
1530 T4VF_SGE_BASE_ADDR + T4VF_MOD_MAP_SGE_FIRST,
1531 T4VF_SGE_BASE_ADDR + T4VF_MOD_MAP_SGE_LAST);
1532 reg_block_dump(adapter, regbuf,
1533 T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_FIRST,
1534 T4VF_MPS_BASE_ADDR + T4VF_MOD_MAP_MPS_LAST);
1535 reg_block_dump(adapter, regbuf,
1536 T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_FIRST,
1537 T4VF_PL_BASE_ADDR + T4VF_MOD_MAP_PL_LAST);
1538 reg_block_dump(adapter, regbuf,
1539 T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_FIRST,
1540 T4VF_CIM_BASE_ADDR + T4VF_MOD_MAP_CIM_LAST);
1541
1542 reg_block_dump(adapter, regbuf,
1543 T4VF_MBDATA_BASE_ADDR + T4VF_MBDATA_FIRST,
1544 T4VF_MBDATA_BASE_ADDR + T4VF_MBDATA_LAST);
1545}
1546
1547
1548
1549
1550static void cxgb4vf_get_wol(struct net_device *dev,
1551 struct ethtool_wolinfo *wol)
1552{
1553 wol->supported = 0;
1554 wol->wolopts = 0;
1555 memset(&wol->sopass, 0, sizeof(wol->sopass));
1556}
1557
1558
1559
1560
1561#define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN)
1562
1563
1564
1565
1566static int cxgb4vf_set_tso(struct net_device *dev, u32 tso)
1567{
1568 if (tso)
1569 dev->features |= TSO_FLAGS;
1570 else
1571 dev->features &= ~TSO_FLAGS;
1572 return 0;
1573}
1574
1575static struct ethtool_ops cxgb4vf_ethtool_ops = {
1576 .get_settings = cxgb4vf_get_settings,
1577 .get_drvinfo = cxgb4vf_get_drvinfo,
1578 .get_msglevel = cxgb4vf_get_msglevel,
1579 .set_msglevel = cxgb4vf_set_msglevel,
1580 .get_ringparam = cxgb4vf_get_ringparam,
1581 .set_ringparam = cxgb4vf_set_ringparam,
1582 .get_coalesce = cxgb4vf_get_coalesce,
1583 .set_coalesce = cxgb4vf_set_coalesce,
1584 .get_pauseparam = cxgb4vf_get_pauseparam,
1585 .get_rx_csum = cxgb4vf_get_rx_csum,
1586 .set_rx_csum = cxgb4vf_set_rx_csum,
1587 .set_tx_csum = ethtool_op_set_tx_ipv6_csum,
1588 .set_sg = ethtool_op_set_sg,
1589 .get_link = ethtool_op_get_link,
1590 .get_strings = cxgb4vf_get_strings,
1591 .phys_id = cxgb4vf_phys_id,
1592 .get_sset_count = cxgb4vf_get_sset_count,
1593 .get_ethtool_stats = cxgb4vf_get_ethtool_stats,
1594 .get_regs_len = cxgb4vf_get_regs_len,
1595 .get_regs = cxgb4vf_get_regs,
1596 .get_wol = cxgb4vf_get_wol,
1597 .set_tso = cxgb4vf_set_tso,
1598};
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608#define QPL 4
1609
1610static int sge_qinfo_show(struct seq_file *seq, void *v)
1611{
1612 struct adapter *adapter = seq->private;
1613 int eth_entries = DIV_ROUND_UP(adapter->sge.ethqsets, QPL);
1614 int qs, r = (uintptr_t)v - 1;
1615
1616 if (r)
1617 seq_putc(seq, '\n');
1618
1619 #define S3(fmt_spec, s, v) \
1620 do {\
1621 seq_printf(seq, "%-12s", s); \
1622 for (qs = 0; qs < n; ++qs) \
1623 seq_printf(seq, " %16" fmt_spec, v); \
1624 seq_putc(seq, '\n'); \
1625 } while (0)
1626 #define S(s, v) S3("s", s, v)
1627 #define T(s, v) S3("u", s, txq[qs].v)
1628 #define R(s, v) S3("u", s, rxq[qs].v)
1629
1630 if (r < eth_entries) {
1631 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[r * QPL];
1632 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[r * QPL];
1633 int n = min(QPL, adapter->sge.ethqsets - QPL * r);
1634
1635 S("QType:", "Ethernet");
1636 S("Interface:",
1637 (rxq[qs].rspq.netdev
1638 ? rxq[qs].rspq.netdev->name
1639 : "N/A"));
1640 S3("d", "Port:",
1641 (rxq[qs].rspq.netdev
1642 ? ((struct port_info *)
1643 netdev_priv(rxq[qs].rspq.netdev))->port_id
1644 : -1));
1645 T("TxQ ID:", q.abs_id);
1646 T("TxQ size:", q.size);
1647 T("TxQ inuse:", q.in_use);
1648 T("TxQ PIdx:", q.pidx);
1649 T("TxQ CIdx:", q.cidx);
1650 R("RspQ ID:", rspq.abs_id);
1651 R("RspQ size:", rspq.size);
1652 R("RspQE size:", rspq.iqe_len);
1653 S3("u", "Intr delay:", qtimer_val(adapter, &rxq[qs].rspq));
1654 S3("u", "Intr pktcnt:",
1655 adapter->sge.counter_val[rxq[qs].rspq.pktcnt_idx]);
1656 R("RspQ CIdx:", rspq.cidx);
1657 R("RspQ Gen:", rspq.gen);
1658 R("FL ID:", fl.abs_id);
1659 R("FL size:", fl.size - MIN_FL_RESID);
1660 R("FL avail:", fl.avail);
1661 R("FL PIdx:", fl.pidx);
1662 R("FL CIdx:", fl.cidx);
1663 return 0;
1664 }
1665
1666 r -= eth_entries;
1667 if (r == 0) {
1668 const struct sge_rspq *evtq = &adapter->sge.fw_evtq;
1669
1670 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1671 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1672 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1673 qtimer_val(adapter, evtq));
1674 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1675 adapter->sge.counter_val[evtq->pktcnt_idx]);
1676 seq_printf(seq, "%-12s %16u\n", "RspQ Cidx:", evtq->cidx);
1677 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1678 } else if (r == 1) {
1679 const struct sge_rspq *intrq = &adapter->sge.intrq;
1680
1681 seq_printf(seq, "%-12s %16s\n", "QType:", "Interrupt Queue");
1682 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", intrq->abs_id);
1683 seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1684 qtimer_val(adapter, intrq));
1685 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1686 adapter->sge.counter_val[intrq->pktcnt_idx]);
1687 seq_printf(seq, "%-12s %16u\n", "RspQ Cidx:", intrq->cidx);
1688 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", intrq->gen);
1689 }
1690
1691 #undef R
1692 #undef T
1693 #undef S
1694 #undef S3
1695
1696 return 0;
1697}
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707static int sge_queue_entries(const struct adapter *adapter)
1708{
1709 return DIV_ROUND_UP(adapter->sge.ethqsets, QPL) + 1 +
1710 ((adapter->flags & USING_MSI) != 0);
1711}
1712
1713static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1714{
1715 int entries = sge_queue_entries(seq->private);
1716
1717 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1718}
1719
1720static void sge_queue_stop(struct seq_file *seq, void *v)
1721{
1722}
1723
1724static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1725{
1726 int entries = sge_queue_entries(seq->private);
1727
1728 ++*pos;
1729 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1730}
1731
1732static const struct seq_operations sge_qinfo_seq_ops = {
1733 .start = sge_queue_start,
1734 .next = sge_queue_next,
1735 .stop = sge_queue_stop,
1736 .show = sge_qinfo_show
1737};
1738
1739static int sge_qinfo_open(struct inode *inode, struct file *file)
1740{
1741 int res = seq_open(file, &sge_qinfo_seq_ops);
1742
1743 if (!res) {
1744 struct seq_file *seq = file->private_data;
1745 seq->private = inode->i_private;
1746 }
1747 return res;
1748}
1749
1750static const struct file_operations sge_qinfo_debugfs_fops = {
1751 .owner = THIS_MODULE,
1752 .open = sge_qinfo_open,
1753 .read = seq_read,
1754 .llseek = seq_lseek,
1755 .release = seq_release,
1756};
1757
1758
1759
1760
1761#define QPL 4
1762
1763static int sge_qstats_show(struct seq_file *seq, void *v)
1764{
1765 struct adapter *adapter = seq->private;
1766 int eth_entries = DIV_ROUND_UP(adapter->sge.ethqsets, QPL);
1767 int qs, r = (uintptr_t)v - 1;
1768
1769 if (r)
1770 seq_putc(seq, '\n');
1771
1772 #define S3(fmt, s, v) \
1773 do { \
1774 seq_printf(seq, "%-16s", s); \
1775 for (qs = 0; qs < n; ++qs) \
1776 seq_printf(seq, " %8" fmt, v); \
1777 seq_putc(seq, '\n'); \
1778 } while (0)
1779 #define S(s, v) S3("s", s, v)
1780
1781 #define T3(fmt, s, v) S3(fmt, s, txq[qs].v)
1782 #define T(s, v) T3("lu", s, v)
1783
1784 #define R3(fmt, s, v) S3(fmt, s, rxq[qs].v)
1785 #define R(s, v) R3("lu", s, v)
1786
1787 if (r < eth_entries) {
1788 const struct sge_eth_rxq *rxq = &adapter->sge.ethrxq[r * QPL];
1789 const struct sge_eth_txq *txq = &adapter->sge.ethtxq[r * QPL];
1790 int n = min(QPL, adapter->sge.ethqsets - QPL * r);
1791
1792 S("QType:", "Ethernet");
1793 S("Interface:",
1794 (rxq[qs].rspq.netdev
1795 ? rxq[qs].rspq.netdev->name
1796 : "N/A"));
1797 R3("u", "RspQNullInts:", rspq.unhandled_irqs);
1798 R("RxPackets:", stats.pkts);
1799 R("RxCSO:", stats.rx_cso);
1800 R("VLANxtract:", stats.vlan_ex);
1801 R("LROmerged:", stats.lro_merged);
1802 R("LROpackets:", stats.lro_pkts);
1803 R("RxDrops:", stats.rx_drops);
1804 T("TSO:", tso);
1805 T("TxCSO:", tx_cso);
1806 T("VLANins:", vlan_ins);
1807 T("TxQFull:", q.stops);
1808 T("TxQRestarts:", q.restarts);
1809 T("TxMapErr:", mapping_err);
1810 R("FLAllocErr:", fl.alloc_failed);
1811 R("FLLrgAlcErr:", fl.large_alloc_failed);
1812 R("FLStarving:", fl.starving);
1813 return 0;
1814 }
1815
1816 r -= eth_entries;
1817 if (r == 0) {
1818 const struct sge_rspq *evtq = &adapter->sge.fw_evtq;
1819
1820 seq_printf(seq, "%-8s %16s\n", "QType:", "FW event queue");
1821 seq_printf(seq, "%-16s %8u\n", "RspQNullInts:",
1822 evtq->unhandled_irqs);
1823 seq_printf(seq, "%-16s %8u\n", "RspQ CIdx:", evtq->cidx);
1824 seq_printf(seq, "%-16s %8u\n", "RspQ Gen:", evtq->gen);
1825 } else if (r == 1) {
1826 const struct sge_rspq *intrq = &adapter->sge.intrq;
1827
1828 seq_printf(seq, "%-8s %16s\n", "QType:", "Interrupt Queue");
1829 seq_printf(seq, "%-16s %8u\n", "RspQNullInts:",
1830 intrq->unhandled_irqs);
1831 seq_printf(seq, "%-16s %8u\n", "RspQ CIdx:", intrq->cidx);
1832 seq_printf(seq, "%-16s %8u\n", "RspQ Gen:", intrq->gen);
1833 }
1834
1835 #undef R
1836 #undef T
1837 #undef S
1838 #undef R3
1839 #undef T3
1840 #undef S3
1841
1842 return 0;
1843}
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853static int sge_qstats_entries(const struct adapter *adapter)
1854{
1855 return DIV_ROUND_UP(adapter->sge.ethqsets, QPL) + 1 +
1856 ((adapter->flags & USING_MSI) != 0);
1857}
1858
1859static void *sge_qstats_start(struct seq_file *seq, loff_t *pos)
1860{
1861 int entries = sge_qstats_entries(seq->private);
1862
1863 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1864}
1865
1866static void sge_qstats_stop(struct seq_file *seq, void *v)
1867{
1868}
1869
1870static void *sge_qstats_next(struct seq_file *seq, void *v, loff_t *pos)
1871{
1872 int entries = sge_qstats_entries(seq->private);
1873
1874 (*pos)++;
1875 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1876}
1877
1878static const struct seq_operations sge_qstats_seq_ops = {
1879 .start = sge_qstats_start,
1880 .next = sge_qstats_next,
1881 .stop = sge_qstats_stop,
1882 .show = sge_qstats_show
1883};
1884
1885static int sge_qstats_open(struct inode *inode, struct file *file)
1886{
1887 int res = seq_open(file, &sge_qstats_seq_ops);
1888
1889 if (res == 0) {
1890 struct seq_file *seq = file->private_data;
1891 seq->private = inode->i_private;
1892 }
1893 return res;
1894}
1895
1896static const struct file_operations sge_qstats_proc_fops = {
1897 .owner = THIS_MODULE,
1898 .open = sge_qstats_open,
1899 .read = seq_read,
1900 .llseek = seq_lseek,
1901 .release = seq_release,
1902};
1903
1904
1905
1906
1907static int resources_show(struct seq_file *seq, void *v)
1908{
1909 struct adapter *adapter = seq->private;
1910 struct vf_resources *vfres = &adapter->params.vfres;
1911
1912 #define S(desc, fmt, var) \
1913 seq_printf(seq, "%-60s " fmt "\n", \
1914 desc " (" #var "):", vfres->var)
1915
1916 S("Virtual Interfaces", "%d", nvi);
1917 S("Egress Queues", "%d", neq);
1918 S("Ethernet Control", "%d", nethctrl);
1919 S("Ingress Queues/w Free Lists/Interrupts", "%d", niqflint);
1920 S("Ingress Queues", "%d", niq);
1921 S("Traffic Class", "%d", tc);
1922 S("Port Access Rights Mask", "%#x", pmask);
1923 S("MAC Address Filters", "%d", nexactf);
1924 S("Firmware Command Read Capabilities", "%#x", r_caps);
1925 S("Firmware Command Write/Execute Capabilities", "%#x", wx_caps);
1926
1927 #undef S
1928
1929 return 0;
1930}
1931
1932static int resources_open(struct inode *inode, struct file *file)
1933{
1934 return single_open(file, resources_show, inode->i_private);
1935}
1936
1937static const struct file_operations resources_proc_fops = {
1938 .owner = THIS_MODULE,
1939 .open = resources_open,
1940 .read = seq_read,
1941 .llseek = seq_lseek,
1942 .release = single_release,
1943};
1944
1945
1946
1947
1948static int interfaces_show(struct seq_file *seq, void *v)
1949{
1950 if (v == SEQ_START_TOKEN) {
1951 seq_puts(seq, "Interface Port VIID\n");
1952 } else {
1953 struct adapter *adapter = seq->private;
1954 int pidx = (uintptr_t)v - 2;
1955 struct net_device *dev = adapter->port[pidx];
1956 struct port_info *pi = netdev_priv(dev);
1957
1958 seq_printf(seq, "%9s %4d %#5x\n",
1959 dev->name, pi->port_id, pi->viid);
1960 }
1961 return 0;
1962}
1963
1964static inline void *interfaces_get_idx(struct adapter *adapter, loff_t pos)
1965{
1966 return pos <= adapter->params.nports
1967 ? (void *)(uintptr_t)(pos + 1)
1968 : NULL;
1969}
1970
1971static void *interfaces_start(struct seq_file *seq, loff_t *pos)
1972{
1973 return *pos
1974 ? interfaces_get_idx(seq->private, *pos)
1975 : SEQ_START_TOKEN;
1976}
1977
1978static void *interfaces_next(struct seq_file *seq, void *v, loff_t *pos)
1979{
1980 (*pos)++;
1981 return interfaces_get_idx(seq->private, *pos);
1982}
1983
1984static void interfaces_stop(struct seq_file *seq, void *v)
1985{
1986}
1987
1988static const struct seq_operations interfaces_seq_ops = {
1989 .start = interfaces_start,
1990 .next = interfaces_next,
1991 .stop = interfaces_stop,
1992 .show = interfaces_show
1993};
1994
1995static int interfaces_open(struct inode *inode, struct file *file)
1996{
1997 int res = seq_open(file, &interfaces_seq_ops);
1998
1999 if (res == 0) {
2000 struct seq_file *seq = file->private_data;
2001 seq->private = inode->i_private;
2002 }
2003 return res;
2004}
2005
2006static const struct file_operations interfaces_proc_fops = {
2007 .owner = THIS_MODULE,
2008 .open = interfaces_open,
2009 .read = seq_read,
2010 .llseek = seq_lseek,
2011 .release = seq_release,
2012};
2013
2014
2015
2016
2017struct cxgb4vf_debugfs_entry {
2018 const char *name;
2019 mode_t mode;
2020 const struct file_operations *fops;
2021};
2022
2023static struct cxgb4vf_debugfs_entry debugfs_files[] = {
2024 { "sge_qinfo", S_IRUGO, &sge_qinfo_debugfs_fops },
2025 { "sge_qstats", S_IRUGO, &sge_qstats_proc_fops },
2026 { "resources", S_IRUGO, &resources_proc_fops },
2027 { "interfaces", S_IRUGO, &interfaces_proc_fops },
2028};
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039static int __devinit setup_debugfs(struct adapter *adapter)
2040{
2041 int i;
2042
2043 BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root));
2044
2045
2046
2047
2048 for (i = 0; i < ARRAY_SIZE(debugfs_files); i++)
2049 (void)debugfs_create_file(debugfs_files[i].name,
2050 debugfs_files[i].mode,
2051 adapter->debugfs_root,
2052 (void *)adapter,
2053 debugfs_files[i].fops);
2054
2055 return 0;
2056}
2057
2058
2059
2060
2061
2062static void cleanup_debugfs(struct adapter *adapter)
2063{
2064 BUG_ON(IS_ERR_OR_NULL(adapter->debugfs_root));
2065
2066
2067
2068
2069
2070
2071
2072
2073}
2074
2075
2076
2077
2078
2079
2080static int __devinit adap_init0(struct adapter *adapter)
2081{
2082 struct vf_resources *vfres = &adapter->params.vfres;
2083 struct sge_params *sge_params = &adapter->params.sge;
2084 struct sge *s = &adapter->sge;
2085 unsigned int ethqsets;
2086 int err;
2087
2088
2089
2090
2091 err = t4vf_wait_dev_ready(adapter);
2092 if (err) {
2093 dev_err(adapter->pdev_dev, "device didn't become ready:"
2094 " err=%d\n", err);
2095 return err;
2096 }
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108 err = t4vf_fw_reset(adapter);
2109 if (err < 0) {
2110 dev_err(adapter->pdev_dev, "FW reset failed: err=%d\n", err);
2111 return err;
2112 }
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122 err = t4vf_get_dev_params(adapter);
2123 if (err) {
2124 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2125 " device parameters: err=%d\n", err);
2126 return err;
2127 }
2128 err = t4vf_get_vpd_params(adapter);
2129 if (err) {
2130 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2131 " VPD parameters: err=%d\n", err);
2132 return err;
2133 }
2134 err = t4vf_get_sge_params(adapter);
2135 if (err) {
2136 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2137 " SGE parameters: err=%d\n", err);
2138 return err;
2139 }
2140 err = t4vf_get_rss_glb_config(adapter);
2141 if (err) {
2142 dev_err(adapter->pdev_dev, "unable to retrieve adapter"
2143 " RSS parameters: err=%d\n", err);
2144 return err;
2145 }
2146 if (adapter->params.rss.mode !=
2147 FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) {
2148 dev_err(adapter->pdev_dev, "unable to operate with global RSS"
2149 " mode %d\n", adapter->params.rss.mode);
2150 return -EINVAL;
2151 }
2152 err = t4vf_sge_init(adapter);
2153 if (err) {
2154 dev_err(adapter->pdev_dev, "unable to use adapter parameters:"
2155 " err=%d\n", err);
2156 return err;
2157 }
2158
2159
2160
2161
2162
2163 s->timer_val[0] = core_ticks_to_us(adapter,
2164 TIMERVALUE0_GET(sge_params->sge_timer_value_0_and_1));
2165 s->timer_val[1] = core_ticks_to_us(adapter,
2166 TIMERVALUE1_GET(sge_params->sge_timer_value_0_and_1));
2167 s->timer_val[2] = core_ticks_to_us(adapter,
2168 TIMERVALUE0_GET(sge_params->sge_timer_value_2_and_3));
2169 s->timer_val[3] = core_ticks_to_us(adapter,
2170 TIMERVALUE1_GET(sge_params->sge_timer_value_2_and_3));
2171 s->timer_val[4] = core_ticks_to_us(adapter,
2172 TIMERVALUE0_GET(sge_params->sge_timer_value_4_and_5));
2173 s->timer_val[5] = core_ticks_to_us(adapter,
2174 TIMERVALUE1_GET(sge_params->sge_timer_value_4_and_5));
2175
2176 s->counter_val[0] =
2177 THRESHOLD_0_GET(sge_params->sge_ingress_rx_threshold);
2178 s->counter_val[1] =
2179 THRESHOLD_1_GET(sge_params->sge_ingress_rx_threshold);
2180 s->counter_val[2] =
2181 THRESHOLD_2_GET(sge_params->sge_ingress_rx_threshold);
2182 s->counter_val[3] =
2183 THRESHOLD_3_GET(sge_params->sge_ingress_rx_threshold);
2184
2185
2186
2187
2188
2189
2190 err = t4vf_get_vfres(adapter);
2191 if (err) {
2192 dev_err(adapter->pdev_dev, "unable to get virtual interface"
2193 " resources: err=%d\n", err);
2194 return err;
2195 }
2196
2197
2198
2199
2200
2201 adapter->params.nports = vfres->nvi;
2202 if (adapter->params.nports > MAX_NPORTS) {
2203 dev_warn(adapter->pdev_dev, "only using %d of %d allowed"
2204 " virtual interfaces\n", MAX_NPORTS,
2205 adapter->params.nports);
2206 adapter->params.nports = MAX_NPORTS;
2207 }
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220 ethqsets = vfres->niqflint - INGQ_EXTRAS;
2221 if (vfres->nethctrl != ethqsets) {
2222 dev_warn(adapter->pdev_dev, "unequal number of [available]"
2223 " ingress/egress queues (%d/%d); using minimum for"
2224 " number of Queue Sets\n", ethqsets, vfres->nethctrl);
2225 ethqsets = min(vfres->nethctrl, ethqsets);
2226 }
2227 if (vfres->neq < ethqsets*2) {
2228 dev_warn(adapter->pdev_dev, "Not enough Egress Contexts (%d)"
2229 " to support Queue Sets (%d); reducing allowed Queue"
2230 " Sets\n", vfres->neq, ethqsets);
2231 ethqsets = vfres->neq/2;
2232 }
2233 if (ethqsets > MAX_ETH_QSETS) {
2234 dev_warn(adapter->pdev_dev, "only using %d of %d allowed Queue"
2235 " Sets\n", MAX_ETH_QSETS, adapter->sge.max_ethqsets);
2236 ethqsets = MAX_ETH_QSETS;
2237 }
2238 if (vfres->niq != 0 || vfres->neq > ethqsets*2) {
2239 dev_warn(adapter->pdev_dev, "unused resources niq/neq (%d/%d)"
2240 " ignored\n", vfres->niq, vfres->neq - ethqsets*2);
2241 }
2242 adapter->sge.max_ethqsets = ethqsets;
2243
2244
2245
2246
2247
2248
2249 if (adapter->sge.max_ethqsets < adapter->params.nports) {
2250 dev_warn(adapter->pdev_dev, "only using %d of %d available"
2251 " virtual interfaces (too few Queue Sets)\n",
2252 adapter->sge.max_ethqsets, adapter->params.nports);
2253 adapter->params.nports = adapter->sge.max_ethqsets;
2254 }
2255 if (adapter->params.nports == 0) {
2256 dev_err(adapter->pdev_dev, "no virtual interfaces configured/"
2257 "usable!\n");
2258 return -EINVAL;
2259 }
2260 return 0;
2261}
2262
2263static inline void init_rspq(struct sge_rspq *rspq, u8 timer_idx,
2264 u8 pkt_cnt_idx, unsigned int size,
2265 unsigned int iqe_size)
2266{
2267 rspq->intr_params = (QINTR_TIMER_IDX(timer_idx) |
2268 (pkt_cnt_idx < SGE_NCOUNTERS ? QINTR_CNT_EN : 0));
2269 rspq->pktcnt_idx = (pkt_cnt_idx < SGE_NCOUNTERS
2270 ? pkt_cnt_idx
2271 : 0);
2272 rspq->iqe_len = iqe_size;
2273 rspq->size = size;
2274}
2275
2276
2277
2278
2279
2280
2281
2282static void __devinit cfg_queues(struct adapter *adapter)
2283{
2284 struct sge *s = &adapter->sge;
2285 int q10g, n10g, qidx, pidx, qs;
2286 size_t iqe_size;
2287
2288
2289
2290
2291
2292
2293 BUG_ON((adapter->flags & (USING_MSIX|USING_MSI)) == 0);
2294
2295
2296
2297
2298 n10g = 0;
2299 for_each_port(adapter, pidx)
2300 n10g += is_10g_port(&adap2pinfo(adapter, pidx)->link_cfg);
2301
2302
2303
2304
2305
2306 if (n10g == 0)
2307 q10g = 0;
2308 else {
2309 int n1g = (adapter->params.nports - n10g);
2310 q10g = (adapter->sge.max_ethqsets - n1g) / n10g;
2311 if (q10g > num_online_cpus())
2312 q10g = num_online_cpus();
2313 }
2314
2315
2316
2317
2318
2319
2320 qidx = 0;
2321 for_each_port(adapter, pidx) {
2322 struct port_info *pi = adap2pinfo(adapter, pidx);
2323
2324 pi->first_qset = qidx;
2325 pi->nqsets = is_10g_port(&pi->link_cfg) ? q10g : 1;
2326 qidx += pi->nqsets;
2327 }
2328 s->ethqsets = qidx;
2329
2330
2331
2332
2333
2334
2335 iqe_size = 64;
2336
2337
2338
2339
2340
2341 for (qs = 0; qs < s->max_ethqsets; qs++) {
2342 struct sge_eth_rxq *rxq = &s->ethrxq[qs];
2343 struct sge_eth_txq *txq = &s->ethtxq[qs];
2344
2345 init_rspq(&rxq->rspq, 0, 0, 1024, iqe_size);
2346 rxq->fl.size = 72;
2347 txq->q.size = 1024;
2348 }
2349
2350
2351
2352
2353
2354 init_rspq(&s->fw_evtq, SGE_TIMER_RSTRT_CNTR, 0, 512, iqe_size);
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369 init_rspq(&s->intrq, SGE_TIMER_RSTRT_CNTR, 0, MSIX_ENTRIES + 1,
2370 iqe_size);
2371}
2372
2373
2374
2375
2376
2377static void __devinit reduce_ethqs(struct adapter *adapter, int n)
2378{
2379 int i;
2380 struct port_info *pi;
2381
2382
2383
2384
2385
2386 BUG_ON(n < adapter->params.nports);
2387 while (n < adapter->sge.ethqsets)
2388 for_each_port(adapter, i) {
2389 pi = adap2pinfo(adapter, i);
2390 if (pi->nqsets > 1) {
2391 pi->nqsets--;
2392 adapter->sge.ethqsets--;
2393 if (adapter->sge.ethqsets <= n)
2394 break;
2395 }
2396 }
2397
2398
2399
2400
2401 n = 0;
2402 for_each_port(adapter, i) {
2403 pi = adap2pinfo(adapter, i);
2404 pi->first_qset = n;
2405 n += pi->nqsets;
2406 }
2407}
2408
2409
2410
2411
2412
2413
2414
2415
2416static int __devinit enable_msix(struct adapter *adapter)
2417{
2418 int i, err, want, need;
2419 struct msix_entry entries[MSIX_ENTRIES];
2420 struct sge *s = &adapter->sge;
2421
2422 for (i = 0; i < MSIX_ENTRIES; ++i)
2423 entries[i].entry = i;
2424
2425
2426
2427
2428
2429
2430
2431
2432 want = s->max_ethqsets + MSIX_EXTRAS;
2433 need = adapter->params.nports + MSIX_EXTRAS;
2434 while ((err = pci_enable_msix(adapter->pdev, entries, want)) >= need)
2435 want = err;
2436
2437 if (err == 0) {
2438 int nqsets = want - MSIX_EXTRAS;
2439 if (nqsets < s->max_ethqsets) {
2440 dev_warn(adapter->pdev_dev, "only enough MSI-X vectors"
2441 " for %d Queue Sets\n", nqsets);
2442 s->max_ethqsets = nqsets;
2443 if (nqsets < s->ethqsets)
2444 reduce_ethqs(adapter, nqsets);
2445 }
2446 for (i = 0; i < want; ++i)
2447 adapter->msix_info[i].vec = entries[i].vector;
2448 } else if (err > 0) {
2449 pci_disable_msix(adapter->pdev);
2450 dev_info(adapter->pdev_dev, "only %d MSI-X vectors left,"
2451 " not using MSI-X\n", err);
2452 }
2453 return err;
2454}
2455
2456#ifdef HAVE_NET_DEVICE_OPS
2457static const struct net_device_ops cxgb4vf_netdev_ops = {
2458 .ndo_open = cxgb4vf_open,
2459 .ndo_stop = cxgb4vf_stop,
2460 .ndo_start_xmit = t4vf_eth_xmit,
2461 .ndo_get_stats = cxgb4vf_get_stats,
2462 .ndo_set_rx_mode = cxgb4vf_set_rxmode,
2463 .ndo_set_mac_address = cxgb4vf_set_mac_addr,
2464 .ndo_validate_addr = eth_validate_addr,
2465 .ndo_do_ioctl = cxgb4vf_do_ioctl,
2466 .ndo_change_mtu = cxgb4vf_change_mtu,
2467 .ndo_vlan_rx_register = cxgb4vf_vlan_rx_register,
2468#ifdef CONFIG_NET_POLL_CONTROLLER
2469 .ndo_poll_controller = cxgb4vf_poll_controller,
2470#endif
2471};
2472#endif
2473
2474
2475
2476
2477
2478
2479static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev,
2480 const struct pci_device_id *ent)
2481{
2482 static int version_printed;
2483
2484 int pci_using_dac;
2485 int err, pidx;
2486 unsigned int pmask;
2487 struct adapter *adapter;
2488 struct port_info *pi;
2489 struct net_device *netdev;
2490
2491
2492
2493
2494
2495 if (version_printed == 0) {
2496 printk(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
2497 version_printed = 1;
2498 }
2499
2500
2501
2502
2503 err = pci_enable_device(pdev);
2504 if (err) {
2505 dev_err(&pdev->dev, "cannot enable PCI device\n");
2506 return err;
2507 }
2508
2509
2510
2511
2512
2513 err = pci_request_regions(pdev, KBUILD_MODNAME);
2514 if (err) {
2515 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2516 goto err_disable_device;
2517 }
2518
2519
2520
2521
2522
2523 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2524 if (err == 0) {
2525 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
2526 if (err) {
2527 dev_err(&pdev->dev, "unable to obtain 64-bit DMA for"
2528 " coherent allocations\n");
2529 goto err_release_regions;
2530 }
2531 pci_using_dac = 1;
2532 } else {
2533 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2534 if (err != 0) {
2535 dev_err(&pdev->dev, "no usable DMA configuration\n");
2536 goto err_release_regions;
2537 }
2538 pci_using_dac = 0;
2539 }
2540
2541
2542
2543
2544 pci_set_master(pdev);
2545
2546
2547
2548
2549 adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
2550 if (!adapter) {
2551 err = -ENOMEM;
2552 goto err_release_regions;
2553 }
2554 pci_set_drvdata(pdev, adapter);
2555 adapter->pdev = pdev;
2556 adapter->pdev_dev = &pdev->dev;
2557
2558
2559
2560
2561 spin_lock_init(&adapter->stats_lock);
2562
2563
2564
2565
2566 adapter->regs = pci_ioremap_bar(pdev, 0);
2567 if (!adapter->regs) {
2568 dev_err(&pdev->dev, "cannot map device registers\n");
2569 err = -ENOMEM;
2570 goto err_free_adapter;
2571 }
2572
2573
2574
2575
2576 adapter->name = pci_name(pdev);
2577 adapter->msg_enable = dflt_msg_enable;
2578 err = adap_init0(adapter);
2579 if (err)
2580 goto err_unmap_bar;
2581
2582
2583
2584
2585 pmask = adapter->params.vfres.pmask;
2586 for_each_port(adapter, pidx) {
2587 int port_id, viid;
2588
2589
2590
2591
2592
2593
2594
2595 if (pmask == 0)
2596 break;
2597 port_id = ffs(pmask) - 1;
2598 pmask &= ~(1 << port_id);
2599 viid = t4vf_alloc_vi(adapter, port_id);
2600 if (viid < 0) {
2601 dev_err(&pdev->dev, "cannot allocate VI for port %d:"
2602 " err=%d\n", port_id, viid);
2603 err = viid;
2604 goto err_free_dev;
2605 }
2606
2607
2608
2609
2610 netdev = alloc_etherdev_mq(sizeof(struct port_info),
2611 MAX_PORT_QSETS);
2612 if (netdev == NULL) {
2613 dev_err(&pdev->dev, "cannot allocate netdev for"
2614 " port %d\n", port_id);
2615 t4vf_free_vi(adapter, viid);
2616 err = -ENOMEM;
2617 goto err_free_dev;
2618 }
2619 adapter->port[pidx] = netdev;
2620 SET_NETDEV_DEV(netdev, &pdev->dev);
2621 pi = netdev_priv(netdev);
2622 pi->adapter = adapter;
2623 pi->pidx = pidx;
2624 pi->port_id = port_id;
2625 pi->viid = viid;
2626
2627
2628
2629
2630
2631 pi->xact_addr_filt = -1;
2632 pi->rx_offload = RX_CSO;
2633 netif_carrier_off(netdev);
2634 netdev->irq = pdev->irq;
2635
2636 netdev->features = (NETIF_F_SG | TSO_FLAGS |
2637 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2638 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2639 NETIF_F_GRO);
2640 if (pci_using_dac)
2641 netdev->features |= NETIF_F_HIGHDMA;
2642 netdev->vlan_features =
2643 (netdev->features &
2644 ~(NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX));
2645
2646#ifdef HAVE_NET_DEVICE_OPS
2647 netdev->netdev_ops = &cxgb4vf_netdev_ops;
2648#else
2649 netdev->vlan_rx_register = cxgb4vf_vlan_rx_register;
2650 netdev->open = cxgb4vf_open;
2651 netdev->stop = cxgb4vf_stop;
2652 netdev->hard_start_xmit = t4vf_eth_xmit;
2653 netdev->get_stats = cxgb4vf_get_stats;
2654 netdev->set_rx_mode = cxgb4vf_set_rxmode;
2655 netdev->do_ioctl = cxgb4vf_do_ioctl;
2656 netdev->change_mtu = cxgb4vf_change_mtu;
2657 netdev->set_mac_address = cxgb4vf_set_mac_addr;
2658#ifdef CONFIG_NET_POLL_CONTROLLER
2659 netdev->poll_controller = cxgb4vf_poll_controller;
2660#endif
2661#endif
2662 SET_ETHTOOL_OPS(netdev, &cxgb4vf_ethtool_ops);
2663
2664
2665
2666
2667 err = t4vf_port_init(adapter, pidx);
2668 if (err) {
2669 dev_err(&pdev->dev, "cannot initialize port %d\n",
2670 pidx);
2671 goto err_free_dev;
2672 }
2673 }
2674
2675
2676
2677
2678
2679
2680
2681 for_each_port(adapter, pidx) {
2682 netdev = adapter->port[pidx];
2683 if (netdev == NULL)
2684 continue;
2685
2686 err = register_netdev(netdev);
2687 if (err) {
2688 dev_warn(&pdev->dev, "cannot register net device %s,"
2689 " skipping\n", netdev->name);
2690 continue;
2691 }
2692
2693 set_bit(pidx, &adapter->registered_device_map);
2694 }
2695 if (adapter->registered_device_map == 0) {
2696 dev_err(&pdev->dev, "could not register any net devices\n");
2697 goto err_free_dev;
2698 }
2699
2700
2701
2702
2703 if (!IS_ERR_OR_NULL(cxgb4vf_debugfs_root)) {
2704 adapter->debugfs_root =
2705 debugfs_create_dir(pci_name(pdev),
2706 cxgb4vf_debugfs_root);
2707 if (IS_ERR_OR_NULL(adapter->debugfs_root))
2708 dev_warn(&pdev->dev, "could not create debugfs"
2709 " directory");
2710 else
2711 setup_debugfs(adapter);
2712 }
2713
2714
2715
2716
2717
2718
2719
2720 if (msi == MSI_MSIX && enable_msix(adapter) == 0)
2721 adapter->flags |= USING_MSIX;
2722 else {
2723 err = pci_enable_msi(pdev);
2724 if (err) {
2725 dev_err(&pdev->dev, "Unable to allocate %s interrupts;"
2726 " err=%d\n",
2727 msi == MSI_MSIX ? "MSI-X or MSI" : "MSI", err);
2728 goto err_free_debugfs;
2729 }
2730 adapter->flags |= USING_MSI;
2731 }
2732
2733
2734
2735
2736
2737
2738 cfg_queues(adapter);
2739
2740
2741
2742
2743
2744 for_each_port(adapter, pidx) {
2745 dev_info(adapter->pdev_dev, "%s: Chelsio VF NIC PCIe %s\n",
2746 adapter->port[pidx]->name,
2747 (adapter->flags & USING_MSIX) ? "MSI-X" :
2748 (adapter->flags & USING_MSI) ? "MSI" : "");
2749 }
2750
2751
2752
2753
2754 return 0;
2755
2756
2757
2758
2759
2760
2761err_free_debugfs:
2762 if (!IS_ERR_OR_NULL(adapter->debugfs_root)) {
2763 cleanup_debugfs(adapter);
2764 debugfs_remove_recursive(adapter->debugfs_root);
2765 }
2766
2767err_free_dev:
2768 for_each_port(adapter, pidx) {
2769 netdev = adapter->port[pidx];
2770 if (netdev == NULL)
2771 continue;
2772 pi = netdev_priv(netdev);
2773 t4vf_free_vi(adapter, pi->viid);
2774 if (test_bit(pidx, &adapter->registered_device_map))
2775 unregister_netdev(netdev);
2776 free_netdev(netdev);
2777 }
2778
2779err_unmap_bar:
2780 iounmap(adapter->regs);
2781
2782err_free_adapter:
2783 kfree(adapter);
2784 pci_set_drvdata(pdev, NULL);
2785
2786err_release_regions:
2787 pci_release_regions(pdev);
2788 pci_set_drvdata(pdev, NULL);
2789 pci_clear_master(pdev);
2790
2791err_disable_device:
2792 pci_disable_device(pdev);
2793
2794 return err;
2795}
2796
2797
2798
2799
2800
2801
2802static void __devexit cxgb4vf_pci_remove(struct pci_dev *pdev)
2803{
2804 struct adapter *adapter = pci_get_drvdata(pdev);
2805
2806
2807
2808
2809 if (adapter) {
2810 int pidx;
2811
2812
2813
2814
2815
2816 for_each_port(adapter, pidx)
2817 if (test_bit(pidx, &adapter->registered_device_map))
2818 unregister_netdev(adapter->port[pidx]);
2819 t4vf_sge_stop(adapter);
2820 if (adapter->flags & USING_MSIX) {
2821 pci_disable_msix(adapter->pdev);
2822 adapter->flags &= ~USING_MSIX;
2823 } else if (adapter->flags & USING_MSI) {
2824 pci_disable_msi(adapter->pdev);
2825 adapter->flags &= ~USING_MSI;
2826 }
2827
2828
2829
2830
2831 if (!IS_ERR_OR_NULL(adapter->debugfs_root)) {
2832 cleanup_debugfs(adapter);
2833 debugfs_remove_recursive(adapter->debugfs_root);
2834 }
2835
2836
2837
2838
2839 t4vf_free_sge_resources(adapter);
2840 for_each_port(adapter, pidx) {
2841 struct net_device *netdev = adapter->port[pidx];
2842 struct port_info *pi;
2843
2844 if (netdev == NULL)
2845 continue;
2846
2847 pi = netdev_priv(netdev);
2848 t4vf_free_vi(adapter, pi->viid);
2849 free_netdev(netdev);
2850 }
2851 iounmap(adapter->regs);
2852 kfree(adapter);
2853 pci_set_drvdata(pdev, NULL);
2854 }
2855
2856
2857
2858
2859 pci_disable_device(pdev);
2860 pci_clear_master(pdev);
2861 pci_release_regions(pdev);
2862}
2863
2864
2865
2866
2867
2868static void __devexit cxgb4vf_pci_shutdown(struct pci_dev *pdev)
2869{
2870 struct adapter *adapter;
2871 int pidx;
2872
2873 adapter = pci_get_drvdata(pdev);
2874 if (!adapter)
2875 return;
2876
2877
2878
2879
2880
2881
2882 for_each_port(adapter, pidx) {
2883 struct net_device *netdev;
2884 struct port_info *pi;
2885
2886 if (!test_bit(pidx, &adapter->registered_device_map))
2887 continue;
2888
2889 netdev = adapter->port[pidx];
2890 if (!netdev)
2891 continue;
2892
2893 pi = netdev_priv(netdev);
2894 t4vf_enable_vi(adapter, pi->viid, false, false);
2895 }
2896
2897
2898
2899
2900
2901 t4vf_free_sge_resources(adapter);
2902}
2903
2904
2905
2906
2907#define CH_DEVICE(devid, idx) \
2908 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
2909
2910static struct pci_device_id cxgb4vf_pci_tbl[] = {
2911 CH_DEVICE(0xb000, 0),
2912 CH_DEVICE(0x4800, 0),
2913 CH_DEVICE(0x4801, 0),
2914 CH_DEVICE(0x4802, 0),
2915 CH_DEVICE(0x4803, 0),
2916 CH_DEVICE(0x4804, 0),
2917 CH_DEVICE(0x4805, 0),
2918 CH_DEVICE(0x4806, 0),
2919 CH_DEVICE(0x4807, 0),
2920 CH_DEVICE(0x4808, 0),
2921 CH_DEVICE(0x4809, 0),
2922 CH_DEVICE(0x480a, 0),
2923 { 0, }
2924};
2925
2926MODULE_DESCRIPTION(DRV_DESC);
2927MODULE_AUTHOR("Chelsio Communications");
2928MODULE_LICENSE("Dual BSD/GPL");
2929MODULE_VERSION(DRV_VERSION);
2930MODULE_DEVICE_TABLE(pci, cxgb4vf_pci_tbl);
2931
2932static struct pci_driver cxgb4vf_driver = {
2933 .name = KBUILD_MODNAME,
2934 .id_table = cxgb4vf_pci_tbl,
2935 .probe = cxgb4vf_pci_probe,
2936 .remove = __devexit_p(cxgb4vf_pci_remove),
2937 .shutdown = __devexit_p(cxgb4vf_pci_shutdown),
2938};
2939
2940
2941
2942
2943static int __init cxgb4vf_module_init(void)
2944{
2945 int ret;
2946
2947
2948
2949
2950 if (msi != MSI_MSIX && msi != MSI_MSI) {
2951 printk(KERN_WARNING KBUILD_MODNAME
2952 ": bad module parameter msi=%d; must be %d"
2953 " (MSI-X or MSI) or %d (MSI)\n",
2954 msi, MSI_MSIX, MSI_MSI);
2955 return -EINVAL;
2956 }
2957
2958
2959 cxgb4vf_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
2960 if (IS_ERR_OR_NULL(cxgb4vf_debugfs_root))
2961 printk(KERN_WARNING KBUILD_MODNAME ": could not create"
2962 " debugfs entry, continuing\n");
2963
2964 ret = pci_register_driver(&cxgb4vf_driver);
2965 if (ret < 0 && !IS_ERR_OR_NULL(cxgb4vf_debugfs_root))
2966 debugfs_remove(cxgb4vf_debugfs_root);
2967 return ret;
2968}
2969
2970
2971
2972
2973static void __exit cxgb4vf_module_exit(void)
2974{
2975 pci_unregister_driver(&cxgb4vf_driver);
2976 debugfs_remove(cxgb4vf_debugfs_root);
2977}
2978
2979module_init(cxgb4vf_module_init);
2980module_exit(cxgb4vf_module_exit);
2981