LXR linux/drivers/net/fs

   1/*
   2 * Combined Ethernet driver for Motorola MPC8xx and MPC82xx.
   3 *
   4 * Copyright (c) 2003 Intracom S.A.
   5 *  by Pantelis Antoniou <panto@intracom.gr>
   6 *
   7 * 2005 (c) MontaVista Software, Inc.
   8 * Vitaly Bordug <vbordug@ru.mvista.com>
   9 *
  10 * This file is licensed under the terms of the GNU General Public License
  11 * version 2. This program is licensed "as is" without any warranty of any
  12 * kind, whether express or implied.
  13 */
  14
  15#include <linux/module.h>
  16#include <linux/types.h>
  17#include <linux/kernel.h>
  18#include <linux/string.h>
  19#include <linux/ptrace.h>
  20#include <linux/errno.h>
  21#include <linux/ioport.h>
  22#include <linux/slab.h>
  23#include <linux/interrupt.h>
  24#include <linux/init.h>
  25#include <linux/delay.h>
  26#include <linux/netdevice.h>
  27#include <linux/etherdevice.h>
  28#include <linux/skbuff.h>
  29#include <linux/spinlock.h>
  30#include <linux/mii.h>
  31#include <linux/ethtool.h>
  32#include <linux/bitops.h>
  33#include <linux/platform_device.h>
  34#include <linux/of_platform.h>
  35
  36#include <asm/pgtable.h>
  37#include <asm/irq.h>
  38#include <asm/uaccess.h>
  39#include <asm/mpc5xxx.h>
  40
  41#include "fs_enet.h"
  42#include "fec.h"
  43
  44/* Make MII read/write commands for the FEC.
  45*/
  46#define mk_mii_read(REG)        (0x60020000 | ((REG & 0x1f) << 18))
  47#define mk_mii_write(REG, VAL)  (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
  48#define mk_mii_end              0
  49
  50#define FEC_MII_LOOPS   10000
  51
  52static int fs_enet_fec_mii_read(struct mii_bus *bus , int phy_id, int location)
  53{
  54        struct fec_info* fec = bus->priv;
  55        struct fec __iomem *fecp = fec->fecp;
  56        int i, ret = -1;
  57
  58        BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  59
  60        /* Add PHY address to register command.  */
  61        out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_read(location));
  62
  63        for (i = 0; i < FEC_MII_LOOPS; i++)
  64                if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  65                        break;
  66
  67        if (i < FEC_MII_LOOPS) {
  68                out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  69                ret = in_be32(&fecp->fec_mii_data) & 0xffff;
  70        }
  71
  72        return ret;
  73}
  74
  75static int fs_enet_fec_mii_write(struct mii_bus *bus, int phy_id, int location, u16 val)
  76{
  77        struct fec_info* fec = bus->priv;
  78        struct fec __iomem *fecp = fec->fecp;
  79        int i;
  80
  81        /* this must never happen */
  82        BUG_ON((in_be32(&fecp->fec_r_cntrl) & FEC_RCNTRL_MII_MODE) == 0);
  83
  84        /* Add PHY address to register command.  */
  85        out_be32(&fecp->fec_mii_data, (phy_id << 23) | mk_mii_write(location, val));
  86
  87        for (i = 0; i < FEC_MII_LOOPS; i++)
  88                if ((in_be32(&fecp->fec_ievent) & FEC_ENET_MII) != 0)
  89                        break;
  90
  91        if (i < FEC_MII_LOOPS)
  92                out_be32(&fecp->fec_ievent, FEC_ENET_MII);
  93
  94        return 0;
  95
  96}
  97
  98static int fs_enet_fec_mii_reset(struct mii_bus *bus)
  99{
 100        /* nothing here - for now */
 101        return 0;
 102}
 103
 104static int __devinit fs_enet_mdio_probe(struct platform_device *ofdev,
 105                                        const struct of_device_id *match)
 106{
 107        struct resource res;
 108        struct mii_bus *new_bus;
 109        struct fec_info *fec;
 110        int (*get_bus_freq)(struct device_node *) = match->data;
 111        int ret = -ENOMEM, clock, speed;
 112
 113        new_bus = mdiobus_alloc();
 114        if (!new_bus)
 115                goto out;
 116
 117        fec = kzalloc(sizeof(struct fec_info), GFP_KERNEL);
 118        if (!fec)
 119                goto out_mii;
 120
 121        new_bus->priv = fec;
 122        new_bus->name = "FEC MII Bus";
 123        new_bus->read = &fs_enet_fec_mii_read;
 124        new_bus->write = &fs_enet_fec_mii_write;
 125        new_bus->reset = &fs_enet_fec_mii_reset;
 126
 127        ret = of_address_to_resource(ofdev->dev.of_node, 0, &res);
 128        if (ret)
 129                goto out_res;
 130
 131        snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
 132
 133        fec->fecp = ioremap(res.start, res.end - res.start + 1);
 134        if (!fec->fecp)
 135                goto out_fec;
 136
 137        if (get_bus_freq) {
 138                clock = get_bus_freq(ofdev->dev.of_node);
 139                if (!clock) {
 140                        /* Use maximum divider if clock is unknown */
 141                        dev_warn(&ofdev->dev, "could not determine IPS clock\n");
 142                        clock = 0x3F * 5000000;
 143                }
 144        } else
 145                clock = ppc_proc_freq;
 146
 147        /*
 148         * Scale for a MII clock <= 2.5 MHz
 149         * Note that only 6 bits (25:30) are available for MII speed.
 150         */
 151        speed = (clock + 4999999) / 5000000;
 152        if (speed > 0x3F) {
 153                speed = 0x3F;
 154                dev_err(&ofdev->dev,
 155                        "MII clock (%d Hz) exceeds max (2.5 MHz)\n",
 156                        clock / speed);
 157        }
 158
 159        fec->mii_speed = speed << 1;
 160
 161        setbits32(&fec->fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
 162        setbits32(&fec->fecp->fec_ecntrl, FEC_ECNTRL_PINMUX |
 163                                          FEC_ECNTRL_ETHER_EN);
 164        out_be32(&fec->fecp->fec_ievent, FEC_ENET_MII);
 165        clrsetbits_be32(&fec->fecp->fec_mii_speed, 0x7E, fec->mii_speed);
 166
 167        new_bus->phy_mask = ~0;
 168        new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 169        if (!new_bus->irq)
 170                goto out_unmap_regs;
 171
 172        new_bus->parent = &ofdev->dev;
 173        dev_set_drvdata(&ofdev->dev, new_bus);
 174
 175        ret = of_mdiobus_register(new_bus, ofdev->dev.of_node);
 176        if (ret)
 177                goto out_free_irqs;
 178
 179        return 0;
 180
 181out_free_irqs:
 182        dev_set_drvdata(&ofdev->dev, NULL);
 183        kfree(new_bus->irq);
 184out_unmap_regs:
 185        iounmap(fec->fecp);
 186out_res:
 187out_fec:
 188        kfree(fec);
 189out_mii:
 190        mdiobus_free(new_bus);
 191out:
 192        return ret;
 193}
 194
 195static int fs_enet_mdio_remove(struct platform_device *ofdev)
 196{
 197        struct mii_bus *bus = dev_get_drvdata(&ofdev->dev);
 198        struct fec_info *fec = bus->priv;
 199
 200        mdiobus_unregister(bus);
 201        dev_set_drvdata(&ofdev->dev, NULL);
 202        kfree(bus->irq);
 203        iounmap(fec->fecp);
 204        kfree(fec);
 205        mdiobus_free(bus);
 206
 207        return 0;
 208}
 209
 210static struct of_device_id fs_enet_mdio_fec_match[] = {
 211        {
 212                .compatible = "fsl,pq1-fec-mdio",
 213        },
 214#if defined(CONFIG_PPC_MPC512x)
 215        {
 216                .compatible = "fsl,mpc5121-fec-mdio",
 217                .data = mpc5xxx_get_bus_frequency,
 218        },
 219#endif
 220        {},
 221};
 222MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
 223
 224static struct of_platform_driver fs_enet_fec_mdio_driver = {
 225        .driver = {
 226                .name = "fsl-fec-mdio",
 227                .owner = THIS_MODULE,
 228                .of_match_table = fs_enet_mdio_fec_match,
 229        },
 230        .probe = fs_enet_mdio_probe,
 231        .remove = fs_enet_mdio_remove,
 232};
 233
 234static int fs_enet_mdio_fec_init(void)
 235{
 236        return of_register_platform_driver(&fs_enet_fec_mdio_driver);
 237}
 238
 239static void fs_enet_mdio_fec_exit(void)
 240{
 241        of_unregister_platform_driver(&fs_enet_fec_mdio_driver);
 242}
 243
 244module_init(fs_enet_mdio_fec_init);
 245module_exit(fs_enet_mdio_fec_exit);
 246