linux/drivers/net/hamradio/scc.c
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   1#define RCS_ID "$Id: scc.c,v 1.75 1998/11/04 15:15:01 jreuter Exp jreuter $"
   2
   3#define VERSION "3.0"
   4
   5/*
   6 * Please use z8530drv-utils-3.0 with this version.
   7 *            ------------------
   8 *
   9 * You can find a subset of the documentation in 
  10 * Documentation/networking/z8530drv.txt.
  11 */
  12
  13/*
  14   ********************************************************************
  15   *   SCC.C - Linux driver for Z8530 based HDLC cards for AX.25      *
  16   ********************************************************************
  17
  18
  19   ********************************************************************
  20
  21        Copyright (c) 1993, 2000 Joerg Reuter DL1BKE
  22
  23        portions (c) 1993 Guido ten Dolle PE1NNZ
  24
  25   ********************************************************************
  26   
  27   The driver and the programs in the archive are UNDER CONSTRUCTION.
  28   The code is likely to fail, and so your kernel could --- even 
  29   a whole network. 
  30
  31   This driver is intended for Amateur Radio use. If you are running it
  32   for commercial purposes, please drop me a note. I am nosy...
  33
  34   ...BUT:
  35 
  36   ! You  m u s t  recognize the appropriate legislations of your country !
  37   ! before you connect a radio to the SCC board and start to transmit or !
  38   ! receive. The GPL allows you to use the  d r i v e r,  NOT the RADIO! !
  39
  40   For non-Amateur-Radio use please note that you might need a special
  41   allowance/licence from the designer of the SCC Board and/or the
  42   MODEM. 
  43
  44   This program is free software; you can redistribute it and/or modify 
  45   it under the terms of the (modified) GNU General Public License 
  46   delivered with the Linux kernel source.
  47   
  48   This program is distributed in the hope that it will be useful,
  49   but WITHOUT ANY WARRANTY; without even the implied warranty of
  50   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  51   GNU General Public License for more details.
  52
  53   You should find a copy of the GNU General Public License in 
  54   /usr/src/linux/COPYING; 
  55   
  56   ******************************************************************** 
  57
  58                
  59   Incomplete history of z8530drv:
  60   -------------------------------
  61
  62   1994-09-13   started to write the driver, rescued most of my own
  63                code (and Hans Alblas' memory buffer pool concept) from 
  64                an earlier project "sccdrv" which was initiated by 
  65                Guido ten Dolle. Not much of the old driver survived, 
  66                though. The first version I put my hands on was sccdrv1.3
  67                from August 1993. The memory buffer pool concept
  68                appeared in an unauthorized sccdrv version (1.5) from
  69                August 1994.
  70
  71   1995-01-31   changed copyright notice to GPL without limitations.
  72   
  73     .
  74     .  <SNIP>
  75     .
  76                  
  77   1996-10-05   New semester, new driver... 
  78
  79                  * KISS TNC emulator removed (TTY driver)
  80                  * Source moved to drivers/net/
  81                  * Includes Z8530 defines from drivers/net/z8530.h
  82                  * Uses sk_buffer memory management
  83                  * Reduced overhead of /proc/net/z8530drv output
  84                  * Streamlined quite a lot things
  85                  * Invents brand new bugs... ;-)
  86
  87                  The move to version number 3.0 reflects theses changes.
  88                  You can use 'kissbridge' if you need a KISS TNC emulator.
  89
  90   1996-12-13   Fixed for Linux networking changes. (G4KLX)
  91   1997-01-08   Fixed the remaining problems.
  92   1997-04-02   Hopefully fixed the problems with the new *_timer()
  93                routines, added calibration code.
  94   1997-10-12   Made SCC_DELAY a CONFIG option, added CONFIG_SCC_TRXECHO
  95   1998-01-29   Small fix to avoid lock-up on initialization
  96   1998-09-29   Fixed the "grouping" bugs, tx_inhibit works again,
  97                using dev->tx_queue_len now instead of MAXQUEUE now.
  98   1998-10-21   Postponed the spinlock changes, would need a lot of
  99                testing I currently don't have the time to. Softdcd doesn't
 100                work.
 101   1998-11-04   Softdcd does not work correctly in DPLL mode, in fact it 
 102                never did. The DPLL locks on noise, the SYNC unit sees
 103                flags that aren't... Restarting the DPLL does not help
 104                either, it resynchronizes too slow and the first received
 105                frame gets lost.
 106   2000-02-13   Fixed for new network driver interface changes, still
 107                does TX timeouts itself since it uses its own queue
 108                scheme.
 109
 110   Thanks to all who contributed to this driver with ideas and bug
 111   reports!
 112   
 113   NB -- if you find errors, change something, please let me know
 114         first before you distribute it... And please don't touch
 115         the version number. Just replace my callsign in
 116         "v3.0.dl1bke" with your own. Just to avoid confusion...
 117
 118   If you want to add your modification to the linux distribution
 119   please (!) contact me first.
 120   
 121   New versions of the driver will be announced on the linux-hams
 122   mailing list on vger.kernel.org. To subscribe send an e-mail
 123   to majordomo@vger.kernel.org with the following line in
 124   the body of the mail:
 125   
 126           subscribe linux-hams
 127           
 128   The content of the "Subject" field will be ignored.
 129
 130   vy 73,
 131   Joerg Reuter ampr-net: dl1bke@db0pra.ampr.org
 132                AX-25   : DL1BKE @ DB0ABH.#BAY.DEU.EU
 133                Internet: jreuter@yaina.de
 134                www     : http://yaina.de/jreuter
 135*/
 136
 137/* ----------------------------------------------------------------------- */
 138
 139#undef  SCC_LDELAY              /* slow it even a bit more down */
 140#undef  SCC_DONT_CHECK          /* don't look if the SCCs you specified are available */
 141
 142#define SCC_MAXCHIPS    4       /* number of max. supported chips */
 143#define SCC_BUFSIZE     384     /* must not exceed 4096 */
 144#undef  SCC_DEBUG
 145
 146#define SCC_DEFAULT_CLOCK       4915200 
 147                                /* default pclock if nothing is specified */
 148
 149/* ----------------------------------------------------------------------- */
 150
 151#include <linux/module.h>
 152#include <linux/errno.h>
 153#include <linux/signal.h>
 154#include <linux/timer.h>
 155#include <linux/interrupt.h>
 156#include <linux/ioport.h>
 157#include <linux/string.h>
 158#include <linux/in.h>
 159#include <linux/fcntl.h>
 160#include <linux/ptrace.h>
 161#include <linux/delay.h>
 162#include <linux/skbuff.h>
 163#include <linux/netdevice.h>
 164#include <linux/rtnetlink.h>
 165#include <linux/if_ether.h>
 166#include <linux/if_arp.h>
 167#include <linux/socket.h>
 168#include <linux/init.h>
 169#include <linux/scc.h>
 170#include <linux/ctype.h>
 171#include <linux/kernel.h>
 172#include <linux/proc_fs.h>
 173#include <linux/seq_file.h>
 174#include <linux/bitops.h>
 175
 176#include <net/net_namespace.h>
 177#include <net/ax25.h>
 178
 179#include <asm/irq.h>
 180#include <asm/system.h>
 181#include <asm/io.h>
 182#include <asm/uaccess.h>
 183
 184#include "z8530.h"
 185
 186static const char banner[] __initdata = KERN_INFO \
 187        "AX.25: Z8530 SCC driver version "VERSION".dl1bke\n";
 188
 189static void t_dwait(unsigned long);
 190static void t_txdelay(unsigned long);
 191static void t_tail(unsigned long);
 192static void t_busy(unsigned long);
 193static void t_maxkeyup(unsigned long);
 194static void t_idle(unsigned long);
 195static void scc_tx_done(struct scc_channel *);
 196static void scc_start_tx_timer(struct scc_channel *, void (*)(unsigned long), unsigned long);
 197static void scc_start_maxkeyup(struct scc_channel *);
 198static void scc_start_defer(struct scc_channel *);
 199
 200static void z8530_init(void);
 201
 202static void init_channel(struct scc_channel *scc);
 203static void scc_key_trx (struct scc_channel *scc, char tx);
 204static void scc_init_timer(struct scc_channel *scc);
 205
 206static int scc_net_alloc(const char *name, struct scc_channel *scc);
 207static void scc_net_setup(struct net_device *dev);
 208static int scc_net_open(struct net_device *dev);
 209static int scc_net_close(struct net_device *dev);
 210static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb);
 211static netdev_tx_t scc_net_tx(struct sk_buff *skb,
 212                              struct net_device *dev);
 213static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
 214static int scc_net_set_mac_address(struct net_device *dev, void *addr);
 215static struct net_device_stats * scc_net_get_stats(struct net_device *dev);
 216
 217static unsigned char SCC_DriverName[] = "scc";
 218
 219static struct irqflags { unsigned char used : 1; } Ivec[NR_IRQS];
 220        
 221static struct scc_channel SCC_Info[2 * SCC_MAXCHIPS];   /* information per channel */
 222
 223static struct scc_ctrl {
 224        io_port chan_A;
 225        io_port chan_B;
 226        int irq;
 227} SCC_ctrl[SCC_MAXCHIPS+1];
 228
 229static unsigned char Driver_Initialized;
 230static int Nchips;
 231static io_port Vector_Latch;
 232
 233
 234/* ******************************************************************** */
 235/* *                    Port Access Functions                         * */
 236/* ******************************************************************** */
 237
 238/* These provide interrupt save 2-step access to the Z8530 registers */
 239
 240static DEFINE_SPINLOCK(iolock); /* Guards paired accesses */
 241
 242static inline unsigned char InReg(io_port port, unsigned char reg)
 243{
 244        unsigned long flags;
 245        unsigned char r;
 246
 247        spin_lock_irqsave(&iolock, flags);      
 248#ifdef SCC_LDELAY
 249        Outb(port, reg);
 250        udelay(SCC_LDELAY);
 251        r=Inb(port);
 252        udelay(SCC_LDELAY);
 253#else
 254        Outb(port, reg);
 255        r=Inb(port);
 256#endif
 257        spin_unlock_irqrestore(&iolock, flags);
 258        return r;
 259}
 260
 261static inline void OutReg(io_port port, unsigned char reg, unsigned char val)
 262{
 263        unsigned long flags;
 264
 265        spin_lock_irqsave(&iolock, flags);
 266#ifdef SCC_LDELAY
 267        Outb(port, reg); udelay(SCC_LDELAY);
 268        Outb(port, val); udelay(SCC_LDELAY);
 269#else
 270        Outb(port, reg);
 271        Outb(port, val);
 272#endif
 273        spin_unlock_irqrestore(&iolock, flags);
 274}
 275
 276static inline void wr(struct scc_channel *scc, unsigned char reg,
 277        unsigned char val)
 278{
 279        OutReg(scc->ctrl, reg, (scc->wreg[reg] = val));
 280}
 281
 282static inline void or(struct scc_channel *scc, unsigned char reg, unsigned char val)
 283{
 284        OutReg(scc->ctrl, reg, (scc->wreg[reg] |= val));
 285}
 286
 287static inline void cl(struct scc_channel *scc, unsigned char reg, unsigned char val)
 288{
 289        OutReg(scc->ctrl, reg, (scc->wreg[reg] &= ~val));
 290}
 291
 292/* ******************************************************************** */
 293/* *                    Some useful macros                            * */
 294/* ******************************************************************** */
 295
 296static inline void scc_discard_buffers(struct scc_channel *scc)
 297{
 298        unsigned long flags;
 299        
 300        spin_lock_irqsave(&scc->lock, flags);   
 301        if (scc->tx_buff != NULL)
 302        {
 303                dev_kfree_skb(scc->tx_buff);
 304                scc->tx_buff = NULL;
 305        }
 306        
 307        while (!skb_queue_empty(&scc->tx_queue))
 308                dev_kfree_skb(skb_dequeue(&scc->tx_queue));
 309
 310        spin_unlock_irqrestore(&scc->lock, flags);
 311}
 312
 313
 314
 315/* ******************************************************************** */
 316/* *                    Interrupt Service Routines                    * */
 317/* ******************************************************************** */
 318
 319
 320/* ----> subroutines for the interrupt handlers <---- */
 321
 322static inline void scc_notify(struct scc_channel *scc, int event)
 323{
 324        struct sk_buff *skb;
 325        char *bp;
 326        
 327        if (scc->kiss.fulldup != KISS_DUPLEX_OPTIMA)
 328                return;
 329
 330        skb = dev_alloc_skb(2);
 331        if (skb != NULL)
 332        {
 333                bp = skb_put(skb, 2);
 334                *bp++ = PARAM_HWEVENT;
 335                *bp++ = event;
 336                scc_net_rx(scc, skb);
 337        } else
 338                scc->stat.nospace++;
 339}
 340
 341static inline void flush_rx_FIFO(struct scc_channel *scc)
 342{
 343        int k;
 344        
 345        for (k=0; k<3; k++)
 346                Inb(scc->data);
 347                
 348        if(scc->rx_buff != NULL)                /* did we receive something? */
 349        {
 350                scc->stat.rxerrs++;  /* then count it as an error */
 351                dev_kfree_skb_irq(scc->rx_buff);
 352                scc->rx_buff = NULL;
 353        }
 354}
 355
 356static void start_hunt(struct scc_channel *scc)
 357{
 358        if ((scc->modem.clocksrc != CLK_EXTERNAL))
 359                OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
 360        or(scc,R3,ENT_HM|RxENABLE);  /* enable the receiver, hunt mode */
 361}
 362
 363/* ----> four different interrupt handlers for Tx, Rx, changing of      */
 364/*       DCD/CTS and Rx/Tx errors                                       */
 365
 366/* Transmitter interrupt handler */
 367static inline void scc_txint(struct scc_channel *scc)
 368{
 369        struct sk_buff *skb;
 370
 371        scc->stat.txints++;
 372        skb = scc->tx_buff;
 373        
 374        /* send first octet */
 375        
 376        if (skb == NULL)
 377        {
 378                skb = skb_dequeue(&scc->tx_queue);
 379                scc->tx_buff = skb;
 380                netif_wake_queue(scc->dev);
 381
 382                if (skb == NULL)
 383                {
 384                        scc_tx_done(scc);
 385                        Outb(scc->ctrl, RES_Tx_P);
 386                        return;
 387                }
 388                
 389                if (skb->len == 0)              /* Paranoia... */
 390                {
 391                        dev_kfree_skb_irq(skb);
 392                        scc->tx_buff = NULL;
 393                        scc_tx_done(scc);
 394                        Outb(scc->ctrl, RES_Tx_P);
 395                        return;
 396                }
 397
 398                scc->stat.tx_state = TXS_ACTIVE;
 399
 400                OutReg(scc->ctrl, R0, RES_Tx_CRC);
 401                                                /* reset CRC generator */
 402                or(scc,R10,ABUNDER);            /* re-install underrun protection */
 403                Outb(scc->data,*skb->data);     /* send byte */
 404                skb_pull(skb, 1);
 405
 406                if (!scc->enhanced)             /* reset EOM latch */
 407                        Outb(scc->ctrl,RES_EOM_L);
 408                return;
 409        }
 410        
 411        /* End Of Frame... */
 412        
 413        if (skb->len == 0)
 414        {
 415                Outb(scc->ctrl, RES_Tx_P);      /* reset pending int */
 416                cl(scc, R10, ABUNDER);          /* send CRC */
 417                dev_kfree_skb_irq(skb);
 418                scc->tx_buff = NULL;
 419                scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */
 420                return;
 421        } 
 422        
 423        /* send octet */
 424        
 425        Outb(scc->data,*skb->data);             
 426        skb_pull(skb, 1);
 427}
 428
 429
 430/* External/Status interrupt handler */
 431static inline void scc_exint(struct scc_channel *scc)
 432{
 433        unsigned char status,changes,chg_and_stat;
 434
 435        scc->stat.exints++;
 436
 437        status = InReg(scc->ctrl,R0);
 438        changes = status ^ scc->status;
 439        chg_and_stat = changes & status;
 440        
 441        /* ABORT: generated whenever DCD drops while receiving */
 442
 443        if (chg_and_stat & BRK_ABRT)            /* Received an ABORT */
 444                flush_rx_FIFO(scc);
 445
 446        /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */
 447
 448        if ((changes & SYNC_HUNT) && scc->kiss.softdcd)
 449        {
 450                if (status & SYNC_HUNT)
 451                {
 452                        scc->dcd = 0;
 453                        flush_rx_FIFO(scc);
 454                        if ((scc->modem.clocksrc != CLK_EXTERNAL))
 455                                OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */
 456                } else {
 457                        scc->dcd = 1;
 458                }
 459
 460                scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON);
 461        }
 462
 463        /* DCD: on = start to receive packet, off = ABORT condition */
 464        /* (a successfully received packet generates a special condition int) */
 465        
 466        if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */
 467        {
 468                if(status & DCD)                /* DCD is now ON */
 469                {
 470                        start_hunt(scc);
 471                        scc->dcd = 1;
 472                } else {                        /* DCD is now OFF */
 473                        cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */
 474                        flush_rx_FIFO(scc);
 475                        scc->dcd = 0;
 476                }
 477                
 478                scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
 479        }
 480
 481#ifdef notdef
 482        /* CTS: use external TxDelay (what's that good for?!)
 483         * Anyway: If we _could_ use it (BayCom USCC uses CTS for
 484         * own purposes) we _should_ use the "autoenable" feature
 485         * of the Z8530 and not this interrupt...
 486         */
 487         
 488        if (chg_and_stat & CTS)                 /* CTS is now ON */
 489        {
 490                if (scc->kiss.txdelay == 0)     /* zero TXDELAY = wait for CTS */
 491                        scc_start_tx_timer(scc, t_txdelay, 0);
 492        }
 493#endif
 494        
 495        if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM))
 496        {
 497                scc->stat.tx_under++;     /* oops, an underrun! count 'em */
 498                Outb(scc->ctrl, RES_EXT_INT);   /* reset ext/status interrupts */
 499
 500                if (scc->tx_buff != NULL)
 501                {
 502                        dev_kfree_skb_irq(scc->tx_buff);
 503                        scc->tx_buff = NULL;
 504                }
 505                
 506                or(scc,R10,ABUNDER);
 507                scc_start_tx_timer(scc, t_txdelay, 0);  /* restart transmission */
 508        }
 509                
 510        scc->status = status;
 511        Outb(scc->ctrl,RES_EXT_INT);
 512}
 513
 514
 515/* Receiver interrupt handler */
 516static inline void scc_rxint(struct scc_channel *scc)
 517{
 518        struct sk_buff *skb;
 519
 520        scc->stat.rxints++;
 521
 522        if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
 523        {
 524                Inb(scc->data);         /* discard char */
 525                or(scc,R3,ENT_HM);      /* enter hunt mode for next flag */
 526                return;
 527        }
 528
 529        skb = scc->rx_buff;
 530        
 531        if (skb == NULL)
 532        {
 533                skb = dev_alloc_skb(scc->stat.bufsize);
 534                if (skb == NULL)
 535                {
 536                        scc->dev_stat.rx_dropped++;
 537                        scc->stat.nospace++;
 538                        Inb(scc->data);
 539                        or(scc, R3, ENT_HM);
 540                        return;
 541                }
 542                
 543                scc->rx_buff = skb;
 544                *(skb_put(skb, 1)) = 0; /* KISS data */
 545        }
 546        
 547        if (skb->len >= scc->stat.bufsize)
 548        {
 549#ifdef notdef
 550                printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n");
 551#endif
 552                dev_kfree_skb_irq(skb);
 553                scc->rx_buff = NULL;
 554                Inb(scc->data);
 555                or(scc, R3, ENT_HM);
 556                return;
 557        }
 558
 559        *(skb_put(skb, 1)) = Inb(scc->data);
 560}
 561
 562
 563/* Receive Special Condition interrupt handler */
 564static inline void scc_spint(struct scc_channel *scc)
 565{
 566        unsigned char status;
 567        struct sk_buff *skb;
 568
 569        scc->stat.spints++;
 570
 571        status = InReg(scc->ctrl,R1);           /* read receiver status */
 572        
 573        Inb(scc->data);                         /* throw away Rx byte */
 574        skb = scc->rx_buff;
 575
 576        if(status & Rx_OVR)                     /* receiver overrun */
 577        {
 578                scc->stat.rx_over++;             /* count them */
 579                or(scc,R3,ENT_HM);               /* enter hunt mode for next flag */
 580                
 581                if (skb != NULL) 
 582                        dev_kfree_skb_irq(skb);
 583                scc->rx_buff = skb = NULL;
 584        }
 585
 586        if(status & END_FR && skb != NULL)      /* end of frame */
 587        {
 588                /* CRC okay, frame ends on 8 bit boundary and received something ? */
 589                
 590                if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0)
 591                {
 592                        /* ignore last received byte (first of the CRC bytes) */
 593                        skb_trim(skb, skb->len-1);
 594                        scc_net_rx(scc, skb);
 595                        scc->rx_buff = NULL;
 596                        scc->stat.rxframes++;
 597                } else {                                /* a bad frame */
 598                        dev_kfree_skb_irq(skb);
 599                        scc->rx_buff = NULL;
 600                        scc->stat.rxerrs++;
 601                }
 602        } 
 603
 604        Outb(scc->ctrl,ERR_RES);
 605}
 606
 607
 608/* ----> interrupt service routine for the Z8530 <---- */
 609
 610static void scc_isr_dispatch(struct scc_channel *scc, int vector)
 611{
 612        spin_lock(&scc->lock);
 613        switch (vector & VECTOR_MASK)
 614        {
 615                case TXINT: scc_txint(scc); break;
 616                case EXINT: scc_exint(scc); break;
 617                case RXINT: scc_rxint(scc); break;
 618                case SPINT: scc_spint(scc); break;
 619        }
 620        spin_unlock(&scc->lock);
 621}
 622
 623/* If the card has a latch for the interrupt vector (like the PA0HZP card)
 624   use it to get the number of the chip that generated the int.
 625   If not: poll all defined chips.
 626 */
 627
 628#define SCC_IRQTIMEOUT 30000
 629
 630static irqreturn_t scc_isr(int irq, void *dev_id)
 631{
 632        int chip_irq = (long) dev_id;
 633        unsigned char vector;   
 634        struct scc_channel *scc;
 635        struct scc_ctrl *ctrl;
 636        int k;
 637        
 638        if (Vector_Latch)
 639        {
 640                for(k=0; k < SCC_IRQTIMEOUT; k++)
 641                {
 642                        Outb(Vector_Latch, 0);      /* Generate INTACK */
 643        
 644                        /* Read the vector */
 645                        if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break; 
 646                        if (vector & 0x01) break;
 647                 
 648                        scc=&SCC_Info[vector >> 3 ^ 0x01];
 649                        if (!scc->dev) break;
 650
 651                        scc_isr_dispatch(scc, vector);
 652
 653                        OutReg(scc->ctrl,R0,RES_H_IUS);              /* Reset Highest IUS */
 654                }  
 655
 656                if (k == SCC_IRQTIMEOUT)
 657                        printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n");
 658
 659                return IRQ_HANDLED;
 660        }
 661
 662        /* Find the SCC generating the interrupt by polling all attached SCCs
 663         * reading RR3A (the interrupt pending register)
 664         */
 665
 666        ctrl = SCC_ctrl;
 667        while (ctrl->chan_A)
 668        {
 669                if (ctrl->irq != chip_irq)
 670                {
 671                        ctrl++;
 672                        continue;
 673                }
 674
 675                scc = NULL;
 676                for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++)
 677                {
 678                        vector=InReg(ctrl->chan_B,R2);  /* Read the vector */
 679                        if (vector & 0x01) break; 
 680
 681                        scc = &SCC_Info[vector >> 3 ^ 0x01];
 682                        if (!scc->dev) break;
 683
 684                        scc_isr_dispatch(scc, vector);
 685                }
 686
 687                if (k == SCC_IRQTIMEOUT)
 688                {
 689                        printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n");
 690                        break;
 691                }
 692
 693                /* This looks weird and it is. At least the BayCom USCC doesn't
 694                 * use the Interrupt Daisy Chain, thus we'll have to start
 695                 * all over again to be sure not to miss an interrupt from 
 696                 * (any of) the other chip(s)...
 697                 * Honestly, the situation *is* braindamaged...
 698                 */
 699
 700                if (scc != NULL)
 701                {
 702                        OutReg(scc->ctrl,R0,RES_H_IUS);
 703                        ctrl = SCC_ctrl; 
 704                } else
 705                        ctrl++;
 706        }
 707        return IRQ_HANDLED;
 708}
 709
 710
 711
 712/* ******************************************************************** */
 713/* *                    Init Channel                                    */
 714/* ******************************************************************** */
 715
 716
 717/* ----> set SCC channel speed <---- */
 718
 719static inline void set_brg(struct scc_channel *scc, unsigned int tc)
 720{
 721        cl(scc,R14,BRENABL);            /* disable baudrate generator */
 722        wr(scc,R12,tc & 255);           /* brg rate LOW */
 723        wr(scc,R13,tc >> 8);            /* brg rate HIGH */
 724        or(scc,R14,BRENABL);            /* enable baudrate generator */
 725}
 726
 727static inline void set_speed(struct scc_channel *scc)
 728{
 729        unsigned long flags;
 730        spin_lock_irqsave(&scc->lock, flags);
 731
 732        if (scc->modem.speed > 0)       /* paranoia... */
 733                set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2);
 734                
 735        spin_unlock_irqrestore(&scc->lock, flags);
 736}
 737
 738
 739/* ----> initialize a SCC channel <---- */
 740
 741static inline void init_brg(struct scc_channel *scc)
 742{
 743        wr(scc, R14, BRSRC);                            /* BRG source = PCLK */
 744        OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]);    /* DPLL source = BRG */
 745        OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]);   /* DPLL NRZI mode */
 746}
 747
 748/*
 749 * Initialization according to the Z8530 manual (SGS-Thomson's version):
 750 *
 751 * 1. Modes and constants
 752 *
 753 * WR9  11000000        chip reset
 754 * WR4  XXXXXXXX        Tx/Rx control, async or sync mode
 755 * WR1  0XX00X00        select W/REQ (optional)
 756 * WR2  XXXXXXXX        program interrupt vector
 757 * WR3  XXXXXXX0        select Rx control
 758 * WR5  XXXX0XXX        select Tx control
 759 * WR6  XXXXXXXX        sync character
 760 * WR7  XXXXXXXX        sync character
 761 * WR9  000X0XXX        select interrupt control
 762 * WR10 XXXXXXXX        miscellaneous control (optional)
 763 * WR11 XXXXXXXX        clock control
 764 * WR12 XXXXXXXX        time constant lower byte (optional)
 765 * WR13 XXXXXXXX        time constant upper byte (optional)
 766 * WR14 XXXXXXX0        miscellaneous control
 767 * WR14 XXXSSSSS        commands (optional)
 768 *
 769 * 2. Enables
 770 *
 771 * WR14 000SSSS1        baud rate enable
 772 * WR3  SSSSSSS1        Rx enable
 773 * WR5  SSSS1SSS        Tx enable
 774 * WR0  10000000        reset Tx CRG (optional)
 775 * WR1  XSS00S00        DMA enable (optional)
 776 *
 777 * 3. Interrupt status
 778 *
 779 * WR15 XXXXXXXX        enable external/status
 780 * WR0  00010000        reset external status
 781 * WR0  00010000        reset external status twice
 782 * WR1  SSSXXSXX        enable Rx, Tx and Ext/status
 783 * WR9  000SXSSS        enable master interrupt enable
 784 *
 785 * 1 = set to one, 0 = reset to zero
 786 * X = user defined, S = same as previous init
 787 *
 788 *
 789 * Note that the implementation differs in some points from above scheme.
 790 *
 791 */
 792 
 793static void init_channel(struct scc_channel *scc)
 794{
 795        del_timer(&scc->tx_t);
 796        del_timer(&scc->tx_wdog);
 797
 798        disable_irq(scc->irq);
 799
 800        wr(scc,R4,X1CLK|SDLC);          /* *1 clock, SDLC mode */
 801        wr(scc,R1,0);                   /* no W/REQ operation */
 802        wr(scc,R3,Rx8|RxCRC_ENAB);      /* RX 8 bits/char, CRC, disabled */     
 803        wr(scc,R5,Tx8|DTR|TxCRC_ENAB);  /* TX 8 bits/char, disabled, DTR */
 804        wr(scc,R6,0);                   /* SDLC address zero (not used) */
 805        wr(scc,R7,FLAG);                /* SDLC flag value */
 806        wr(scc,R9,VIS);                 /* vector includes status */
 807        wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */
 808        wr(scc,R14, 0);
 809
 810
 811/* set clock sources:
 812
 813   CLK_DPLL: normal halfduplex operation
 814   
 815                RxClk: use DPLL
 816                TxClk: use DPLL
 817                TRxC mode DPLL output
 818                
 819   CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem)
 820   
 821                BayCom:                 others:
 822                
 823                TxClk = pin RTxC        TxClk = pin TRxC
 824                RxClk = pin TRxC        RxClk = pin RTxC
 825             
 826
 827   CLK_DIVIDER:
 828                RxClk = use DPLL
 829                TxClk = pin RTxC
 830                
 831                BayCom:                 others:
 832                pin TRxC = DPLL         pin TRxC = BRG
 833                (RxClk * 1)             (RxClk * 32)
 834*/  
 835
 836                
 837        switch(scc->modem.clocksrc)
 838        {
 839                case CLK_DPLL:
 840                        wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
 841                        init_brg(scc);
 842                        break;
 843
 844                case CLK_DIVIDER:
 845                        wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI);
 846                        init_brg(scc);
 847                        break;
 848
 849                case CLK_EXTERNAL:
 850                        wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP);
 851                        OutReg(scc->ctrl, R14, DISDPLL);
 852                        break;
 853
 854        }
 855        
 856        set_speed(scc);                 /* set baudrate */
 857        
 858        if(scc->enhanced)
 859        {
 860                or(scc,R15,SHDLCE|FIFOE);       /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
 861                wr(scc,R7,AUTOEOM);
 862        }
 863
 864        if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD))
 865                                                /* DCD is now ON */
 866        {
 867                start_hunt(scc);
 868        }
 869        
 870        /* enable ABORT, DCD & SYNC/HUNT interrupts */
 871
 872        wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE));
 873
 874        Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
 875        Outb(scc->ctrl,RES_EXT_INT);    /* must be done twice */
 876
 877        or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */
 878        
 879        scc->status = InReg(scc->ctrl,R0);      /* read initial status */
 880        
 881        or(scc,R9,MIE);                 /* master interrupt enable */
 882        
 883        scc_init_timer(scc);
 884                        
 885        enable_irq(scc->irq);
 886}
 887
 888
 889
 890
 891/* ******************************************************************** */
 892/* *                    SCC timer functions                           * */
 893/* ******************************************************************** */
 894
 895
 896/* ----> scc_key_trx sets the time constant for the baudrate 
 897         generator and keys the transmitter                  <---- */
 898
 899static void scc_key_trx(struct scc_channel *scc, char tx)
 900{
 901        unsigned int time_const;
 902                
 903        if (scc->brand & PRIMUS)
 904                Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0));
 905
 906        if (scc->modem.speed < 300) 
 907                scc->modem.speed = 1200;
 908
 909        time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2;
 910
 911        disable_irq(scc->irq);
 912
 913        if (tx)
 914        {
 915                or(scc, R1, TxINT_ENAB);        /* t_maxkeyup may have reset these */
 916                or(scc, R15, TxUIE);
 917        }
 918
 919        if (scc->modem.clocksrc == CLK_DPLL)
 920        {                               /* force simplex operation */
 921                if (tx)
 922                {
 923#ifdef CONFIG_SCC_TRXECHO
 924                        cl(scc, R3, RxENABLE|ENT_HM);   /* switch off receiver */
 925                        cl(scc, R15, DCDIE|SYNCIE);     /* No DCD changes, please */
 926#endif
 927                        set_brg(scc, time_const);       /* reprogram baudrate generator */
 928
 929                        /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */
 930                        wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR);
 931                        
 932                        /* By popular demand: tx_inhibit */
 933                        if (scc->kiss.tx_inhibit)
 934                        {
 935                                or(scc,R5, TxENAB);
 936                                scc->wreg[R5] |= RTS;
 937                        } else {
 938                                or(scc,R5,RTS|TxENAB);  /* set the RTS line and enable TX */
 939                        }
 940                } else {
 941                        cl(scc,R5,RTS|TxENAB);
 942                        
 943                        set_brg(scc, time_const);       /* reprogram baudrate generator */
 944                        
 945                        /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */
 946                        wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP);
 947
 948#ifndef CONFIG_SCC_TRXECHO
 949                        if (scc->kiss.softdcd)
 950#endif
 951                        {
 952                                or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE);
 953                                start_hunt(scc);
 954                        }
 955                }
 956        } else {
 957                if (tx)
 958                {
 959#ifdef CONFIG_SCC_TRXECHO
 960                        if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
 961                        {
 962                                cl(scc, R3, RxENABLE);
 963                                cl(scc, R15, DCDIE|SYNCIE);
 964                        }
 965#endif
 966                                
 967                        if (scc->kiss.tx_inhibit)
 968                        {
 969                                or(scc,R5, TxENAB);
 970                                scc->wreg[R5] |= RTS;
 971                        } else {        
 972                                or(scc,R5,RTS|TxENAB);  /* enable tx */
 973                        }
 974                } else {
 975                        cl(scc,R5,RTS|TxENAB);          /* disable tx */
 976
 977                        if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) &&
 978#ifndef CONFIG_SCC_TRXECHO
 979                            scc->kiss.softdcd)
 980#else
 981                            1)
 982#endif
 983                        {
 984                                or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE);
 985                                start_hunt(scc);
 986                        }
 987                }
 988        }
 989
 990        enable_irq(scc->irq);
 991}
 992
 993
 994/* ----> SCC timer interrupt handler and friends. <---- */
 995
 996static void __scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
 997{
 998        del_timer(&scc->tx_t);
 999
1000        if (when == 0)
1001        {
1002                handler((unsigned long) scc);
1003        } else 
1004        if (when != TIMER_OFF)
1005        {
1006                scc->tx_t.data = (unsigned long) scc;
1007                scc->tx_t.function = handler;
1008                scc->tx_t.expires = jiffies + (when*HZ)/100;
1009                add_timer(&scc->tx_t);
1010        }
1011}
1012
1013static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when)
1014{
1015        unsigned long flags;
1016        
1017        spin_lock_irqsave(&scc->lock, flags);
1018        __scc_start_tx_timer(scc, handler, when);
1019        spin_unlock_irqrestore(&scc->lock, flags);
1020}
1021
1022static void scc_start_defer(struct scc_channel *scc)
1023{
1024        unsigned long flags;
1025        
1026        spin_lock_irqsave(&scc->lock, flags);
1027        del_timer(&scc->tx_wdog);
1028        
1029        if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF)
1030        {
1031                scc->tx_wdog.data = (unsigned long) scc;
1032                scc->tx_wdog.function = t_busy;
1033                scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer;
1034                add_timer(&scc->tx_wdog);
1035        }
1036        spin_unlock_irqrestore(&scc->lock, flags);
1037}
1038
1039static void scc_start_maxkeyup(struct scc_channel *scc)
1040{
1041        unsigned long flags;
1042        
1043        spin_lock_irqsave(&scc->lock, flags);
1044        del_timer(&scc->tx_wdog);
1045        
1046        if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF)
1047        {
1048                scc->tx_wdog.data = (unsigned long) scc;
1049                scc->tx_wdog.function = t_maxkeyup;
1050                scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup;
1051                add_timer(&scc->tx_wdog);
1052        }
1053        spin_unlock_irqrestore(&scc->lock, flags);
1054}
1055
1056/* 
1057 * This is called from scc_txint() when there are no more frames to send.
1058 * Not exactly a timer function, but it is a close friend of the family...
1059 */
1060
1061static void scc_tx_done(struct scc_channel *scc)
1062{
1063        /* 
1064         * trx remains keyed in fulldup mode 2 until t_idle expires.
1065         */
1066                                 
1067        switch (scc->kiss.fulldup)
1068        {
1069                case KISS_DUPLEX_LINK:
1070                        scc->stat.tx_state = TXS_IDLE2;
1071                        if (scc->kiss.idletime != TIMER_OFF)
1072                                scc_start_tx_timer(scc, t_idle,
1073                                                   scc->kiss.idletime*100);
1074                        break;
1075                case KISS_DUPLEX_OPTIMA:
1076                        scc_notify(scc, HWEV_ALL_SENT);
1077                        break;
1078                default:
1079                        scc->stat.tx_state = TXS_BUSY;
1080                        scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1081        }
1082
1083        netif_wake_queue(scc->dev);
1084}
1085
1086
1087static unsigned char Rand = 17;
1088
1089static inline int is_grouped(struct scc_channel *scc)
1090{
1091        int k;
1092        struct scc_channel *scc2;
1093        unsigned char grp1, grp2;
1094
1095        grp1 = scc->kiss.group;
1096        
1097        for (k = 0; k < (Nchips * 2); k++)
1098        {
1099                scc2 = &SCC_Info[k];
1100                grp2 = scc2->kiss.group;
1101                
1102                if (scc2 == scc || !(scc2->dev && grp2))
1103                        continue;
1104                
1105                if ((grp1 & 0x3f) == (grp2 & 0x3f))
1106                {
1107                        if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1108                                return 1;
1109                        
1110                        if ( (grp1 & RXGROUP) && scc2->dcd )
1111                                return 1;
1112                }
1113        }
1114        return 0;
1115}
1116
1117/* DWAIT and SLOTTIME expired
1118 *
1119 * fulldup == 0:  DCD is active or Rand > P-persistence: start t_busy timer
1120 *                else key trx and start txdelay
1121 * fulldup == 1:  key trx and start txdelay
1122 * fulldup == 2:  mintime expired, reset status or key trx and start txdelay
1123 */
1124
1125static void t_dwait(unsigned long channel)
1126{
1127        struct scc_channel *scc = (struct scc_channel *) channel;
1128        
1129        if (scc->stat.tx_state == TXS_WAIT)     /* maxkeyup or idle timeout */
1130        {
1131                if (skb_queue_empty(&scc->tx_queue)) {  /* nothing to send */
1132                        scc->stat.tx_state = TXS_IDLE;
1133                        netif_wake_queue(scc->dev);     /* t_maxkeyup locked it. */
1134                        return;
1135                }
1136
1137                scc->stat.tx_state = TXS_BUSY;
1138        }
1139
1140        if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1141        {
1142                Rand = Rand * 17 + 31;
1143                
1144                if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) )
1145                {
1146                        scc_start_defer(scc);
1147                        scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime);
1148                        return ;
1149                }
1150        }
1151
1152        if ( !(scc->wreg[R5] & RTS) )
1153        {
1154                scc_key_trx(scc, TX_ON);
1155                scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1156        } else {
1157                scc_start_tx_timer(scc, t_txdelay, 0);
1158        }
1159}
1160
1161
1162/* TXDELAY expired
1163 *
1164 * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog.
1165 */
1166
1167static void t_txdelay(unsigned long channel)
1168{
1169        struct scc_channel *scc = (struct scc_channel *) channel;
1170
1171        scc_start_maxkeyup(scc);
1172
1173        if (scc->tx_buff == NULL)
1174        {
1175                disable_irq(scc->irq);
1176                scc_txint(scc); 
1177                enable_irq(scc->irq);
1178        }
1179}
1180        
1181
1182/* TAILTIME expired
1183 *
1184 * switch off transmitter. If we were stopped by Maxkeyup restart
1185 * transmission after 'mintime' seconds
1186 */
1187
1188static void t_tail(unsigned long channel)
1189{
1190        struct scc_channel *scc = (struct scc_channel *) channel;
1191        unsigned long flags;
1192        
1193        spin_lock_irqsave(&scc->lock, flags); 
1194        del_timer(&scc->tx_wdog);       
1195        scc_key_trx(scc, TX_OFF);
1196        spin_unlock_irqrestore(&scc->lock, flags);
1197
1198        if (scc->stat.tx_state == TXS_TIMEOUT)          /* we had a timeout? */
1199        {
1200                scc->stat.tx_state = TXS_WAIT;
1201                scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1202                return;
1203        }
1204        
1205        scc->stat.tx_state = TXS_IDLE;
1206        netif_wake_queue(scc->dev);
1207}
1208
1209
1210/* BUSY timeout
1211 *
1212 * throw away send buffers if DCD remains active too long.
1213 */
1214
1215static void t_busy(unsigned long channel)
1216{
1217        struct scc_channel *scc = (struct scc_channel *) channel;
1218
1219        del_timer(&scc->tx_t);
1220        netif_stop_queue(scc->dev);     /* don't pile on the wabbit! */
1221
1222        scc_discard_buffers(scc);
1223        scc->stat.txerrs++;
1224        scc->stat.tx_state = TXS_IDLE;
1225
1226        netif_wake_queue(scc->dev);     
1227}
1228
1229/* MAXKEYUP timeout
1230 *
1231 * this is our watchdog.
1232 */
1233
1234static void t_maxkeyup(unsigned long channel)
1235{
1236        struct scc_channel *scc = (struct scc_channel *) channel;
1237        unsigned long flags;
1238
1239        spin_lock_irqsave(&scc->lock, flags);
1240        /* 
1241         * let things settle down before we start to
1242         * accept new data.
1243         */
1244
1245        netif_stop_queue(scc->dev);
1246        scc_discard_buffers(scc);
1247
1248        del_timer(&scc->tx_t);
1249
1250        cl(scc, R1, TxINT_ENAB);        /* force an ABORT, but don't */
1251        cl(scc, R15, TxUIE);            /* count it. */
1252        OutReg(scc->ctrl, R0, RES_Tx_P);
1253
1254        spin_unlock_irqrestore(&scc->lock, flags);
1255
1256        scc->stat.txerrs++;
1257        scc->stat.tx_state = TXS_TIMEOUT;
1258        scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1259}
1260
1261/* IDLE timeout
1262 *
1263 * in fulldup mode 2 it keys down the transmitter after 'idle' seconds
1264 * of inactivity. We will not restart transmission before 'mintime'
1265 * expires.
1266 */
1267
1268static void t_idle(unsigned long channel)
1269{
1270        struct scc_channel *scc = (struct scc_channel *) channel;
1271        
1272        del_timer(&scc->tx_wdog);
1273
1274        scc_key_trx(scc, TX_OFF);
1275        if(scc->kiss.mintime)
1276                scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100);
1277        scc->stat.tx_state = TXS_WAIT;
1278}
1279
1280static void scc_init_timer(struct scc_channel *scc)
1281{
1282        unsigned long flags;
1283
1284        spin_lock_irqsave(&scc->lock, flags);   
1285        scc->stat.tx_state = TXS_IDLE;
1286        spin_unlock_irqrestore(&scc->lock, flags);
1287}
1288
1289
1290/* ******************************************************************** */
1291/* *                    Set/get L1 parameters                         * */
1292/* ******************************************************************** */
1293
1294
1295/*
1296 * this will set the "hardware" parameters through KISS commands or ioctl()
1297 */
1298
1299#define CAST(x) (unsigned long)(x)
1300
1301static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg)
1302{
1303        switch (cmd)
1304        {
1305                case PARAM_TXDELAY:     scc->kiss.txdelay=arg;          break;
1306                case PARAM_PERSIST:     scc->kiss.persist=arg;          break;
1307                case PARAM_SLOTTIME:    scc->kiss.slottime=arg;         break;
1308                case PARAM_TXTAIL:      scc->kiss.tailtime=arg;         break;
1309                case PARAM_FULLDUP:     scc->kiss.fulldup=arg;          break;
1310                case PARAM_DTR:         break; /* does someone need this? */
1311                case PARAM_GROUP:       scc->kiss.group=arg;            break;
1312                case PARAM_IDLE:        scc->kiss.idletime=arg;         break;
1313                case PARAM_MIN:         scc->kiss.mintime=arg;          break;
1314                case PARAM_MAXKEY:      scc->kiss.maxkeyup=arg;         break;
1315                case PARAM_WAIT:        scc->kiss.waittime=arg;         break;
1316                case PARAM_MAXDEFER:    scc->kiss.maxdefer=arg;         break;
1317                case PARAM_TX:          scc->kiss.tx_inhibit=arg;       break;
1318
1319                case PARAM_SOFTDCD:     
1320                        scc->kiss.softdcd=arg;
1321                        if (arg)
1322                        {
1323                                or(scc, R15, SYNCIE);
1324                                cl(scc, R15, DCDIE);
1325                                start_hunt(scc);
1326                        } else {
1327                                or(scc, R15, DCDIE);
1328                                cl(scc, R15, SYNCIE);
1329                        }
1330                        break;
1331                                
1332                case PARAM_SPEED:
1333                        if (arg < 256)
1334                                scc->modem.speed=arg*100;
1335                        else
1336                                scc->modem.speed=arg;
1337
1338                        if (scc->stat.tx_state == 0)    /* only switch baudrate on rx... ;-) */
1339                                set_speed(scc);
1340                        break;
1341                        
1342                case PARAM_RTS: 
1343                        if ( !(scc->wreg[R5] & RTS) )
1344                        {
1345                                if (arg != TX_OFF) {
1346                                        scc_key_trx(scc, TX_ON);
1347                                        scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay);
1348                                }
1349                        } else {
1350                                if (arg == TX_OFF)
1351                                {
1352                                        scc->stat.tx_state = TXS_BUSY;
1353                                        scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime);
1354                                }
1355                        }
1356                        break;
1357                        
1358                case PARAM_HWEVENT:
1359                        scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF);
1360                        break;
1361
1362                default:                return -EINVAL;
1363        }
1364        
1365        return 0;
1366}
1367
1368
1369 
1370static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd)
1371{
1372        switch (cmd)
1373        {
1374                case PARAM_TXDELAY:     return CAST(scc->kiss.txdelay);
1375                case PARAM_PERSIST:     return CAST(scc->kiss.persist);
1376                case PARAM_SLOTTIME:    return CAST(scc->kiss.slottime);
1377                case PARAM_TXTAIL:      return CAST(scc->kiss.tailtime);
1378                case PARAM_FULLDUP:     return CAST(scc->kiss.fulldup);
1379                case PARAM_SOFTDCD:     return CAST(scc->kiss.softdcd);
1380                case PARAM_DTR:         return CAST((scc->wreg[R5] & DTR)? 1:0);
1381                case PARAM_RTS:         return CAST((scc->wreg[R5] & RTS)? 1:0);
1382                case PARAM_SPEED:       return CAST(scc->modem.speed);
1383                case PARAM_GROUP:       return CAST(scc->kiss.group);
1384                case PARAM_IDLE:        return CAST(scc->kiss.idletime);
1385                case PARAM_MIN:         return CAST(scc->kiss.mintime);
1386                case PARAM_MAXKEY:      return CAST(scc->kiss.maxkeyup);
1387                case PARAM_WAIT:        return CAST(scc->kiss.waittime);
1388                case PARAM_MAXDEFER:    return CAST(scc->kiss.maxdefer);
1389                case PARAM_TX:          return CAST(scc->kiss.tx_inhibit);
1390                default:                return NO_SUCH_PARAM;
1391        }
1392
1393}
1394
1395#undef CAST
1396
1397/* ******************************************************************* */
1398/* *                    Send calibration pattern                     * */
1399/* ******************************************************************* */
1400
1401static void scc_stop_calibrate(unsigned long channel)
1402{
1403        struct scc_channel *scc = (struct scc_channel *) channel;
1404        unsigned long flags;
1405        
1406        spin_lock_irqsave(&scc->lock, flags);
1407        del_timer(&scc->tx_wdog);
1408        scc_key_trx(scc, TX_OFF);
1409        wr(scc, R6, 0);
1410        wr(scc, R7, FLAG);
1411        Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
1412        Outb(scc->ctrl,RES_EXT_INT);
1413
1414        netif_wake_queue(scc->dev);
1415        spin_unlock_irqrestore(&scc->lock, flags);
1416}
1417
1418
1419static void
1420scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern)
1421{
1422        unsigned long flags;
1423        
1424        spin_lock_irqsave(&scc->lock, flags);
1425        netif_stop_queue(scc->dev);
1426        scc_discard_buffers(scc);
1427
1428        del_timer(&scc->tx_wdog);
1429
1430        scc->tx_wdog.data = (unsigned long) scc;
1431        scc->tx_wdog.function = scc_stop_calibrate;
1432        scc->tx_wdog.expires = jiffies + HZ*duration;
1433        add_timer(&scc->tx_wdog);
1434
1435        /* This doesn't seem to work. Why not? */       
1436        wr(scc, R6, 0);
1437        wr(scc, R7, pattern);
1438
1439        /* 
1440         * Don't know if this works. 
1441         * Damn, where is my Z8530 programming manual...? 
1442         */
1443
1444        Outb(scc->ctrl,RES_EXT_INT);    /* reset ext/status interrupts */
1445        Outb(scc->ctrl,RES_EXT_INT);
1446
1447        scc_key_trx(scc, TX_ON);
1448        spin_unlock_irqrestore(&scc->lock, flags);
1449}
1450
1451/* ******************************************************************* */
1452/* *            Init channel structures, special HW, etc...          * */
1453/* ******************************************************************* */
1454
1455/*
1456 * Reset the Z8530s and setup special hardware
1457 */
1458
1459static void z8530_init(void)
1460{
1461        struct scc_channel *scc;
1462        int chip, k;
1463        unsigned long flags;
1464        char *flag;
1465
1466
1467        printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2);
1468        
1469        flag=" ";
1470        for (k = 0; k < nr_irqs; k++)
1471                if (Ivec[k].used) 
1472                {
1473                        printk("%s%d", flag, k);
1474                        flag=",";
1475                }
1476        printk("\n");
1477
1478
1479        /* reset and pre-init all chips in the system */
1480        for (chip = 0; chip < Nchips; chip++)
1481        {
1482                scc=&SCC_Info[2*chip];
1483                if (!scc->ctrl) continue;
1484
1485                /* Special SCC cards */
1486
1487                if(scc->brand & EAGLE)                  /* this is an EAGLE card */
1488                        Outb(scc->special,0x08);        /* enable interrupt on the board */
1489                        
1490                if(scc->brand & (PC100 | PRIMUS))       /* this is a PC100/PRIMUS card */
1491                        Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */
1492
1493                        
1494                /* Reset and pre-init Z8530 */
1495
1496                spin_lock_irqsave(&scc->lock, flags);
1497                                
1498                Outb(scc->ctrl, 0);
1499                OutReg(scc->ctrl,R9,FHWRES);            /* force hardware reset */
1500                udelay(100);                            /* give it 'a bit' more time than required */
1501                wr(scc, R2, chip*16);                   /* interrupt vector */
1502                wr(scc, R9, VIS);                       /* vector includes status */
1503                spin_unlock_irqrestore(&scc->lock, flags);              
1504        }
1505
1506 
1507        Driver_Initialized = 1;
1508}
1509
1510/*
1511 * Allocate device structure, err, instance, and register driver
1512 */
1513
1514static int scc_net_alloc(const char *name, struct scc_channel *scc)
1515{
1516        int err;
1517        struct net_device *dev;
1518
1519        dev = alloc_netdev(0, name, scc_net_setup);
1520        if (!dev) 
1521                return -ENOMEM;
1522
1523        dev->ml_priv = scc;
1524        scc->dev = dev;
1525        spin_lock_init(&scc->lock);
1526        init_timer(&scc->tx_t);
1527        init_timer(&scc->tx_wdog);
1528
1529        err = register_netdevice(dev);
1530        if (err) {
1531                printk(KERN_ERR "%s: can't register network device (%d)\n", 
1532                       name, err);
1533                free_netdev(dev);
1534                scc->dev = NULL;
1535                return err;
1536        }
1537
1538        return 0;
1539}
1540
1541
1542
1543/* ******************************************************************** */
1544/* *                        Network driver methods                    * */
1545/* ******************************************************************** */
1546
1547static const struct net_device_ops scc_netdev_ops = {
1548        .ndo_open            = scc_net_open,
1549        .ndo_stop            = scc_net_close,
1550        .ndo_start_xmit      = scc_net_tx,
1551        .ndo_set_mac_address = scc_net_set_mac_address,
1552        .ndo_get_stats       = scc_net_get_stats,
1553        .ndo_do_ioctl        = scc_net_ioctl,
1554};
1555
1556/* ----> Initialize device <----- */
1557
1558static void scc_net_setup(struct net_device *dev)
1559{
1560        dev->tx_queue_len    = 16;      /* should be enough... */
1561
1562        dev->netdev_ops      = &scc_netdev_ops;
1563        dev->header_ops      = &ax25_header_ops;
1564
1565        memcpy(dev->broadcast, &ax25_bcast,  AX25_ADDR_LEN);
1566        memcpy(dev->dev_addr,  &ax25_defaddr, AX25_ADDR_LEN);
1567 
1568        dev->flags      = 0;
1569
1570        dev->type = ARPHRD_AX25;
1571        dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1572        dev->mtu = AX25_DEF_PACLEN;
1573        dev->addr_len = AX25_ADDR_LEN;
1574
1575}
1576
1577/* ----> open network device <---- */
1578
1579static int scc_net_open(struct net_device *dev)
1580{
1581        struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1582
1583        if (!scc->init)
1584                return -EINVAL;
1585
1586        scc->tx_buff = NULL;
1587        skb_queue_head_init(&scc->tx_queue);
1588 
1589        init_channel(scc);
1590
1591        netif_start_queue(dev);
1592        return 0;
1593}
1594
1595/* ----> close network device <---- */
1596
1597static int scc_net_close(struct net_device *dev)
1598{
1599        struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1600        unsigned long flags;
1601
1602        netif_stop_queue(dev);
1603
1604        spin_lock_irqsave(&scc->lock, flags);   
1605        Outb(scc->ctrl,0);              /* Make sure pointer is written */
1606        wr(scc,R1,0);                   /* disable interrupts */
1607        wr(scc,R3,0);
1608        spin_unlock_irqrestore(&scc->lock, flags);
1609
1610        del_timer_sync(&scc->tx_t);
1611        del_timer_sync(&scc->tx_wdog);
1612        
1613        scc_discard_buffers(scc);
1614
1615        return 0;
1616}
1617
1618/* ----> receive frame, called from scc_rxint() <---- */
1619
1620static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1621{
1622        if (skb->len == 0) {
1623                dev_kfree_skb_irq(skb);
1624                return;
1625        }
1626                
1627        scc->dev_stat.rx_packets++;
1628        scc->dev_stat.rx_bytes += skb->len;
1629
1630        skb->protocol = ax25_type_trans(skb, scc->dev);
1631        
1632        netif_rx(skb);
1633}
1634
1635/* ----> transmit frame <---- */
1636
1637static netdev_tx_t scc_net_tx(struct sk_buff *skb, struct net_device *dev)
1638{
1639        struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1640        unsigned long flags;
1641        char kisscmd;
1642
1643        if (skb->len > scc->stat.bufsize || skb->len < 2) {
1644                scc->dev_stat.tx_dropped++;     /* bogus frame */
1645                dev_kfree_skb(skb);
1646                return NETDEV_TX_OK;
1647        }
1648        
1649        scc->dev_stat.tx_packets++;
1650        scc->dev_stat.tx_bytes += skb->len;
1651        scc->stat.txframes++;
1652        
1653        kisscmd = *skb->data & 0x1f;
1654        skb_pull(skb, 1);
1655
1656        if (kisscmd) {
1657                scc_set_param(scc, kisscmd, *skb->data);
1658                dev_kfree_skb(skb);
1659                return NETDEV_TX_OK;
1660        }
1661
1662        spin_lock_irqsave(&scc->lock, flags);
1663                
1664        if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) {
1665                struct sk_buff *skb_del;
1666                skb_del = skb_dequeue(&scc->tx_queue);
1667                dev_kfree_skb(skb_del);
1668        }
1669        skb_queue_tail(&scc->tx_queue, skb);
1670        dev->trans_start = jiffies;
1671        
1672
1673        /*
1674         * Start transmission if the trx state is idle or
1675         * t_idle hasn't expired yet. Use dwait/persistence/slottime
1676         * algorithm for normal halfduplex operation.
1677         */
1678
1679        if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) {
1680                scc->stat.tx_state = TXS_BUSY;
1681                if (scc->kiss.fulldup == KISS_DUPLEX_HALF)
1682                        __scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime);
1683                else
1684                        __scc_start_tx_timer(scc, t_dwait, 0);
1685        }
1686        spin_unlock_irqrestore(&scc->lock, flags);
1687        return NETDEV_TX_OK;
1688}
1689
1690/* ----> ioctl functions <---- */
1691
1692/*
1693 * SIOCSCCCFG           - configure driver      arg: (struct scc_hw_config *) arg
1694 * SIOCSCCINI           - initialize driver     arg: ---
1695 * SIOCSCCCHANINI       - initialize channel    arg: (struct scc_modem *) arg
1696 * SIOCSCCSMEM          - set memory            arg: (struct scc_mem_config *) arg
1697 * SIOCSCCGKISS         - get level 1 parameter arg: (struct scc_kiss_cmd *) arg
1698 * SIOCSCCSKISS         - set level 1 parameter arg: (struct scc_kiss_cmd *) arg
1699 * SIOCSCCGSTAT         - get driver status     arg: (struct scc_stat *) arg
1700 * SIOCSCCCAL           - send calib. pattern   arg: (struct scc_calibrate *) arg
1701 */
1702
1703static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1704{
1705        struct scc_kiss_cmd kiss_cmd;
1706        struct scc_mem_config memcfg;
1707        struct scc_hw_config hwcfg;
1708        struct scc_calibrate cal;
1709        struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1710        int chan;
1711        unsigned char device_name[IFNAMSIZ];
1712        void __user *arg = ifr->ifr_data;
1713        
1714        
1715        if (!Driver_Initialized)
1716        {
1717                if (cmd == SIOCSCCCFG)
1718                {
1719                        int found = 1;
1720
1721                        if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1722                        if (!arg) return -EFAULT;
1723
1724                        if (Nchips >= SCC_MAXCHIPS) 
1725                                return -EINVAL;
1726
1727                        if (copy_from_user(&hwcfg, arg, sizeof(hwcfg)))
1728                                return -EFAULT;
1729
1730                        if (hwcfg.irq == 2) hwcfg.irq = 9;
1731
1732                        if (hwcfg.irq < 0 || hwcfg.irq >= nr_irqs)
1733                                return -EINVAL;
1734                                
1735                        if (!Ivec[hwcfg.irq].used && hwcfg.irq)
1736                        {
1737                                if (request_irq(hwcfg.irq, scc_isr,
1738                                                IRQF_DISABLED, "AX.25 SCC",
1739                                                (void *)(long) hwcfg.irq))
1740                                        printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq);
1741                                else
1742                                        Ivec[hwcfg.irq].used = 1;
1743                        }
1744
1745                        if (hwcfg.vector_latch && !Vector_Latch) {
1746                                if (!request_region(hwcfg.vector_latch, 1, "scc vector latch"))
1747                                        printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch);
1748                                else
1749                                        Vector_Latch = hwcfg.vector_latch;
1750                        }
1751
1752                        if (hwcfg.clock == 0)
1753                                hwcfg.clock = SCC_DEFAULT_CLOCK;
1754
1755#ifndef SCC_DONT_CHECK
1756
1757                        if(request_region(hwcfg.ctrl_a, 1, "scc-probe"))
1758                        {
1759                                disable_irq(hwcfg.irq);
1760                                Outb(hwcfg.ctrl_a, 0);
1761                                OutReg(hwcfg.ctrl_a, R9, FHWRES);
1762                                udelay(100);
1763                                OutReg(hwcfg.ctrl_a,R13,0x55);          /* is this chip really there? */
1764                                udelay(5);
1765
1766                                if (InReg(hwcfg.ctrl_a,R13) != 0x55)
1767                                        found = 0;
1768                                enable_irq(hwcfg.irq);
1769                                release_region(hwcfg.ctrl_a, 1);
1770                        }
1771                        else
1772                                found = 0;
1773#endif
1774
1775                        if (found)
1776                        {
1777                                SCC_Info[2*Nchips  ].ctrl = hwcfg.ctrl_a;
1778                                SCC_Info[2*Nchips  ].data = hwcfg.data_a;
1779                                SCC_Info[2*Nchips  ].irq  = hwcfg.irq;
1780                                SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b;
1781                                SCC_Info[2*Nchips+1].data = hwcfg.data_b;
1782                                SCC_Info[2*Nchips+1].irq  = hwcfg.irq;
1783                        
1784                                SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a;
1785                                SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b;
1786                                SCC_ctrl[Nchips].irq    = hwcfg.irq;
1787                        }
1788
1789
1790                        for (chan = 0; chan < 2; chan++)
1791                        {
1792                                sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan);
1793
1794                                SCC_Info[2*Nchips+chan].special = hwcfg.special;
1795                                SCC_Info[2*Nchips+chan].clock = hwcfg.clock;
1796                                SCC_Info[2*Nchips+chan].brand = hwcfg.brand;
1797                                SCC_Info[2*Nchips+chan].option = hwcfg.option;
1798                                SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc;
1799
1800#ifdef SCC_DONT_CHECK
1801                                printk(KERN_INFO "%s: data port = 0x%3.3x  control port = 0x%3.3x\n",
1802                                        device_name, 
1803                                        SCC_Info[2*Nchips+chan].data, 
1804                                        SCC_Info[2*Nchips+chan].ctrl);
1805
1806#else
1807                                printk(KERN_INFO "%s: data port = 0x%3.3lx  control port = 0x%3.3lx -- %s\n",
1808                                        device_name,
1809                                        chan? hwcfg.data_b : hwcfg.data_a, 
1810                                        chan? hwcfg.ctrl_b : hwcfg.ctrl_a,
1811                                        found? "found" : "missing");
1812#endif
1813
1814                                if (found)
1815                                {
1816                                        request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl");
1817                                        request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data");
1818                                        if (Nchips+chan != 0 &&
1819                                            scc_net_alloc(device_name, 
1820                                                          &SCC_Info[2*Nchips+chan]))
1821                                            return -EINVAL;
1822                                }
1823                        }
1824                        
1825                        if (found) Nchips++;
1826                        
1827                        return 0;
1828                }
1829                
1830                if (cmd == SIOCSCCINI)
1831                {
1832                        if (!capable(CAP_SYS_RAWIO))
1833                                return -EPERM;
1834                                
1835                        if (Nchips == 0)
1836                                return -EINVAL;
1837
1838                        z8530_init();
1839                        return 0;
1840                }
1841                
1842                return -EINVAL; /* confuse the user */
1843        }
1844        
1845        if (!scc->init)
1846        {
1847                if (cmd == SIOCSCCCHANINI)
1848                {
1849                        if (!capable(CAP_NET_ADMIN)) return -EPERM;
1850                        if (!arg) return -EINVAL;
1851                        
1852                        scc->stat.bufsize   = SCC_BUFSIZE;
1853
1854                        if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem)))
1855                                return -EINVAL;
1856                        
1857                        /* default KISS Params */
1858                
1859                        if (scc->modem.speed < 4800)
1860                        {
1861                                scc->kiss.txdelay = 36;         /* 360 ms */
1862                                scc->kiss.persist = 42;         /* 25% persistence */                   /* was 25 */
1863                                scc->kiss.slottime = 16;        /* 160 ms */
1864                                scc->kiss.tailtime = 4;         /* minimal reasonable value */
1865                                scc->kiss.fulldup = 0;          /* CSMA */
1866                                scc->kiss.waittime = 50;        /* 500 ms */
1867                                scc->kiss.maxkeyup = 10;        /* 10 s */
1868                                scc->kiss.mintime = 3;          /* 3 s */
1869                                scc->kiss.idletime = 30;        /* 30 s */
1870                                scc->kiss.maxdefer = 120;       /* 2 min */
1871                                scc->kiss.softdcd = 0;          /* hardware dcd */
1872                        } else {
1873                                scc->kiss.txdelay = 10;         /* 100 ms */
1874                                scc->kiss.persist = 64;         /* 25% persistence */                   /* was 25 */
1875                                scc->kiss.slottime = 8;         /* 160 ms */
1876                                scc->kiss.tailtime = 1;         /* minimal reasonable value */
1877                                scc->kiss.fulldup = 0;          /* CSMA */
1878                                scc->kiss.waittime = 50;        /* 500 ms */
1879                                scc->kiss.maxkeyup = 7;         /* 7 s */
1880                                scc->kiss.mintime = 3;          /* 3 s */
1881                                scc->kiss.idletime = 30;        /* 30 s */
1882                                scc->kiss.maxdefer = 120;       /* 2 min */
1883                                scc->kiss.softdcd = 0;          /* hardware dcd */
1884                        }
1885                        
1886                        scc->tx_buff = NULL;
1887                        skb_queue_head_init(&scc->tx_queue);
1888                        scc->init = 1;
1889                        
1890                        return 0;
1891                }
1892                
1893                return -EINVAL;
1894        }
1895        
1896        switch(cmd)
1897        {
1898                case SIOCSCCRESERVED:
1899                        return -ENOIOCTLCMD;
1900
1901                case SIOCSCCSMEM:
1902                        if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1903                        if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg)))
1904                                return -EINVAL;
1905                        scc->stat.bufsize   = memcfg.bufsize;
1906                        return 0;
1907                
1908                case SIOCSCCGSTAT:
1909                        if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat)))
1910                                return -EINVAL;
1911                        return 0;
1912                
1913                case SIOCSCCGKISS:
1914                        if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1915                                return -EINVAL;
1916                        kiss_cmd.param = scc_get_param(scc, kiss_cmd.command);
1917                        if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd)))
1918                                return -EINVAL;
1919                        return 0;
1920                
1921                case SIOCSCCSKISS:
1922                        if (!capable(CAP_NET_ADMIN)) return -EPERM;
1923                        if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd)))
1924                                return -EINVAL;
1925                        return scc_set_param(scc, kiss_cmd.command, kiss_cmd.param);
1926                
1927                case SIOCSCCCAL:
1928                        if (!capable(CAP_SYS_RAWIO)) return -EPERM;
1929                        if (!arg || copy_from_user(&cal, arg, sizeof(cal)) || cal.time == 0)
1930                                return -EINVAL;
1931
1932                        scc_start_calibrate(scc, cal.time, cal.pattern);
1933                        return 0;
1934
1935                default:
1936                        return -ENOIOCTLCMD;
1937                
1938        }
1939        
1940        return -EINVAL;
1941}
1942
1943/* ----> set interface callsign <---- */
1944
1945static int scc_net_set_mac_address(struct net_device *dev, void *addr)
1946{
1947        struct sockaddr *sa = (struct sockaddr *) addr;
1948        memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
1949        return 0;
1950}
1951
1952/* ----> get statistics <---- */
1953
1954static struct net_device_stats *scc_net_get_stats(struct net_device *dev)
1955{
1956        struct scc_channel *scc = (struct scc_channel *) dev->ml_priv;
1957        
1958        scc->dev_stat.rx_errors = scc->stat.rxerrs + scc->stat.rx_over;
1959        scc->dev_stat.tx_errors = scc->stat.txerrs + scc->stat.tx_under;
1960        scc->dev_stat.rx_fifo_errors = scc->stat.rx_over;
1961        scc->dev_stat.tx_fifo_errors = scc->stat.tx_under;
1962
1963        return &scc->dev_stat;
1964}
1965
1966/* ******************************************************************** */
1967/* *            dump statistics to /proc/net/z8530drv                 * */
1968/* ******************************************************************** */
1969
1970#ifdef CONFIG_PROC_FS
1971
1972static inline struct scc_channel *scc_net_seq_idx(loff_t pos)
1973{
1974        int k;
1975
1976        for (k = 0; k < Nchips*2; ++k) {
1977                if (!SCC_Info[k].init) 
1978                        continue;
1979                if (pos-- == 0)
1980                        return &SCC_Info[k];
1981        }
1982        return NULL;
1983}
1984
1985static void *scc_net_seq_start(struct seq_file *seq, loff_t *pos)
1986{
1987        return *pos ? scc_net_seq_idx(*pos - 1) : SEQ_START_TOKEN;
1988        
1989}
1990
1991static void *scc_net_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1992{
1993        unsigned k;
1994        struct scc_channel *scc = v;
1995        ++*pos;
1996        
1997        for (k = (v == SEQ_START_TOKEN) ? 0 : (scc - SCC_Info)+1;
1998             k < Nchips*2; ++k) {
1999                if (SCC_Info[k].init) 
2000                        return &SCC_Info[k];
2001        }
2002        return NULL;
2003}
2004
2005static void scc_net_seq_stop(struct seq_file *seq, void *v)
2006{
2007}
2008
2009static int scc_net_seq_show(struct seq_file *seq, void *v)
2010{
2011        if (v == SEQ_START_TOKEN) {
2012                seq_puts(seq, "z8530drv-"VERSION"\n");
2013        } else if (!Driver_Initialized) {
2014                seq_puts(seq, "not initialized\n");
2015        } else if (!Nchips) {
2016                seq_puts(seq, "chips missing\n");
2017        } else {
2018                const struct scc_channel *scc = v;
2019                const struct scc_stat *stat = &scc->stat;
2020                const struct scc_kiss *kiss = &scc->kiss;
2021
2022
2023                /* dev  data ctrl irq clock brand enh vector special option 
2024                 *      baud nrz clocksrc softdcd bufsize
2025                 *      rxints txints exints spints
2026                 *      rcvd rxerrs over / xmit txerrs under / nospace bufsize
2027                 *      txd pers slot tail ful wait min maxk idl defr txof grp
2028                 *      W ## ## ## ## ## ## ## ## ## ## ## ## ## ## ## ##
2029                 *      R ## ## XX ## ## ## ## ## XX ## ## ## ## ## ## ##
2030                 */
2031
2032                seq_printf(seq, "%s\t%3.3lx %3.3lx %d %lu %2.2x %d %3.3lx %3.3lx %d\n",
2033                                scc->dev->name,
2034                                scc->data, scc->ctrl, scc->irq, scc->clock, scc->brand,
2035                                scc->enhanced, Vector_Latch, scc->special,
2036                                scc->option);
2037                seq_printf(seq, "\t%lu %d %d %d %d\n",
2038                                scc->modem.speed, scc->modem.nrz,
2039                                scc->modem.clocksrc, kiss->softdcd,
2040                                stat->bufsize);
2041                seq_printf(seq, "\t%lu %lu %lu %lu\n",
2042                                stat->rxints, stat->txints, stat->exints, stat->spints);
2043                seq_printf(seq, "\t%lu %lu %d / %lu %lu %d / %d %d\n",
2044                                stat->rxframes, stat->rxerrs, stat->rx_over,
2045                                stat->txframes, stat->txerrs, stat->tx_under,
2046                                stat->nospace,  stat->tx_state);
2047
2048#define K(x) kiss->x
2049                seq_printf(seq, "\t%d %d %d %d %d %d %d %d %d %d %d %d\n",
2050                                K(txdelay), K(persist), K(slottime), K(tailtime),
2051                                K(fulldup), K(waittime), K(mintime), K(maxkeyup),
2052                                K(idletime), K(maxdefer), K(tx_inhibit), K(group));
2053#undef K
2054#ifdef SCC_DEBUG
2055                {
2056                        int reg;
2057
2058                seq_printf(seq, "\tW ");
2059                        for (reg = 0; reg < 16; reg++)
2060                                seq_printf(seq, "%2.2x ", scc->wreg[reg]);
2061                        seq_printf(seq, "\n");
2062                        
2063                seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1));
2064                        for (reg = 3; reg < 8; reg++)
2065                                seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2066                        seq_printf(seq, "XX ");
2067                        for (reg = 9; reg < 16; reg++)
2068                                seq_printf(seq, "%2.2x ", InReg(scc->ctrl, reg));
2069                        seq_printf(seq, "\n");
2070                }
2071#endif
2072                seq_putc(seq, '\n');
2073        }
2074
2075        return 0;
2076}
2077
2078static const struct seq_operations scc_net_seq_ops = {
2079        .start  = scc_net_seq_start,
2080        .next   = scc_net_seq_next,
2081        .stop   = scc_net_seq_stop,
2082        .show   = scc_net_seq_show,
2083};
2084
2085
2086static int scc_net_seq_open(struct inode *inode, struct file *file)
2087{
2088        return seq_open(file, &scc_net_seq_ops);
2089}
2090
2091static const struct file_operations scc_net_seq_fops = {
2092        .owner   = THIS_MODULE,
2093        .open    = scc_net_seq_open,
2094        .read    = seq_read,
2095        .llseek  = seq_lseek,
2096        .release = seq_release_private,
2097};
2098
2099#endif /* CONFIG_PROC_FS */
2100
2101 
2102/* ******************************************************************** */
2103/* *                    Init SCC driver                               * */
2104/* ******************************************************************** */
2105
2106static int __init scc_init_driver (void)
2107{
2108        char devname[IFNAMSIZ];
2109        
2110        printk(banner);
2111        
2112        sprintf(devname,"%s0", SCC_DriverName);
2113        
2114        rtnl_lock();
2115        if (scc_net_alloc(devname, SCC_Info)) {
2116                rtnl_unlock();
2117                printk(KERN_ERR "z8530drv: cannot initialize module\n");
2118                return -EIO;
2119        }
2120        rtnl_unlock();
2121
2122        proc_net_fops_create(&init_net, "z8530drv", 0, &scc_net_seq_fops);
2123
2124        return 0;
2125}
2126
2127static void __exit scc_cleanup_driver(void)
2128{
2129        io_port ctrl;
2130        int k;
2131        struct scc_channel *scc;
2132        struct net_device *dev;
2133        
2134        if (Nchips == 0 && (dev = SCC_Info[0].dev)) 
2135        {
2136                unregister_netdev(dev);
2137                free_netdev(dev);
2138        }
2139
2140        /* Guard against chip prattle */
2141        local_irq_disable();
2142        
2143        for (k = 0; k < Nchips; k++)
2144                if ( (ctrl = SCC_ctrl[k].chan_A) )
2145                {
2146                        Outb(ctrl, 0);
2147                        OutReg(ctrl,R9,FHWRES); /* force hardware reset */
2148                        udelay(50);
2149                }
2150                
2151        /* To unload the port must be closed so no real IRQ pending */
2152        for (k = 0; k < nr_irqs ; k++)
2153                if (Ivec[k].used) free_irq(k, NULL);
2154                
2155        local_irq_enable();
2156                
2157        /* Now clean up */
2158        for (k = 0; k < Nchips*2; k++)
2159        {
2160                scc = &SCC_Info[k];
2161                if (scc->ctrl)
2162                {
2163                        release_region(scc->ctrl, 1);
2164                        release_region(scc->data, 1);
2165                }
2166                if (scc->dev)
2167                {
2168                        unregister_netdev(scc->dev);
2169                        free_netdev(scc->dev);
2170                }
2171        }
2172        
2173                
2174        if (Vector_Latch)
2175                release_region(Vector_Latch, 1);
2176
2177        proc_net_remove(&init_net, "z8530drv");
2178}
2179
2180MODULE_AUTHOR("Joerg Reuter <jreuter@yaina.de>");
2181MODULE_DESCRIPTION("AX.25 Device Driver for Z8530 based HDLC cards");
2182MODULE_SUPPORTED_DEVICE("Z8530 based SCC cards for Amateur Radio");
2183MODULE_LICENSE("GPL");
2184module_init(scc_init_driver);
2185module_exit(scc_cleanup_driver);
2186