linux/drivers/net/stmmac/stmmac_main.c
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   1/*******************************************************************************
   2  This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
   3  ST Ethernet IPs are built around a Synopsys IP Core.
   4
   5  Copyright (C) 2007-2009  STMicroelectronics Ltd
   6
   7  This program is free software; you can redistribute it and/or modify it
   8  under the terms and conditions of the GNU General Public License,
   9  version 2, as published by the Free Software Foundation.
  10
  11  This program is distributed in the hope it will be useful, but WITHOUT
  12  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  more details.
  15
  16  You should have received a copy of the GNU General Public License along with
  17  this program; if not, write to the Free Software Foundation, Inc.,
  18  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19
  20  The full GNU General Public License is included in this distribution in
  21  the file called "COPYING".
  22
  23  Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  24
  25  Documentation available at:
  26        http://www.stlinux.com
  27  Support available at:
  28        https://bugzilla.stlinux.com/
  29*******************************************************************************/
  30
  31#include <linux/module.h>
  32#include <linux/init.h>
  33#include <linux/kernel.h>
  34#include <linux/interrupt.h>
  35#include <linux/etherdevice.h>
  36#include <linux/platform_device.h>
  37#include <linux/ip.h>
  38#include <linux/tcp.h>
  39#include <linux/skbuff.h>
  40#include <linux/ethtool.h>
  41#include <linux/if_ether.h>
  42#include <linux/crc32.h>
  43#include <linux/mii.h>
  44#include <linux/phy.h>
  45#include <linux/if_vlan.h>
  46#include <linux/dma-mapping.h>
  47#include <linux/slab.h>
  48#include "stmmac.h"
  49
  50#define STMMAC_RESOURCE_NAME    "stmmaceth"
  51#define PHY_RESOURCE_NAME       "stmmacphy"
  52
  53#undef STMMAC_DEBUG
  54/*#define STMMAC_DEBUG*/
  55#ifdef STMMAC_DEBUG
  56#define DBG(nlevel, klevel, fmt, args...) \
  57                ((void)(netif_msg_##nlevel(priv) && \
  58                printk(KERN_##klevel fmt, ## args)))
  59#else
  60#define DBG(nlevel, klevel, fmt, args...) do { } while (0)
  61#endif
  62
  63#undef STMMAC_RX_DEBUG
  64/*#define STMMAC_RX_DEBUG*/
  65#ifdef STMMAC_RX_DEBUG
  66#define RX_DBG(fmt, args...)  printk(fmt, ## args)
  67#else
  68#define RX_DBG(fmt, args...)  do { } while (0)
  69#endif
  70
  71#undef STMMAC_XMIT_DEBUG
  72/*#define STMMAC_XMIT_DEBUG*/
  73#ifdef STMMAC_TX_DEBUG
  74#define TX_DBG(fmt, args...)  printk(fmt, ## args)
  75#else
  76#define TX_DBG(fmt, args...)  do { } while (0)
  77#endif
  78
  79#define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
  80#define JUMBO_LEN       9000
  81
  82/* Module parameters */
  83#define TX_TIMEO 5000 /* default 5 seconds */
  84static int watchdog = TX_TIMEO;
  85module_param(watchdog, int, S_IRUGO | S_IWUSR);
  86MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
  87
  88static int debug = -1;          /* -1: default, 0: no output, 16:  all */
  89module_param(debug, int, S_IRUGO | S_IWUSR);
  90MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
  91
  92static int phyaddr = -1;
  93module_param(phyaddr, int, S_IRUGO);
  94MODULE_PARM_DESC(phyaddr, "Physical device address");
  95
  96#define DMA_TX_SIZE 256
  97static int dma_txsize = DMA_TX_SIZE;
  98module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
  99MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
 100
 101#define DMA_RX_SIZE 256
 102static int dma_rxsize = DMA_RX_SIZE;
 103module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
 104MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
 105
 106static int flow_ctrl = FLOW_OFF;
 107module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
 108MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
 109
 110static int pause = PAUSE_TIME;
 111module_param(pause, int, S_IRUGO | S_IWUSR);
 112MODULE_PARM_DESC(pause, "Flow Control Pause Time");
 113
 114#define TC_DEFAULT 64
 115static int tc = TC_DEFAULT;
 116module_param(tc, int, S_IRUGO | S_IWUSR);
 117MODULE_PARM_DESC(tc, "DMA threshold control value");
 118
 119#define RX_NO_COALESCE  1       /* Always interrupt on completion */
 120#define TX_NO_COALESCE  -1      /* No moderation by default */
 121
 122/* Pay attention to tune this parameter; take care of both
 123 * hardware capability and network stabitily/performance impact.
 124 * Many tests showed that ~4ms latency seems to be good enough. */
 125#ifdef CONFIG_STMMAC_TIMER
 126#define DEFAULT_PERIODIC_RATE   256
 127static int tmrate = DEFAULT_PERIODIC_RATE;
 128module_param(tmrate, int, S_IRUGO | S_IWUSR);
 129MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
 130#endif
 131
 132#define DMA_BUFFER_SIZE BUF_SIZE_2KiB
 133static int buf_sz = DMA_BUFFER_SIZE;
 134module_param(buf_sz, int, S_IRUGO | S_IWUSR);
 135MODULE_PARM_DESC(buf_sz, "DMA buffer size");
 136
 137static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 138                                      NETIF_MSG_LINK | NETIF_MSG_IFUP |
 139                                      NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
 140
 141static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
 142static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
 143
 144/**
 145 * stmmac_verify_args - verify the driver parameters.
 146 * Description: it verifies if some wrong parameter is passed to the driver.
 147 * Note that wrong parameters are replaced with the default values.
 148 */
 149static void stmmac_verify_args(void)
 150{
 151        if (unlikely(watchdog < 0))
 152                watchdog = TX_TIMEO;
 153        if (unlikely(dma_rxsize < 0))
 154                dma_rxsize = DMA_RX_SIZE;
 155        if (unlikely(dma_txsize < 0))
 156                dma_txsize = DMA_TX_SIZE;
 157        if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
 158                buf_sz = DMA_BUFFER_SIZE;
 159        if (unlikely(flow_ctrl > 1))
 160                flow_ctrl = FLOW_AUTO;
 161        else if (likely(flow_ctrl < 0))
 162                flow_ctrl = FLOW_OFF;
 163        if (unlikely((pause < 0) || (pause > 0xffff)))
 164                pause = PAUSE_TIME;
 165}
 166
 167#if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
 168static void print_pkt(unsigned char *buf, int len)
 169{
 170        int j;
 171        pr_info("len = %d byte, buf addr: 0x%p", len, buf);
 172        for (j = 0; j < len; j++) {
 173                if ((j % 16) == 0)
 174                        pr_info("\n %03x:", j);
 175                pr_info(" %02x", buf[j]);
 176        }
 177        pr_info("\n");
 178}
 179#endif
 180
 181/* minimum number of free TX descriptors required to wake up TX process */
 182#define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
 183
 184static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
 185{
 186        return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
 187}
 188
 189/* On some ST platforms, some HW system configuraton registers have to be
 190 * set according to the link speed negotiated.
 191 */
 192static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
 193{
 194        struct phy_device *phydev = priv->phydev;
 195
 196        if (likely(priv->plat->fix_mac_speed))
 197                priv->plat->fix_mac_speed(priv->plat->bsp_priv,
 198                                          phydev->speed);
 199}
 200
 201/**
 202 * stmmac_adjust_link
 203 * @dev: net device structure
 204 * Description: it adjusts the link parameters.
 205 */
 206static void stmmac_adjust_link(struct net_device *dev)
 207{
 208        struct stmmac_priv *priv = netdev_priv(dev);
 209        struct phy_device *phydev = priv->phydev;
 210        unsigned long flags;
 211        int new_state = 0;
 212        unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
 213
 214        if (phydev == NULL)
 215                return;
 216
 217        DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
 218            phydev->addr, phydev->link);
 219
 220        spin_lock_irqsave(&priv->lock, flags);
 221        if (phydev->link) {
 222                u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
 223
 224                /* Now we make sure that we can be in full duplex mode.
 225                 * If not, we operate in half-duplex mode. */
 226                if (phydev->duplex != priv->oldduplex) {
 227                        new_state = 1;
 228                        if (!(phydev->duplex))
 229                                ctrl &= ~priv->hw->link.duplex;
 230                        else
 231                                ctrl |= priv->hw->link.duplex;
 232                        priv->oldduplex = phydev->duplex;
 233                }
 234                /* Flow Control operation */
 235                if (phydev->pause)
 236                        priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
 237                                                 fc, pause_time);
 238
 239                if (phydev->speed != priv->speed) {
 240                        new_state = 1;
 241                        switch (phydev->speed) {
 242                        case 1000:
 243                                if (likely(priv->plat->has_gmac))
 244                                        ctrl &= ~priv->hw->link.port;
 245                                stmmac_hw_fix_mac_speed(priv);
 246                                break;
 247                        case 100:
 248                        case 10:
 249                                if (priv->plat->has_gmac) {
 250                                        ctrl |= priv->hw->link.port;
 251                                        if (phydev->speed == SPEED_100) {
 252                                                ctrl |= priv->hw->link.speed;
 253                                        } else {
 254                                                ctrl &= ~(priv->hw->link.speed);
 255                                        }
 256                                } else {
 257                                        ctrl &= ~priv->hw->link.port;
 258                                }
 259                                stmmac_hw_fix_mac_speed(priv);
 260                                break;
 261                        default:
 262                                if (netif_msg_link(priv))
 263                                        pr_warning("%s: Speed (%d) is not 10"
 264                                       " or 100!\n", dev->name, phydev->speed);
 265                                break;
 266                        }
 267
 268                        priv->speed = phydev->speed;
 269                }
 270
 271                writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
 272
 273                if (!priv->oldlink) {
 274                        new_state = 1;
 275                        priv->oldlink = 1;
 276                }
 277        } else if (priv->oldlink) {
 278                new_state = 1;
 279                priv->oldlink = 0;
 280                priv->speed = 0;
 281                priv->oldduplex = -1;
 282        }
 283
 284        if (new_state && netif_msg_link(priv))
 285                phy_print_status(phydev);
 286
 287        spin_unlock_irqrestore(&priv->lock, flags);
 288
 289        DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
 290}
 291
 292/**
 293 * stmmac_init_phy - PHY initialization
 294 * @dev: net device structure
 295 * Description: it initializes the driver's PHY state, and attaches the PHY
 296 * to the mac driver.
 297 *  Return value:
 298 *  0 on success
 299 */
 300static int stmmac_init_phy(struct net_device *dev)
 301{
 302        struct stmmac_priv *priv = netdev_priv(dev);
 303        struct phy_device *phydev;
 304        char phy_id[MII_BUS_ID_SIZE + 3];
 305        char bus_id[MII_BUS_ID_SIZE];
 306
 307        priv->oldlink = 0;
 308        priv->speed = 0;
 309        priv->oldduplex = -1;
 310
 311        if (priv->phy_addr == -1) {
 312                /* We don't have a PHY, so do nothing */
 313                return 0;
 314        }
 315
 316        snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
 317        snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
 318                 priv->phy_addr);
 319        pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
 320
 321        phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
 322                        priv->phy_interface);
 323
 324        if (IS_ERR(phydev)) {
 325                pr_err("%s: Could not attach to PHY\n", dev->name);
 326                return PTR_ERR(phydev);
 327        }
 328
 329        /*
 330         * Broken HW is sometimes missing the pull-up resistor on the
 331         * MDIO line, which results in reads to non-existent devices returning
 332         * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
 333         * device as well.
 334         * Note: phydev->phy_id is the result of reading the UID PHY registers.
 335         */
 336        if (phydev->phy_id == 0) {
 337                phy_disconnect(phydev);
 338                return -ENODEV;
 339        }
 340        pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
 341               " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
 342
 343        priv->phydev = phydev;
 344
 345        return 0;
 346}
 347
 348static inline void stmmac_enable_mac(void __iomem *ioaddr)
 349{
 350        u32 value = readl(ioaddr + MAC_CTRL_REG);
 351
 352        value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
 353        writel(value, ioaddr + MAC_CTRL_REG);
 354}
 355
 356static inline void stmmac_disable_mac(void __iomem *ioaddr)
 357{
 358        u32 value = readl(ioaddr + MAC_CTRL_REG);
 359
 360        value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
 361        writel(value, ioaddr + MAC_CTRL_REG);
 362}
 363
 364/**
 365 * display_ring
 366 * @p: pointer to the ring.
 367 * @size: size of the ring.
 368 * Description: display all the descriptors within the ring.
 369 */
 370static void display_ring(struct dma_desc *p, int size)
 371{
 372        struct tmp_s {
 373                u64 a;
 374                unsigned int b;
 375                unsigned int c;
 376        };
 377        int i;
 378        for (i = 0; i < size; i++) {
 379                struct tmp_s *x = (struct tmp_s *)(p + i);
 380                pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
 381                       i, (unsigned int)virt_to_phys(&p[i]),
 382                       (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
 383                       x->b, x->c);
 384                pr_info("\n");
 385        }
 386}
 387
 388/**
 389 * init_dma_desc_rings - init the RX/TX descriptor rings
 390 * @dev: net device structure
 391 * Description:  this function initializes the DMA RX/TX descriptors
 392 * and allocates the socket buffers.
 393 */
 394static void init_dma_desc_rings(struct net_device *dev)
 395{
 396        int i;
 397        struct stmmac_priv *priv = netdev_priv(dev);
 398        struct sk_buff *skb;
 399        unsigned int txsize = priv->dma_tx_size;
 400        unsigned int rxsize = priv->dma_rx_size;
 401        unsigned int bfsize = priv->dma_buf_sz;
 402        int buff2_needed = 0, dis_ic = 0;
 403
 404        /* Set the Buffer size according to the MTU;
 405         * indeed, in case of jumbo we need to bump-up the buffer sizes.
 406         */
 407        if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
 408                bfsize = BUF_SIZE_16KiB;
 409        else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
 410                bfsize = BUF_SIZE_8KiB;
 411        else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
 412                bfsize = BUF_SIZE_4KiB;
 413        else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
 414                bfsize = BUF_SIZE_2KiB;
 415        else
 416                bfsize = DMA_BUFFER_SIZE;
 417
 418#ifdef CONFIG_STMMAC_TIMER
 419        /* Disable interrupts on completion for the reception if timer is on */
 420        if (likely(priv->tm->enable))
 421                dis_ic = 1;
 422#endif
 423        /* If the MTU exceeds 8k so use the second buffer in the chain */
 424        if (bfsize >= BUF_SIZE_8KiB)
 425                buff2_needed = 1;
 426
 427        DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
 428            txsize, rxsize, bfsize);
 429
 430        priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
 431        priv->rx_skbuff =
 432            kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
 433        priv->dma_rx =
 434            (struct dma_desc *)dma_alloc_coherent(priv->device,
 435                                                  rxsize *
 436                                                  sizeof(struct dma_desc),
 437                                                  &priv->dma_rx_phy,
 438                                                  GFP_KERNEL);
 439        priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
 440                                       GFP_KERNEL);
 441        priv->dma_tx =
 442            (struct dma_desc *)dma_alloc_coherent(priv->device,
 443                                                  txsize *
 444                                                  sizeof(struct dma_desc),
 445                                                  &priv->dma_tx_phy,
 446                                                  GFP_KERNEL);
 447
 448        if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
 449                pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
 450                return;
 451        }
 452
 453        DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
 454            "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
 455            dev->name, priv->dma_rx, priv->dma_tx,
 456            (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
 457
 458        /* RX INITIALIZATION */
 459        DBG(probe, INFO, "stmmac: SKB addresses:\n"
 460                         "skb\t\tskb data\tdma data\n");
 461
 462        for (i = 0; i < rxsize; i++) {
 463                struct dma_desc *p = priv->dma_rx + i;
 464
 465                skb = netdev_alloc_skb_ip_align(dev, bfsize);
 466                if (unlikely(skb == NULL)) {
 467                        pr_err("%s: Rx init fails; skb is NULL\n", __func__);
 468                        break;
 469                }
 470                priv->rx_skbuff[i] = skb;
 471                priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
 472                                                bfsize, DMA_FROM_DEVICE);
 473
 474                p->des2 = priv->rx_skbuff_dma[i];
 475                if (unlikely(buff2_needed))
 476                        p->des3 = p->des2 + BUF_SIZE_8KiB;
 477                DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
 478                        priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
 479        }
 480        priv->cur_rx = 0;
 481        priv->dirty_rx = (unsigned int)(i - rxsize);
 482        priv->dma_buf_sz = bfsize;
 483        buf_sz = bfsize;
 484
 485        /* TX INITIALIZATION */
 486        for (i = 0; i < txsize; i++) {
 487                priv->tx_skbuff[i] = NULL;
 488                priv->dma_tx[i].des2 = 0;
 489        }
 490        priv->dirty_tx = 0;
 491        priv->cur_tx = 0;
 492
 493        /* Clear the Rx/Tx descriptors */
 494        priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
 495        priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
 496
 497        if (netif_msg_hw(priv)) {
 498                pr_info("RX descriptor ring:\n");
 499                display_ring(priv->dma_rx, rxsize);
 500                pr_info("TX descriptor ring:\n");
 501                display_ring(priv->dma_tx, txsize);
 502        }
 503}
 504
 505static void dma_free_rx_skbufs(struct stmmac_priv *priv)
 506{
 507        int i;
 508
 509        for (i = 0; i < priv->dma_rx_size; i++) {
 510                if (priv->rx_skbuff[i]) {
 511                        dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
 512                                         priv->dma_buf_sz, DMA_FROM_DEVICE);
 513                        dev_kfree_skb_any(priv->rx_skbuff[i]);
 514                }
 515                priv->rx_skbuff[i] = NULL;
 516        }
 517}
 518
 519static void dma_free_tx_skbufs(struct stmmac_priv *priv)
 520{
 521        int i;
 522
 523        for (i = 0; i < priv->dma_tx_size; i++) {
 524                if (priv->tx_skbuff[i] != NULL) {
 525                        struct dma_desc *p = priv->dma_tx + i;
 526                        if (p->des2)
 527                                dma_unmap_single(priv->device, p->des2,
 528                                                 priv->hw->desc->get_tx_len(p),
 529                                                 DMA_TO_DEVICE);
 530                        dev_kfree_skb_any(priv->tx_skbuff[i]);
 531                        priv->tx_skbuff[i] = NULL;
 532                }
 533        }
 534}
 535
 536static void free_dma_desc_resources(struct stmmac_priv *priv)
 537{
 538        /* Release the DMA TX/RX socket buffers */
 539        dma_free_rx_skbufs(priv);
 540        dma_free_tx_skbufs(priv);
 541
 542        /* Free the region of consistent memory previously allocated for
 543         * the DMA */
 544        dma_free_coherent(priv->device,
 545                          priv->dma_tx_size * sizeof(struct dma_desc),
 546                          priv->dma_tx, priv->dma_tx_phy);
 547        dma_free_coherent(priv->device,
 548                          priv->dma_rx_size * sizeof(struct dma_desc),
 549                          priv->dma_rx, priv->dma_rx_phy);
 550        kfree(priv->rx_skbuff_dma);
 551        kfree(priv->rx_skbuff);
 552        kfree(priv->tx_skbuff);
 553}
 554
 555/**
 556 *  stmmac_dma_operation_mode - HW DMA operation mode
 557 *  @priv : pointer to the private device structure.
 558 *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
 559 *  or Store-And-Forward capability.
 560 */
 561static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
 562{
 563        if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
 564                /* In case of GMAC, SF mode has to be enabled
 565                 * to perform the TX COE. This depends on:
 566                 * 1) TX COE if actually supported
 567                 * 2) There is no bugged Jumbo frame support
 568                 *    that needs to not insert csum in the TDES.
 569                 */
 570                priv->hw->dma->dma_mode(priv->ioaddr,
 571                                        SF_DMA_MODE, SF_DMA_MODE);
 572                tc = SF_DMA_MODE;
 573        } else
 574                priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 575}
 576
 577/**
 578 * stmmac_tx:
 579 * @priv: private driver structure
 580 * Description: it reclaims resources after transmission completes.
 581 */
 582static void stmmac_tx(struct stmmac_priv *priv)
 583{
 584        unsigned int txsize = priv->dma_tx_size;
 585
 586        while (priv->dirty_tx != priv->cur_tx) {
 587                int last;
 588                unsigned int entry = priv->dirty_tx % txsize;
 589                struct sk_buff *skb = priv->tx_skbuff[entry];
 590                struct dma_desc *p = priv->dma_tx + entry;
 591
 592                /* Check if the descriptor is owned by the DMA. */
 593                if (priv->hw->desc->get_tx_owner(p))
 594                        break;
 595
 596                /* Verify tx error by looking at the last segment */
 597                last = priv->hw->desc->get_tx_ls(p);
 598                if (likely(last)) {
 599                        int tx_error =
 600                                priv->hw->desc->tx_status(&priv->dev->stats,
 601                                                          &priv->xstats, p,
 602                                                          priv->ioaddr);
 603                        if (likely(tx_error == 0)) {
 604                                priv->dev->stats.tx_packets++;
 605                                priv->xstats.tx_pkt_n++;
 606                        } else
 607                                priv->dev->stats.tx_errors++;
 608                }
 609                TX_DBG("%s: curr %d, dirty %d\n", __func__,
 610                        priv->cur_tx, priv->dirty_tx);
 611
 612                if (likely(p->des2))
 613                        dma_unmap_single(priv->device, p->des2,
 614                                         priv->hw->desc->get_tx_len(p),
 615                                         DMA_TO_DEVICE);
 616                if (unlikely(p->des3))
 617                        p->des3 = 0;
 618
 619                if (likely(skb != NULL)) {
 620                        /*
 621                         * If there's room in the queue (limit it to size)
 622                         * we add this skb back into the pool,
 623                         * if it's the right size.
 624                         */
 625                        if ((skb_queue_len(&priv->rx_recycle) <
 626                                priv->dma_rx_size) &&
 627                                skb_recycle_check(skb, priv->dma_buf_sz))
 628                                __skb_queue_head(&priv->rx_recycle, skb);
 629                        else
 630                                dev_kfree_skb(skb);
 631
 632                        priv->tx_skbuff[entry] = NULL;
 633                }
 634
 635                priv->hw->desc->release_tx_desc(p);
 636
 637                entry = (++priv->dirty_tx) % txsize;
 638        }
 639        if (unlikely(netif_queue_stopped(priv->dev) &&
 640                     stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
 641                netif_tx_lock(priv->dev);
 642                if (netif_queue_stopped(priv->dev) &&
 643                     stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
 644                        TX_DBG("%s: restart transmit\n", __func__);
 645                        netif_wake_queue(priv->dev);
 646                }
 647                netif_tx_unlock(priv->dev);
 648        }
 649}
 650
 651static inline void stmmac_enable_irq(struct stmmac_priv *priv)
 652{
 653#ifdef CONFIG_STMMAC_TIMER
 654        if (likely(priv->tm->enable))
 655                priv->tm->timer_start(tmrate);
 656        else
 657#endif
 658                priv->hw->dma->enable_dma_irq(priv->ioaddr);
 659}
 660
 661static inline void stmmac_disable_irq(struct stmmac_priv *priv)
 662{
 663#ifdef CONFIG_STMMAC_TIMER
 664        if (likely(priv->tm->enable))
 665                priv->tm->timer_stop();
 666        else
 667#endif
 668                priv->hw->dma->disable_dma_irq(priv->ioaddr);
 669}
 670
 671static int stmmac_has_work(struct stmmac_priv *priv)
 672{
 673        unsigned int has_work = 0;
 674        int rxret, tx_work = 0;
 675
 676        rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
 677                (priv->cur_rx % priv->dma_rx_size));
 678
 679        if (priv->dirty_tx != priv->cur_tx)
 680                tx_work = 1;
 681
 682        if (likely(!rxret || tx_work))
 683                has_work = 1;
 684
 685        return has_work;
 686}
 687
 688static inline void _stmmac_schedule(struct stmmac_priv *priv)
 689{
 690        if (likely(stmmac_has_work(priv))) {
 691                stmmac_disable_irq(priv);
 692                napi_schedule(&priv->napi);
 693        }
 694}
 695
 696#ifdef CONFIG_STMMAC_TIMER
 697void stmmac_schedule(struct net_device *dev)
 698{
 699        struct stmmac_priv *priv = netdev_priv(dev);
 700
 701        priv->xstats.sched_timer_n++;
 702
 703        _stmmac_schedule(priv);
 704}
 705
 706static void stmmac_no_timer_started(unsigned int x)
 707{;
 708};
 709
 710static void stmmac_no_timer_stopped(void)
 711{;
 712};
 713#endif
 714
 715/**
 716 * stmmac_tx_err:
 717 * @priv: pointer to the private device structure
 718 * Description: it cleans the descriptors and restarts the transmission
 719 * in case of errors.
 720 */
 721static void stmmac_tx_err(struct stmmac_priv *priv)
 722{
 723
 724        netif_stop_queue(priv->dev);
 725
 726        priv->hw->dma->stop_tx(priv->ioaddr);
 727        dma_free_tx_skbufs(priv);
 728        priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
 729        priv->dirty_tx = 0;
 730        priv->cur_tx = 0;
 731        priv->hw->dma->start_tx(priv->ioaddr);
 732
 733        priv->dev->stats.tx_errors++;
 734        netif_wake_queue(priv->dev);
 735}
 736
 737
 738static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 739{
 740        int status;
 741
 742        status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
 743        if (likely(status == handle_tx_rx))
 744                _stmmac_schedule(priv);
 745
 746        else if (unlikely(status == tx_hard_error_bump_tc)) {
 747                /* Try to bump up the dma threshold on this failure */
 748                if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
 749                        tc += 64;
 750                        priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
 751                        priv->xstats.threshold = tc;
 752                }
 753                stmmac_tx_err(priv);
 754        } else if (unlikely(status == tx_hard_error))
 755                stmmac_tx_err(priv);
 756}
 757
 758/**
 759 *  stmmac_open - open entry point of the driver
 760 *  @dev : pointer to the device structure.
 761 *  Description:
 762 *  This function is the open entry point of the driver.
 763 *  Return value:
 764 *  0 on success and an appropriate (-)ve integer as defined in errno.h
 765 *  file on failure.
 766 */
 767static int stmmac_open(struct net_device *dev)
 768{
 769        struct stmmac_priv *priv = netdev_priv(dev);
 770        int ret;
 771
 772        /* Check that the MAC address is valid.  If its not, refuse
 773         * to bring the device up. The user must specify an
 774         * address using the following linux command:
 775         *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
 776        if (!is_valid_ether_addr(dev->dev_addr)) {
 777                random_ether_addr(dev->dev_addr);
 778                pr_warning("%s: generated random MAC address %pM\n", dev->name,
 779                        dev->dev_addr);
 780        }
 781
 782        stmmac_verify_args();
 783
 784        ret = stmmac_init_phy(dev);
 785        if (unlikely(ret)) {
 786                pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
 787                return ret;
 788        }
 789
 790        /* Request the IRQ lines */
 791        ret = request_irq(dev->irq, stmmac_interrupt,
 792                          IRQF_SHARED, dev->name, dev);
 793        if (unlikely(ret < 0)) {
 794                pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
 795                       __func__, dev->irq, ret);
 796                return ret;
 797        }
 798
 799#ifdef CONFIG_STMMAC_TIMER
 800        priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
 801        if (unlikely(priv->tm == NULL)) {
 802                pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
 803                return -ENOMEM;
 804        }
 805        priv->tm->freq = tmrate;
 806
 807        /* Test if the external timer can be actually used.
 808         * In case of failure continue without timer. */
 809        if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
 810                pr_warning("stmmaceth: cannot attach the external timer.\n");
 811                priv->tm->freq = 0;
 812                priv->tm->timer_start = stmmac_no_timer_started;
 813                priv->tm->timer_stop = stmmac_no_timer_stopped;
 814        } else
 815                priv->tm->enable = 1;
 816#endif
 817
 818        /* Create and initialize the TX/RX descriptors chains. */
 819        priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
 820        priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
 821        priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
 822        init_dma_desc_rings(dev);
 823
 824        /* DMA initialization and SW reset */
 825        if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
 826                                         priv->dma_tx_phy,
 827                                         priv->dma_rx_phy) < 0)) {
 828
 829                pr_err("%s: DMA initialization failed\n", __func__);
 830                return -1;
 831        }
 832
 833        /* Copy the MAC addr into the HW  */
 834        priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
 835        /* If required, perform hw setup of the bus. */
 836        if (priv->plat->bus_setup)
 837                priv->plat->bus_setup(priv->ioaddr);
 838        /* Initialize the MAC Core */
 839        priv->hw->mac->core_init(priv->ioaddr);
 840
 841        priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
 842        if (priv->rx_coe)
 843                pr_info("stmmac: Rx Checksum Offload Engine supported\n");
 844        if (priv->plat->tx_coe)
 845                pr_info("\tTX Checksum insertion supported\n");
 846
 847        /* Initialise the MMC (if present) to disable all interrupts. */
 848        writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
 849        writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
 850
 851        /* Enable the MAC Rx/Tx */
 852        stmmac_enable_mac(priv->ioaddr);
 853
 854        /* Set the HW DMA mode and the COE */
 855        stmmac_dma_operation_mode(priv);
 856
 857        /* Extra statistics */
 858        memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
 859        priv->xstats.threshold = tc;
 860
 861        /* Start the ball rolling... */
 862        DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
 863        priv->hw->dma->start_tx(priv->ioaddr);
 864        priv->hw->dma->start_rx(priv->ioaddr);
 865
 866#ifdef CONFIG_STMMAC_TIMER
 867        priv->tm->timer_start(tmrate);
 868#endif
 869        /* Dump DMA/MAC registers */
 870        if (netif_msg_hw(priv)) {
 871                priv->hw->mac->dump_regs(priv->ioaddr);
 872                priv->hw->dma->dump_regs(priv->ioaddr);
 873        }
 874
 875        if (priv->phydev)
 876                phy_start(priv->phydev);
 877
 878        napi_enable(&priv->napi);
 879        skb_queue_head_init(&priv->rx_recycle);
 880        netif_start_queue(dev);
 881        return 0;
 882}
 883
 884/**
 885 *  stmmac_release - close entry point of the driver
 886 *  @dev : device pointer.
 887 *  Description:
 888 *  This is the stop entry point of the driver.
 889 */
 890static int stmmac_release(struct net_device *dev)
 891{
 892        struct stmmac_priv *priv = netdev_priv(dev);
 893
 894        /* Stop and disconnect the PHY */
 895        if (priv->phydev) {
 896                phy_stop(priv->phydev);
 897                phy_disconnect(priv->phydev);
 898                priv->phydev = NULL;
 899        }
 900
 901        netif_stop_queue(dev);
 902
 903#ifdef CONFIG_STMMAC_TIMER
 904        /* Stop and release the timer */
 905        stmmac_close_ext_timer();
 906        if (priv->tm != NULL)
 907                kfree(priv->tm);
 908#endif
 909        napi_disable(&priv->napi);
 910        skb_queue_purge(&priv->rx_recycle);
 911
 912        /* Free the IRQ lines */
 913        free_irq(dev->irq, dev);
 914
 915        /* Stop TX/RX DMA and clear the descriptors */
 916        priv->hw->dma->stop_tx(priv->ioaddr);
 917        priv->hw->dma->stop_rx(priv->ioaddr);
 918
 919        /* Release and free the Rx/Tx resources */
 920        free_dma_desc_resources(priv);
 921
 922        /* Disable the MAC Rx/Tx */
 923        stmmac_disable_mac(priv->ioaddr);
 924
 925        netif_carrier_off(dev);
 926
 927        return 0;
 928}
 929
 930/*
 931 * To perform emulated hardware segmentation on skb.
 932 */
 933static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
 934{
 935        struct sk_buff *segs, *curr_skb;
 936        int gso_segs = skb_shinfo(skb)->gso_segs;
 937
 938        /* Estimate the number of fragments in the worst case */
 939        if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
 940                netif_stop_queue(priv->dev);
 941                TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
 942                       __func__);
 943                if (stmmac_tx_avail(priv) < gso_segs)
 944                        return NETDEV_TX_BUSY;
 945
 946                netif_wake_queue(priv->dev);
 947        }
 948        TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
 949               skb, skb->len);
 950
 951        segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
 952        if (IS_ERR(segs))
 953                goto sw_tso_end;
 954
 955        do {
 956                curr_skb = segs;
 957                segs = segs->next;
 958                TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
 959                       "*next %p\n", curr_skb->len, curr_skb, segs);
 960                curr_skb->next = NULL;
 961                stmmac_xmit(curr_skb, priv->dev);
 962        } while (segs);
 963
 964sw_tso_end:
 965        dev_kfree_skb(skb);
 966
 967        return NETDEV_TX_OK;
 968}
 969
 970static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
 971                                               struct net_device *dev,
 972                                               int csum_insertion)
 973{
 974        struct stmmac_priv *priv = netdev_priv(dev);
 975        unsigned int nopaged_len = skb_headlen(skb);
 976        unsigned int txsize = priv->dma_tx_size;
 977        unsigned int entry = priv->cur_tx % txsize;
 978        struct dma_desc *desc = priv->dma_tx + entry;
 979
 980        if (nopaged_len > BUF_SIZE_8KiB) {
 981
 982                int buf2_size = nopaged_len - BUF_SIZE_8KiB;
 983
 984                desc->des2 = dma_map_single(priv->device, skb->data,
 985                                            BUF_SIZE_8KiB, DMA_TO_DEVICE);
 986                desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 987                priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
 988                                                csum_insertion);
 989
 990                entry = (++priv->cur_tx) % txsize;
 991                desc = priv->dma_tx + entry;
 992
 993                desc->des2 = dma_map_single(priv->device,
 994                                        skb->data + BUF_SIZE_8KiB,
 995                                        buf2_size, DMA_TO_DEVICE);
 996                desc->des3 = desc->des2 + BUF_SIZE_4KiB;
 997                priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
 998                                                csum_insertion);
 999                priv->hw->desc->set_tx_owner(desc);
1000                priv->tx_skbuff[entry] = NULL;
1001        } else {
1002                desc->des2 = dma_map_single(priv->device, skb->data,
1003                                        nopaged_len, DMA_TO_DEVICE);
1004                desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1005                priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1006                                                csum_insertion);
1007        }
1008        return entry;
1009}
1010
1011/**
1012 *  stmmac_xmit:
1013 *  @skb : the socket buffer
1014 *  @dev : device pointer
1015 *  Description : Tx entry point of the driver.
1016 */
1017static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1018{
1019        struct stmmac_priv *priv = netdev_priv(dev);
1020        unsigned int txsize = priv->dma_tx_size;
1021        unsigned int entry;
1022        int i, csum_insertion = 0;
1023        int nfrags = skb_shinfo(skb)->nr_frags;
1024        struct dma_desc *desc, *first;
1025
1026        if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1027                if (!netif_queue_stopped(dev)) {
1028                        netif_stop_queue(dev);
1029                        /* This is a hard error, log it. */
1030                        pr_err("%s: BUG! Tx Ring full when queue awake\n",
1031                                __func__);
1032                }
1033                return NETDEV_TX_BUSY;
1034        }
1035
1036        entry = priv->cur_tx % txsize;
1037
1038#ifdef STMMAC_XMIT_DEBUG
1039        if ((skb->len > ETH_FRAME_LEN) || nfrags)
1040                pr_info("stmmac xmit:\n"
1041                       "\tskb addr %p - len: %d - nopaged_len: %d\n"
1042                       "\tn_frags: %d - ip_summed: %d - %s gso\n",
1043                       skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1044                       !skb_is_gso(skb) ? "isn't" : "is");
1045#endif
1046
1047        if (unlikely(skb_is_gso(skb)))
1048                return stmmac_sw_tso(priv, skb);
1049
1050        if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1051                if (unlikely((!priv->plat->tx_coe) ||
1052                             (priv->no_csum_insertion)))
1053                        skb_checksum_help(skb);
1054                else
1055                        csum_insertion = 1;
1056        }
1057
1058        desc = priv->dma_tx + entry;
1059        first = desc;
1060
1061#ifdef STMMAC_XMIT_DEBUG
1062        if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1063                pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1064                       "\t\tn_frags: %d, ip_summed: %d\n",
1065                       skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1066#endif
1067        priv->tx_skbuff[entry] = skb;
1068        if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1069                entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1070                desc = priv->dma_tx + entry;
1071        } else {
1072                unsigned int nopaged_len = skb_headlen(skb);
1073                desc->des2 = dma_map_single(priv->device, skb->data,
1074                                        nopaged_len, DMA_TO_DEVICE);
1075                priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1076                                                csum_insertion);
1077        }
1078
1079        for (i = 0; i < nfrags; i++) {
1080                skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1081                int len = frag->size;
1082
1083                entry = (++priv->cur_tx) % txsize;
1084                desc = priv->dma_tx + entry;
1085
1086                TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1087                desc->des2 = dma_map_page(priv->device, frag->page,
1088                                          frag->page_offset,
1089                                          len, DMA_TO_DEVICE);
1090                priv->tx_skbuff[entry] = NULL;
1091                priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1092                priv->hw->desc->set_tx_owner(desc);
1093        }
1094
1095        /* Interrupt on completition only for the latest segment */
1096        priv->hw->desc->close_tx_desc(desc);
1097
1098#ifdef CONFIG_STMMAC_TIMER
1099        /* Clean IC while using timer */
1100        if (likely(priv->tm->enable))
1101                priv->hw->desc->clear_tx_ic(desc);
1102#endif
1103        /* To avoid raise condition */
1104        priv->hw->desc->set_tx_owner(first);
1105
1106        priv->cur_tx++;
1107
1108#ifdef STMMAC_XMIT_DEBUG
1109        if (netif_msg_pktdata(priv)) {
1110                pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1111                       "first=%p, nfrags=%d\n",
1112                       (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1113                       entry, first, nfrags);
1114                display_ring(priv->dma_tx, txsize);
1115                pr_info(">>> frame to be transmitted: ");
1116                print_pkt(skb->data, skb->len);
1117        }
1118#endif
1119        if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1120                TX_DBG("%s: stop transmitted packets\n", __func__);
1121                netif_stop_queue(dev);
1122        }
1123
1124        dev->stats.tx_bytes += skb->len;
1125
1126        priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1127
1128        return NETDEV_TX_OK;
1129}
1130
1131static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1132{
1133        unsigned int rxsize = priv->dma_rx_size;
1134        int bfsize = priv->dma_buf_sz;
1135        struct dma_desc *p = priv->dma_rx;
1136
1137        for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1138                unsigned int entry = priv->dirty_rx % rxsize;
1139                if (likely(priv->rx_skbuff[entry] == NULL)) {
1140                        struct sk_buff *skb;
1141
1142                        skb = __skb_dequeue(&priv->rx_recycle);
1143                        if (skb == NULL)
1144                                skb = netdev_alloc_skb_ip_align(priv->dev,
1145                                                                bfsize);
1146
1147                        if (unlikely(skb == NULL))
1148                                break;
1149
1150                        priv->rx_skbuff[entry] = skb;
1151                        priv->rx_skbuff_dma[entry] =
1152                            dma_map_single(priv->device, skb->data, bfsize,
1153                                           DMA_FROM_DEVICE);
1154
1155                        (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1156                        if (unlikely(priv->plat->has_gmac)) {
1157                                if (bfsize >= BUF_SIZE_8KiB)
1158                                        (p + entry)->des3 =
1159                                            (p + entry)->des2 + BUF_SIZE_8KiB;
1160                        }
1161                        RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1162                }
1163                priv->hw->desc->set_rx_owner(p + entry);
1164        }
1165}
1166
1167static int stmmac_rx(struct stmmac_priv *priv, int limit)
1168{
1169        unsigned int rxsize = priv->dma_rx_size;
1170        unsigned int entry = priv->cur_rx % rxsize;
1171        unsigned int next_entry;
1172        unsigned int count = 0;
1173        struct dma_desc *p = priv->dma_rx + entry;
1174        struct dma_desc *p_next;
1175
1176#ifdef STMMAC_RX_DEBUG
1177        if (netif_msg_hw(priv)) {
1178                pr_debug(">>> stmmac_rx: descriptor ring:\n");
1179                display_ring(priv->dma_rx, rxsize);
1180        }
1181#endif
1182        count = 0;
1183        while (!priv->hw->desc->get_rx_owner(p)) {
1184                int status;
1185
1186                if (count >= limit)
1187                        break;
1188
1189                count++;
1190
1191                next_entry = (++priv->cur_rx) % rxsize;
1192                p_next = priv->dma_rx + next_entry;
1193                prefetch(p_next);
1194
1195                /* read the status of the incoming frame */
1196                status = (priv->hw->desc->rx_status(&priv->dev->stats,
1197                                                    &priv->xstats, p));
1198                if (unlikely(status == discard_frame))
1199                        priv->dev->stats.rx_errors++;
1200                else {
1201                        struct sk_buff *skb;
1202                        int frame_len;
1203
1204                        frame_len = priv->hw->desc->get_rx_frame_len(p);
1205                        /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1206                         * Type frames (LLC/LLC-SNAP) */
1207                        if (unlikely(status != llc_snap))
1208                                frame_len -= ETH_FCS_LEN;
1209#ifdef STMMAC_RX_DEBUG
1210                        if (frame_len > ETH_FRAME_LEN)
1211                                pr_debug("\tRX frame size %d, COE status: %d\n",
1212                                        frame_len, status);
1213
1214                        if (netif_msg_hw(priv))
1215                                pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1216                                        p, entry, p->des2);
1217#endif
1218                        skb = priv->rx_skbuff[entry];
1219                        if (unlikely(!skb)) {
1220                                pr_err("%s: Inconsistent Rx descriptor chain\n",
1221                                        priv->dev->name);
1222                                priv->dev->stats.rx_dropped++;
1223                                break;
1224                        }
1225                        prefetch(skb->data - NET_IP_ALIGN);
1226                        priv->rx_skbuff[entry] = NULL;
1227
1228                        skb_put(skb, frame_len);
1229                        dma_unmap_single(priv->device,
1230                                         priv->rx_skbuff_dma[entry],
1231                                         priv->dma_buf_sz, DMA_FROM_DEVICE);
1232#ifdef STMMAC_RX_DEBUG
1233                        if (netif_msg_pktdata(priv)) {
1234                                pr_info(" frame received (%dbytes)", frame_len);
1235                                print_pkt(skb->data, frame_len);
1236                        }
1237#endif
1238                        skb->protocol = eth_type_trans(skb, priv->dev);
1239
1240                        if (unlikely(status == csum_none)) {
1241                                /* always for the old mac 10/100 */
1242                                skb_checksum_none_assert(skb);
1243                                netif_receive_skb(skb);
1244                        } else {
1245                                skb->ip_summed = CHECKSUM_UNNECESSARY;
1246                                napi_gro_receive(&priv->napi, skb);
1247                        }
1248
1249                        priv->dev->stats.rx_packets++;
1250                        priv->dev->stats.rx_bytes += frame_len;
1251                }
1252                entry = next_entry;
1253                p = p_next;     /* use prefetched values */
1254        }
1255
1256        stmmac_rx_refill(priv);
1257
1258        priv->xstats.rx_pkt_n += count;
1259
1260        return count;
1261}
1262
1263/**
1264 *  stmmac_poll - stmmac poll method (NAPI)
1265 *  @napi : pointer to the napi structure.
1266 *  @budget : maximum number of packets that the current CPU can receive from
1267 *            all interfaces.
1268 *  Description :
1269 *   This function implements the the reception process.
1270 *   Also it runs the TX completion thread
1271 */
1272static int stmmac_poll(struct napi_struct *napi, int budget)
1273{
1274        struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1275        int work_done = 0;
1276
1277        priv->xstats.poll_n++;
1278        stmmac_tx(priv);
1279        work_done = stmmac_rx(priv, budget);
1280
1281        if (work_done < budget) {
1282                napi_complete(napi);
1283                stmmac_enable_irq(priv);
1284        }
1285        return work_done;
1286}
1287
1288/**
1289 *  stmmac_tx_timeout
1290 *  @dev : Pointer to net device structure
1291 *  Description: this function is called when a packet transmission fails to
1292 *   complete within a reasonable tmrate. The driver will mark the error in the
1293 *   netdev structure and arrange for the device to be reset to a sane state
1294 *   in order to transmit a new packet.
1295 */
1296static void stmmac_tx_timeout(struct net_device *dev)
1297{
1298        struct stmmac_priv *priv = netdev_priv(dev);
1299
1300        /* Clear Tx resources and restart transmitting again */
1301        stmmac_tx_err(priv);
1302}
1303
1304/* Configuration changes (passed on by ifconfig) */
1305static int stmmac_config(struct net_device *dev, struct ifmap *map)
1306{
1307        if (dev->flags & IFF_UP)        /* can't act on a running interface */
1308                return -EBUSY;
1309
1310        /* Don't allow changing the I/O address */
1311        if (map->base_addr != dev->base_addr) {
1312                pr_warning("%s: can't change I/O address\n", dev->name);
1313                return -EOPNOTSUPP;
1314        }
1315
1316        /* Don't allow changing the IRQ */
1317        if (map->irq != dev->irq) {
1318                pr_warning("%s: can't change IRQ number %d\n",
1319                       dev->name, dev->irq);
1320                return -EOPNOTSUPP;
1321        }
1322
1323        /* ignore other fields */
1324        return 0;
1325}
1326
1327/**
1328 *  stmmac_multicast_list - entry point for multicast addressing
1329 *  @dev : pointer to the device structure
1330 *  Description:
1331 *  This function is a driver entry point which gets called by the kernel
1332 *  whenever multicast addresses must be enabled/disabled.
1333 *  Return value:
1334 *  void.
1335 */
1336static void stmmac_multicast_list(struct net_device *dev)
1337{
1338        struct stmmac_priv *priv = netdev_priv(dev);
1339
1340        spin_lock(&priv->lock);
1341        priv->hw->mac->set_filter(dev);
1342        spin_unlock(&priv->lock);
1343}
1344
1345/**
1346 *  stmmac_change_mtu - entry point to change MTU size for the device.
1347 *  @dev : device pointer.
1348 *  @new_mtu : the new MTU size for the device.
1349 *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1350 *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1351 *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1352 *  Return value:
1353 *  0 on success and an appropriate (-)ve integer as defined in errno.h
1354 *  file on failure.
1355 */
1356static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1357{
1358        struct stmmac_priv *priv = netdev_priv(dev);
1359        int max_mtu;
1360
1361        if (netif_running(dev)) {
1362                pr_err("%s: must be stopped to change its MTU\n", dev->name);
1363                return -EBUSY;
1364        }
1365
1366        if (priv->plat->has_gmac)
1367                max_mtu = JUMBO_LEN;
1368        else
1369                max_mtu = ETH_DATA_LEN;
1370
1371        if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1372                pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1373                return -EINVAL;
1374        }
1375
1376        /* Some GMAC devices have a bugged Jumbo frame support that
1377         * needs to have the Tx COE disabled for oversized frames
1378         * (due to limited buffer sizes). In this case we disable
1379         * the TX csum insertionin the TDES and not use SF. */
1380        if ((priv->plat->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
1381                priv->no_csum_insertion = 1;
1382        else
1383                priv->no_csum_insertion = 0;
1384
1385        dev->mtu = new_mtu;
1386
1387        return 0;
1388}
1389
1390static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1391{
1392        struct net_device *dev = (struct net_device *)dev_id;
1393        struct stmmac_priv *priv = netdev_priv(dev);
1394
1395        if (unlikely(!dev)) {
1396                pr_err("%s: invalid dev pointer\n", __func__);
1397                return IRQ_NONE;
1398        }
1399
1400        if (priv->plat->has_gmac)
1401                /* To handle GMAC own interrupts */
1402                priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1403
1404        stmmac_dma_interrupt(priv);
1405
1406        return IRQ_HANDLED;
1407}
1408
1409#ifdef CONFIG_NET_POLL_CONTROLLER
1410/* Polling receive - used by NETCONSOLE and other diagnostic tools
1411 * to allow network I/O with interrupts disabled. */
1412static void stmmac_poll_controller(struct net_device *dev)
1413{
1414        disable_irq(dev->irq);
1415        stmmac_interrupt(dev->irq, dev);
1416        enable_irq(dev->irq);
1417}
1418#endif
1419
1420/**
1421 *  stmmac_ioctl - Entry point for the Ioctl
1422 *  @dev: Device pointer.
1423 *  @rq: An IOCTL specefic structure, that can contain a pointer to
1424 *  a proprietary structure used to pass information to the driver.
1425 *  @cmd: IOCTL command
1426 *  Description:
1427 *  Currently there are no special functionality supported in IOCTL, just the
1428 *  phy_mii_ioctl(...) can be invoked.
1429 */
1430static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1431{
1432        struct stmmac_priv *priv = netdev_priv(dev);
1433        int ret;
1434
1435        if (!netif_running(dev))
1436                return -EINVAL;
1437
1438        if (!priv->phydev)
1439                return -EINVAL;
1440
1441        spin_lock(&priv->lock);
1442        ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1443        spin_unlock(&priv->lock);
1444
1445        return ret;
1446}
1447
1448#ifdef STMMAC_VLAN_TAG_USED
1449static void stmmac_vlan_rx_register(struct net_device *dev,
1450                                    struct vlan_group *grp)
1451{
1452        struct stmmac_priv *priv = netdev_priv(dev);
1453
1454        DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1455
1456        spin_lock(&priv->lock);
1457        priv->vlgrp = grp;
1458        spin_unlock(&priv->lock);
1459}
1460#endif
1461
1462static const struct net_device_ops stmmac_netdev_ops = {
1463        .ndo_open = stmmac_open,
1464        .ndo_start_xmit = stmmac_xmit,
1465        .ndo_stop = stmmac_release,
1466        .ndo_change_mtu = stmmac_change_mtu,
1467        .ndo_set_multicast_list = stmmac_multicast_list,
1468        .ndo_tx_timeout = stmmac_tx_timeout,
1469        .ndo_do_ioctl = stmmac_ioctl,
1470        .ndo_set_config = stmmac_config,
1471#ifdef STMMAC_VLAN_TAG_USED
1472        .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1473#endif
1474#ifdef CONFIG_NET_POLL_CONTROLLER
1475        .ndo_poll_controller = stmmac_poll_controller,
1476#endif
1477        .ndo_set_mac_address = eth_mac_addr,
1478};
1479
1480/**
1481 * stmmac_probe - Initialization of the adapter .
1482 * @dev : device pointer
1483 * Description: The function initializes the network device structure for
1484 * the STMMAC driver. It also calls the low level routines
1485 * in order to init the HW (i.e. the DMA engine)
1486 */
1487static int stmmac_probe(struct net_device *dev)
1488{
1489        int ret = 0;
1490        struct stmmac_priv *priv = netdev_priv(dev);
1491
1492        ether_setup(dev);
1493
1494        dev->netdev_ops = &stmmac_netdev_ops;
1495        stmmac_set_ethtool_ops(dev);
1496
1497        dev->features |= NETIF_F_SG | NETIF_F_HIGHDMA |
1498                NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1499        dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1500#ifdef STMMAC_VLAN_TAG_USED
1501        /* Both mac100 and gmac support receive VLAN tag detection */
1502        dev->features |= NETIF_F_HW_VLAN_RX;
1503#endif
1504        priv->msg_enable = netif_msg_init(debug, default_msg_level);
1505
1506        if (flow_ctrl)
1507                priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1508
1509        priv->pause = pause;
1510        netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1511
1512        /* Get the MAC address */
1513        priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1514                                     dev->dev_addr, 0);
1515
1516        if (!is_valid_ether_addr(dev->dev_addr))
1517                pr_warning("\tno valid MAC address;"
1518                        "please, use ifconfig or nwhwconfig!\n");
1519
1520        spin_lock_init(&priv->lock);
1521
1522        ret = register_netdev(dev);
1523        if (ret) {
1524                pr_err("%s: ERROR %i registering the device\n",
1525                       __func__, ret);
1526                return -ENODEV;
1527        }
1528
1529        DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1530            dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1531            (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1532
1533        return ret;
1534}
1535
1536/**
1537 * stmmac_mac_device_setup
1538 * @dev : device pointer
1539 * Description: select and initialise the mac device (mac100 or Gmac).
1540 */
1541static int stmmac_mac_device_setup(struct net_device *dev)
1542{
1543        struct stmmac_priv *priv = netdev_priv(dev);
1544
1545        struct mac_device_info *device;
1546
1547        if (priv->plat->has_gmac)
1548                device = dwmac1000_setup(priv->ioaddr);
1549        else
1550                device = dwmac100_setup(priv->ioaddr);
1551
1552        if (!device)
1553                return -ENOMEM;
1554
1555        if (priv->plat->enh_desc) {
1556                device->desc = &enh_desc_ops;
1557                pr_info("\tEnhanced descriptor structure\n");
1558        } else
1559                device->desc = &ndesc_ops;
1560
1561        priv->hw = device;
1562
1563        if (device_can_wakeup(priv->device)) {
1564                priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1565                enable_irq_wake(dev->irq);
1566        }
1567
1568        return 0;
1569}
1570
1571static int stmmacphy_dvr_probe(struct platform_device *pdev)
1572{
1573        struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1574
1575        pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1576               plat_dat->bus_id);
1577
1578        return 0;
1579}
1580
1581static int stmmacphy_dvr_remove(struct platform_device *pdev)
1582{
1583        return 0;
1584}
1585
1586static struct platform_driver stmmacphy_driver = {
1587        .driver = {
1588                   .name = PHY_RESOURCE_NAME,
1589                   },
1590        .probe = stmmacphy_dvr_probe,
1591        .remove = stmmacphy_dvr_remove,
1592};
1593
1594/**
1595 * stmmac_associate_phy
1596 * @dev: pointer to device structure
1597 * @data: points to the private structure.
1598 * Description: Scans through all the PHYs we have registered and checks if
1599 * any are associated with our MAC.  If so, then just fill in
1600 * the blanks in our local context structure
1601 */
1602static int stmmac_associate_phy(struct device *dev, void *data)
1603{
1604        struct stmmac_priv *priv = (struct stmmac_priv *)data;
1605        struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1606
1607        DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1608                plat_dat->bus_id);
1609
1610        /* Check that this phy is for the MAC being initialised */
1611        if (priv->plat->bus_id != plat_dat->bus_id)
1612                return 0;
1613
1614        /* OK, this PHY is connected to the MAC.
1615           Go ahead and get the parameters */
1616        DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1617        priv->phy_irq =
1618            platform_get_irq_byname(to_platform_device(dev), "phyirq");
1619        DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1620            plat_dat->bus_id, priv->phy_irq);
1621
1622        /* Override with kernel parameters if supplied XXX CRS XXX
1623         * this needs to have multiple instances */
1624        if ((phyaddr >= 0) && (phyaddr <= 31))
1625                plat_dat->phy_addr = phyaddr;
1626
1627        priv->phy_addr = plat_dat->phy_addr;
1628        priv->phy_mask = plat_dat->phy_mask;
1629        priv->phy_interface = plat_dat->interface;
1630        priv->phy_reset = plat_dat->phy_reset;
1631
1632        DBG(probe, DEBUG, "%s: exiting\n", __func__);
1633        return 1;       /* forces exit of driver_for_each_device() */
1634}
1635
1636/**
1637 * stmmac_dvr_probe
1638 * @pdev: platform device pointer
1639 * Description: the driver is initialized through platform_device.
1640 */
1641static int stmmac_dvr_probe(struct platform_device *pdev)
1642{
1643        int ret = 0;
1644        struct resource *res;
1645        void __iomem *addr = NULL;
1646        struct net_device *ndev = NULL;
1647        struct stmmac_priv *priv = NULL;
1648        struct plat_stmmacenet_data *plat_dat;
1649
1650        pr_info("STMMAC driver:\n\tplatform registration... ");
1651        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1652        if (!res)
1653                return -ENODEV;
1654        pr_info("\tdone!\n");
1655
1656        if (!request_mem_region(res->start, resource_size(res),
1657                                pdev->name)) {
1658                pr_err("%s: ERROR: memory allocation failed"
1659                       "cannot get the I/O addr 0x%x\n",
1660                       __func__, (unsigned int)res->start);
1661                return -EBUSY;
1662        }
1663
1664        addr = ioremap(res->start, resource_size(res));
1665        if (!addr) {
1666                pr_err("%s: ERROR: memory mapping failed\n", __func__);
1667                ret = -ENOMEM;
1668                goto out_release_region;
1669        }
1670
1671        ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1672        if (!ndev) {
1673                pr_err("%s: ERROR: allocating the device\n", __func__);
1674                ret = -ENOMEM;
1675                goto out_unmap;
1676        }
1677
1678        SET_NETDEV_DEV(ndev, &pdev->dev);
1679
1680        /* Get the MAC information */
1681        ndev->irq = platform_get_irq_byname(pdev, "macirq");
1682        if (ndev->irq == -ENXIO) {
1683                pr_err("%s: ERROR: MAC IRQ configuration "
1684                       "information not found\n", __func__);
1685                ret = -ENXIO;
1686                goto out_free_ndev;
1687        }
1688
1689        priv = netdev_priv(ndev);
1690        priv->device = &(pdev->dev);
1691        priv->dev = ndev;
1692        plat_dat = pdev->dev.platform_data;
1693
1694        priv->plat = plat_dat;
1695
1696        priv->ioaddr = addr;
1697
1698        /* PMT module is not integrated in all the MAC devices. */
1699        if (plat_dat->pmt) {
1700                pr_info("\tPMT module supported\n");
1701                device_set_wakeup_capable(&pdev->dev, 1);
1702        }
1703
1704        platform_set_drvdata(pdev, ndev);
1705
1706        /* Set the I/O base addr */
1707        ndev->base_addr = (unsigned long)addr;
1708
1709        /* Custom initialisation */
1710        if (priv->plat->init) {
1711                ret = priv->plat->init(pdev);
1712                if (unlikely(ret))
1713                        goto out_free_ndev;
1714        }
1715
1716        /* MAC HW revice detection */
1717        ret = stmmac_mac_device_setup(ndev);
1718        if (ret < 0)
1719                goto out_plat_exit;
1720
1721        /* Network Device Registration */
1722        ret = stmmac_probe(ndev);
1723        if (ret < 0)
1724                goto out_plat_exit;
1725
1726        /* associate a PHY - it is provided by another platform bus */
1727        if (!driver_for_each_device
1728            (&(stmmacphy_driver.driver), NULL, (void *)priv,
1729             stmmac_associate_phy)) {
1730                pr_err("No PHY device is associated with this MAC!\n");
1731                ret = -ENODEV;
1732                goto out_unregister;
1733        }
1734
1735        pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1736               "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1737               pdev->id, ndev->irq, addr);
1738
1739        /* MDIO bus Registration */
1740        pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1741        ret = stmmac_mdio_register(ndev);
1742        if (ret < 0)
1743                goto out_unregister;
1744        pr_debug("registered!\n");
1745        return 0;
1746
1747out_unregister:
1748        unregister_netdev(ndev);
1749out_plat_exit:
1750        if (priv->plat->exit)
1751                priv->plat->exit(pdev);
1752out_free_ndev:
1753        free_netdev(ndev);
1754        platform_set_drvdata(pdev, NULL);
1755out_unmap:
1756        iounmap(addr);
1757out_release_region:
1758        release_mem_region(res->start, resource_size(res));
1759
1760        return ret;
1761}
1762
1763/**
1764 * stmmac_dvr_remove
1765 * @pdev: platform device pointer
1766 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1767 * changes the link status, releases the DMA descriptor rings,
1768 * unregisters the MDIO bus and unmaps the allocated memory.
1769 */
1770static int stmmac_dvr_remove(struct platform_device *pdev)
1771{
1772        struct net_device *ndev = platform_get_drvdata(pdev);
1773        struct stmmac_priv *priv = netdev_priv(ndev);
1774        struct resource *res;
1775
1776        pr_info("%s:\n\tremoving driver", __func__);
1777
1778        priv->hw->dma->stop_rx(priv->ioaddr);
1779        priv->hw->dma->stop_tx(priv->ioaddr);
1780
1781        stmmac_disable_mac(priv->ioaddr);
1782
1783        netif_carrier_off(ndev);
1784
1785        stmmac_mdio_unregister(ndev);
1786
1787        if (priv->plat->exit)
1788                priv->plat->exit(pdev);
1789
1790        platform_set_drvdata(pdev, NULL);
1791        unregister_netdev(ndev);
1792
1793        iounmap((void *)priv->ioaddr);
1794        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1795        release_mem_region(res->start, resource_size(res));
1796
1797        free_netdev(ndev);
1798
1799        return 0;
1800}
1801
1802#ifdef CONFIG_PM
1803static int stmmac_suspend(struct device *dev)
1804{
1805        struct net_device *ndev = dev_get_drvdata(dev);
1806        struct stmmac_priv *priv = netdev_priv(ndev);
1807        int dis_ic = 0;
1808
1809        if (!ndev || !netif_running(ndev))
1810                return 0;
1811
1812        spin_lock(&priv->lock);
1813
1814        netif_device_detach(ndev);
1815        netif_stop_queue(ndev);
1816        if (priv->phydev)
1817                phy_stop(priv->phydev);
1818
1819#ifdef CONFIG_STMMAC_TIMER
1820        priv->tm->timer_stop();
1821        if (likely(priv->tm->enable))
1822                dis_ic = 1;
1823#endif
1824        napi_disable(&priv->napi);
1825
1826        /* Stop TX/RX DMA */
1827        priv->hw->dma->stop_tx(priv->ioaddr);
1828        priv->hw->dma->stop_rx(priv->ioaddr);
1829        /* Clear the Rx/Tx descriptors */
1830        priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1831                                     dis_ic);
1832        priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1833
1834        /* Enable Power down mode by programming the PMT regs */
1835        if (device_may_wakeup(priv->device))
1836                priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1837        else
1838                stmmac_disable_mac(priv->ioaddr);
1839
1840        spin_unlock(&priv->lock);
1841        return 0;
1842}
1843
1844static int stmmac_resume(struct device *dev)
1845{
1846        struct net_device *ndev = dev_get_drvdata(dev);
1847        struct stmmac_priv *priv = netdev_priv(ndev);
1848
1849        if (!netif_running(ndev))
1850                return 0;
1851
1852        spin_lock(&priv->lock);
1853
1854        /* Power Down bit, into the PM register, is cleared
1855         * automatically as soon as a magic packet or a Wake-up frame
1856         * is received. Anyway, it's better to manually clear
1857         * this bit because it can generate problems while resuming
1858         * from another devices (e.g. serial console). */
1859        if (device_may_wakeup(priv->device))
1860                priv->hw->mac->pmt(priv->ioaddr, 0);
1861
1862        netif_device_attach(ndev);
1863
1864        /* Enable the MAC and DMA */
1865        stmmac_enable_mac(priv->ioaddr);
1866        priv->hw->dma->start_tx(priv->ioaddr);
1867        priv->hw->dma->start_rx(priv->ioaddr);
1868
1869#ifdef CONFIG_STMMAC_TIMER
1870        if (likely(priv->tm->enable))
1871                priv->tm->timer_start(tmrate);
1872#endif
1873        napi_enable(&priv->napi);
1874
1875        if (priv->phydev)
1876                phy_start(priv->phydev);
1877
1878        netif_start_queue(ndev);
1879
1880        spin_unlock(&priv->lock);
1881        return 0;
1882}
1883
1884static int stmmac_freeze(struct device *dev)
1885{
1886        struct net_device *ndev = dev_get_drvdata(dev);
1887
1888        if (!ndev || !netif_running(ndev))
1889                return 0;
1890
1891        return stmmac_release(ndev);
1892}
1893
1894static int stmmac_restore(struct device *dev)
1895{
1896        struct net_device *ndev = dev_get_drvdata(dev);
1897
1898        if (!ndev || !netif_running(ndev))
1899                return 0;
1900
1901        return stmmac_open(ndev);
1902}
1903
1904static const struct dev_pm_ops stmmac_pm_ops = {
1905        .suspend = stmmac_suspend,
1906        .resume = stmmac_resume,
1907        .freeze = stmmac_freeze,
1908        .thaw = stmmac_restore,
1909        .restore = stmmac_restore,
1910};
1911#else
1912static const struct dev_pm_ops stmmac_pm_ops;
1913#endif /* CONFIG_PM */
1914
1915static struct platform_driver stmmac_driver = {
1916        .probe = stmmac_dvr_probe,
1917        .remove = stmmac_dvr_remove,
1918        .driver = {
1919                .name = STMMAC_RESOURCE_NAME,
1920                .owner = THIS_MODULE,
1921                .pm = &stmmac_pm_ops,
1922        },
1923};
1924
1925/**
1926 * stmmac_init_module - Entry point for the driver
1927 * Description: This function is the entry point for the driver.
1928 */
1929static int __init stmmac_init_module(void)
1930{
1931        int ret;
1932
1933        if (platform_driver_register(&stmmacphy_driver)) {
1934                pr_err("No PHY devices registered!\n");
1935                return -ENODEV;
1936        }
1937
1938        ret = platform_driver_register(&stmmac_driver);
1939        return ret;
1940}
1941
1942/**
1943 * stmmac_cleanup_module - Cleanup routine for the driver
1944 * Description: This function is the cleanup routine for the driver.
1945 */
1946static void __exit stmmac_cleanup_module(void)
1947{
1948        platform_driver_unregister(&stmmacphy_driver);
1949        platform_driver_unregister(&stmmac_driver);
1950}
1951
1952#ifndef MODULE
1953static int __init stmmac_cmdline_opt(char *str)
1954{
1955        char *opt;
1956
1957        if (!str || !*str)
1958                return -EINVAL;
1959        while ((opt = strsep(&str, ",")) != NULL) {
1960                if (!strncmp(opt, "debug:", 6))
1961                        strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1962                else if (!strncmp(opt, "phyaddr:", 8))
1963                        strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1964                else if (!strncmp(opt, "dma_txsize:", 11))
1965                        strict_strtoul(opt + 11, 0,
1966                                       (unsigned long *)&dma_txsize);
1967                else if (!strncmp(opt, "dma_rxsize:", 11))
1968                        strict_strtoul(opt + 11, 0,
1969                                       (unsigned long *)&dma_rxsize);
1970                else if (!strncmp(opt, "buf_sz:", 7))
1971                        strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1972                else if (!strncmp(opt, "tc:", 3))
1973                        strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1974                else if (!strncmp(opt, "watchdog:", 9))
1975                        strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1976                else if (!strncmp(opt, "flow_ctrl:", 10))
1977                        strict_strtoul(opt + 10, 0,
1978                                       (unsigned long *)&flow_ctrl);
1979                else if (!strncmp(opt, "pause:", 6))
1980                        strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1981#ifdef CONFIG_STMMAC_TIMER
1982                else if (!strncmp(opt, "tmrate:", 7))
1983                        strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1984#endif
1985        }
1986        return 0;
1987}
1988
1989__setup("stmmaceth=", stmmac_cmdline_opt);
1990#endif
1991
1992module_init(stmmac_init_module);
1993module_exit(stmmac_cleanup_module);
1994
1995MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1996MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1997MODULE_LICENSE("GPL");
1998