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17#include <linux/nl80211.h>
18#include "ath9k.h"
19#include "btcoex.h"
20
21static void ath_update_txpow(struct ath_softc *sc)
22{
23 struct ath_hw *ah = sc->sc_ah;
24
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
29 }
30}
31
32static u8 parse_mpdudensity(u8 mpdudensity)
33{
34
35
36
37
38
39
40
41
42
43
44
45 switch (mpdudensity) {
46 case 0:
47 return 0;
48 case 1:
49 case 2:
50 case 3:
51
52
53 return 1;
54 case 4:
55 return 2;
56 case 5:
57 return 4;
58 case 6:
59 return 8;
60 case 7:
61 return 16;
62 default:
63 return 0;
64 }
65}
66
67static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
69{
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
72 u8 chan_idx;
73
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_update_ichannel(sc, hw, channel);
77 return channel;
78}
79
80bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
81{
82 unsigned long flags;
83 bool ret;
84
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
88
89 return ret;
90}
91
92void ath9k_ps_wakeup(struct ath_softc *sc)
93{
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
95 unsigned long flags;
96 enum ath9k_power_mode power_mode;
97
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
100 goto unlock;
101
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
104
105
106
107
108
109
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
115 }
116
117 unlock:
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
119}
120
121void ath9k_ps_restore(struct ath_softc *sc)
122{
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
124 unsigned long flags;
125
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
128 goto unlock;
129
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
133
134 if (sc->ps_idle)
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
138 PS_WAIT_FOR_CAB |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
142
143 unlock:
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
145}
146
147static void ath_start_ani(struct ath_common *common)
148{
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
152
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
154 return;
155
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
157 return;
158
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
162
163 mod_timer(&common->ani.timer,
164 jiffies +
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
166}
167
168static void ath_update_survey_nf(struct ath_softc *sc, int channel)
169{
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
173
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
177 }
178}
179
180static void ath_update_survey_stats(struct ath_softc *sc)
181{
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
188
189 if (!ah->curchan)
190 return;
191
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
194
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
204 }
205 memset(cc, 0, sizeof(*cc));
206
207 ath_update_survey_nf(sc, pos);
208}
209
210
211
212
213
214
215int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
217{
218 struct ath_wiphy *aphy = hw->priv;
219 struct ath_hw *ah = sc->sc_ah;
220 struct ath_common *common = ath9k_hw_common(ah);
221 struct ieee80211_conf *conf = &common->hw->conf;
222 bool fastcc = true, stopped;
223 struct ieee80211_channel *channel = hw->conf.channel;
224 struct ath9k_hw_cal_data *caldata = NULL;
225 int r;
226
227 if (sc->sc_flags & SC_OP_INVALID)
228 return -EIO;
229
230 del_timer_sync(&common->ani.timer);
231 cancel_work_sync(&sc->paprd_work);
232 cancel_work_sync(&sc->hw_check_work);
233 cancel_delayed_work_sync(&sc->tx_complete_work);
234
235 ath9k_ps_wakeup(sc);
236
237 spin_lock_bh(&sc->sc_pcu_lock);
238
239
240
241
242
243
244
245
246
247
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
250
251 if (!ath_stoprecv(sc))
252 stopped = false;
253
254
255
256
257
258 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
259 fastcc = false;
260
261 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
262 caldata = &aphy->caldata;
263
264 ath_dbg(common, ATH_DBG_CONFIG,
265 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
266 sc->sc_ah->curchan->channel,
267 channel->center_freq, conf_is_ht40(conf),
268 fastcc);
269
270 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
271 if (r) {
272 ath_err(common,
273 "Unable to reset channel (%u MHz), reset status %d\n",
274 channel->center_freq, r);
275 goto ps_restore;
276 }
277
278 if (ath_startrecv(sc) != 0) {
279 ath_err(common, "Unable to restart recv logic\n");
280 r = -EIO;
281 goto ps_restore;
282 }
283
284 ath_update_txpow(sc);
285 ath9k_hw_set_interrupts(ah, ah->imask);
286
287 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
288 if (sc->sc_flags & SC_OP_BEACONS)
289 ath_beacon_config(sc, NULL);
290 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
291 ath_start_ani(common);
292 }
293
294 ps_restore:
295 spin_unlock_bh(&sc->sc_pcu_lock);
296
297 ath9k_ps_restore(sc);
298 return r;
299}
300
301static void ath_paprd_activate(struct ath_softc *sc)
302{
303 struct ath_hw *ah = sc->sc_ah;
304 struct ath9k_hw_cal_data *caldata = ah->caldata;
305 struct ath_common *common = ath9k_hw_common(ah);
306 int chain;
307
308 if (!caldata || !caldata->paprd_done)
309 return;
310
311 ath9k_ps_wakeup(sc);
312 ar9003_paprd_enable(ah, false);
313 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
314 if (!(common->tx_chainmask & BIT(chain)))
315 continue;
316
317 ar9003_paprd_populate_single_table(ah, caldata, chain);
318 }
319
320 ar9003_paprd_enable(ah, true);
321 ath9k_ps_restore(sc);
322}
323
324static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
325{
326 struct ieee80211_hw *hw = sc->hw;
327 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
328 struct ath_hw *ah = sc->sc_ah;
329 struct ath_common *common = ath9k_hw_common(ah);
330 struct ath_tx_control txctl;
331 int time_left;
332
333 memset(&txctl, 0, sizeof(txctl));
334 txctl.txq = sc->tx.txq_map[WME_AC_BE];
335
336 memset(tx_info, 0, sizeof(*tx_info));
337 tx_info->band = hw->conf.channel->band;
338 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
339 tx_info->control.rates[0].idx = 0;
340 tx_info->control.rates[0].count = 1;
341 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
342 tx_info->control.rates[1].idx = -1;
343
344 init_completion(&sc->paprd_complete);
345 txctl.paprd = BIT(chain);
346
347 if (ath_tx_start(hw, skb, &txctl) != 0) {
348 ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
349 dev_kfree_skb_any(skb);
350 return false;
351 }
352
353 time_left = wait_for_completion_timeout(&sc->paprd_complete,
354 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
355
356 if (!time_left)
357 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
358 "Timeout waiting for paprd training on TX chain %d\n",
359 chain);
360
361 return !!time_left;
362}
363
364void ath_paprd_calibrate(struct work_struct *work)
365{
366 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
367 struct ieee80211_hw *hw = sc->hw;
368 struct ath_hw *ah = sc->sc_ah;
369 struct ieee80211_hdr *hdr;
370 struct sk_buff *skb = NULL;
371 struct ath9k_hw_cal_data *caldata = ah->caldata;
372 struct ath_common *common = ath9k_hw_common(ah);
373 int ftype;
374 int chain_ok = 0;
375 int chain;
376 int len = 1800;
377
378 if (!caldata)
379 return;
380
381 if (ar9003_paprd_init_table(ah) < 0)
382 return;
383
384 skb = alloc_skb(len, GFP_KERNEL);
385 if (!skb)
386 return;
387
388 skb_put(skb, len);
389 memset(skb->data, 0, len);
390 hdr = (struct ieee80211_hdr *)skb->data;
391 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
392 hdr->frame_control = cpu_to_le16(ftype);
393 hdr->duration_id = cpu_to_le16(10);
394 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
395 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
396 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
397
398 ath9k_ps_wakeup(sc);
399 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
400 if (!(common->tx_chainmask & BIT(chain)))
401 continue;
402
403 chain_ok = 0;
404
405 ath_dbg(common, ATH_DBG_CALIBRATE,
406 "Sending PAPRD frame for thermal measurement "
407 "on chain %d\n", chain);
408 if (!ath_paprd_send_frame(sc, skb, chain))
409 goto fail_paprd;
410
411 ar9003_paprd_setup_gain_table(ah, chain);
412
413 ath_dbg(common, ATH_DBG_CALIBRATE,
414 "Sending PAPRD training frame on chain %d\n", chain);
415 if (!ath_paprd_send_frame(sc, skb, chain))
416 goto fail_paprd;
417
418 if (!ar9003_paprd_is_done(ah))
419 break;
420
421 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
422 break;
423
424 chain_ok = 1;
425 }
426 kfree_skb(skb);
427
428 if (chain_ok) {
429 caldata->paprd_done = true;
430 ath_paprd_activate(sc);
431 }
432
433fail_paprd:
434 ath9k_ps_restore(sc);
435}
436
437
438
439
440
441
442
443
444void ath_ani_calibrate(unsigned long data)
445{
446 struct ath_softc *sc = (struct ath_softc *)data;
447 struct ath_hw *ah = sc->sc_ah;
448 struct ath_common *common = ath9k_hw_common(ah);
449 bool longcal = false;
450 bool shortcal = false;
451 bool aniflag = false;
452 unsigned int timestamp = jiffies_to_msecs(jiffies);
453 u32 cal_interval, short_cal_interval, long_cal_interval;
454 unsigned long flags;
455
456 if (ah->caldata && ah->caldata->nfcal_interference)
457 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
458 else
459 long_cal_interval = ATH_LONG_CALINTERVAL;
460
461 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
462 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
463
464
465 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
466 goto set_timer;
467
468 ath9k_ps_wakeup(sc);
469
470
471 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
472 longcal = true;
473 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
474 common->ani.longcal_timer = timestamp;
475 }
476
477
478 if (!common->ani.caldone) {
479 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
480 shortcal = true;
481 ath_dbg(common, ATH_DBG_ANI,
482 "shortcal @%lu\n", jiffies);
483 common->ani.shortcal_timer = timestamp;
484 common->ani.resetcal_timer = timestamp;
485 }
486 } else {
487 if ((timestamp - common->ani.resetcal_timer) >=
488 ATH_RESTART_CALINTERVAL) {
489 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
490 if (common->ani.caldone)
491 common->ani.resetcal_timer = timestamp;
492 }
493 }
494
495
496 if ((timestamp - common->ani.checkani_timer) >=
497 ah->config.ani_poll_interval) {
498 aniflag = true;
499 common->ani.checkani_timer = timestamp;
500 }
501
502
503 if (longcal || shortcal || aniflag) {
504
505 if (aniflag) {
506 spin_lock_irqsave(&common->cc_lock, flags);
507 ath9k_hw_ani_monitor(ah, ah->curchan);
508 ath_update_survey_stats(sc);
509 spin_unlock_irqrestore(&common->cc_lock, flags);
510 }
511
512
513 if (longcal || shortcal) {
514 common->ani.caldone =
515 ath9k_hw_calibrate(ah,
516 ah->curchan,
517 common->rx_chainmask,
518 longcal);
519 }
520 }
521
522 ath9k_ps_restore(sc);
523
524set_timer:
525
526
527
528
529
530 cal_interval = ATH_LONG_CALINTERVAL;
531 if (sc->sc_ah->config.enable_ani)
532 cal_interval = min(cal_interval,
533 (u32)ah->config.ani_poll_interval);
534 if (!common->ani.caldone)
535 cal_interval = min(cal_interval, (u32)short_cal_interval);
536
537 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
538 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
539 if (!ah->caldata->paprd_done)
540 ieee80211_queue_work(sc->hw, &sc->paprd_work);
541 else if (!ah->paprd_table_write_done)
542 ath_paprd_activate(sc);
543 }
544}
545
546static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
547{
548 struct ath_node *an;
549 struct ath_hw *ah = sc->sc_ah;
550 an = (struct ath_node *)sta->drv_priv;
551
552 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
553 sc->sc_flags |= SC_OP_ENABLE_APM;
554
555 if (sc->sc_flags & SC_OP_TXAGGR) {
556 ath_tx_node_init(sc, an);
557 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
558 sta->ht_cap.ampdu_factor);
559 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
560 }
561}
562
563static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
564{
565 struct ath_node *an = (struct ath_node *)sta->drv_priv;
566
567 if (sc->sc_flags & SC_OP_TXAGGR)
568 ath_tx_node_cleanup(sc, an);
569}
570
571void ath_hw_check(struct work_struct *work)
572{
573 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
574 int i;
575
576 ath9k_ps_wakeup(sc);
577
578 for (i = 0; i < 3; i++) {
579 if (ath9k_hw_check_alive(sc->sc_ah))
580 goto out;
581
582 msleep(1);
583 }
584 ath_reset(sc, true);
585
586out:
587 ath9k_ps_restore(sc);
588}
589
590void ath9k_tasklet(unsigned long data)
591{
592 struct ath_softc *sc = (struct ath_softc *)data;
593 struct ath_hw *ah = sc->sc_ah;
594 struct ath_common *common = ath9k_hw_common(ah);
595
596 u32 status = sc->intrstatus;
597 u32 rxmask;
598
599 if (status & ATH9K_INT_FATAL) {
600 ath_reset(sc, true);
601 return;
602 }
603
604 ath9k_ps_wakeup(sc);
605 spin_lock(&sc->sc_pcu_lock);
606
607 if (!ath9k_hw_check_alive(ah))
608 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
609
610 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
611 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
612 ATH9K_INT_RXORN);
613 else
614 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
615
616 if (status & rxmask) {
617
618 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
619 (status & ATH9K_INT_RXHP))
620 ath_rx_tasklet(sc, 0, true);
621
622 ath_rx_tasklet(sc, 0, false);
623 }
624
625 if (status & ATH9K_INT_TX) {
626 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
627 ath_tx_edma_tasklet(sc);
628 else
629 ath_tx_tasklet(sc);
630 }
631
632 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
633
634
635
636
637 ath_dbg(common, ATH_DBG_PS,
638 "TSFOOR - Sync with next Beacon\n");
639 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
640 }
641
642 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
643 if (status & ATH9K_INT_GENTIMER)
644 ath_gen_timer_isr(sc->sc_ah);
645
646
647 ath9k_hw_enable_interrupts(ah);
648
649 spin_unlock(&sc->sc_pcu_lock);
650 ath9k_ps_restore(sc);
651}
652
653irqreturn_t ath_isr(int irq, void *dev)
654{
655#define SCHED_INTR ( \
656 ATH9K_INT_FATAL | \
657 ATH9K_INT_RXORN | \
658 ATH9K_INT_RXEOL | \
659 ATH9K_INT_RX | \
660 ATH9K_INT_RXLP | \
661 ATH9K_INT_RXHP | \
662 ATH9K_INT_TX | \
663 ATH9K_INT_BMISS | \
664 ATH9K_INT_CST | \
665 ATH9K_INT_TSFOOR | \
666 ATH9K_INT_GENTIMER)
667
668 struct ath_softc *sc = dev;
669 struct ath_hw *ah = sc->sc_ah;
670 struct ath_common *common = ath9k_hw_common(ah);
671 enum ath9k_int status;
672 bool sched = false;
673
674
675
676
677
678
679 if (sc->sc_flags & SC_OP_INVALID)
680 return IRQ_NONE;
681
682
683
684
685 if (!ath9k_hw_intrpend(ah))
686 return IRQ_NONE;
687
688
689
690
691
692
693
694 ath9k_hw_getisr(ah, &status);
695 status &= ah->imask;
696
697
698
699
700
701 if (!status)
702 return IRQ_NONE;
703
704
705 sc->intrstatus = status;
706
707 if (status & SCHED_INTR)
708 sched = true;
709
710
711
712
713
714 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
715 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
716 goto chip_reset;
717
718 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
719 (status & ATH9K_INT_BB_WATCHDOG)) {
720
721 spin_lock(&common->cc_lock);
722 ath_hw_cycle_counters_update(common);
723 ar9003_hw_bb_watchdog_dbg_info(ah);
724 spin_unlock(&common->cc_lock);
725
726 goto chip_reset;
727 }
728
729 if (status & ATH9K_INT_SWBA)
730 tasklet_schedule(&sc->bcon_tasklet);
731
732 if (status & ATH9K_INT_TXURN)
733 ath9k_hw_updatetxtriglevel(ah, true);
734
735 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
736 if (status & ATH9K_INT_RXEOL) {
737 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
738 ath9k_hw_set_interrupts(ah, ah->imask);
739 }
740 }
741
742 if (status & ATH9K_INT_MIB) {
743
744
745
746
747
748 ath9k_hw_disable_interrupts(ah);
749
750
751
752
753
754 spin_lock(&common->cc_lock);
755 ath9k_hw_proc_mib_event(ah);
756 spin_unlock(&common->cc_lock);
757 ath9k_hw_enable_interrupts(ah);
758 }
759
760 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
761 if (status & ATH9K_INT_TIM_TIMER) {
762 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
763 goto chip_reset;
764
765
766 ath9k_setpower(sc, ATH9K_PM_AWAKE);
767 ath9k_hw_setrxabort(sc->sc_ah, 0);
768 sc->ps_flags |= PS_WAIT_FOR_BEACON;
769 }
770
771chip_reset:
772
773 ath_debug_stat_interrupt(sc, status);
774
775 if (sched) {
776
777 ath9k_hw_disable_interrupts(ah);
778 tasklet_schedule(&sc->intr_tq);
779 }
780
781 return IRQ_HANDLED;
782
783#undef SCHED_INTR
784}
785
786static u32 ath_get_extchanmode(struct ath_softc *sc,
787 struct ieee80211_channel *chan,
788 enum nl80211_channel_type channel_type)
789{
790 u32 chanmode = 0;
791
792 switch (chan->band) {
793 case IEEE80211_BAND_2GHZ:
794 switch(channel_type) {
795 case NL80211_CHAN_NO_HT:
796 case NL80211_CHAN_HT20:
797 chanmode = CHANNEL_G_HT20;
798 break;
799 case NL80211_CHAN_HT40PLUS:
800 chanmode = CHANNEL_G_HT40PLUS;
801 break;
802 case NL80211_CHAN_HT40MINUS:
803 chanmode = CHANNEL_G_HT40MINUS;
804 break;
805 }
806 break;
807 case IEEE80211_BAND_5GHZ:
808 switch(channel_type) {
809 case NL80211_CHAN_NO_HT:
810 case NL80211_CHAN_HT20:
811 chanmode = CHANNEL_A_HT20;
812 break;
813 case NL80211_CHAN_HT40PLUS:
814 chanmode = CHANNEL_A_HT40PLUS;
815 break;
816 case NL80211_CHAN_HT40MINUS:
817 chanmode = CHANNEL_A_HT40MINUS;
818 break;
819 }
820 break;
821 default:
822 break;
823 }
824
825 return chanmode;
826}
827
828static void ath9k_bss_assoc_info(struct ath_softc *sc,
829 struct ieee80211_hw *hw,
830 struct ieee80211_vif *vif,
831 struct ieee80211_bss_conf *bss_conf)
832{
833 struct ath_wiphy *aphy = hw->priv;
834 struct ath_hw *ah = sc->sc_ah;
835 struct ath_common *common = ath9k_hw_common(ah);
836
837 if (bss_conf->assoc) {
838 ath_dbg(common, ATH_DBG_CONFIG,
839 "Bss Info ASSOC %d, bssid: %pM\n",
840 bss_conf->aid, common->curbssid);
841
842
843 common->curaid = bss_conf->aid;
844 ath9k_hw_write_associd(ah);
845
846
847
848
849
850
851 sc->ps_flags |= PS_BEACON_SYNC;
852
853
854 ath_beacon_config(sc, vif);
855
856
857 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
858 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
859
860 sc->sc_flags |= SC_OP_ANI_RUN;
861 ath_start_ani(common);
862 } else {
863 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
864 common->curaid = 0;
865
866 sc->sc_flags &= ~SC_OP_ANI_RUN;
867 del_timer_sync(&common->ani.timer);
868 }
869}
870
871void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
872{
873 struct ath_hw *ah = sc->sc_ah;
874 struct ath_common *common = ath9k_hw_common(ah);
875 struct ieee80211_channel *channel = hw->conf.channel;
876 int r;
877
878 ath9k_ps_wakeup(sc);
879 spin_lock_bh(&sc->sc_pcu_lock);
880
881 ath9k_hw_configpcipowersave(ah, 0, 0);
882
883 if (!ah->curchan)
884 ah->curchan = ath_get_curchannel(sc, sc->hw);
885
886 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
887 if (r) {
888 ath_err(common,
889 "Unable to reset channel (%u MHz), reset status %d\n",
890 channel->center_freq, r);
891 }
892
893 ath_update_txpow(sc);
894 if (ath_startrecv(sc) != 0) {
895 ath_err(common, "Unable to restart recv logic\n");
896 goto out;
897 }
898 if (sc->sc_flags & SC_OP_BEACONS)
899 ath_beacon_config(sc, NULL);
900
901
902 ath9k_hw_set_interrupts(ah, ah->imask);
903
904
905 ath9k_hw_cfg_output(ah, ah->led_pin,
906 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
907 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
908
909 ieee80211_wake_queues(hw);
910out:
911 spin_unlock_bh(&sc->sc_pcu_lock);
912
913 ath9k_ps_restore(sc);
914}
915
916void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
917{
918 struct ath_hw *ah = sc->sc_ah;
919 struct ieee80211_channel *channel = hw->conf.channel;
920 int r;
921
922 ath9k_ps_wakeup(sc);
923 spin_lock_bh(&sc->sc_pcu_lock);
924
925 ieee80211_stop_queues(hw);
926
927
928
929
930
931 if (!sc->ps_idle) {
932 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
933 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
934 }
935
936
937 ath9k_hw_disable_interrupts(ah);
938
939 ath_drain_all_txq(sc, false);
940
941 ath_stoprecv(sc);
942 ath_flushrecv(sc);
943
944 if (!ah->curchan)
945 ah->curchan = ath_get_curchannel(sc, hw);
946
947 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
948 if (r) {
949 ath_err(ath9k_hw_common(sc->sc_ah),
950 "Unable to reset channel (%u MHz), reset status %d\n",
951 channel->center_freq, r);
952 }
953
954 ath9k_hw_phy_disable(ah);
955
956 ath9k_hw_configpcipowersave(ah, 1, 1);
957
958 spin_unlock_bh(&sc->sc_pcu_lock);
959 ath9k_ps_restore(sc);
960}
961
962int ath_reset(struct ath_softc *sc, bool retry_tx)
963{
964 struct ath_hw *ah = sc->sc_ah;
965 struct ath_common *common = ath9k_hw_common(ah);
966 struct ieee80211_hw *hw = sc->hw;
967 int r;
968
969
970 del_timer_sync(&common->ani.timer);
971
972 ath9k_ps_wakeup(sc);
973 spin_lock_bh(&sc->sc_pcu_lock);
974
975 ieee80211_stop_queues(hw);
976
977 ath9k_hw_disable_interrupts(ah);
978 ath_drain_all_txq(sc, retry_tx);
979
980 ath_stoprecv(sc);
981 ath_flushrecv(sc);
982
983 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
984 if (r)
985 ath_err(common,
986 "Unable to reset hardware; reset status %d\n", r);
987
988 if (ath_startrecv(sc) != 0)
989 ath_err(common, "Unable to start recv logic\n");
990
991
992
993
994
995
996 ath_update_txpow(sc);
997
998 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
999 ath_beacon_config(sc, NULL);
1000
1001 ath9k_hw_set_interrupts(ah, ah->imask);
1002
1003 if (retry_tx) {
1004 int i;
1005 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1006 if (ATH_TXQ_SETUP(sc, i)) {
1007 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1008 ath_txq_schedule(sc, &sc->tx.txq[i]);
1009 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1010 }
1011 }
1012 }
1013
1014 ieee80211_wake_queues(hw);
1015 spin_unlock_bh(&sc->sc_pcu_lock);
1016
1017
1018 ath_start_ani(common);
1019 ath9k_ps_restore(sc);
1020
1021 return r;
1022}
1023
1024
1025
1026void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1027 struct ath9k_channel *ichan)
1028{
1029 struct ieee80211_channel *chan = hw->conf.channel;
1030 struct ieee80211_conf *conf = &hw->conf;
1031
1032 ichan->channel = chan->center_freq;
1033 ichan->chan = chan;
1034
1035 if (chan->band == IEEE80211_BAND_2GHZ) {
1036 ichan->chanmode = CHANNEL_G;
1037 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1038 } else {
1039 ichan->chanmode = CHANNEL_A;
1040 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1041 }
1042
1043 if (conf_is_ht(conf))
1044 ichan->chanmode = ath_get_extchanmode(sc, chan,
1045 conf->channel_type);
1046}
1047
1048
1049
1050
1051
1052static int ath9k_start(struct ieee80211_hw *hw)
1053{
1054 struct ath_wiphy *aphy = hw->priv;
1055 struct ath_softc *sc = aphy->sc;
1056 struct ath_hw *ah = sc->sc_ah;
1057 struct ath_common *common = ath9k_hw_common(ah);
1058 struct ieee80211_channel *curchan = hw->conf.channel;
1059 struct ath9k_channel *init_channel;
1060 int r;
1061
1062 ath_dbg(common, ATH_DBG_CONFIG,
1063 "Starting driver with initial channel: %d MHz\n",
1064 curchan->center_freq);
1065
1066 mutex_lock(&sc->mutex);
1067
1068 if (ath9k_wiphy_started(sc)) {
1069 if (sc->chan_idx == curchan->hw_value) {
1070
1071
1072
1073
1074 aphy->state = ATH_WIPHY_ACTIVE;
1075 ieee80211_wake_queues(hw);
1076 } else {
1077
1078
1079
1080
1081 aphy->state = ATH_WIPHY_PAUSED;
1082 ieee80211_stop_queues(hw);
1083 }
1084 mutex_unlock(&sc->mutex);
1085 return 0;
1086 }
1087 aphy->state = ATH_WIPHY_ACTIVE;
1088
1089
1090
1091 sc->chan_idx = curchan->hw_value;
1092
1093 init_channel = ath_get_curchannel(sc, hw);
1094
1095
1096 ath9k_hw_configpcipowersave(ah, 0, 0);
1097
1098
1099
1100
1101
1102
1103
1104
1105 spin_lock_bh(&sc->sc_pcu_lock);
1106 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1107 if (r) {
1108 ath_err(common,
1109 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1110 r, curchan->center_freq);
1111 spin_unlock_bh(&sc->sc_pcu_lock);
1112 goto mutex_unlock;
1113 }
1114
1115
1116
1117
1118
1119 ath_update_txpow(sc);
1120
1121
1122
1123
1124
1125
1126
1127
1128 if (ath_startrecv(sc) != 0) {
1129 ath_err(common, "Unable to start recv logic\n");
1130 r = -EIO;
1131 spin_unlock_bh(&sc->sc_pcu_lock);
1132 goto mutex_unlock;
1133 }
1134 spin_unlock_bh(&sc->sc_pcu_lock);
1135
1136
1137 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1138 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1139 ATH9K_INT_GLOBAL;
1140
1141 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1142 ah->imask |= ATH9K_INT_RXHP |
1143 ATH9K_INT_RXLP |
1144 ATH9K_INT_BB_WATCHDOG;
1145 else
1146 ah->imask |= ATH9K_INT_RX;
1147
1148 ah->imask |= ATH9K_INT_GTT;
1149
1150 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1151 ah->imask |= ATH9K_INT_CST;
1152
1153 sc->sc_flags &= ~SC_OP_INVALID;
1154 sc->sc_ah->is_monitoring = false;
1155
1156
1157 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1158 ath9k_hw_set_interrupts(ah, ah->imask);
1159
1160 ieee80211_wake_queues(hw);
1161
1162 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1163
1164 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1165 !ah->btcoex_hw.enabled) {
1166 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1167 AR_STOMP_LOW_WLAN_WGHT);
1168 ath9k_hw_btcoex_enable(ah);
1169
1170 if (common->bus_ops->bt_coex_prep)
1171 common->bus_ops->bt_coex_prep(common);
1172 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1173 ath9k_btcoex_timer_resume(sc);
1174 }
1175
1176 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1177 common->bus_ops->extn_synch_en(common);
1178
1179mutex_unlock:
1180 mutex_unlock(&sc->mutex);
1181
1182 return r;
1183}
1184
1185static int ath9k_tx(struct ieee80211_hw *hw,
1186 struct sk_buff *skb)
1187{
1188 struct ath_wiphy *aphy = hw->priv;
1189 struct ath_softc *sc = aphy->sc;
1190 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1191 struct ath_tx_control txctl;
1192 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1193
1194 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1195 ath_dbg(common, ATH_DBG_XMIT,
1196 "ath9k: %s: TX in unexpected wiphy state %d\n",
1197 wiphy_name(hw->wiphy), aphy->state);
1198 goto exit;
1199 }
1200
1201 if (sc->ps_enabled) {
1202
1203
1204
1205
1206 if (ieee80211_is_data(hdr->frame_control) &&
1207 !ieee80211_is_nullfunc(hdr->frame_control) &&
1208 !ieee80211_has_pm(hdr->frame_control)) {
1209 ath_dbg(common, ATH_DBG_PS,
1210 "Add PM=1 for a TX frame while in PS mode\n");
1211 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1212 }
1213 }
1214
1215 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1216
1217
1218
1219
1220
1221 ath9k_ps_wakeup(sc);
1222 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1223 ath9k_hw_setrxabort(sc->sc_ah, 0);
1224 if (ieee80211_is_pspoll(hdr->frame_control)) {
1225 ath_dbg(common, ATH_DBG_PS,
1226 "Sending PS-Poll to pick a buffered frame\n");
1227 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1228 } else {
1229 ath_dbg(common, ATH_DBG_PS,
1230 "Wake up to complete TX\n");
1231 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1232 }
1233
1234
1235
1236
1237
1238 ath9k_ps_restore(sc);
1239 }
1240
1241 memset(&txctl, 0, sizeof(struct ath_tx_control));
1242 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1243
1244 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1245
1246 if (ath_tx_start(hw, skb, &txctl) != 0) {
1247 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1248 goto exit;
1249 }
1250
1251 return 0;
1252exit:
1253 dev_kfree_skb_any(skb);
1254 return 0;
1255}
1256
1257static void ath9k_stop(struct ieee80211_hw *hw)
1258{
1259 struct ath_wiphy *aphy = hw->priv;
1260 struct ath_softc *sc = aphy->sc;
1261 struct ath_hw *ah = sc->sc_ah;
1262 struct ath_common *common = ath9k_hw_common(ah);
1263 int i;
1264
1265 mutex_lock(&sc->mutex);
1266
1267 aphy->state = ATH_WIPHY_INACTIVE;
1268
1269 if (led_blink)
1270 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1271
1272 cancel_delayed_work_sync(&sc->tx_complete_work);
1273 cancel_work_sync(&sc->paprd_work);
1274 cancel_work_sync(&sc->hw_check_work);
1275
1276 for (i = 0; i < sc->num_sec_wiphy; i++) {
1277 if (sc->sec_wiphy[i])
1278 break;
1279 }
1280
1281 if (i == sc->num_sec_wiphy) {
1282 cancel_delayed_work_sync(&sc->wiphy_work);
1283 cancel_work_sync(&sc->chan_work);
1284 }
1285
1286 if (sc->sc_flags & SC_OP_INVALID) {
1287 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1288 mutex_unlock(&sc->mutex);
1289 return;
1290 }
1291
1292 if (ath9k_wiphy_started(sc)) {
1293 mutex_unlock(&sc->mutex);
1294 return;
1295 }
1296
1297
1298 ath9k_ps_wakeup(sc);
1299
1300 if (ah->btcoex_hw.enabled) {
1301 ath9k_hw_btcoex_disable(ah);
1302 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1303 ath9k_btcoex_timer_pause(sc);
1304 }
1305
1306 spin_lock_bh(&sc->sc_pcu_lock);
1307
1308
1309 ah->imask &= ~ATH9K_INT_GLOBAL;
1310
1311
1312
1313 ath9k_hw_disable_interrupts(ah);
1314
1315 if (!(sc->sc_flags & SC_OP_INVALID)) {
1316 ath_drain_all_txq(sc, false);
1317 ath_stoprecv(sc);
1318 ath9k_hw_phy_disable(ah);
1319 } else
1320 sc->rx.rxlink = NULL;
1321
1322
1323 ath9k_hw_disable(ah);
1324 ath9k_hw_configpcipowersave(ah, 1, 1);
1325
1326 spin_unlock_bh(&sc->sc_pcu_lock);
1327
1328
1329
1330 synchronize_irq(sc->irq);
1331 tasklet_kill(&sc->intr_tq);
1332 tasklet_kill(&sc->bcon_tasklet);
1333
1334 ath9k_ps_restore(sc);
1335
1336 sc->ps_idle = true;
1337 ath9k_set_wiphy_idle(aphy, true);
1338 ath_radio_disable(sc, hw);
1339
1340 sc->sc_flags |= SC_OP_INVALID;
1341
1342 mutex_unlock(&sc->mutex);
1343
1344 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1345}
1346
1347static int ath9k_add_interface(struct ieee80211_hw *hw,
1348 struct ieee80211_vif *vif)
1349{
1350 struct ath_wiphy *aphy = hw->priv;
1351 struct ath_softc *sc = aphy->sc;
1352 struct ath_hw *ah = sc->sc_ah;
1353 struct ath_common *common = ath9k_hw_common(ah);
1354 struct ath_vif *avp = (void *)vif->drv_priv;
1355 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1356 int ret = 0;
1357
1358 mutex_lock(&sc->mutex);
1359
1360 switch (vif->type) {
1361 case NL80211_IFTYPE_STATION:
1362 ic_opmode = NL80211_IFTYPE_STATION;
1363 break;
1364 case NL80211_IFTYPE_WDS:
1365 ic_opmode = NL80211_IFTYPE_WDS;
1366 break;
1367 case NL80211_IFTYPE_ADHOC:
1368 case NL80211_IFTYPE_AP:
1369 case NL80211_IFTYPE_MESH_POINT:
1370 if (sc->nbcnvifs >= ATH_BCBUF) {
1371 ret = -ENOBUFS;
1372 goto out;
1373 }
1374 ic_opmode = vif->type;
1375 break;
1376 default:
1377 ath_err(common, "Interface type %d not yet supported\n",
1378 vif->type);
1379 ret = -EOPNOTSUPP;
1380 goto out;
1381 }
1382
1383 ath_dbg(common, ATH_DBG_CONFIG,
1384 "Attach a VIF of type: %d\n", ic_opmode);
1385
1386
1387 avp->av_opmode = ic_opmode;
1388 avp->av_bslot = -1;
1389
1390 sc->nvifs++;
1391
1392 ath9k_set_bssid_mask(hw, vif);
1393
1394 if (sc->nvifs > 1)
1395 goto out;
1396
1397 if (ic_opmode == NL80211_IFTYPE_AP) {
1398 ath9k_hw_set_tsfadjust(ah, 1);
1399 sc->sc_flags |= SC_OP_TSF_RESET;
1400 }
1401
1402
1403 ah->opmode = ic_opmode;
1404
1405
1406
1407
1408
1409 if ((vif->type == NL80211_IFTYPE_STATION) ||
1410 (vif->type == NL80211_IFTYPE_ADHOC) ||
1411 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1412 if (ah->config.enable_ani)
1413 ah->imask |= ATH9K_INT_MIB;
1414 ah->imask |= ATH9K_INT_TSFOOR;
1415 }
1416
1417 ath9k_hw_set_interrupts(ah, ah->imask);
1418
1419 if (vif->type == NL80211_IFTYPE_AP ||
1420 vif->type == NL80211_IFTYPE_ADHOC) {
1421 sc->sc_flags |= SC_OP_ANI_RUN;
1422 ath_start_ani(common);
1423 }
1424
1425out:
1426 mutex_unlock(&sc->mutex);
1427 return ret;
1428}
1429
1430static void ath9k_reclaim_beacon(struct ath_softc *sc,
1431 struct ieee80211_vif *vif)
1432{
1433 struct ath_vif *avp = (void *)vif->drv_priv;
1434
1435
1436 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1437 ath9k_ps_wakeup(sc);
1438 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1439 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1440 tasklet_kill(&sc->bcon_tasklet);
1441 ath9k_ps_restore(sc);
1442
1443 ath_beacon_return(sc, avp);
1444 sc->sc_flags &= ~SC_OP_BEACONS;
1445
1446 if (sc->nbcnvifs > 0) {
1447
1448 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1449 ath9k_ps_wakeup(sc);
1450 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1451 ath9k_ps_restore(sc);
1452 }
1453}
1454
1455static int ath9k_change_interface(struct ieee80211_hw *hw,
1456 struct ieee80211_vif *vif,
1457 enum nl80211_iftype new_type,
1458 bool p2p)
1459{
1460 struct ath_wiphy *aphy = hw->priv;
1461 struct ath_softc *sc = aphy->sc;
1462 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1463 int ret = 0;
1464
1465 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1466 mutex_lock(&sc->mutex);
1467
1468 switch (new_type) {
1469 case NL80211_IFTYPE_AP:
1470 case NL80211_IFTYPE_ADHOC:
1471 if (sc->nbcnvifs >= ATH_BCBUF) {
1472 ath_err(common, "No beacon slot available\n");
1473 ret = -ENOBUFS;
1474 goto out;
1475 }
1476 break;
1477 case NL80211_IFTYPE_STATION:
1478
1479 sc->sc_flags &= ~SC_OP_ANI_RUN;
1480 del_timer_sync(&common->ani.timer);
1481 if ((vif->type == NL80211_IFTYPE_AP) ||
1482 (vif->type == NL80211_IFTYPE_ADHOC))
1483 ath9k_reclaim_beacon(sc, vif);
1484 break;
1485 default:
1486 ath_err(common, "Interface type %d not yet supported\n",
1487 vif->type);
1488 ret = -ENOTSUPP;
1489 goto out;
1490 }
1491 vif->type = new_type;
1492 vif->p2p = p2p;
1493
1494out:
1495 mutex_unlock(&sc->mutex);
1496 return ret;
1497}
1498
1499static void ath9k_remove_interface(struct ieee80211_hw *hw,
1500 struct ieee80211_vif *vif)
1501{
1502 struct ath_wiphy *aphy = hw->priv;
1503 struct ath_softc *sc = aphy->sc;
1504 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1505
1506 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1507
1508 mutex_lock(&sc->mutex);
1509
1510
1511 sc->sc_flags &= ~SC_OP_ANI_RUN;
1512 del_timer_sync(&common->ani.timer);
1513
1514
1515 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1516 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1517 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
1518 ath9k_reclaim_beacon(sc, vif);
1519
1520 sc->nvifs--;
1521
1522 mutex_unlock(&sc->mutex);
1523}
1524
1525static void ath9k_enable_ps(struct ath_softc *sc)
1526{
1527 struct ath_hw *ah = sc->sc_ah;
1528
1529 sc->ps_enabled = true;
1530 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1531 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1532 ah->imask |= ATH9K_INT_TIM_TIMER;
1533 ath9k_hw_set_interrupts(ah, ah->imask);
1534 }
1535 ath9k_hw_setrxabort(ah, 1);
1536 }
1537}
1538
1539static void ath9k_disable_ps(struct ath_softc *sc)
1540{
1541 struct ath_hw *ah = sc->sc_ah;
1542
1543 sc->ps_enabled = false;
1544 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1545 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1546 ath9k_hw_setrxabort(ah, 0);
1547 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1548 PS_WAIT_FOR_CAB |
1549 PS_WAIT_FOR_PSPOLL_DATA |
1550 PS_WAIT_FOR_TX_ACK);
1551 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1552 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1553 ath9k_hw_set_interrupts(ah, ah->imask);
1554 }
1555 }
1556
1557}
1558
1559static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1560{
1561 struct ath_wiphy *aphy = hw->priv;
1562 struct ath_softc *sc = aphy->sc;
1563 struct ath_hw *ah = sc->sc_ah;
1564 struct ath_common *common = ath9k_hw_common(ah);
1565 struct ieee80211_conf *conf = &hw->conf;
1566 bool disable_radio;
1567
1568 mutex_lock(&sc->mutex);
1569
1570
1571
1572
1573
1574
1575
1576 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1577 bool enable_radio;
1578 bool all_wiphys_idle;
1579 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1580
1581 spin_lock_bh(&sc->wiphy_lock);
1582 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1583 ath9k_set_wiphy_idle(aphy, idle);
1584
1585 enable_radio = (!idle && all_wiphys_idle);
1586
1587
1588
1589
1590
1591
1592
1593 spin_unlock_bh(&sc->wiphy_lock);
1594
1595 if (enable_radio) {
1596 sc->ps_idle = false;
1597 ath_radio_enable(sc, hw);
1598 ath_dbg(common, ATH_DBG_CONFIG,
1599 "not-idle: enabling radio\n");
1600 }
1601 }
1602
1603
1604
1605
1606
1607
1608
1609 if (changed & IEEE80211_CONF_CHANGE_PS) {
1610 unsigned long flags;
1611 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1612 if (conf->flags & IEEE80211_CONF_PS)
1613 ath9k_enable_ps(sc);
1614 else
1615 ath9k_disable_ps(sc);
1616 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1617 }
1618
1619 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1620 if (conf->flags & IEEE80211_CONF_MONITOR) {
1621 ath_dbg(common, ATH_DBG_CONFIG,
1622 "Monitor mode is enabled\n");
1623 sc->sc_ah->is_monitoring = true;
1624 } else {
1625 ath_dbg(common, ATH_DBG_CONFIG,
1626 "Monitor mode is disabled\n");
1627 sc->sc_ah->is_monitoring = false;
1628 }
1629 }
1630
1631 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1632 struct ieee80211_channel *curchan = hw->conf.channel;
1633 int pos = curchan->hw_value;
1634 int old_pos = -1;
1635 unsigned long flags;
1636
1637 if (ah->curchan)
1638 old_pos = ah->curchan - &ah->channels[0];
1639
1640 aphy->chan_idx = pos;
1641 aphy->chan_is_ht = conf_is_ht(conf);
1642 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1643 sc->sc_flags |= SC_OP_OFFCHANNEL;
1644 else
1645 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1646
1647 if (aphy->state == ATH_WIPHY_SCAN ||
1648 aphy->state == ATH_WIPHY_ACTIVE)
1649 ath9k_wiphy_pause_all_forced(sc, aphy);
1650 else {
1651
1652
1653
1654
1655 goto skip_chan_change;
1656 }
1657
1658 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1659 curchan->center_freq);
1660
1661
1662 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1663
1664
1665 spin_lock_irqsave(&common->cc_lock, flags);
1666 ath_update_survey_stats(sc);
1667 spin_unlock_irqrestore(&common->cc_lock, flags);
1668
1669
1670
1671
1672
1673
1674
1675 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1676 sc->cur_survey != &sc->survey[pos]) {
1677
1678 if (sc->cur_survey)
1679 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1680
1681 sc->cur_survey = &sc->survey[pos];
1682
1683 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1684 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1685 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1686 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1687 }
1688
1689 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1690 ath_err(common, "Unable to set channel\n");
1691 mutex_unlock(&sc->mutex);
1692 return -EINVAL;
1693 }
1694
1695
1696
1697
1698
1699
1700 if (old_pos >= 0)
1701 ath_update_survey_nf(sc, old_pos);
1702 }
1703
1704skip_chan_change:
1705 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1706 sc->config.txpowlimit = 2 * conf->power_level;
1707 ath9k_ps_wakeup(sc);
1708 ath_update_txpow(sc);
1709 ath9k_ps_restore(sc);
1710 }
1711
1712 spin_lock_bh(&sc->wiphy_lock);
1713 disable_radio = ath9k_all_wiphys_idle(sc);
1714 spin_unlock_bh(&sc->wiphy_lock);
1715
1716 if (disable_radio) {
1717 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1718 sc->ps_idle = true;
1719 ath_radio_disable(sc, hw);
1720 }
1721
1722 mutex_unlock(&sc->mutex);
1723
1724 return 0;
1725}
1726
1727#define SUPPORTED_FILTERS \
1728 (FIF_PROMISC_IN_BSS | \
1729 FIF_ALLMULTI | \
1730 FIF_CONTROL | \
1731 FIF_PSPOLL | \
1732 FIF_OTHER_BSS | \
1733 FIF_BCN_PRBRESP_PROMISC | \
1734 FIF_PROBE_REQ | \
1735 FIF_FCSFAIL)
1736
1737
1738static void ath9k_configure_filter(struct ieee80211_hw *hw,
1739 unsigned int changed_flags,
1740 unsigned int *total_flags,
1741 u64 multicast)
1742{
1743 struct ath_wiphy *aphy = hw->priv;
1744 struct ath_softc *sc = aphy->sc;
1745 u32 rfilt;
1746
1747 changed_flags &= SUPPORTED_FILTERS;
1748 *total_flags &= SUPPORTED_FILTERS;
1749
1750 sc->rx.rxfilter = *total_flags;
1751 ath9k_ps_wakeup(sc);
1752 rfilt = ath_calcrxfilter(sc);
1753 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1754 ath9k_ps_restore(sc);
1755
1756 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1757 "Set HW RX filter: 0x%x\n", rfilt);
1758}
1759
1760static int ath9k_sta_add(struct ieee80211_hw *hw,
1761 struct ieee80211_vif *vif,
1762 struct ieee80211_sta *sta)
1763{
1764 struct ath_wiphy *aphy = hw->priv;
1765 struct ath_softc *sc = aphy->sc;
1766
1767 ath_node_attach(sc, sta);
1768
1769 return 0;
1770}
1771
1772static int ath9k_sta_remove(struct ieee80211_hw *hw,
1773 struct ieee80211_vif *vif,
1774 struct ieee80211_sta *sta)
1775{
1776 struct ath_wiphy *aphy = hw->priv;
1777 struct ath_softc *sc = aphy->sc;
1778
1779 ath_node_detach(sc, sta);
1780
1781 return 0;
1782}
1783
1784static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1785 const struct ieee80211_tx_queue_params *params)
1786{
1787 struct ath_wiphy *aphy = hw->priv;
1788 struct ath_softc *sc = aphy->sc;
1789 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1790 struct ath_txq *txq;
1791 struct ath9k_tx_queue_info qi;
1792 int ret = 0;
1793
1794 if (queue >= WME_NUM_AC)
1795 return 0;
1796
1797 txq = sc->tx.txq_map[queue];
1798
1799 mutex_lock(&sc->mutex);
1800
1801 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1802
1803 qi.tqi_aifs = params->aifs;
1804 qi.tqi_cwmin = params->cw_min;
1805 qi.tqi_cwmax = params->cw_max;
1806 qi.tqi_burstTime = params->txop;
1807
1808 ath_dbg(common, ATH_DBG_CONFIG,
1809 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1810 queue, txq->axq_qnum, params->aifs, params->cw_min,
1811 params->cw_max, params->txop);
1812
1813 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1814 if (ret)
1815 ath_err(common, "TXQ Update failed\n");
1816
1817 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1818 if (queue == WME_AC_BE && !ret)
1819 ath_beaconq_config(sc);
1820
1821 mutex_unlock(&sc->mutex);
1822
1823 return ret;
1824}
1825
1826static int ath9k_set_key(struct ieee80211_hw *hw,
1827 enum set_key_cmd cmd,
1828 struct ieee80211_vif *vif,
1829 struct ieee80211_sta *sta,
1830 struct ieee80211_key_conf *key)
1831{
1832 struct ath_wiphy *aphy = hw->priv;
1833 struct ath_softc *sc = aphy->sc;
1834 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1835 int ret = 0;
1836
1837 if (ath9k_modparam_nohwcrypt)
1838 return -ENOSPC;
1839
1840 mutex_lock(&sc->mutex);
1841 ath9k_ps_wakeup(sc);
1842 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1843
1844 switch (cmd) {
1845 case SET_KEY:
1846 ret = ath_key_config(common, vif, sta, key);
1847 if (ret >= 0) {
1848 key->hw_key_idx = ret;
1849
1850 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1851 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1852 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1853 if (sc->sc_ah->sw_mgmt_crypto &&
1854 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1855 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1856 ret = 0;
1857 }
1858 break;
1859 case DISABLE_KEY:
1860 ath_key_delete(common, key);
1861 break;
1862 default:
1863 ret = -EINVAL;
1864 }
1865
1866 ath9k_ps_restore(sc);
1867 mutex_unlock(&sc->mutex);
1868
1869 return ret;
1870}
1871
1872static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1873 struct ieee80211_vif *vif,
1874 struct ieee80211_bss_conf *bss_conf,
1875 u32 changed)
1876{
1877 struct ath_wiphy *aphy = hw->priv;
1878 struct ath_softc *sc = aphy->sc;
1879 struct ath_hw *ah = sc->sc_ah;
1880 struct ath_common *common = ath9k_hw_common(ah);
1881 struct ath_vif *avp = (void *)vif->drv_priv;
1882 int slottime;
1883 int error;
1884
1885 mutex_lock(&sc->mutex);
1886
1887 if (changed & BSS_CHANGED_BSSID) {
1888
1889 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1890 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1891 common->curaid = 0;
1892 ath9k_hw_write_associd(ah);
1893
1894
1895 sc->config.ath_aggr_prot = 0;
1896
1897 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1898 common->curbssid, common->curaid);
1899
1900
1901 sc->sc_flags &= ~SC_OP_BEACONS ;
1902 }
1903
1904
1905 if ((changed & BSS_CHANGED_BEACON) ||
1906 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1907 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1908 error = ath_beacon_alloc(aphy, vif);
1909 if (!error)
1910 ath_beacon_config(sc, vif);
1911 }
1912
1913 if (changed & BSS_CHANGED_ERP_SLOT) {
1914 if (bss_conf->use_short_slot)
1915 slottime = 9;
1916 else
1917 slottime = 20;
1918 if (vif->type == NL80211_IFTYPE_AP) {
1919
1920
1921
1922
1923
1924 sc->beacon.slottime = slottime;
1925 sc->beacon.updateslot = UPDATE;
1926 } else {
1927 ah->slottime = slottime;
1928 ath9k_hw_init_global_settings(ah);
1929 }
1930 }
1931
1932
1933 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1934 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1935
1936 if (changed & BSS_CHANGED_BEACON_INT) {
1937 sc->beacon_interval = bss_conf->beacon_int;
1938
1939
1940
1941
1942 if (vif->type == NL80211_IFTYPE_AP) {
1943 sc->sc_flags |= SC_OP_TSF_RESET;
1944 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1945 error = ath_beacon_alloc(aphy, vif);
1946 if (!error)
1947 ath_beacon_config(sc, vif);
1948 } else {
1949 ath_beacon_config(sc, vif);
1950 }
1951 }
1952
1953 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1954 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1955 bss_conf->use_short_preamble);
1956 if (bss_conf->use_short_preamble)
1957 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1958 else
1959 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1960 }
1961
1962 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1963 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1964 bss_conf->use_cts_prot);
1965 if (bss_conf->use_cts_prot &&
1966 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1967 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1968 else
1969 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1970 }
1971
1972 if (changed & BSS_CHANGED_ASSOC) {
1973 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1974 bss_conf->assoc);
1975 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1976 }
1977
1978 mutex_unlock(&sc->mutex);
1979}
1980
1981static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1982{
1983 u64 tsf;
1984 struct ath_wiphy *aphy = hw->priv;
1985 struct ath_softc *sc = aphy->sc;
1986
1987 mutex_lock(&sc->mutex);
1988 ath9k_ps_wakeup(sc);
1989 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1990 ath9k_ps_restore(sc);
1991 mutex_unlock(&sc->mutex);
1992
1993 return tsf;
1994}
1995
1996static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1997{
1998 struct ath_wiphy *aphy = hw->priv;
1999 struct ath_softc *sc = aphy->sc;
2000
2001 mutex_lock(&sc->mutex);
2002 ath9k_ps_wakeup(sc);
2003 ath9k_hw_settsf64(sc->sc_ah, tsf);
2004 ath9k_ps_restore(sc);
2005 mutex_unlock(&sc->mutex);
2006}
2007
2008static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2009{
2010 struct ath_wiphy *aphy = hw->priv;
2011 struct ath_softc *sc = aphy->sc;
2012
2013 mutex_lock(&sc->mutex);
2014
2015 ath9k_ps_wakeup(sc);
2016 ath9k_hw_reset_tsf(sc->sc_ah);
2017 ath9k_ps_restore(sc);
2018
2019 mutex_unlock(&sc->mutex);
2020}
2021
2022static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2023 struct ieee80211_vif *vif,
2024 enum ieee80211_ampdu_mlme_action action,
2025 struct ieee80211_sta *sta,
2026 u16 tid, u16 *ssn)
2027{
2028 struct ath_wiphy *aphy = hw->priv;
2029 struct ath_softc *sc = aphy->sc;
2030 int ret = 0;
2031
2032 local_bh_disable();
2033
2034 switch (action) {
2035 case IEEE80211_AMPDU_RX_START:
2036 if (!(sc->sc_flags & SC_OP_RXAGGR))
2037 ret = -ENOTSUPP;
2038 break;
2039 case IEEE80211_AMPDU_RX_STOP:
2040 break;
2041 case IEEE80211_AMPDU_TX_START:
2042 if (!(sc->sc_flags & SC_OP_TXAGGR))
2043 return -EOPNOTSUPP;
2044
2045 ath9k_ps_wakeup(sc);
2046 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2047 if (!ret)
2048 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2049 ath9k_ps_restore(sc);
2050 break;
2051 case IEEE80211_AMPDU_TX_STOP:
2052 ath9k_ps_wakeup(sc);
2053 ath_tx_aggr_stop(sc, sta, tid);
2054 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2055 ath9k_ps_restore(sc);
2056 break;
2057 case IEEE80211_AMPDU_TX_OPERATIONAL:
2058 ath9k_ps_wakeup(sc);
2059 ath_tx_aggr_resume(sc, sta, tid);
2060 ath9k_ps_restore(sc);
2061 break;
2062 default:
2063 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2064 }
2065
2066 local_bh_enable();
2067
2068 return ret;
2069}
2070
2071static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2072 struct survey_info *survey)
2073{
2074 struct ath_wiphy *aphy = hw->priv;
2075 struct ath_softc *sc = aphy->sc;
2076 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2077 struct ieee80211_supported_band *sband;
2078 struct ieee80211_channel *chan;
2079 unsigned long flags;
2080 int pos;
2081
2082 spin_lock_irqsave(&common->cc_lock, flags);
2083 if (idx == 0)
2084 ath_update_survey_stats(sc);
2085
2086 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2087 if (sband && idx >= sband->n_channels) {
2088 idx -= sband->n_channels;
2089 sband = NULL;
2090 }
2091
2092 if (!sband)
2093 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2094
2095 if (!sband || idx >= sband->n_channels) {
2096 spin_unlock_irqrestore(&common->cc_lock, flags);
2097 return -ENOENT;
2098 }
2099
2100 chan = &sband->channels[idx];
2101 pos = chan->hw_value;
2102 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2103 survey->channel = chan;
2104 spin_unlock_irqrestore(&common->cc_lock, flags);
2105
2106 return 0;
2107}
2108
2109static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2110{
2111 struct ath_wiphy *aphy = hw->priv;
2112 struct ath_softc *sc = aphy->sc;
2113
2114 mutex_lock(&sc->mutex);
2115 if (ath9k_wiphy_scanning(sc)) {
2116
2117
2118
2119
2120
2121
2122
2123 mutex_unlock(&sc->mutex);
2124 return;
2125 }
2126
2127 aphy->state = ATH_WIPHY_SCAN;
2128 ath9k_wiphy_pause_all_forced(sc, aphy);
2129 mutex_unlock(&sc->mutex);
2130}
2131
2132
2133
2134
2135
2136static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2137{
2138 struct ath_wiphy *aphy = hw->priv;
2139 struct ath_softc *sc = aphy->sc;
2140
2141 mutex_lock(&sc->mutex);
2142 aphy->state = ATH_WIPHY_ACTIVE;
2143 mutex_unlock(&sc->mutex);
2144}
2145
2146static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2147{
2148 struct ath_wiphy *aphy = hw->priv;
2149 struct ath_softc *sc = aphy->sc;
2150 struct ath_hw *ah = sc->sc_ah;
2151
2152 mutex_lock(&sc->mutex);
2153 ah->coverage_class = coverage_class;
2154 ath9k_hw_init_global_settings(ah);
2155 mutex_unlock(&sc->mutex);
2156}
2157
2158struct ieee80211_ops ath9k_ops = {
2159 .tx = ath9k_tx,
2160 .start = ath9k_start,
2161 .stop = ath9k_stop,
2162 .add_interface = ath9k_add_interface,
2163 .change_interface = ath9k_change_interface,
2164 .remove_interface = ath9k_remove_interface,
2165 .config = ath9k_config,
2166 .configure_filter = ath9k_configure_filter,
2167 .sta_add = ath9k_sta_add,
2168 .sta_remove = ath9k_sta_remove,
2169 .conf_tx = ath9k_conf_tx,
2170 .bss_info_changed = ath9k_bss_info_changed,
2171 .set_key = ath9k_set_key,
2172 .get_tsf = ath9k_get_tsf,
2173 .set_tsf = ath9k_set_tsf,
2174 .reset_tsf = ath9k_reset_tsf,
2175 .ampdu_action = ath9k_ampdu_action,
2176 .get_survey = ath9k_get_survey,
2177 .sw_scan_start = ath9k_sw_scan_start,
2178 .sw_scan_complete = ath9k_sw_scan_complete,
2179 .rfkill_poll = ath9k_rfkill_poll_state,
2180 .set_coverage_class = ath9k_set_coverage_class,
2181};
2182