1#ifndef B43_TABLES_NPHY_H_
2#define B43_TABLES_NPHY_H_
3
4#include <linux/types.h>
5
6struct b43_phy_n_sfo_cfg {
7 u16 phy_bw1a;
8 u16 phy_bw2;
9 u16 phy_bw3;
10 u16 phy_bw4;
11 u16 phy_bw5;
12 u16 phy_bw6;
13};
14
15struct b43_wldev;
16
17struct nphy_txiqcal_ladder {
18 u8 percent;
19 u8 g_env;
20};
21
22struct nphy_rf_control_override_rev2 {
23 u8 addr0;
24 u8 addr1;
25 u16 bmask;
26 u8 shift;
27};
28
29struct nphy_rf_control_override_rev3 {
30 u16 val_mask;
31 u8 val_shift;
32 u8 en_addr0;
33 u8 val_addr0;
34 u8 en_addr1;
35 u8 val_addr1;
36};
37
38
39
40const struct b43_nphy_channeltab_entry_rev2 *
41b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel);
42const struct b43_nphy_channeltab_entry_rev3 *
43b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
44
45
46
47
48#define B43_NTAB_TYPEMASK 0xF0000000
49#define B43_NTAB_8BIT 0x10000000
50#define B43_NTAB_16BIT 0x20000000
51#define B43_NTAB_32BIT 0x30000000
52#define B43_NTAB8(table, offset) (((table) << 10) | (offset) | B43_NTAB_8BIT)
53#define B43_NTAB16(table, offset) (((table) << 10) | (offset) | B43_NTAB_16BIT)
54#define B43_NTAB32(table, offset) (((table) << 10) | (offset) | B43_NTAB_32BIT)
55
56
57#define B43_NTAB_FRAMESTRUCT B43_NTAB32(0x0A, 0x000)
58#define B43_NTAB_FRAMESTRUCT_SIZE 832
59#define B43_NTAB_FRAMELT B43_NTAB8 (0x18, 0x000)
60#define B43_NTAB_FRAMELT_SIZE 32
61#define B43_NTAB_TMAP B43_NTAB32(0x0C, 0x000)
62#define B43_NTAB_TMAP_SIZE 448
63#define B43_NTAB_TDTRN B43_NTAB32(0x0E, 0x000)
64#define B43_NTAB_TDTRN_SIZE 704
65#define B43_NTAB_INTLEVEL B43_NTAB32(0x0D, 0x000)
66#define B43_NTAB_INTLEVEL_SIZE 7
67#define B43_NTAB_PILOT B43_NTAB16(0x0B, 0x000)
68#define B43_NTAB_PILOT_SIZE 88
69#define B43_NTAB_PILOTLT B43_NTAB32(0x14, 0x000)
70#define B43_NTAB_PILOTLT_SIZE 6
71#define B43_NTAB_TDI20A0 B43_NTAB32(0x13, 0x080)
72#define B43_NTAB_TDI20A0_SIZE 55
73#define B43_NTAB_TDI20A1 B43_NTAB32(0x13, 0x100)
74#define B43_NTAB_TDI20A1_SIZE 55
75#define B43_NTAB_TDI40A0 B43_NTAB32(0x13, 0x280)
76#define B43_NTAB_TDI40A0_SIZE 110
77#define B43_NTAB_TDI40A1 B43_NTAB32(0x13, 0x300)
78#define B43_NTAB_TDI40A1_SIZE 110
79#define B43_NTAB_BDI B43_NTAB16(0x15, 0x000)
80#define B43_NTAB_BDI_SIZE 6
81#define B43_NTAB_CHANEST B43_NTAB32(0x16, 0x000)
82#define B43_NTAB_CHANEST_SIZE 96
83#define B43_NTAB_MCS B43_NTAB8 (0x12, 0x000)
84#define B43_NTAB_MCS_SIZE 128
85
86
87#define B43_NTAB_NOISEVAR10 B43_NTAB32(0x10, 0x000)
88#define B43_NTAB_NOISEVAR10_SIZE 256
89#define B43_NTAB_NOISEVAR11 B43_NTAB32(0x10, 0x080)
90#define B43_NTAB_NOISEVAR11_SIZE 256
91#define B43_NTAB_C0_ESTPLT B43_NTAB8 (0x1A, 0x000)
92#define B43_NTAB_C0_ESTPLT_SIZE 64
93#define B43_NTAB_C1_ESTPLT B43_NTAB8 (0x1B, 0x000)
94#define B43_NTAB_C1_ESTPLT_SIZE 64
95#define B43_NTAB_C0_ADJPLT B43_NTAB8 (0x1A, 0x040)
96#define B43_NTAB_C0_ADJPLT_SIZE 128
97#define B43_NTAB_C1_ADJPLT B43_NTAB8 (0x1B, 0x040)
98#define B43_NTAB_C1_ADJPLT_SIZE 128
99#define B43_NTAB_C0_GAINCTL B43_NTAB32(0x1A, 0x0C0)
100#define B43_NTAB_C0_GAINCTL_SIZE 128
101#define B43_NTAB_C1_GAINCTL B43_NTAB32(0x1B, 0x0C0)
102#define B43_NTAB_C1_GAINCTL_SIZE 128
103#define B43_NTAB_C0_IQLT B43_NTAB32(0x1A, 0x140)
104#define B43_NTAB_C0_IQLT_SIZE 128
105#define B43_NTAB_C1_IQLT B43_NTAB32(0x1B, 0x140)
106#define B43_NTAB_C1_IQLT_SIZE 128
107#define B43_NTAB_C0_LOFEEDTH B43_NTAB16(0x1A, 0x1C0)
108#define B43_NTAB_C0_LOFEEDTH_SIZE 128
109#define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0)
110#define B43_NTAB_C1_LOFEEDTH_SIZE 128
111
112#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18
113#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18
114#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18
115#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_20_SIZE 18
116#define B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3 11
117#define B43_NTAB_TX_IQLO_CAL_STARTCOEFS 9
118#define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3 12
119#define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL 10
120#define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL 10
121#define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3 12
122
123u32 b43_ntab_read(struct b43_wldev *dev, u32 offset);
124void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset,
125 unsigned int nr_elements, void *_data);
126void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value);
127void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset,
128 unsigned int nr_elements, const void *_data);
129
130void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev);
131void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev);
132
133extern const u32 b43_ntab_tx_gain_rev0_1_2[];
134extern const u32 b43_ntab_tx_gain_rev3plus_2ghz[];
135extern const u32 b43_ntab_tx_gain_rev3_5ghz[];
136extern const u32 b43_ntab_tx_gain_rev4_5ghz[];
137extern const u32 b43_ntab_tx_gain_rev5plus_5ghz[];
138
139extern const u32 txpwrctrl_tx_gain_ipa[];
140extern const u32 txpwrctrl_tx_gain_ipa_rev5[];
141extern const u32 txpwrctrl_tx_gain_ipa_rev6[];
142extern const u32 txpwrctrl_tx_gain_ipa_5g[];
143extern const u16 tbl_iqcal_gainparams[2][9][8];
144extern const struct nphy_txiqcal_ladder ladder_lo[];
145extern const struct nphy_txiqcal_ladder ladder_iq[];
146extern const u16 loscale[];
147
148extern const u16 tbl_tx_iqlo_cal_loft_ladder_40[];
149extern const u16 tbl_tx_iqlo_cal_loft_ladder_20[];
150extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[];
151extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[];
152extern const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[];
153extern const u16 tbl_tx_iqlo_cal_startcoefs[];
154extern const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[];
155extern const u16 tbl_tx_iqlo_cal_cmds_recal[];
156extern const u16 tbl_tx_iqlo_cal_cmds_fullcal[];
157extern const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[];
158extern const s16 tbl_tx_filter_coef_rev4[7][15];
159
160extern const struct nphy_rf_control_override_rev2
161 tbl_rf_control_override_rev2[];
162extern const struct nphy_rf_control_override_rev3
163 tbl_rf_control_override_rev3[];
164
165#endif
166