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32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
34
35#include <linux/pci.h>
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
39#include "iwl-eeprom.h"
40#include "iwl-csr.h"
41#include "iwl-prph.h"
42#include "iwl-fh.h"
43#include "iwl-debug.h"
44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
46#include "iwl-agn-hw.h"
47#include "iwl-led.h"
48#include "iwl-power.h"
49#include "iwl-agn-rs.h"
50#include "iwl-agn-tt.h"
51
52struct iwl_tx_queue;
53
54
55#define CT_KILL_THRESHOLD_LEGACY 110
56#define CT_KILL_THRESHOLD 114
57#define CT_KILL_EXIT_THRESHOLD 95
58
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68
69
70#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
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79
80#define DEFAULT_RTS_THRESHOLD 2347U
81#define MIN_RTS_THRESHOLD 0U
82#define MAX_RTS_THRESHOLD 2347U
83#define MAX_MSDU_SIZE 2304U
84#define MAX_MPDU_SIZE 2346U
85#define DEFAULT_BEACON_INTERVAL 100U
86#define DEFAULT_SHORT_RETRY_LIMIT 7U
87#define DEFAULT_LONG_RETRY_LIMIT 4U
88
89struct iwl_rx_mem_buffer {
90 dma_addr_t page_dma;
91 struct page *page;
92 struct list_head list;
93};
94
95#define rxb_addr(r) page_address(r->page)
96
97
98struct iwl_device_cmd;
99
100struct iwl_cmd_meta {
101
102 struct iwl_host_cmd *source;
103
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109
110 void (*callback)(struct iwl_priv *priv,
111 struct iwl_device_cmd *cmd,
112 struct iwl_rx_packet *pkt);
113
114
115
116 u32 flags;
117
118 DEFINE_DMA_UNMAP_ADDR(mapping);
119 DEFINE_DMA_UNMAP_LEN(len);
120};
121
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124
125
126
127struct iwl_queue {
128 int n_bd;
129 int write_ptr;
130 int read_ptr;
131
132 dma_addr_t dma_addr;
133 int n_window;
134 u32 id;
135 int low_mark;
136
137 int high_mark;
138
139} __packed;
140
141
142struct iwl_tx_info {
143 struct sk_buff *skb;
144 struct iwl_rxon_context *ctx;
145};
146
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161
162#define TFD_TX_CMD_SLOTS 256
163#define TFD_CMD_SLOTS 32
164
165struct iwl_tx_queue {
166 struct iwl_queue q;
167 void *tfds;
168 struct iwl_device_cmd **cmd;
169 struct iwl_cmd_meta *meta;
170 struct iwl_tx_info *txb;
171 unsigned long time_stamp;
172 u8 need_update;
173 u8 sched_retry;
174 u8 active;
175 u8 swq_id;
176};
177
178#define IWL_NUM_SCAN_RATES (2)
179
180struct iwl4965_channel_tgd_info {
181 u8 type;
182 s8 max_power;
183};
184
185struct iwl4965_channel_tgh_info {
186 s64 last_radar_time;
187};
188
189#define IWL4965_MAX_RATE (33)
190
191struct iwl3945_clip_group {
192
193
194 const s8 clip_powers[IWL_MAX_RATES];
195};
196
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203
204struct iwl3945_channel_power_info {
205 struct iwl3945_tx_power tpc;
206 s8 power_table_index;
207 s8 base_power_index;
208 s8 requested_power;
209};
210
211
212
213struct iwl3945_scan_power_info {
214 struct iwl3945_tx_power tpc;
215 s8 power_table_index;
216 s8 requested_power;
217};
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223
224struct iwl_channel_info {
225 struct iwl4965_channel_tgd_info tgd;
226 struct iwl4965_channel_tgh_info tgh;
227 struct iwl_eeprom_channel eeprom;
228 struct iwl_eeprom_channel ht40_eeprom;
229
230
231 u8 channel;
232 u8 flags;
233 s8 max_power_avg;
234 s8 curr_txpow;
235 s8 min_power;
236 s8 scan_power;
237
238 u8 group_index;
239 u8 band_index;
240 enum ieee80211_band band;
241
242
243 s8 ht40_max_power_avg;
244 u8 ht40_flags;
245 u8 ht40_extension_channel;
246
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249
250 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
251
252
253 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
254};
255
256#define IWL_TX_FIFO_BK 0
257#define IWL_TX_FIFO_BE 1
258#define IWL_TX_FIFO_VI 2
259#define IWL_TX_FIFO_VO 3
260#define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
261#define IWL_TX_FIFO_BE_IPAN 4
262#define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
263#define IWL_TX_FIFO_VO_IPAN 5
264#define IWL_TX_FIFO_UNUSED -1
265
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268
269#define IWL_MIN_NUM_QUEUES 10
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273
274#define IWL_DEFAULT_CMD_QUEUE_NUM 4
275#define IWL_IPAN_CMD_QUEUE_NUM 9
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281
282#define IWL_IPAN_MCAST_QUEUE 8
283
284#define IEEE80211_DATA_LEN 2304
285#define IEEE80211_4ADDR_LEN 30
286#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
287#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
288
289struct iwl_frame {
290 union {
291 struct ieee80211_hdr frame;
292 struct iwl_tx_beacon_cmd beacon;
293 u8 raw[IEEE80211_FRAME_LEN];
294 u8 cmd[360];
295 } u;
296 struct list_head list;
297};
298
299#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
300#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
301#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
302
303enum {
304 CMD_SYNC = 0,
305 CMD_SIZE_NORMAL = 0,
306 CMD_NO_SKB = 0,
307 CMD_SIZE_HUGE = (1 << 0),
308 CMD_ASYNC = (1 << 1),
309 CMD_WANT_SKB = (1 << 2),
310};
311
312#define DEF_CMD_PAYLOAD_SIZE 320
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320
321struct iwl_device_cmd {
322 struct iwl_cmd_header hdr;
323 union {
324 u32 flags;
325 u8 val8;
326 u16 val16;
327 u32 val32;
328 struct iwl_tx_cmd tx;
329 struct iwl6000_channel_switch_cmd chswitch;
330 u8 payload[DEF_CMD_PAYLOAD_SIZE];
331 } __packed cmd;
332} __packed;
333
334#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
335
336
337struct iwl_host_cmd {
338 const void *data;
339 unsigned long reply_page;
340 void (*callback)(struct iwl_priv *priv,
341 struct iwl_device_cmd *cmd,
342 struct iwl_rx_packet *pkt);
343 u32 flags;
344 u16 len;
345 u8 id;
346};
347
348#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
349#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
350#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
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366
367struct iwl_rx_queue {
368 __le32 *bd;
369 dma_addr_t bd_dma;
370 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
371 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
372 u32 read;
373 u32 write;
374 u32 free_count;
375 u32 write_actual;
376 struct list_head rx_free;
377 struct list_head rx_used;
378 int need_update;
379 struct iwl_rb_status *rb_stts;
380 dma_addr_t rb_stts_dma;
381 spinlock_t lock;
382};
383
384#define IWL_SUPPORTED_RATES_IE_LEN 8
385
386#define MAX_TID_COUNT 9
387
388#define IWL_INVALID_RATE 0xFF
389#define IWL_INVALID_VALUE -1
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405struct iwl_ht_agg {
406 u16 txq_id;
407 u16 frame_count;
408 u16 wait_for_ba;
409 u16 start_idx;
410 u64 bitmap;
411 u32 rate_n_flags;
412#define IWL_AGG_OFF 0
413#define IWL_AGG_ON 1
414#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
415#define IWL_EMPTYING_HW_QUEUE_DELBA 3
416 u8 state;
417};
418
419
420struct iwl_tid_data {
421 u16 seq_number;
422 u16 tfds_in_queue;
423 struct iwl_ht_agg agg;
424};
425
426struct iwl_hw_key {
427 u32 cipher;
428 int keylen;
429 u8 keyidx;
430 u8 key[32];
431};
432
433union iwl_ht_rate_supp {
434 u16 rates;
435 struct {
436 u8 siso_rate;
437 u8 mimo_rate;
438 };
439};
440
441#define CFG_HT_RX_AMPDU_FACTOR_8K (0x0)
442#define CFG_HT_RX_AMPDU_FACTOR_16K (0x1)
443#define CFG_HT_RX_AMPDU_FACTOR_32K (0x2)
444#define CFG_HT_RX_AMPDU_FACTOR_64K (0x3)
445#define CFG_HT_RX_AMPDU_FACTOR_DEF CFG_HT_RX_AMPDU_FACTOR_64K
446#define CFG_HT_RX_AMPDU_FACTOR_MAX CFG_HT_RX_AMPDU_FACTOR_64K
447#define CFG_HT_RX_AMPDU_FACTOR_MIN CFG_HT_RX_AMPDU_FACTOR_8K
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455
456#define CFG_HT_MPDU_DENSITY_2USEC (0x4)
457#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
458#define CFG_HT_MPDU_DENSITY_8USEC (0x6)
459#define CFG_HT_MPDU_DENSITY_16USEC (0x7)
460#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
461#define CFG_HT_MPDU_DENSITY_MAX CFG_HT_MPDU_DENSITY_16USEC
462#define CFG_HT_MPDU_DENSITY_MIN (0x1)
463
464struct iwl_ht_config {
465 bool single_chain_sufficient;
466 enum ieee80211_smps_mode smps;
467};
468
469
470struct iwl_qos_info {
471 int qos_active;
472 struct iwl_qosparam_cmd def_qos_parm;
473};
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480
481struct iwl_station_entry {
482 struct iwl_addsta_cmd sta;
483 struct iwl_tid_data tid[MAX_TID_COUNT];
484 u8 used, ctxid;
485 struct iwl_hw_key keyinfo;
486 struct iwl_link_quality_cmd *lq;
487};
488
489struct iwl_station_priv_common {
490 struct iwl_rxon_context *ctx;
491 u8 sta_id;
492};
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504struct iwl_station_priv {
505 struct iwl_station_priv_common common;
506 struct iwl_lq_sta lq_sta;
507 atomic_t pending_frames;
508 bool client;
509 bool asleep;
510};
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517
518struct iwl_vif_priv {
519 struct iwl_rxon_context *ctx;
520 u8 ibss_bssid_sta_id;
521};
522
523
524struct fw_desc {
525 void *v_addr;
526 dma_addr_t p_addr;
527 u32 len;
528};
529
530
531struct iwl_ucode_header {
532 __le32 ver;
533 union {
534 struct {
535 __le32 inst_size;
536 __le32 data_size;
537 __le32 init_size;
538 __le32 init_data_size;
539 __le32 boot_size;
540 u8 data[0];
541 } v1;
542 struct {
543 __le32 build;
544 __le32 inst_size;
545 __le32 data_size;
546 __le32 init_size;
547 __le32 init_data_size;
548 __le32 boot_size;
549 u8 data[0];
550 } v2;
551 } u;
552};
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569enum iwl_ucode_tlv_type {
570 IWL_UCODE_TLV_INVALID = 0,
571 IWL_UCODE_TLV_INST = 1,
572 IWL_UCODE_TLV_DATA = 2,
573 IWL_UCODE_TLV_INIT = 3,
574 IWL_UCODE_TLV_INIT_DATA = 4,
575 IWL_UCODE_TLV_BOOT = 5,
576 IWL_UCODE_TLV_PROBE_MAX_LEN = 6,
577 IWL_UCODE_TLV_PAN = 7,
578 IWL_UCODE_TLV_RUNT_EVTLOG_PTR = 8,
579 IWL_UCODE_TLV_RUNT_EVTLOG_SIZE = 9,
580 IWL_UCODE_TLV_RUNT_ERRLOG_PTR = 10,
581 IWL_UCODE_TLV_INIT_EVTLOG_PTR = 11,
582 IWL_UCODE_TLV_INIT_EVTLOG_SIZE = 12,
583 IWL_UCODE_TLV_INIT_ERRLOG_PTR = 13,
584 IWL_UCODE_TLV_ENHANCE_SENS_TBL = 14,
585 IWL_UCODE_TLV_PHY_CALIBRATION_SIZE = 15,
586};
587
588struct iwl_ucode_tlv {
589 __le16 type;
590 __le16 alternative;
591 __le32 length;
592 u8 data[0];
593} __packed;
594
595#define IWL_TLV_UCODE_MAGIC 0x0a4c5749
596
597struct iwl_tlv_ucode_header {
598
599
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603
604 __le32 zero;
605 __le32 magic;
606 u8 human_readable[64];
607 __le32 ver;
608 __le32 build;
609 __le64 alternatives;
610
611
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615
616 u8 data[0];
617};
618
619struct iwl4965_ibss_seq {
620 u8 mac[ETH_ALEN];
621 u16 seq_num;
622 u16 frag_num;
623 unsigned long packet_time;
624 struct list_head list;
625};
626
627struct iwl_sensitivity_ranges {
628 u16 min_nrg_cck;
629 u16 max_nrg_cck;
630
631 u16 nrg_th_cck;
632 u16 nrg_th_ofdm;
633
634 u16 auto_corr_min_ofdm;
635 u16 auto_corr_min_ofdm_mrc;
636 u16 auto_corr_min_ofdm_x1;
637 u16 auto_corr_min_ofdm_mrc_x1;
638
639 u16 auto_corr_max_ofdm;
640 u16 auto_corr_max_ofdm_mrc;
641 u16 auto_corr_max_ofdm_x1;
642 u16 auto_corr_max_ofdm_mrc_x1;
643
644 u16 auto_corr_max_cck;
645 u16 auto_corr_max_cck_mrc;
646 u16 auto_corr_min_cck;
647 u16 auto_corr_min_cck_mrc;
648
649 u16 barker_corr_th_min;
650 u16 barker_corr_th_min_mrc;
651 u16 nrg_th_cca;
652};
653
654
655#define KELVIN_TO_CELSIUS(x) ((x)-273)
656#define CELSIUS_TO_KELVIN(x) ((x)+273)
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682struct iwl_hw_params {
683 u8 max_txq_num;
684 u8 dma_chnl_num;
685 u16 scd_bc_tbls_size;
686 u32 tfd_size;
687 u8 tx_chains_num;
688 u8 rx_chains_num;
689 u8 valid_tx_ant;
690 u8 valid_rx_ant;
691 u16 max_rxq_size;
692 u16 max_rxq_log;
693 u32 rx_page_order;
694 u32 rx_wrt_ptr_reg;
695 u8 max_stations;
696 u8 ht40_channel;
697 u8 max_beacon_itrvl;
698 u32 max_inst_size;
699 u32 max_data_size;
700 u32 max_bsm_size;
701 u32 ct_kill_threshold;
702 u32 ct_kill_exit_threshold;
703
704 u16 beacon_time_tsf_bits;
705 u32 calib_init_cfg;
706 u32 calib_rt_cfg;
707 const struct iwl_sensitivity_ranges *sens;
708};
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726extern void iwl_update_chain_flags(struct iwl_priv *priv);
727extern const u8 iwl_bcast_addr[ETH_ALEN];
728extern int iwl_rxq_stop(struct iwl_priv *priv);
729extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
730extern int iwl_queue_space(const struct iwl_queue *q);
731static inline int iwl_queue_used(const struct iwl_queue *q, int i)
732{
733 return q->write_ptr >= q->read_ptr ?
734 (i >= q->read_ptr && i < q->write_ptr) :
735 !(i < q->read_ptr && i >= q->write_ptr);
736}
737
738
739static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
740{
741
742
743
744
745
746 if (is_huge)
747 return q->n_window;
748
749
750 return index & (q->n_window - 1);
751}
752
753
754struct iwl_dma_ptr {
755 dma_addr_t dma;
756 void *addr;
757 size_t size;
758};
759
760#define IWL_OPERATION_MODE_AUTO 0
761#define IWL_OPERATION_MODE_HT_ONLY 1
762#define IWL_OPERATION_MODE_MIXED 2
763#define IWL_OPERATION_MODE_20MHZ 3
764
765#define IWL_TX_CRC_SIZE 4
766#define IWL_TX_DELIMITER_SIZE 4
767
768#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
769
770
771#define INITIALIZATION_VALUE 0xFFFF
772#define IWL4965_CAL_NUM_BEACONS 20
773#define IWL_CAL_NUM_BEACONS 16
774#define MAXIMUM_ALLOWED_PATHLOSS 15
775
776#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
777
778#define MAX_FA_OFDM 50
779#define MIN_FA_OFDM 5
780#define MAX_FA_CCK 50
781#define MIN_FA_CCK 5
782
783#define AUTO_CORR_STEP_OFDM 1
784
785#define AUTO_CORR_STEP_CCK 3
786#define AUTO_CORR_MAX_TH_CCK 160
787
788#define NRG_DIFF 2
789#define NRG_STEP_CCK 2
790#define NRG_MARGIN 8
791#define MAX_NUMBER_CCK_NO_FA 100
792
793#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
794
795#define CHAIN_A 0
796#define CHAIN_B 1
797#define CHAIN_C 2
798#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
799#define ALL_BAND_FILTER 0xFF00
800#define IN_BAND_FILTER 0xFF
801#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
802
803#define NRG_NUM_PREV_STAT_L 20
804#define NUM_RX_CHAINS 3
805
806enum iwl4965_false_alarm_state {
807 IWL_FA_TOO_MANY = 0,
808 IWL_FA_TOO_FEW = 1,
809 IWL_FA_GOOD_RANGE = 2,
810};
811
812enum iwl4965_chain_noise_state {
813 IWL_CHAIN_NOISE_ALIVE = 0,
814 IWL_CHAIN_NOISE_ACCUMULATE,
815 IWL_CHAIN_NOISE_CALIBRATED,
816 IWL_CHAIN_NOISE_DONE,
817};
818
819enum iwl4965_calib_enabled_state {
820 IWL_CALIB_DISABLED = 0,
821 IWL_CALIB_ENABLED = 1,
822};
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830enum iwl_calib {
831 IWL_CALIB_XTAL,
832 IWL_CALIB_DC,
833 IWL_CALIB_LO,
834 IWL_CALIB_TX_IQ,
835 IWL_CALIB_TX_IQ_PERD,
836 IWL_CALIB_BASE_BAND,
837 IWL_CALIB_TEMP_OFFSET,
838 IWL_CALIB_MAX
839};
840
841
842struct iwl_calib_result {
843 void *buf;
844 size_t buf_len;
845};
846
847enum ucode_type {
848 UCODE_NONE = 0,
849 UCODE_INIT,
850 UCODE_RT
851};
852
853
854struct iwl_sensitivity_data {
855 u32 auto_corr_ofdm;
856 u32 auto_corr_ofdm_mrc;
857 u32 auto_corr_ofdm_x1;
858 u32 auto_corr_ofdm_mrc_x1;
859 u32 auto_corr_cck;
860 u32 auto_corr_cck_mrc;
861
862 u32 last_bad_plcp_cnt_ofdm;
863 u32 last_fa_cnt_ofdm;
864 u32 last_bad_plcp_cnt_cck;
865 u32 last_fa_cnt_cck;
866
867 u32 nrg_curr_state;
868 u32 nrg_prev_state;
869 u32 nrg_value[10];
870 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
871 u32 nrg_silence_ref;
872 u32 nrg_energy_idx;
873 u32 nrg_silence_idx;
874 u32 nrg_th_cck;
875 s32 nrg_auto_corr_silence_diff;
876 u32 num_in_cck_no_fa;
877 u32 nrg_th_ofdm;
878
879 u16 barker_corr_th_min;
880 u16 barker_corr_th_min_mrc;
881 u16 nrg_th_cca;
882};
883
884
885struct iwl_chain_noise_data {
886 u32 active_chains;
887 u32 chain_noise_a;
888 u32 chain_noise_b;
889 u32 chain_noise_c;
890 u32 chain_signal_a;
891 u32 chain_signal_b;
892 u32 chain_signal_c;
893 u16 beacon_count;
894 u8 disconn_array[NUM_RX_CHAINS];
895 u8 delta_gain_code[NUM_RX_CHAINS];
896 u8 radio_write;
897 u8 state;
898};
899
900#define EEPROM_SEM_TIMEOUT 10
901#define EEPROM_SEM_RETRY_LIMIT 1000
902
903#define IWL_TRAFFIC_ENTRIES (256)
904#define IWL_TRAFFIC_ENTRY_SIZE (64)
905
906enum {
907 MEASUREMENT_READY = (1 << 0),
908 MEASUREMENT_ACTIVE = (1 << 1),
909};
910
911enum iwl_nvm_type {
912 NVM_DEVICE_TYPE_EEPROM = 0,
913 NVM_DEVICE_TYPE_OTP,
914};
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922
923enum iwl_access_mode {
924 IWL_OTP_ACCESS_ABSOLUTE,
925 IWL_OTP_ACCESS_RELATIVE,
926};
927
928
929
930
931
932
933enum iwl_pa_type {
934 IWL_PA_SYSTEM = 0,
935 IWL_PA_INTERNAL = 1,
936};
937
938
939struct isr_statistics {
940 u32 hw;
941 u32 sw;
942 u32 err_code;
943 u32 sch;
944 u32 alive;
945 u32 rfkill;
946 u32 ctkill;
947 u32 wakeup;
948 u32 rx;
949 u32 rx_handlers[REPLY_MAX];
950 u32 tx;
951 u32 unhandled;
952};
953
954
955struct reply_tx_error_statistics {
956 u32 pp_delay;
957 u32 pp_few_bytes;
958 u32 pp_bt_prio;
959 u32 pp_quiet_period;
960 u32 pp_calc_ttak;
961 u32 int_crossed_retry;
962 u32 short_limit;
963 u32 long_limit;
964 u32 fifo_underrun;
965 u32 drain_flow;
966 u32 rfkill_flush;
967 u32 life_expire;
968 u32 dest_ps;
969 u32 host_abort;
970 u32 bt_retry;
971 u32 sta_invalid;
972 u32 frag_drop;
973 u32 tid_disable;
974 u32 fifo_flush;
975 u32 insuff_cf_poll;
976 u32 fail_hw_drop;
977 u32 sta_color_mismatch;
978 u32 unknown;
979};
980
981
982struct reply_agg_tx_error_statistics {
983 u32 underrun;
984 u32 bt_prio;
985 u32 few_bytes;
986 u32 abort;
987 u32 last_sent_ttl;
988 u32 last_sent_try;
989 u32 last_sent_bt_kill;
990 u32 scd_query;
991 u32 bad_crc32;
992 u32 response;
993 u32 dump_tx;
994 u32 delay_tx;
995 u32 unknown;
996};
997
998#ifdef CONFIG_IWLWIFI_DEBUGFS
999
1000enum iwl_mgmt_stats {
1001 MANAGEMENT_ASSOC_REQ = 0,
1002 MANAGEMENT_ASSOC_RESP,
1003 MANAGEMENT_REASSOC_REQ,
1004 MANAGEMENT_REASSOC_RESP,
1005 MANAGEMENT_PROBE_REQ,
1006 MANAGEMENT_PROBE_RESP,
1007 MANAGEMENT_BEACON,
1008 MANAGEMENT_ATIM,
1009 MANAGEMENT_DISASSOC,
1010 MANAGEMENT_AUTH,
1011 MANAGEMENT_DEAUTH,
1012 MANAGEMENT_ACTION,
1013 MANAGEMENT_MAX,
1014};
1015
1016enum iwl_ctrl_stats {
1017 CONTROL_BACK_REQ = 0,
1018 CONTROL_BACK,
1019 CONTROL_PSPOLL,
1020 CONTROL_RTS,
1021 CONTROL_CTS,
1022 CONTROL_ACK,
1023 CONTROL_CFEND,
1024 CONTROL_CFENDACK,
1025 CONTROL_MAX,
1026};
1027
1028struct traffic_stats {
1029 u32 mgmt[MANAGEMENT_MAX];
1030 u32 ctrl[CONTROL_MAX];
1031 u32 data_cnt;
1032 u64 data_bytes;
1033};
1034#else
1035struct traffic_stats {
1036 u64 data_bytes;
1037};
1038#endif
1039
1040
1041
1042
1043
1044
1045
1046struct iwl_switch_rxon {
1047 bool switch_in_progress;
1048 __le16 channel;
1049};
1050
1051
1052
1053
1054
1055#define UCODE_TRACE_PERIOD (100)
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068struct iwl_event_log {
1069 bool ucode_trace;
1070 u32 num_wraps;
1071 u32 next_entry;
1072 int non_wraps_count;
1073 int wraps_once_count;
1074 int wraps_more_count;
1075};
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085#define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
1086#define IWL_HOST_INT_TIMEOUT_DEF (0x40)
1087#define IWL_HOST_INT_TIMEOUT_MIN (0x0)
1088#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
1089#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
1090#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
1091
1092
1093
1094
1095
1096#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (1)
1097#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50)
1098#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100)
1099#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200)
1100#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255)
1101#define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE (0)
1102
1103#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3)
1104#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1105
1106
1107#define IWL_DEF_WD_TIMEOUT (2000)
1108#define IWL_LONG_WD_TIMEOUT (10000)
1109#define IWL_MAX_WD_TIMEOUT (120000)
1110
1111
1112#define IWL_BT_ANTENNA_COUPLING_THRESHOLD (35)
1113
1114enum iwl_reset {
1115 IWL_RF_RESET = 0,
1116 IWL_FW_RESET,
1117 IWL_MAX_FORCE_RESET,
1118};
1119
1120struct iwl_force_reset {
1121 int reset_request_count;
1122 int reset_success_count;
1123 int reset_reject_count;
1124 unsigned long reset_duration;
1125 unsigned long last_force_reset_jiffies;
1126};
1127
1128
1129
1130
1131
1132
1133
1134#define IWL3945_EXT_BEACON_TIME_POS 24
1135
1136
1137
1138
1139
1140#define IWLAGN_EXT_BEACON_TIME_POS 22
1141
1142enum iwl_rxon_context_id {
1143 IWL_RXON_CTX_BSS,
1144 IWL_RXON_CTX_PAN,
1145
1146 NUM_IWL_RXON_CTX
1147};
1148
1149struct iwl_rxon_context {
1150 struct ieee80211_vif *vif;
1151
1152 const u8 *ac_to_fifo;
1153 const u8 *ac_to_queue;
1154 u8 mcast_queue;
1155
1156
1157
1158
1159
1160
1161 bool always_active, is_active;
1162
1163 bool ht_need_multiple_chains;
1164
1165 enum iwl_rxon_context_id ctxid;
1166
1167 u32 interface_modes, exclusive_interface_modes;
1168 u8 unused_devtype, ap_devtype, ibss_devtype, station_devtype;
1169
1170
1171
1172
1173
1174
1175
1176 const struct iwl_rxon_cmd active;
1177 struct iwl_rxon_cmd staging;
1178
1179 struct iwl_rxon_time_cmd timing;
1180
1181 struct iwl_qos_info qos_data;
1182
1183 u8 bcast_sta_id, ap_sta_id;
1184
1185 u8 rxon_cmd, rxon_assoc_cmd, rxon_timing_cmd;
1186 u8 qos_cmd;
1187 u8 wep_key_cmd;
1188
1189 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1190 u8 key_mapping_keys;
1191
1192 __le32 station_flags;
1193
1194 struct {
1195 bool non_gf_sta_present;
1196 u8 protection;
1197 bool enabled, is_40mhz;
1198 u8 extension_chan_offset;
1199 } ht;
1200};
1201
1202struct iwl_priv {
1203
1204
1205 struct ieee80211_hw *hw;
1206 struct ieee80211_channel *ieee_channels;
1207 struct ieee80211_rate *ieee_rates;
1208 struct iwl_cfg *cfg;
1209
1210
1211 struct list_head free_frames;
1212 int frames_count;
1213
1214 enum ieee80211_band band;
1215 int alloc_rxb_page;
1216
1217 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
1218 struct iwl_rx_mem_buffer *rxb);
1219
1220 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
1221
1222
1223 struct iwl_spectrum_notification measure_report;
1224 u8 measurement_status;
1225
1226
1227 u32 ucode_beacon_time;
1228 int missed_beacon_threshold;
1229
1230
1231 u32 ibss_manager;
1232
1233
1234 unsigned long plcp_jiffies;
1235
1236
1237 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
1238
1239
1240
1241 struct iwl_channel_info *channel_info;
1242 u8 channel_count;
1243
1244
1245 s32 temperature;
1246 s32 last_temperature;
1247
1248
1249 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
1250
1251
1252 unsigned long scan_start;
1253 unsigned long scan_start_tsf;
1254 void *scan_cmd;
1255 enum ieee80211_band scan_band;
1256 struct cfg80211_scan_request *scan_request;
1257 struct ieee80211_vif *scan_vif;
1258 bool is_internal_short_scan;
1259 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1260 u8 mgmt_tx_ant;
1261
1262
1263 spinlock_t lock;
1264 spinlock_t hcmd_lock;
1265 spinlock_t reg_lock;
1266 struct mutex mutex;
1267 struct mutex sync_cmd_mutex;
1268
1269
1270 struct pci_dev *pci_dev;
1271
1272
1273 void __iomem *hw_base;
1274 u32 hw_rev;
1275 u32 hw_wa_rev;
1276 u8 rev_id;
1277
1278
1279 u8 valid_contexts;
1280
1281
1282 u8 cmd_queue;
1283
1284
1285 u8 sta_key_max_num;
1286
1287
1288 struct mac_address addresses[2];
1289
1290
1291 int fw_index;
1292 u32 ucode_ver;
1293
1294 struct fw_desc ucode_code;
1295 struct fw_desc ucode_data;
1296 struct fw_desc ucode_data_backup;
1297 struct fw_desc ucode_init;
1298 struct fw_desc ucode_init_data;
1299 struct fw_desc ucode_boot;
1300 enum ucode_type ucode_type;
1301 u8 ucode_write_complete;
1302 char firmware_name[25];
1303
1304 struct iwl_rxon_context contexts[NUM_IWL_RXON_CTX];
1305
1306 struct iwl_switch_rxon switch_rxon;
1307
1308
1309
1310 struct iwl_init_alive_resp card_alive_init;
1311 struct iwl_alive_resp card_alive;
1312
1313 unsigned long last_blink_time;
1314 u8 last_blink_rate;
1315 u8 allow_blinking;
1316 u64 led_tpt;
1317
1318 u16 active_rate;
1319
1320 u8 start_calib;
1321 struct iwl_sensitivity_data sensitivity_data;
1322 struct iwl_chain_noise_data chain_noise_data;
1323 bool enhance_sensitivity_table;
1324 __le16 sensitivity_tbl[HD_TABLE_SIZE];
1325 __le16 enhance_sensitivity_tbl[ENHANCE_HD_TABLE_ENTRIES];
1326
1327 struct iwl_ht_config current_ht_config;
1328
1329
1330 u8 retry_rate;
1331
1332 wait_queue_head_t wait_command_queue;
1333
1334 int activity_timer_active;
1335
1336
1337 struct iwl_rx_queue rxq;
1338 struct iwl_tx_queue *txq;
1339 unsigned long txq_ctx_active_msk;
1340 struct iwl_dma_ptr kw;
1341 struct iwl_dma_ptr scd_bc_tbls;
1342
1343 u32 scd_base_addr;
1344
1345 unsigned long status;
1346
1347
1348 struct traffic_stats tx_stats;
1349 struct traffic_stats rx_stats;
1350
1351
1352 struct isr_statistics isr_stats;
1353
1354 struct iwl_power_mgr power_data;
1355 struct iwl_tt_mgmt thermal_throttle;
1356
1357
1358 u8 bssid[ETH_ALEN];
1359
1360
1361
1362
1363 spinlock_t sta_lock;
1364 int num_stations;
1365 struct iwl_station_entry stations[IWL_STATION_COUNT];
1366 unsigned long ucode_key_table;
1367
1368
1369#define IWL_MAX_HW_QUEUES 32
1370 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1371
1372 atomic_t queue_stop_count[4];
1373
1374
1375 u8 is_open;
1376
1377 u8 mac80211_registered;
1378
1379
1380 u8 *eeprom;
1381 int nvm_device_type;
1382 struct iwl_eeprom_calib_info *calib_info;
1383
1384 enum nl80211_iftype iw_mode;
1385
1386
1387 u64 timestamp;
1388
1389 union {
1390#if defined(CONFIG_IWL3945) || defined(CONFIG_IWL3945_MODULE)
1391 struct {
1392 void *shared_virt;
1393 dma_addr_t shared_phys;
1394
1395 struct delayed_work thermal_periodic;
1396 struct delayed_work rfkill_poll;
1397
1398 struct iwl3945_notif_statistics statistics;
1399#ifdef CONFIG_IWLWIFI_DEBUGFS
1400 struct iwl3945_notif_statistics accum_statistics;
1401 struct iwl3945_notif_statistics delta_statistics;
1402 struct iwl3945_notif_statistics max_delta;
1403#endif
1404
1405 u32 sta_supp_rates;
1406 int last_rx_rssi;
1407
1408
1409 u32 last_beacon_time;
1410 u64 last_tsf;
1411
1412
1413
1414
1415
1416
1417 const struct iwl3945_clip_group clip_groups[5];
1418
1419 } _3945;
1420#endif
1421#if defined(CONFIG_IWLAGN) || defined(CONFIG_IWLAGN_MODULE)
1422 struct {
1423
1424 __le32 *ict_tbl;
1425 void *ict_tbl_vir;
1426 dma_addr_t ict_tbl_dma;
1427 dma_addr_t aligned_ict_tbl_dma;
1428 int ict_index;
1429 u32 inta;
1430 bool use_ict;
1431
1432
1433
1434
1435 u8 agg_tids_count;
1436
1437 struct iwl_rx_phy_res last_phy_res;
1438 bool last_phy_res_valid;
1439
1440 struct completion firmware_loading_complete;
1441
1442 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1443 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1444
1445
1446
1447
1448
1449
1450 u8 phy_calib_chain_noise_reset_cmd;
1451 u8 phy_calib_chain_noise_gain_cmd;
1452
1453 struct iwl_notif_statistics statistics;
1454 struct iwl_bt_notif_statistics statistics_bt;
1455
1456 struct reply_tx_error_statistics reply_tx_stats;
1457 struct reply_agg_tx_error_statistics reply_agg_tx_stats;
1458#ifdef CONFIG_IWLWIFI_DEBUGFS
1459 struct iwl_notif_statistics accum_statistics;
1460 struct iwl_notif_statistics delta_statistics;
1461 struct iwl_notif_statistics max_delta;
1462 struct iwl_bt_notif_statistics accum_statistics_bt;
1463 struct iwl_bt_notif_statistics delta_statistics_bt;
1464 struct iwl_bt_notif_statistics max_delta_bt;
1465#endif
1466 } _agn;
1467#endif
1468 };
1469
1470
1471 u8 bt_enable_flag;
1472 u8 bt_status;
1473 u8 bt_traffic_load, last_bt_traffic_load;
1474 bool bt_ch_announce;
1475 bool bt_sco_active;
1476 bool bt_full_concurrent;
1477 bool bt_ant_couple_ok;
1478 __le32 kill_ack_mask;
1479 __le32 kill_cts_mask;
1480 __le16 bt_valid;
1481 u16 bt_on_thresh;
1482 u16 bt_duration;
1483 u16 dynamic_frag_thresh;
1484 u8 bt_ci_compliance;
1485 struct work_struct bt_traffic_change_work;
1486
1487 struct iwl_hw_params hw_params;
1488
1489 u32 inta_mask;
1490
1491 struct workqueue_struct *workqueue;
1492
1493 struct work_struct restart;
1494 struct work_struct scan_completed;
1495 struct work_struct rx_replenish;
1496 struct work_struct abort_scan;
1497
1498 struct work_struct beacon_update;
1499 struct iwl_rxon_context *beacon_ctx;
1500 struct sk_buff *beacon_skb;
1501
1502 struct work_struct tt_work;
1503 struct work_struct ct_enter;
1504 struct work_struct ct_exit;
1505 struct work_struct start_internal_scan;
1506 struct work_struct tx_flush;
1507 struct work_struct bt_full_concurrency;
1508 struct work_struct bt_runtime_config;
1509
1510 struct tasklet_struct irq_tasklet;
1511
1512 struct delayed_work init_alive_start;
1513 struct delayed_work alive_start;
1514 struct delayed_work scan_check;
1515
1516
1517 s8 tx_power_user_lmt;
1518 s8 tx_power_device_lmt;
1519 s8 tx_power_lmt_in_half_dbm;
1520 s8 tx_power_next;
1521
1522
1523#ifdef CONFIG_IWLWIFI_DEBUG
1524
1525 u32 debug_level;
1526
1527#endif
1528#ifdef CONFIG_IWLWIFI_DEBUGFS
1529
1530 u16 tx_traffic_idx;
1531 u16 rx_traffic_idx;
1532 u8 *tx_traffic;
1533 u8 *rx_traffic;
1534 struct dentry *debugfs_dir;
1535 u32 dbgfs_sram_offset, dbgfs_sram_len;
1536 bool disable_ht40;
1537#endif
1538
1539 struct work_struct txpower_work;
1540 u32 disable_sens_cal;
1541 u32 disable_chain_noise_cal;
1542 u32 disable_tx_power_cal;
1543 struct work_struct run_time_calib_work;
1544 struct timer_list statistics_periodic;
1545 struct timer_list ucode_trace;
1546 struct timer_list watchdog;
1547 bool hw_ready;
1548
1549 struct iwl_event_log event_log;
1550};
1551
1552static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1553{
1554 set_bit(txq_id, &priv->txq_ctx_active_msk);
1555}
1556
1557static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1558{
1559 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1560}
1561
1562#ifdef CONFIG_IWLWIFI_DEBUG
1563
1564
1565
1566
1567
1568
1569
1570static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1571{
1572 if (priv->debug_level)
1573 return priv->debug_level;
1574 else
1575 return iwl_debug_level;
1576}
1577#else
1578static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1579{
1580 return iwl_debug_level;
1581}
1582#endif
1583
1584
1585static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1586 int txq_id, int idx)
1587{
1588 if (priv->txq[txq_id].txb[idx].skb)
1589 return (struct ieee80211_hdr *)priv->txq[txq_id].
1590 txb[idx].skb->data;
1591 return NULL;
1592}
1593
1594static inline struct iwl_rxon_context *
1595iwl_rxon_ctx_from_vif(struct ieee80211_vif *vif)
1596{
1597 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
1598
1599 return vif_priv->ctx;
1600}
1601
1602#define for_each_context(priv, ctx) \
1603 for (ctx = &priv->contexts[IWL_RXON_CTX_BSS]; \
1604 ctx < &priv->contexts[NUM_IWL_RXON_CTX]; ctx++) \
1605 if (priv->valid_contexts & BIT(ctx->ctxid))
1606
1607static inline int iwl_is_associated(struct iwl_priv *priv,
1608 enum iwl_rxon_context_id ctxid)
1609{
1610 return (priv->contexts[ctxid].active.filter_flags &
1611 RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1612}
1613
1614static inline int iwl_is_any_associated(struct iwl_priv *priv)
1615{
1616 return iwl_is_associated(priv, IWL_RXON_CTX_BSS);
1617}
1618
1619static inline int iwl_is_associated_ctx(struct iwl_rxon_context *ctx)
1620{
1621 return (ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1622}
1623
1624static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
1625{
1626 if (ch_info == NULL)
1627 return 0;
1628 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1629}
1630
1631static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
1632{
1633 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1634}
1635
1636static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
1637{
1638 return ch_info->band == IEEE80211_BAND_5GHZ;
1639}
1640
1641static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
1642{
1643 return ch_info->band == IEEE80211_BAND_2GHZ;
1644}
1645
1646static inline int is_channel_passive(const struct iwl_channel_info *ch)
1647{
1648 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1649}
1650
1651static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1652{
1653 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1654}
1655
1656static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1657{
1658 __free_pages(page, priv->hw_params.rx_page_order);
1659 priv->alloc_rxb_page--;
1660}
1661
1662static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1663{
1664 free_pages(page, priv->hw_params.rx_page_order);
1665 priv->alloc_rxb_page--;
1666}
1667#endif
1668