1/* 2 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the 17 Free Software Foundation, Inc., 18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 */ 20 21/* 22 Module: rt2x00 23 Abstract: rt2x00 queue datastructures and routines 24 */ 25 26#ifndef RT2X00QUEUE_H 27#define RT2X00QUEUE_H 28 29#include <linux/prefetch.h> 30 31/** 32 * DOC: Entry frame size 33 * 34 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes, 35 * for USB devices this restriction does not apply, but the value of 36 * 2432 makes sense since it is big enough to contain the maximum fragment 37 * size according to the ieee802.11 specs. 38 * The aggregation size depends on support from the driver, but should 39 * be something around 3840 bytes. 40 */ 41#define DATA_FRAME_SIZE 2432 42#define MGMT_FRAME_SIZE 256 43#define AGGREGATION_SIZE 3840 44 45/** 46 * enum data_queue_qid: Queue identification 47 * 48 * @QID_AC_VO: AC VO queue 49 * @QID_AC_VI: AC VI queue 50 * @QID_AC_BE: AC BE queue 51 * @QID_AC_BK: AC BK queue 52 * @QID_HCCA: HCCA queue 53 * @QID_MGMT: MGMT queue (prio queue) 54 * @QID_RX: RX queue 55 * @QID_OTHER: None of the above (don't use, only present for completeness) 56 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device) 57 * @QID_ATIM: Atim queue (value unspeficied, don't send it to device) 58 */ 59enum data_queue_qid { 60 QID_AC_VO = 0, 61 QID_AC_VI = 1, 62 QID_AC_BE = 2, 63 QID_AC_BK = 3, 64 QID_HCCA = 4, 65 QID_MGMT = 13, 66 QID_RX = 14, 67 QID_OTHER = 15, 68 QID_BEACON, 69 QID_ATIM, 70}; 71 72/** 73 * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc 74 * 75 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX 76 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX 77 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by 78 * mac80211 but was stripped for processing by the driver. 79 * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211, 80 * don't try to pass it back. 81 * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the 82 * skb, instead of in the desc field. 83 */ 84enum skb_frame_desc_flags { 85 SKBDESC_DMA_MAPPED_RX = 1 << 0, 86 SKBDESC_DMA_MAPPED_TX = 1 << 1, 87 SKBDESC_IV_STRIPPED = 1 << 2, 88 SKBDESC_NOT_MAC80211 = 1 << 3, 89 SKBDESC_DESC_IN_SKB = 1 << 4, 90}; 91 92/** 93 * struct skb_frame_desc: Descriptor information for the skb buffer 94 * 95 * This structure is placed over the driver_data array, this means that 96 * this structure should not exceed the size of that array (40 bytes). 97 * 98 * @flags: Frame flags, see &enum skb_frame_desc_flags. 99 * @desc_len: Length of the frame descriptor. 100 * @tx_rate_idx: the index of the TX rate, used for TX status reporting 101 * @tx_rate_flags: the TX rate flags, used for TX status reporting 102 * @desc: Pointer to descriptor part of the frame. 103 * Note that this pointer could point to something outside 104 * of the scope of the skb->data pointer. 105 * @iv: IV/EIV data used during encryption/decryption. 106 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer. 107 * @entry: The entry to which this sk buffer belongs. 108 */ 109struct skb_frame_desc { 110 u8 flags; 111 112 u8 desc_len; 113 u8 tx_rate_idx; 114 u8 tx_rate_flags; 115 116 void *desc; 117 118 __le32 iv[2]; 119 120 dma_addr_t skb_dma; 121 122 struct queue_entry *entry; 123}; 124 125/** 126 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff. 127 * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc 128 */ 129static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb) 130{ 131 BUILD_BUG_ON(sizeof(struct skb_frame_desc) > 132 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 133 return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data; 134} 135 136/** 137 * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc 138 * 139 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value. 140 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value. 141 * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value. 142 * @RXDONE_MY_BSS: Does this frame originate from device's BSS. 143 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data. 144 * @RXDONE_CRYPTO_ICV: Driver provided ICV data. 145 * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary. 146 */ 147enum rxdone_entry_desc_flags { 148 RXDONE_SIGNAL_PLCP = BIT(0), 149 RXDONE_SIGNAL_BITRATE = BIT(1), 150 RXDONE_SIGNAL_MCS = BIT(2), 151 RXDONE_MY_BSS = BIT(3), 152 RXDONE_CRYPTO_IV = BIT(4), 153 RXDONE_CRYPTO_ICV = BIT(5), 154 RXDONE_L2PAD = BIT(6), 155}; 156 157/** 158 * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags 159 * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags 160 * from &rxdone_entry_desc to a signal value type. 161 */ 162#define RXDONE_SIGNAL_MASK \ 163 ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS ) 164 165/** 166 * struct rxdone_entry_desc: RX Entry descriptor 167 * 168 * Summary of information that has been read from the RX frame descriptor. 169 * 170 * @timestamp: RX Timestamp 171 * @signal: Signal of the received frame. 172 * @rssi: RSSI of the received frame. 173 * @size: Data size of the received frame. 174 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags). 175 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags). 176 * @rate_mode: Rate mode (See @enum rate_modulation). 177 * @cipher: Cipher type used during decryption. 178 * @cipher_status: Decryption status. 179 * @iv: IV/EIV data used during decryption. 180 * @icv: ICV data used during decryption. 181 */ 182struct rxdone_entry_desc { 183 u64 timestamp; 184 int signal; 185 int rssi; 186 int size; 187 int flags; 188 int dev_flags; 189 u16 rate_mode; 190 u8 cipher; 191 u8 cipher_status; 192 193 __le32 iv[2]; 194 __le32 icv; 195}; 196 197/** 198 * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc 199 * 200 * Every txdone report has to contain the basic result of the 201 * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or 202 * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in 203 * conjunction with all of these flags but should only be set 204 * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used 205 * in conjunction with &TXDONE_FAILURE. 206 * 207 * @TXDONE_UNKNOWN: Hardware could not determine success of transmission. 208 * @TXDONE_SUCCESS: Frame was successfully send 209 * @TXDONE_FALLBACK: Hardware used fallback rates for retries 210 * @TXDONE_FAILURE: Frame was not successfully send 211 * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the 212 * frame transmission failed due to excessive retries. 213 */ 214enum txdone_entry_desc_flags { 215 TXDONE_UNKNOWN, 216 TXDONE_SUCCESS, 217 TXDONE_FALLBACK, 218 TXDONE_FAILURE, 219 TXDONE_EXCESSIVE_RETRY, 220}; 221 222/** 223 * struct txdone_entry_desc: TX done entry descriptor 224 * 225 * Summary of information that has been read from the TX frame descriptor 226 * after the device is done with transmission. 227 * 228 * @flags: TX done flags (See &enum txdone_entry_desc_flags). 229 * @retry: Retry count. 230 */ 231struct txdone_entry_desc { 232 unsigned long flags; 233 int retry; 234}; 235 236/** 237 * enum txentry_desc_flags: Status flags for TX entry descriptor 238 * 239 * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. 240 * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame. 241 * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter. 242 * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame. 243 * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. 244 * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. 245 * @ENTRY_TXD_BURST: This frame belongs to the same burst event. 246 * @ENTRY_TXD_ACK: An ACK is required for this frame. 247 * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used. 248 * @ENTRY_TXD_ENCRYPT: This frame should be encrypted. 249 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared). 250 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware. 251 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware. 252 * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU. 253 * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth. 254 * @ENTRY_TXD_HT_SHORT_GI: Use short GI. 255 * @ENTRY_TXD_HT_MIMO_PS: The receiving STA is in dynamic SM PS mode. 256 */ 257enum txentry_desc_flags { 258 ENTRY_TXD_RTS_FRAME, 259 ENTRY_TXD_CTS_FRAME, 260 ENTRY_TXD_GENERATE_SEQ, 261 ENTRY_TXD_FIRST_FRAGMENT, 262 ENTRY_TXD_MORE_FRAG, 263 ENTRY_TXD_REQ_TIMESTAMP, 264 ENTRY_TXD_BURST, 265 ENTRY_TXD_ACK, 266 ENTRY_TXD_RETRY_MODE, 267 ENTRY_TXD_ENCRYPT, 268 ENTRY_TXD_ENCRYPT_PAIRWISE, 269 ENTRY_TXD_ENCRYPT_IV, 270 ENTRY_TXD_ENCRYPT_MMIC, 271 ENTRY_TXD_HT_AMPDU, 272 ENTRY_TXD_HT_BW_40, 273 ENTRY_TXD_HT_SHORT_GI, 274 ENTRY_TXD_HT_MIMO_PS, 275}; 276 277/** 278 * struct txentry_desc: TX Entry descriptor 279 * 280 * Summary of information for the frame descriptor before sending a TX frame. 281 * 282 * @flags: Descriptor flags (See &enum queue_entry_flags). 283 * @length: Length of the entire frame. 284 * @header_length: Length of 802.11 header. 285 * @length_high: PLCP length high word. 286 * @length_low: PLCP length low word. 287 * @signal: PLCP signal. 288 * @service: PLCP service. 289 * @msc: MCS. 290 * @stbc: STBC. 291 * @ba_size: BA size. 292 * @rate_mode: Rate mode (See @enum rate_modulation). 293 * @mpdu_density: MDPU density. 294 * @retry_limit: Max number of retries. 295 * @ifs: IFS value. 296 * @txop: IFS value for 11n capable chips. 297 * @cipher: Cipher type used for encryption. 298 * @key_idx: Key index used for encryption. 299 * @iv_offset: Position where IV should be inserted by hardware. 300 * @iv_len: Length of IV data. 301 */ 302struct txentry_desc { 303 unsigned long flags; 304 305 u16 length; 306 u16 header_length; 307 308 u16 length_high; 309 u16 length_low; 310 u16 signal; 311 u16 service; 312 313 u16 mcs; 314 u16 stbc; 315 u16 ba_size; 316 u16 rate_mode; 317 u16 mpdu_density; 318 319 short retry_limit; 320 short ifs; 321 short txop; 322 323 enum cipher cipher; 324 u16 key_idx; 325 u16 iv_offset; 326 u16 iv_len; 327}; 328 329/** 330 * enum queue_entry_flags: Status flags for queue entry 331 * 332 * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface. 333 * As long as this bit is set, this entry may only be touched 334 * through the interface structure. 335 * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data 336 * transfer (either TX or RX depending on the queue). The entry should 337 * only be touched after the device has signaled it is done with it. 338 * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting 339 * for the signal to start sending. 340 * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occured 341 * while transfering the data to the hardware. No TX status report will 342 * be expected from the hardware. 343 * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and 344 * returned. It is now waiting for the status reporting before the 345 * entry can be reused again. 346 */ 347enum queue_entry_flags { 348 ENTRY_BCN_ASSIGNED, 349 ENTRY_OWNER_DEVICE_DATA, 350 ENTRY_DATA_PENDING, 351 ENTRY_DATA_IO_FAILED, 352 ENTRY_DATA_STATUS_PENDING, 353}; 354 355/** 356 * struct queue_entry: Entry inside the &struct data_queue 357 * 358 * @flags: Entry flags, see &enum queue_entry_flags. 359 * @queue: The data queue (&struct data_queue) to which this entry belongs. 360 * @skb: The buffer which is currently being transmitted (for TX queue), 361 * or used to directly recieve data in (for RX queue). 362 * @entry_idx: The entry index number. 363 * @priv_data: Private data belonging to this queue entry. The pointer 364 * points to data specific to a particular driver and queue type. 365 */ 366struct queue_entry { 367 unsigned long flags; 368 369 struct data_queue *queue; 370 371 struct sk_buff *skb; 372 373 unsigned int entry_idx; 374 375 void *priv_data; 376}; 377 378/** 379 * enum queue_index: Queue index type 380 * 381 * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is 382 * owned by the hardware then the queue is considered to be full. 383 * @Q_INDEX_DMA_DONE: Index pointer for the next entry which will have been 384 * transfered to the hardware. 385 * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by 386 * the hardware and for which we need to run the txdone handler. If this 387 * entry is not owned by the hardware the queue is considered to be empty. 388 * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size 389 * of the index array. 390 */ 391enum queue_index { 392 Q_INDEX, 393 Q_INDEX_DMA_DONE, 394 Q_INDEX_DONE, 395 Q_INDEX_MAX, 396}; 397 398/** 399 * enum data_queue_flags: Status flags for data queues 400 * 401 * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the 402 * device might be DMA'ing skbuffers. TX queues will accept skbuffers to 403 * be transmitted and beacon queues will start beaconing the configured 404 * beacons. 405 * @QUEUE_PAUSED: The queue has been started but is currently paused. 406 * When this bit is set, the queue has been stopped in mac80211, 407 * preventing new frames to be enqueued. However, a few frames 408 * might still appear shortly after the pausing... 409 */ 410enum data_queue_flags { 411 QUEUE_STARTED, 412 QUEUE_PAUSED, 413}; 414 415/** 416 * struct data_queue: Data queue 417 * 418 * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to. 419 * @entries: Base address of the &struct queue_entry which are 420 * part of this queue. 421 * @qid: The queue identification, see &enum data_queue_qid. 422 * @flags: Entry flags, see &enum queue_entry_flags. 423 * @status_lock: The mutex for protecting the start/stop/flush 424 * handling on this queue. 425 * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or 426 * @index_crypt needs to be changed this lock should be grabbed to prevent 427 * index corruption due to concurrency. 428 * @count: Number of frames handled in the queue. 429 * @limit: Maximum number of entries in the queue. 430 * @threshold: Minimum number of free entries before queue is kicked by force. 431 * @length: Number of frames in queue. 432 * @index: Index pointers to entry positions in the queue, 433 * use &enum queue_index to get a specific index field. 434 * @txop: maximum burst time. 435 * @aifs: The aifs value for outgoing frames (field ignored in RX queue). 436 * @cw_min: The cw min value for outgoing frames (field ignored in RX queue). 437 * @cw_max: The cw max value for outgoing frames (field ignored in RX queue). 438 * @data_size: Maximum data size for the frames in this queue. 439 * @desc_size: Hardware descriptor size for the data in this queue. 440 * @usb_endpoint: Device endpoint used for communication (USB only) 441 * @usb_maxpacket: Max packet size for given endpoint (USB only) 442 */ 443struct data_queue { 444 struct rt2x00_dev *rt2x00dev; 445 struct queue_entry *entries; 446 447 enum data_queue_qid qid; 448 unsigned long flags; 449 450 struct mutex status_lock; 451 spinlock_t index_lock; 452 453 unsigned int count; 454 unsigned short limit; 455 unsigned short threshold; 456 unsigned short length; 457 unsigned short index[Q_INDEX_MAX]; 458 unsigned long last_action[Q_INDEX_MAX]; 459 460 unsigned short txop; 461 unsigned short aifs; 462 unsigned short cw_min; 463 unsigned short cw_max; 464 465 unsigned short data_size; 466 unsigned short desc_size; 467 468 unsigned short usb_endpoint; 469 unsigned short usb_maxpacket; 470}; 471 472/** 473 * struct data_queue_desc: Data queue description 474 * 475 * The information in this structure is used by drivers 476 * to inform rt2x00lib about the creation of the data queue. 477 * 478 * @entry_num: Maximum number of entries for a queue. 479 * @data_size: Maximum data size for the frames in this queue. 480 * @desc_size: Hardware descriptor size for the data in this queue. 481 * @priv_size: Size of per-queue_entry private data. 482 */ 483struct data_queue_desc { 484 unsigned short entry_num; 485 unsigned short data_size; 486 unsigned short desc_size; 487 unsigned short priv_size; 488}; 489 490/** 491 * queue_end - Return pointer to the last queue (HELPER MACRO). 492 * @__dev: Pointer to &struct rt2x00_dev 493 * 494 * Using the base rx pointer and the maximum number of available queues, 495 * this macro will return the address of 1 position beyond the end of the 496 * queues array. 497 */ 498#define queue_end(__dev) \ 499 &(__dev)->rx[(__dev)->data_queues] 500 501/** 502 * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO). 503 * @__dev: Pointer to &struct rt2x00_dev 504 * 505 * Using the base tx pointer and the maximum number of available TX 506 * queues, this macro will return the address of 1 position beyond 507 * the end of the TX queue array. 508 */ 509#define tx_queue_end(__dev) \ 510 &(__dev)->tx[(__dev)->ops->tx_queues] 511 512/** 513 * queue_next - Return pointer to next queue in list (HELPER MACRO). 514 * @__queue: Current queue for which we need the next queue 515 * 516 * Using the current queue address we take the address directly 517 * after the queue to take the next queue. Note that this macro 518 * should be used carefully since it does not protect against 519 * moving past the end of the list. (See macros &queue_end and 520 * &tx_queue_end for determining the end of the queue). 521 */ 522#define queue_next(__queue) \ 523 &(__queue)[1] 524 525/** 526 * queue_loop - Loop through the queues within a specific range (HELPER MACRO). 527 * @__entry: Pointer where the current queue entry will be stored in. 528 * @__start: Start queue pointer. 529 * @__end: End queue pointer. 530 * 531 * This macro will loop through all queues between &__start and &__end. 532 */ 533#define queue_loop(__entry, __start, __end) \ 534 for ((__entry) = (__start); \ 535 prefetch(queue_next(__entry)), (__entry) != (__end);\ 536 (__entry) = queue_next(__entry)) 537 538/** 539 * queue_for_each - Loop through all queues 540 * @__dev: Pointer to &struct rt2x00_dev 541 * @__entry: Pointer where the current queue entry will be stored in. 542 * 543 * This macro will loop through all available queues. 544 */ 545#define queue_for_each(__dev, __entry) \ 546 queue_loop(__entry, (__dev)->rx, queue_end(__dev)) 547 548/** 549 * tx_queue_for_each - Loop through the TX queues 550 * @__dev: Pointer to &struct rt2x00_dev 551 * @__entry: Pointer where the current queue entry will be stored in. 552 * 553 * This macro will loop through all TX related queues excluding 554 * the Beacon and Atim queues. 555 */ 556#define tx_queue_for_each(__dev, __entry) \ 557 queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev)) 558 559/** 560 * txall_queue_for_each - Loop through all TX related queues 561 * @__dev: Pointer to &struct rt2x00_dev 562 * @__entry: Pointer where the current queue entry will be stored in. 563 * 564 * This macro will loop through all TX related queues including 565 * the Beacon and Atim queues. 566 */ 567#define txall_queue_for_each(__dev, __entry) \ 568 queue_loop(__entry, (__dev)->tx, queue_end(__dev)) 569 570/** 571 * rt2x00queue_for_each_entry - Loop through all entries in the queue 572 * @queue: Pointer to @data_queue 573 * @start: &enum queue_index Pointer to start index 574 * @end: &enum queue_index Pointer to end index 575 * @fn: The function to call for each &struct queue_entry 576 * 577 * This will walk through all entries in the queue, in chronological 578 * order. This means it will start at the current @start pointer 579 * and will walk through the queue until it reaches the @end pointer. 580 */ 581void rt2x00queue_for_each_entry(struct data_queue *queue, 582 enum queue_index start, 583 enum queue_index end, 584 void (*fn)(struct queue_entry *entry)); 585 586/** 587 * rt2x00queue_empty - Check if the queue is empty. 588 * @queue: Queue to check if empty. 589 */ 590static inline int rt2x00queue_empty(struct data_queue *queue) 591{ 592 return queue->length == 0; 593} 594 595/** 596 * rt2x00queue_full - Check if the queue is full. 597 * @queue: Queue to check if full. 598 */ 599static inline int rt2x00queue_full(struct data_queue *queue) 600{ 601 return queue->length == queue->limit; 602} 603 604/** 605 * rt2x00queue_free - Check the number of available entries in queue. 606 * @queue: Queue to check. 607 */ 608static inline int rt2x00queue_available(struct data_queue *queue) 609{ 610 return queue->limit - queue->length; 611} 612 613/** 614 * rt2x00queue_threshold - Check if the queue is below threshold 615 * @queue: Queue to check. 616 */ 617static inline int rt2x00queue_threshold(struct data_queue *queue) 618{ 619 return rt2x00queue_available(queue) < queue->threshold; 620} 621 622/** 623 * rt2x00queue_status_timeout - Check if a timeout occured for STATUS reports 624 * @queue: Queue to check. 625 */ 626static inline int rt2x00queue_status_timeout(struct data_queue *queue) 627{ 628 return time_after(queue->last_action[Q_INDEX_DMA_DONE], 629 queue->last_action[Q_INDEX_DONE] + (HZ / 10)); 630} 631 632/** 633 * rt2x00queue_timeout - Check if a timeout occured for DMA transfers 634 * @queue: Queue to check. 635 */ 636static inline int rt2x00queue_dma_timeout(struct data_queue *queue) 637{ 638 return time_after(queue->last_action[Q_INDEX], 639 queue->last_action[Q_INDEX_DMA_DONE] + (HZ / 10)); 640} 641 642/** 643 * _rt2x00_desc_read - Read a word from the hardware descriptor. 644 * @desc: Base descriptor address 645 * @word: Word index from where the descriptor should be read. 646 * @value: Address where the descriptor value should be written into. 647 */ 648static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value) 649{ 650 *value = desc[word]; 651} 652 653/** 654 * rt2x00_desc_read - Read a word from the hardware descriptor, this 655 * function will take care of the byte ordering. 656 * @desc: Base descriptor address 657 * @word: Word index from where the descriptor should be read. 658 * @value: Address where the descriptor value should be written into. 659 */ 660static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value) 661{ 662 __le32 tmp; 663 _rt2x00_desc_read(desc, word, &tmp); 664 *value = le32_to_cpu(tmp); 665} 666 667/** 668 * rt2x00_desc_write - write a word to the hardware descriptor, this 669 * function will take care of the byte ordering. 670 * @desc: Base descriptor address 671 * @word: Word index from where the descriptor should be written. 672 * @value: Value that should be written into the descriptor. 673 */ 674static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value) 675{ 676 desc[word] = value; 677} 678 679/** 680 * rt2x00_desc_write - write a word to the hardware descriptor. 681 * @desc: Base descriptor address 682 * @word: Word index from where the descriptor should be written. 683 * @value: Value that should be written into the descriptor. 684 */ 685static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value) 686{ 687 _rt2x00_desc_write(desc, word, cpu_to_le32(value)); 688} 689 690#endif /* RT2X00QUEUE_H */ 691