1#ifndef dprintk
2# define dprintk(x)
3#endif
4
5#define _nblank(x) #x
6#define nblank(x) _nblank(x)[0]
7
8#include <linux/interrupt.h>
9
10
11
12
13
14#ifndef AAC_DRIVER_BUILD
15# define AAC_DRIVER_BUILD 26400
16# define AAC_DRIVER_BRANCH "-ms"
17#endif
18#define MAXIMUM_NUM_CONTAINERS 32
19
20#define AAC_NUM_MGT_FIB 8
21#define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB)
22#define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
23
24#define AAC_MAX_LUN (8)
25
26#define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
27#define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256)
28
29#define AAC_DEBUG_INSTRUMENT_AIF_DELETE
30
31
32
33
34#define CONTAINER_CHANNEL (0)
35#define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL)
36#define CONTAINER_TO_ID(cont) (cont)
37#define CONTAINER_TO_LUN(cont) (0)
38
39#define aac_phys_to_logical(x) ((x)+1)
40#define aac_logical_to_phys(x) ((x)?(x)-1:0)
41
42
43
44struct diskparm
45{
46 int heads;
47 int sectors;
48 int cylinders;
49};
50
51
52
53
54
55
56#define CT_NONE 0
57#define CT_OK 218
58#define FT_FILESYS 8
59#define FT_DRIVE 9
60
61
62
63
64
65
66
67struct sgentry {
68 __le32 addr;
69 __le32 count;
70};
71
72struct user_sgentry {
73 u32 addr;
74 u32 count;
75};
76
77struct sgentry64 {
78 __le32 addr[2];
79 __le32 count;
80};
81
82struct user_sgentry64 {
83 u32 addr[2];
84 u32 count;
85};
86
87struct sgentryraw {
88 __le32 next;
89 __le32 prev;
90 __le32 addr[2];
91 __le32 count;
92 __le32 flags;
93};
94
95struct user_sgentryraw {
96 u32 next;
97 u32 prev;
98 u32 addr[2];
99 u32 count;
100 u32 flags;
101};
102
103
104
105
106
107
108
109
110struct sgmap {
111 __le32 count;
112 struct sgentry sg[1];
113};
114
115struct user_sgmap {
116 u32 count;
117 struct user_sgentry sg[1];
118};
119
120struct sgmap64 {
121 __le32 count;
122 struct sgentry64 sg[1];
123};
124
125struct user_sgmap64 {
126 u32 count;
127 struct user_sgentry64 sg[1];
128};
129
130struct sgmapraw {
131 __le32 count;
132 struct sgentryraw sg[1];
133};
134
135struct user_sgmapraw {
136 u32 count;
137 struct user_sgentryraw sg[1];
138};
139
140struct creation_info
141{
142 u8 buildnum;
143 u8 usec;
144 u8 via;
145
146
147 u8 year;
148 __le32 date;
149
150
151
152
153
154
155 __le32 serial[2];
156};
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171#define NUMBER_OF_COMM_QUEUES 8
172#define HOST_HIGH_CMD_ENTRIES 4
173#define HOST_NORM_CMD_ENTRIES 8
174#define ADAP_HIGH_CMD_ENTRIES 4
175#define ADAP_NORM_CMD_ENTRIES 512
176#define HOST_HIGH_RESP_ENTRIES 4
177#define HOST_NORM_RESP_ENTRIES 512
178#define ADAP_HIGH_RESP_ENTRIES 4
179#define ADAP_NORM_RESP_ENTRIES 8
180
181#define TOTAL_QUEUE_ENTRIES \
182 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
183 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
184
185
186
187
188
189
190#define QUEUE_ALIGNMENT 16
191
192
193
194
195
196
197
198
199struct aac_entry {
200 __le32 size;
201 __le32 addr;
202};
203
204
205
206
207
208
209struct aac_qhdr {
210 __le64 header_addr;
211
212 __le32 *producer;
213 __le32 *consumer;
214};
215
216
217
218
219
220
221#define HostNormCmdQue 1
222#define HostHighCmdQue 2
223#define HostNormRespQue 3
224#define HostHighRespQue 4
225#define AdapNormRespNotFull 5
226#define AdapHighRespNotFull 6
227#define AdapNormCmdNotFull 7
228#define AdapHighCmdNotFull 8
229#define SynchCommandComplete 9
230#define AdapInternalError 0xfe
231
232
233
234
235
236
237
238#define AdapNormCmdQue 2
239#define AdapHighCmdQue 3
240#define AdapNormRespQue 6
241#define AdapHighRespQue 7
242#define HostShutdown 8
243#define HostPowerFail 9
244#define FatalCommError 10
245#define HostNormRespNotFull 11
246#define HostHighRespNotFull 12
247#define HostNormCmdNotFull 13
248#define HostHighCmdNotFull 14
249#define FastIo 15
250#define AdapPrintfDone 16
251
252
253
254
255
256
257enum aac_queue_types {
258 HostNormCmdQueue = 0,
259 HostHighCmdQueue,
260 AdapNormCmdQueue,
261 AdapHighCmdQueue,
262 HostNormRespQueue,
263 HostHighRespQueue,
264 AdapNormRespQueue,
265 AdapHighRespQueue
266};
267
268
269
270
271
272#define FIB_MAGIC 0x0001
273
274
275
276
277
278#define FsaNormal 1
279
280
281
282
283
284
285struct aac_fibhdr {
286 __le32 XferState;
287 __le16 Command;
288 u8 StructType;
289 u8 Flags;
290 __le16 Size;
291 __le16 SenderSize;
292
293 __le32 SenderFibAddress;
294 __le32 ReceiverFibAddress;
295
296 u32 SenderData;
297 union {
298 struct {
299 __le32 _ReceiverTimeStart;
300
301 __le32 _ReceiverTimeDone;
302
303 } _s;
304 } _u;
305};
306
307struct hw_fib {
308 struct aac_fibhdr header;
309 u8 data[512-sizeof(struct aac_fibhdr)];
310};
311
312
313
314
315
316#define TestCommandResponse 1
317#define TestAdapterCommand 2
318
319
320
321#define LastTestCommand 100
322#define ReinitHostNormCommandQueue 101
323#define ReinitHostHighCommandQueue 102
324#define ReinitHostHighRespQueue 103
325#define ReinitHostNormRespQueue 104
326#define ReinitAdapNormCommandQueue 105
327#define ReinitAdapHighCommandQueue 107
328#define ReinitAdapHighRespQueue 108
329#define ReinitAdapNormRespQueue 109
330#define InterfaceShutdown 110
331#define DmaCommandFib 120
332#define StartProfile 121
333#define TermProfile 122
334#define SpeedTest 123
335#define TakeABreakPt 124
336#define RequestPerfData 125
337#define SetInterruptDefTimer 126
338#define SetInterruptDefCount 127
339#define GetInterruptDefStatus 128
340#define LastCommCommand 129
341
342
343
344#define NuFileSystem 300
345#define UFS 301
346#define HostFileSystem 302
347#define LastFileSystemCommand 303
348
349
350
351#define ContainerCommand 500
352#define ContainerCommand64 501
353#define ContainerRawIo 502
354
355
356
357#define ScsiPortCommand 600
358#define ScsiPortCommand64 601
359
360
361
362#define AifRequest 700
363#define CheckRevision 701
364#define FsaHostShutdown 702
365#define RequestAdapterInfo 703
366#define IsAdapterPaused 704
367#define SendHostTime 705
368#define RequestSupplementAdapterInfo 706
369#define LastMiscCommand 707
370
371
372
373
374
375enum fib_xfer_state {
376 HostOwned = (1<<0),
377 AdapterOwned = (1<<1),
378 FibInitialized = (1<<2),
379 FibEmpty = (1<<3),
380 AllocatedFromPool = (1<<4),
381 SentFromHost = (1<<5),
382 SentFromAdapter = (1<<6),
383 ResponseExpected = (1<<7),
384 NoResponseExpected = (1<<8),
385 AdapterProcessed = (1<<9),
386 HostProcessed = (1<<10),
387 HighPriority = (1<<11),
388 NormalPriority = (1<<12),
389 Async = (1<<13),
390 AsyncIo = (1<<13),
391 PageFileIo = (1<<14),
392 ShutdownRequest = (1<<15),
393 LazyWrite = (1<<16),
394 AdapterMicroFib = (1<<17),
395 BIOSFibPath = (1<<18),
396 FastResponseCapable = (1<<19),
397 ApiFib = (1<<20)
398};
399
400
401
402
403
404
405#define ADAPTER_INIT_STRUCT_REVISION 3
406#define ADAPTER_INIT_STRUCT_REVISION_4 4
407
408struct aac_init
409{
410 __le32 InitStructRevision;
411 __le32 MiniPortRevision;
412 __le32 fsrev;
413 __le32 CommHeaderAddress;
414 __le32 FastIoCommAreaAddress;
415 __le32 AdapterFibsPhysicalAddress;
416 __le32 AdapterFibsVirtualAddress;
417 __le32 AdapterFibsSize;
418 __le32 AdapterFibAlign;
419 __le32 printfbuf;
420 __le32 printfbufsiz;
421 __le32 HostPhysMemPages;
422
423 __le32 HostElapsedSeconds;
424
425
426
427 __le32 InitFlags;
428#define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001
429#define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010
430#define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020
431 __le32 MaxIoCommands;
432 __le32 MaxIoSize;
433 __le32 MaxFibSize;
434};
435
436enum aac_log_level {
437 LOG_AAC_INIT = 10,
438 LOG_AAC_INFORMATIONAL = 20,
439 LOG_AAC_WARNING = 30,
440 LOG_AAC_LOW_ERROR = 40,
441 LOG_AAC_MEDIUM_ERROR = 50,
442 LOG_AAC_HIGH_ERROR = 60,
443 LOG_AAC_PANIC = 70,
444 LOG_AAC_DEBUG = 80,
445 LOG_AAC_WINDBG_PRINT = 90
446};
447
448#define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b
449#define FSAFS_NTC_FIB_CONTEXT 0x030c
450
451struct aac_dev;
452struct fib;
453struct scsi_cmnd;
454
455struct adapter_ops
456{
457
458 void (*adapter_interrupt)(struct aac_dev *dev);
459 void (*adapter_notify)(struct aac_dev *dev, u32 event);
460 void (*adapter_disable_int)(struct aac_dev *dev);
461 void (*adapter_enable_int)(struct aac_dev *dev);
462 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
463 int (*adapter_check_health)(struct aac_dev *dev);
464 int (*adapter_restart)(struct aac_dev *dev, int bled);
465
466 int (*adapter_ioremap)(struct aac_dev * dev, u32 size);
467 irq_handler_t adapter_intr;
468
469 int (*adapter_deliver)(struct fib * fib);
470 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
471 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
472 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
473 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
474
475 int (*adapter_comm)(struct aac_dev * dev, int comm);
476};
477
478
479
480
481
482struct aac_driver_ident
483{
484 int (*init)(struct aac_dev *dev);
485 char * name;
486 char * vname;
487 char * model;
488 u16 channels;
489 int quirks;
490};
491
492
493
494
495
496
497#define AAC_QUIRK_31BIT 0x0001
498
499
500
501
502
503
504#define AAC_QUIRK_34SG 0x0002
505
506
507
508
509#define AAC_QUIRK_SLAVE 0x0004
510
511
512
513
514#define AAC_QUIRK_MASTER 0x0008
515
516
517
518
519
520
521#define AAC_QUIRK_17SG 0x0010
522
523
524
525
526
527#define AAC_QUIRK_SCSI_32 0x0020
528
529
530
531
532
533
534
535
536
537
538
539struct aac_queue {
540 u64 logical;
541 struct aac_entry *base;
542 struct aac_qhdr headers;
543 u32 entries;
544 wait_queue_head_t qfull;
545 wait_queue_head_t cmdready;
546
547 spinlock_t *lock;
548 spinlock_t lockdata;
549 struct list_head cmdq;
550
551 u32 numpending;
552 struct aac_dev * dev;
553};
554
555
556
557
558
559
560struct aac_queue_block
561{
562 struct aac_queue queue[8];
563};
564
565
566
567
568
569struct sa_drawbridge_CSR {
570
571 __le32 reserved[10];
572 u8 LUT_Offset;
573 u8 reserved1[3];
574 __le32 LUT_Data;
575 __le32 reserved2[26];
576 __le16 PRICLEARIRQ;
577 __le16 SECCLEARIRQ;
578 __le16 PRISETIRQ;
579 __le16 SECSETIRQ;
580 __le16 PRICLEARIRQMASK;
581 __le16 SECCLEARIRQMASK;
582 __le16 PRISETIRQMASK;
583 __le16 SECSETIRQMASK;
584 __le32 MAILBOX0;
585 __le32 MAILBOX1;
586 __le32 MAILBOX2;
587 __le32 MAILBOX3;
588 __le32 MAILBOX4;
589 __le32 MAILBOX5;
590 __le32 MAILBOX6;
591 __le32 MAILBOX7;
592 __le32 ROM_Setup_Data;
593 __le32 ROM_Control_Addr;
594 __le32 reserved3[12];
595 __le32 LUT[64];
596};
597
598#define Mailbox0 SaDbCSR.MAILBOX0
599#define Mailbox1 SaDbCSR.MAILBOX1
600#define Mailbox2 SaDbCSR.MAILBOX2
601#define Mailbox3 SaDbCSR.MAILBOX3
602#define Mailbox4 SaDbCSR.MAILBOX4
603#define Mailbox5 SaDbCSR.MAILBOX5
604#define Mailbox6 SaDbCSR.MAILBOX6
605#define Mailbox7 SaDbCSR.MAILBOX7
606
607#define DoorbellReg_p SaDbCSR.PRISETIRQ
608#define DoorbellReg_s SaDbCSR.SECSETIRQ
609#define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
610
611
612#define DOORBELL_0 0x0001
613#define DOORBELL_1 0x0002
614#define DOORBELL_2 0x0004
615#define DOORBELL_3 0x0008
616#define DOORBELL_4 0x0010
617#define DOORBELL_5 0x0020
618#define DOORBELL_6 0x0040
619
620
621#define PrintfReady DOORBELL_5
622#define PrintfDone DOORBELL_5
623
624struct sa_registers {
625 struct sa_drawbridge_CSR SaDbCSR;
626};
627
628
629#define Sa_MINIPORT_REVISION 1
630
631#define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
632#define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR))
633#define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR))
634#define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR))
635
636
637
638
639
640struct rx_mu_registers {
641
642 __le32 ARSR;
643 __le32 reserved0;
644 __le32 AWR;
645 __le32 reserved1;
646 __le32 IMRx[2];
647 __le32 OMRx[2];
648 __le32 IDR;
649 __le32 IISR;
650
651 __le32 IIMR;
652
653 __le32 ODR;
654 __le32 OISR;
655
656 __le32 OIMR;
657
658 __le32 reserved2;
659 __le32 reserved3;
660 __le32 InboundQueue;
661 __le32 OutboundQueue;
662
663
664};
665
666struct rx_inbound {
667 __le32 Mailbox[8];
668};
669
670#define INBOUNDDOORBELL_0 0x00000001
671#define INBOUNDDOORBELL_1 0x00000002
672#define INBOUNDDOORBELL_2 0x00000004
673#define INBOUNDDOORBELL_3 0x00000008
674#define INBOUNDDOORBELL_4 0x00000010
675#define INBOUNDDOORBELL_5 0x00000020
676#define INBOUNDDOORBELL_6 0x00000040
677
678#define OUTBOUNDDOORBELL_0 0x00000001
679#define OUTBOUNDDOORBELL_1 0x00000002
680#define OUTBOUNDDOORBELL_2 0x00000004
681#define OUTBOUNDDOORBELL_3 0x00000008
682#define OUTBOUNDDOORBELL_4 0x00000010
683
684#define InboundDoorbellReg MUnit.IDR
685#define OutboundDoorbellReg MUnit.ODR
686
687struct rx_registers {
688 struct rx_mu_registers MUnit;
689 __le32 reserved1[2];
690 struct rx_inbound IndexRegs;
691};
692
693#define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR))
694#define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR))
695#define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR))
696#define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR))
697
698
699
700
701
702#define rkt_mu_registers rx_mu_registers
703#define rkt_inbound rx_inbound
704
705struct rkt_registers {
706 struct rkt_mu_registers MUnit;
707 __le32 reserved1[1006];
708 struct rkt_inbound IndexRegs;
709};
710
711#define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR))
712#define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR))
713#define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR))
714#define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR))
715
716typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
717
718struct aac_fib_context {
719 s16 type;
720 s16 size;
721 u32 unique;
722 ulong jiffies;
723 struct list_head next;
724 struct semaphore wait_sem;
725 int wait;
726 unsigned long count;
727 struct list_head fib_list;
728};
729
730struct sense_data {
731 u8 error_code;
732 u8 valid:1;
733
734
735
736 u8 segment_number;
737 u8 sense_key:4;
738 u8 reserved:1;
739 u8 ILI:1;
740 u8 EOM:1;
741 u8 filemark:1;
742
743 u8 information[4];
744
745
746
747 u8 add_sense_len;
748 u8 cmnd_info[4];
749 u8 ASC;
750 u8 ASCQ;
751 u8 FRUC;
752 u8 bit_ptr:3;
753
754
755 u8 BPV:1;
756
757
758 u8 reserved2:2;
759 u8 CD:1;
760
761
762 u8 SKSV:1;
763 u8 field_ptr[2];
764};
765
766struct fsa_dev_info {
767 u64 last;
768 u64 size;
769 u32 type;
770 u32 config_waiting_on;
771 unsigned long config_waiting_stamp;
772 u16 queue_depth;
773 u8 config_needed;
774 u8 valid;
775 u8 ro;
776 u8 locked;
777 u8 deleted;
778 char devname[8];
779 struct sense_data sense_data;
780};
781
782struct fib {
783 void *next;
784 s16 type;
785 s16 size;
786
787
788
789 struct aac_dev *dev;
790
791
792
793
794 struct semaphore event_wait;
795 spinlock_t event_lock;
796
797 u32 done;
798 fib_callback callback;
799 void *callback_data;
800 u32 flags;
801
802
803
804
805 struct list_head fiblink;
806 void *data;
807 struct hw_fib *hw_fib_va;
808 dma_addr_t hw_fib_pa;
809};
810
811
812
813
814
815
816
817struct aac_adapter_info
818{
819 __le32 platform;
820 __le32 cpu;
821 __le32 subcpu;
822 __le32 clock;
823 __le32 execmem;
824 __le32 buffermem;
825 __le32 totalmem;
826 __le32 kernelrev;
827 __le32 kernelbuild;
828 __le32 monitorrev;
829 __le32 monitorbuild;
830 __le32 hwrev;
831 __le32 hwbuild;
832 __le32 biosrev;
833 __le32 biosbuild;
834 __le32 cluster;
835 __le32 clusterchannelmask;
836 __le32 serial[2];
837 __le32 battery;
838 __le32 options;
839 __le32 OEM;
840};
841
842struct aac_supplement_adapter_info
843{
844 u8 AdapterTypeText[17+1];
845 u8 Pad[2];
846 __le32 FlashMemoryByteSize;
847 __le32 FlashImageId;
848 __le32 MaxNumberPorts;
849 __le32 Version;
850 __le32 FeatureBits;
851 u8 SlotNumber;
852 u8 ReservedPad0[3];
853 u8 BuildDate[12];
854 __le32 CurrentNumberPorts;
855 struct {
856 u8 AssemblyPn[8];
857 u8 FruPn[8];
858 u8 BatteryFruPn[8];
859 u8 EcVersionString[8];
860 u8 Tsid[12];
861 } VpdInfo;
862 __le32 FlashFirmwareRevision;
863 __le32 FlashFirmwareBuild;
864 __le32 RaidTypeMorphOptions;
865 __le32 FlashFirmwareBootRevision;
866 __le32 FlashFirmwareBootBuild;
867 u8 MfgPcbaSerialNo[12];
868 u8 MfgWWNName[8];
869 __le32 SupportedOptions2;
870 __le32 StructExpansion;
871
872 __le32 FeatureBits3;
873 __le32 SupportedPerformanceModes;
874 __le32 ReservedForFutureGrowth[80];
875};
876#define AAC_FEATURE_FALCON cpu_to_le32(0x00000010)
877#define AAC_FEATURE_JBOD cpu_to_le32(0x08000000)
878
879#define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001)
880#define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002)
881#define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004)
882#define AAC_SIS_VERSION_V3 3
883#define AAC_SIS_SLOT_UNKNOWN 0xFF
884
885#define GetBusInfo 0x00000009
886struct aac_bus_info {
887 __le32 Command;
888 __le32 ObjType;
889 __le32 MethodId;
890 __le32 ObjectId;
891 __le32 CtlCmd;
892};
893
894struct aac_bus_info_response {
895 __le32 Status;
896 __le32 ObjType;
897 __le32 MethodId;
898 __le32 ObjectId;
899 __le32 CtlCmd;
900 __le32 ProbeComplete;
901 __le32 BusCount;
902 __le32 TargetsPerBus;
903 u8 InitiatorBusId[10];
904 u8 BusValid[10];
905};
906
907
908
909
910#define AAC_BAT_REQ_PRESENT (1)
911#define AAC_BAT_REQ_NOTPRESENT (2)
912#define AAC_BAT_OPT_PRESENT (3)
913#define AAC_BAT_OPT_NOTPRESENT (4)
914#define AAC_BAT_NOT_SUPPORTED (5)
915
916
917
918#define AAC_CPU_SIMULATOR (1)
919#define AAC_CPU_I960 (2)
920#define AAC_CPU_STRONGARM (3)
921
922
923
924
925#define AAC_OPT_SNAPSHOT cpu_to_le32(1)
926#define AAC_OPT_CLUSTERS cpu_to_le32(1<<1)
927#define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2)
928#define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3)
929#define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4)
930#define AAC_OPT_RAID50 cpu_to_le32(1<<5)
931#define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6)
932#define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7)
933#define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8)
934#define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9)
935#define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10)
936#define AAC_OPT_ALARM cpu_to_le32(1<<11)
937#define AAC_OPT_NONDASD cpu_to_le32(1<<12)
938#define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13)
939#define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14)
940#define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
941#define AAC_OPT_NEW_COMM cpu_to_le32(1<<17)
942#define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18)
943
944struct aac_dev
945{
946 struct list_head entry;
947 const char *name;
948 int id;
949
950
951
952
953 unsigned max_fib_size;
954 unsigned sg_tablesize;
955
956
957
958
959 dma_addr_t hw_fib_pa;
960 struct hw_fib *hw_fib_va;
961 struct hw_fib *aif_base_va;
962
963
964
965 struct fib *fibs;
966
967 struct fib *free_fib;
968 spinlock_t fib_lock;
969
970 struct aac_queue_block *queues;
971
972
973
974
975
976
977
978 struct list_head fib_list;
979
980 struct adapter_ops a_ops;
981 unsigned long fsrev;
982
983 unsigned base_size;
984 struct aac_init *init;
985 dma_addr_t init_pa;
986
987 struct pci_dev *pdev;
988 void * printfbuf;
989 void * comm_addr;
990 dma_addr_t comm_phys;
991 size_t comm_size;
992
993 struct Scsi_Host *scsi_host_ptr;
994 int maximum_num_containers;
995 int maximum_num_physicals;
996 int maximum_num_channels;
997 struct fsa_dev_info *fsa_dev;
998 struct task_struct *thread;
999 int cardtype;
1000
1001
1002
1003
1004#ifndef AAC_MIN_FOOTPRINT_SIZE
1005# define AAC_MIN_FOOTPRINT_SIZE 8192
1006#endif
1007 union
1008 {
1009 struct sa_registers __iomem *sa;
1010 struct rx_registers __iomem *rx;
1011 struct rkt_registers __iomem *rkt;
1012 } regs;
1013 volatile void __iomem *base;
1014 volatile struct rx_inbound __iomem *IndexRegs;
1015 u32 OIMR;
1016
1017
1018
1019 u32 aif_thread;
1020 struct aac_adapter_info adapter_info;
1021 struct aac_supplement_adapter_info supplement_adapter_info;
1022
1023
1024
1025 u8 nondasd_support;
1026 u8 jbod;
1027 u8 cache_protected;
1028 u8 dac_support;
1029 u8 needs_dac;
1030 u8 raid_scsi_mode;
1031 u8 comm_interface;
1032# define AAC_COMM_PRODUCER 0
1033# define AAC_COMM_MESSAGE 1
1034
1035# define raw_io_interface \
1036 init->InitStructRevision==cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4)
1037 u8 raw_io_64;
1038 u8 printf_enabled;
1039 u8 in_reset;
1040 u8 msi;
1041 int management_fib_count;
1042 spinlock_t manage_lock;
1043
1044};
1045
1046#define aac_adapter_interrupt(dev) \
1047 (dev)->a_ops.adapter_interrupt(dev)
1048
1049#define aac_adapter_notify(dev, event) \
1050 (dev)->a_ops.adapter_notify(dev, event)
1051
1052#define aac_adapter_disable_int(dev) \
1053 (dev)->a_ops.adapter_disable_int(dev)
1054
1055#define aac_adapter_enable_int(dev) \
1056 (dev)->a_ops.adapter_enable_int(dev)
1057
1058#define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1059 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1060
1061#define aac_adapter_check_health(dev) \
1062 (dev)->a_ops.adapter_check_health(dev)
1063
1064#define aac_adapter_restart(dev,bled) \
1065 (dev)->a_ops.adapter_restart(dev,bled)
1066
1067#define aac_adapter_ioremap(dev, size) \
1068 (dev)->a_ops.adapter_ioremap(dev, size)
1069
1070#define aac_adapter_deliver(fib) \
1071 ((fib)->dev)->a_ops.adapter_deliver(fib)
1072
1073#define aac_adapter_bounds(dev,cmd,lba) \
1074 dev->a_ops.adapter_bounds(dev,cmd,lba)
1075
1076#define aac_adapter_read(fib,cmd,lba,count) \
1077 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1078
1079#define aac_adapter_write(fib,cmd,lba,count,fua) \
1080 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1081
1082#define aac_adapter_scsi(fib,cmd) \
1083 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1084
1085#define aac_adapter_comm(dev,comm) \
1086 (dev)->a_ops.adapter_comm(dev, comm)
1087
1088#define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001)
1089#define FIB_CONTEXT_FLAG (0x00000002)
1090
1091
1092
1093
1094
1095#define Null 0
1096#define GetAttributes 1
1097#define SetAttributes 2
1098#define Lookup 3
1099#define ReadLink 4
1100#define Read 5
1101#define Write 6
1102#define Create 7
1103#define MakeDirectory 8
1104#define SymbolicLink 9
1105#define MakeNode 10
1106#define Removex 11
1107#define RemoveDirectoryx 12
1108#define Rename 13
1109#define Link 14
1110#define ReadDirectory 15
1111#define ReadDirectoryPlus 16
1112#define FileSystemStatus 17
1113#define FileSystemInfo 18
1114#define PathConfigure 19
1115#define Commit 20
1116#define Mount 21
1117#define UnMount 22
1118#define Newfs 23
1119#define FsCheck 24
1120#define FsSync 25
1121#define SimReadWrite 26
1122#define SetFileSystemStatus 27
1123#define BlockRead 28
1124#define BlockWrite 29
1125#define NvramIoctl 30
1126#define FsSyncWait 31
1127#define ClearArchiveBit 32
1128#define SetAcl 33
1129#define GetAcl 34
1130#define AssignAcl 35
1131#define FaultInsertion 36
1132#define CrazyCache 37
1133
1134#define MAX_FSACOMMAND_NUM 38
1135
1136
1137
1138
1139
1140
1141
1142#define ST_OK 0
1143#define ST_PERM 1
1144#define ST_NOENT 2
1145#define ST_IO 5
1146#define ST_NXIO 6
1147#define ST_E2BIG 7
1148#define ST_ACCES 13
1149#define ST_EXIST 17
1150#define ST_XDEV 18
1151#define ST_NODEV 19
1152#define ST_NOTDIR 20
1153#define ST_ISDIR 21
1154#define ST_INVAL 22
1155#define ST_FBIG 27
1156#define ST_NOSPC 28
1157#define ST_ROFS 30
1158#define ST_MLINK 31
1159#define ST_WOULDBLOCK 35
1160#define ST_NAMETOOLONG 63
1161#define ST_NOTEMPTY 66
1162#define ST_DQUOT 69
1163#define ST_STALE 70
1164#define ST_REMOTE 71
1165#define ST_NOT_READY 72
1166#define ST_BADHANDLE 10001
1167#define ST_NOT_SYNC 10002
1168#define ST_BAD_COOKIE 10003
1169#define ST_NOTSUPP 10004
1170#define ST_TOOSMALL 10005
1171#define ST_SERVERFAULT 10006
1172#define ST_BADTYPE 10007
1173#define ST_JUKEBOX 10008
1174#define ST_NOTMOUNTED 10009
1175#define ST_MAINTMODE 10010
1176#define ST_STALEACL 10011
1177
1178
1179
1180
1181
1182#define CACHE_CSTABLE 1
1183#define CACHE_UNSTABLE 2
1184
1185
1186
1187
1188
1189
1190#define CMFILE_SYNCH_NVRAM 1
1191#define CMDATA_SYNCH_NVRAM 2
1192#define CMFILE_SYNCH 3
1193#define CMDATA_SYNCH 4
1194#define CMUNSTABLE 5
1195
1196struct aac_read
1197{
1198 __le32 command;
1199 __le32 cid;
1200 __le32 block;
1201 __le32 count;
1202 struct sgmap sg;
1203};
1204
1205struct aac_read64
1206{
1207 __le32 command;
1208 __le16 cid;
1209 __le16 sector_count;
1210 __le32 block;
1211 __le16 pad;
1212 __le16 flags;
1213 struct sgmap64 sg;
1214};
1215
1216struct aac_read_reply
1217{
1218 __le32 status;
1219 __le32 count;
1220};
1221
1222struct aac_write
1223{
1224 __le32 command;
1225 __le32 cid;
1226 __le32 block;
1227 __le32 count;
1228 __le32 stable;
1229 struct sgmap sg;
1230};
1231
1232struct aac_write64
1233{
1234 __le32 command;
1235 __le16 cid;
1236 __le16 sector_count;
1237 __le32 block;
1238 __le16 pad;
1239 __le16 flags;
1240#define IO_TYPE_WRITE 0x00000000
1241#define IO_TYPE_READ 0x00000001
1242#define IO_SUREWRITE 0x00000008
1243 struct sgmap64 sg;
1244};
1245struct aac_write_reply
1246{
1247 __le32 status;
1248 __le32 count;
1249 __le32 committed;
1250};
1251
1252struct aac_raw_io
1253{
1254 __le32 block[2];
1255 __le32 count;
1256 __le16 cid;
1257 __le16 flags;
1258 __le16 bpTotal;
1259 __le16 bpComplete;
1260 struct sgmapraw sg;
1261};
1262
1263#define CT_FLUSH_CACHE 129
1264struct aac_synchronize {
1265 __le32 command;
1266 __le32 type;
1267 __le32 cid;
1268 __le32 parm1;
1269 __le32 parm2;
1270 __le32 parm3;
1271 __le32 parm4;
1272 __le32 count;
1273};
1274
1275struct aac_synchronize_reply {
1276 __le32 dummy0;
1277 __le32 dummy1;
1278 __le32 status;
1279 __le32 parm1;
1280 __le32 parm2;
1281 __le32 parm3;
1282 __le32 parm4;
1283 __le32 parm5;
1284 u8 data[16];
1285};
1286
1287#define CT_POWER_MANAGEMENT 245
1288#define CT_PM_START_UNIT 2
1289#define CT_PM_STOP_UNIT 3
1290#define CT_PM_UNIT_IMMEDIATE 1
1291struct aac_power_management {
1292 __le32 command;
1293 __le32 type;
1294 __le32 sub;
1295 __le32 cid;
1296 __le32 parm;
1297};
1298
1299#define CT_PAUSE_IO 65
1300#define CT_RELEASE_IO 66
1301struct aac_pause {
1302 __le32 command;
1303 __le32 type;
1304 __le32 timeout;
1305 __le32 min;
1306 __le32 noRescan;
1307 __le32 parm3;
1308 __le32 parm4;
1309 __le32 count;
1310};
1311
1312struct aac_srb
1313{
1314 __le32 function;
1315 __le32 channel;
1316 __le32 id;
1317 __le32 lun;
1318 __le32 timeout;
1319 __le32 flags;
1320 __le32 count;
1321 __le32 retry_limit;
1322 __le32 cdb_size;
1323 u8 cdb[16];
1324 struct sgmap sg;
1325};
1326
1327
1328
1329
1330
1331struct user_aac_srb
1332{
1333 u32 function;
1334 u32 channel;
1335 u32 id;
1336 u32 lun;
1337 u32 timeout;
1338 u32 flags;
1339 u32 count;
1340 u32 retry_limit;
1341 u32 cdb_size;
1342 u8 cdb[16];
1343 struct user_sgmap sg;
1344};
1345
1346#define AAC_SENSE_BUFFERSIZE 30
1347
1348struct aac_srb_reply
1349{
1350 __le32 status;
1351 __le32 srb_status;
1352 __le32 scsi_status;
1353 __le32 data_xfer_length;
1354 __le32 sense_data_size;
1355 u8 sense_data[AAC_SENSE_BUFFERSIZE];
1356};
1357
1358
1359
1360#define SRB_NoDataXfer 0x0000
1361#define SRB_DisableDisconnect 0x0004
1362#define SRB_DisableSynchTransfer 0x0008
1363#define SRB_BypassFrozenQueue 0x0010
1364#define SRB_DisableAutosense 0x0020
1365#define SRB_DataIn 0x0040
1366#define SRB_DataOut 0x0080
1367
1368
1369
1370
1371#define SRBF_ExecuteScsi 0x0000
1372#define SRBF_ClaimDevice 0x0001
1373#define SRBF_IO_Control 0x0002
1374#define SRBF_ReceiveEvent 0x0003
1375#define SRBF_ReleaseQueue 0x0004
1376#define SRBF_AttachDevice 0x0005
1377#define SRBF_ReleaseDevice 0x0006
1378#define SRBF_Shutdown 0x0007
1379#define SRBF_Flush 0x0008
1380#define SRBF_AbortCommand 0x0010
1381#define SRBF_ReleaseRecovery 0x0011
1382#define SRBF_ResetBus 0x0012
1383#define SRBF_ResetDevice 0x0013
1384#define SRBF_TerminateIO 0x0014
1385#define SRBF_FlushQueue 0x0015
1386#define SRBF_RemoveDevice 0x0016
1387#define SRBF_DomainValidation 0x0017
1388
1389
1390
1391
1392#define SRB_STATUS_PENDING 0x00
1393#define SRB_STATUS_SUCCESS 0x01
1394#define SRB_STATUS_ABORTED 0x02
1395#define SRB_STATUS_ABORT_FAILED 0x03
1396#define SRB_STATUS_ERROR 0x04
1397#define SRB_STATUS_BUSY 0x05
1398#define SRB_STATUS_INVALID_REQUEST 0x06
1399#define SRB_STATUS_INVALID_PATH_ID 0x07
1400#define SRB_STATUS_NO_DEVICE 0x08
1401#define SRB_STATUS_TIMEOUT 0x09
1402#define SRB_STATUS_SELECTION_TIMEOUT 0x0A
1403#define SRB_STATUS_COMMAND_TIMEOUT 0x0B
1404#define SRB_STATUS_MESSAGE_REJECTED 0x0D
1405#define SRB_STATUS_BUS_RESET 0x0E
1406#define SRB_STATUS_PARITY_ERROR 0x0F
1407#define SRB_STATUS_REQUEST_SENSE_FAILED 0x10
1408#define SRB_STATUS_NO_HBA 0x11
1409#define SRB_STATUS_DATA_OVERRUN 0x12
1410#define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13
1411#define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14
1412#define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15
1413#define SRB_STATUS_REQUEST_FLUSHED 0x16
1414#define SRB_STATUS_DELAYED_RETRY 0x17
1415#define SRB_STATUS_INVALID_LUN 0x20
1416#define SRB_STATUS_INVALID_TARGET_ID 0x21
1417#define SRB_STATUS_BAD_FUNCTION 0x22
1418#define SRB_STATUS_ERROR_RECOVERY 0x23
1419#define SRB_STATUS_NOT_STARTED 0x24
1420#define SRB_STATUS_NOT_IN_USE 0x30
1421#define SRB_STATUS_FORCE_ABORT 0x31
1422#define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32
1423
1424
1425
1426
1427
1428#define VM_Null 0
1429#define VM_NameServe 1
1430#define VM_ContainerConfig 2
1431#define VM_Ioctl 3
1432#define VM_FilesystemIoctl 4
1433#define VM_CloseAll 5
1434#define VM_CtBlockRead 6
1435#define VM_CtBlockWrite 7
1436#define VM_SliceBlockRead 8
1437#define VM_SliceBlockWrite 9
1438#define VM_DriveBlockRead 10
1439#define VM_DriveBlockWrite 11
1440#define VM_EnclosureMgt 12
1441#define VM_Unused 13
1442#define VM_CtBlockVerify 14
1443#define VM_CtPerf 15
1444#define VM_CtBlockRead64 16
1445#define VM_CtBlockWrite64 17
1446#define VM_CtBlockVerify64 18
1447#define VM_CtHostRead64 19
1448#define VM_CtHostWrite64 20
1449#define VM_DrvErrTblLog 21
1450#define VM_NameServe64 22
1451
1452#define MAX_VMCOMMAND_NUM 23
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462struct aac_fsinfo {
1463 __le32 fsTotalSize;
1464 __le32 fsBlockSize;
1465 __le32 fsFragSize;
1466 __le32 fsMaxExtendSize;
1467 __le32 fsSpaceUnits;
1468 __le32 fsMaxNumFiles;
1469 __le32 fsNumFreeFiles;
1470 __le32 fsInodeDensity;
1471};
1472
1473union aac_contentinfo {
1474 struct aac_fsinfo filesys;
1475};
1476
1477
1478
1479
1480
1481#define CT_GET_CONFIG_STATUS 147
1482struct aac_get_config_status {
1483 __le32 command;
1484 __le32 type;
1485 __le32 parm1;
1486 __le32 parm2;
1487 __le32 parm3;
1488 __le32 parm4;
1489 __le32 parm5;
1490 __le32 count;
1491};
1492
1493#define CFACT_CONTINUE 0
1494#define CFACT_PAUSE 1
1495#define CFACT_ABORT 2
1496struct aac_get_config_status_resp {
1497 __le32 response;
1498 __le32 dummy0;
1499 __le32 status;
1500 __le32 parm1;
1501 __le32 parm2;
1502 __le32 parm3;
1503 __le32 parm4;
1504 __le32 parm5;
1505 struct {
1506 __le32 action;
1507 __le16 flags;
1508 __le16 count;
1509 } data;
1510};
1511
1512
1513
1514
1515
1516#define CT_COMMIT_CONFIG 152
1517
1518struct aac_commit_config {
1519 __le32 command;
1520 __le32 type;
1521};
1522
1523
1524
1525
1526
1527#define CT_GET_CONTAINER_COUNT 4
1528struct aac_get_container_count {
1529 __le32 command;
1530 __le32 type;
1531};
1532
1533struct aac_get_container_count_resp {
1534 __le32 response;
1535 __le32 dummy0;
1536 __le32 MaxContainers;
1537 __le32 ContainerSwitchEntries;
1538 __le32 MaxPartitions;
1539};
1540
1541
1542
1543
1544
1545
1546
1547struct aac_mntent {
1548 __le32 oid;
1549 u8 name[16];
1550 struct creation_info create_info;
1551 __le32 capacity;
1552 __le32 vol;
1553 __le32 obj;
1554 __le32 state;
1555
1556 union aac_contentinfo fileinfo;
1557
1558 __le32 altoid;
1559
1560 __le32 capacityhigh;
1561};
1562
1563#define FSCS_NOTCLEAN 0x0001
1564#define FSCS_READONLY 0x0002
1565#define FSCS_HIDDEN 0x0004
1566#define FSCS_NOT_READY 0x0008
1567
1568struct aac_query_mount {
1569 __le32 command;
1570 __le32 type;
1571 __le32 count;
1572};
1573
1574struct aac_mount {
1575 __le32 status;
1576 __le32 type;
1577 __le32 count;
1578 struct aac_mntent mnt[1];
1579};
1580
1581#define CT_READ_NAME 130
1582struct aac_get_name {
1583 __le32 command;
1584 __le32 type;
1585 __le32 cid;
1586 __le32 parm1;
1587 __le32 parm2;
1588 __le32 parm3;
1589 __le32 parm4;
1590 __le32 count;
1591};
1592
1593struct aac_get_name_resp {
1594 __le32 dummy0;
1595 __le32 dummy1;
1596 __le32 status;
1597 __le32 parm1;
1598 __le32 parm2;
1599 __le32 parm3;
1600 __le32 parm4;
1601 __le32 parm5;
1602 u8 data[16];
1603};
1604
1605#define CT_CID_TO_32BITS_UID 165
1606struct aac_get_serial {
1607 __le32 command;
1608 __le32 type;
1609 __le32 cid;
1610};
1611
1612struct aac_get_serial_resp {
1613 __le32 dummy0;
1614 __le32 dummy1;
1615 __le32 status;
1616 __le32 uid;
1617};
1618
1619
1620
1621
1622
1623struct aac_close {
1624 __le32 command;
1625 __le32 cid;
1626};
1627
1628struct aac_query_disk
1629{
1630 s32 cnum;
1631 s32 bus;
1632 s32 id;
1633 s32 lun;
1634 u32 valid;
1635 u32 locked;
1636 u32 deleted;
1637 s32 instance;
1638 s8 name[10];
1639 u32 unmapped;
1640};
1641
1642struct aac_delete_disk {
1643 u32 disknum;
1644 u32 cnum;
1645};
1646
1647struct fib_ioctl
1648{
1649 u32 fibctx;
1650 s32 wait;
1651 char __user *fib;
1652};
1653
1654struct revision
1655{
1656 u32 compat;
1657 __le32 version;
1658 __le32 build;
1659};
1660
1661
1662
1663
1664
1665
1666#define CTL_CODE(function, method) ( \
1667 (4<< 16) | ((function) << 2) | (method) \
1668)
1669
1670
1671
1672
1673
1674
1675#define METHOD_BUFFERED 0
1676#define METHOD_NEITHER 3
1677
1678
1679
1680
1681
1682#define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED)
1683#define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED)
1684#define FSACTL_DELETE_DISK 0x163
1685#define FSACTL_QUERY_DISK 0x173
1686#define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED)
1687#define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED)
1688#define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED)
1689#define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED)
1690#define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED)
1691#define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER)
1692#define FSACTL_GET_CONTAINERS 2131
1693#define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED)
1694
1695
1696struct aac_common
1697{
1698
1699
1700
1701
1702 u32 irq_mod;
1703 u32 peak_fibs;
1704 u32 zero_fibs;
1705 u32 fib_timeouts;
1706
1707
1708
1709#ifdef DBG
1710 u32 FibsSent;
1711 u32 FibRecved;
1712 u32 NoResponseSent;
1713 u32 NoResponseRecved;
1714 u32 AsyncSent;
1715 u32 AsyncRecved;
1716 u32 NormalSent;
1717 u32 NormalRecved;
1718#endif
1719};
1720
1721extern struct aac_common aac_config;
1722
1723
1724
1725
1726
1727
1728
1729#ifdef DBG
1730#define FIB_COUNTER_INCREMENT(counter) (counter)++
1731#else
1732#define FIB_COUNTER_INCREMENT(counter)
1733#endif
1734
1735
1736
1737
1738
1739
1740#define BREAKPOINT_REQUEST 0x00000004
1741#define INIT_STRUCT_BASE_ADDRESS 0x00000005
1742#define READ_PERMANENT_PARAMETERS 0x0000000a
1743#define WRITE_PERMANENT_PARAMETERS 0x0000000b
1744#define HOST_CRASHING 0x0000000d
1745#define SEND_SYNCHRONOUS_FIB 0x0000000c
1746#define COMMAND_POST_RESULTS 0x00000014
1747#define GET_ADAPTER_PROPERTIES 0x00000019
1748#define GET_DRIVER_BUFFER_PROPERTIES 0x00000023
1749#define RCV_TEMP_READINGS 0x00000025
1750#define GET_COMM_PREFERRED_SETTINGS 0x00000026
1751#define IOP_RESET 0x00001000
1752#define IOP_RESET_ALWAYS 0x00001001
1753#define RE_INIT_ADAPTER 0x000000ee
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776#define SELF_TEST_FAILED 0x00000004
1777#define MONITOR_PANIC 0x00000020
1778#define KERNEL_UP_AND_RUNNING 0x00000080
1779#define KERNEL_PANIC 0x00000100
1780
1781
1782
1783
1784
1785#define DoorBellSyncCmdAvailable (1<<0)
1786#define DoorBellPrintfDone (1<<5)
1787#define DoorBellAdapterNormCmdReady (1<<1)
1788#define DoorBellAdapterNormRespReady (1<<2)
1789#define DoorBellAdapterNormCmdNotFull (1<<3)
1790#define DoorBellAdapterNormRespNotFull (1<<4)
1791#define DoorBellPrintfReady (1<<5)
1792
1793
1794
1795
1796
1797
1798#define AifCmdEventNotify 1
1799#define AifEnConfigChange 3
1800#define AifEnContainerChange 4
1801#define AifEnDeviceFailure 5
1802#define AifEnEnclosureManagement 13
1803#define EM_DRIVE_INSERTION 31
1804#define EM_DRIVE_REMOVAL 32
1805#define AifEnBatteryEvent 14
1806#define AifEnAddContainer 15
1807#define AifEnDeleteContainer 16
1808#define AifEnExpEvent 23
1809#define AifExeFirmwarePanic 3
1810#define AifHighPriority 3
1811#define AifEnAddJBOD 30
1812#define AifEnDeleteJBOD 31
1813
1814#define AifCmdJobProgress 2
1815#define AifJobCtrZero 101
1816#define AifJobStsSuccess 1
1817#define AifJobStsRunning 102
1818#define AifCmdAPIReport 3
1819#define AifCmdDriverNotify 4
1820#define AifDenMorphComplete 200
1821#define AifDenVolumeExtendComplete 201
1822#define AifReqJobList 100
1823#define AifReqJobsForCtr 101
1824#define AifReqJobsForScsi 102
1825#define AifReqJobReport 103
1826#define AifReqTerminateJob 104
1827#define AifReqSuspendJob 105
1828#define AifReqResumeJob 106
1829#define AifReqSendAPIReport 107
1830#define AifReqAPIJobStart 108
1831#define AifReqAPIJobUpdate 109
1832#define AifReqAPIJobFinish 110
1833
1834
1835
1836
1837
1838
1839
1840struct aac_aifcmd {
1841 __le32 command;
1842 __le32 seqnum;
1843 u8 data[1];
1844};
1845
1846
1847
1848
1849
1850
1851static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
1852{
1853 sector_div(capacity, divisor);
1854 return capacity;
1855}
1856
1857
1858#define AAC_OWNER_MIDLEVEL 0x101
1859#define AAC_OWNER_LOWLEVEL 0x102
1860#define AAC_OWNER_ERROR_HANDLER 0x103
1861#define AAC_OWNER_FIRMWARE 0x106
1862
1863const char *aac_driverinfo(struct Scsi_Host *);
1864struct fib *aac_fib_alloc(struct aac_dev *dev);
1865int aac_fib_setup(struct aac_dev *dev);
1866void aac_fib_map_free(struct aac_dev *dev);
1867void aac_fib_free(struct fib * context);
1868void aac_fib_init(struct fib * context);
1869void aac_printf(struct aac_dev *dev, u32 val);
1870int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
1871int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
1872void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
1873int aac_fib_complete(struct fib * context);
1874#define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
1875struct aac_dev *aac_init_adapter(struct aac_dev *dev);
1876int aac_get_config_status(struct aac_dev *dev, int commit_flag);
1877int aac_get_containers(struct aac_dev *dev);
1878int aac_scsi_cmd(struct scsi_cmnd *cmd);
1879int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
1880#ifndef shost_to_class
1881#define shost_to_class(shost) &shost->shost_dev
1882#endif
1883ssize_t aac_get_serial_number(struct device *dev, char *buf);
1884int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
1885int aac_rx_init(struct aac_dev *dev);
1886int aac_rkt_init(struct aac_dev *dev);
1887int aac_nark_init(struct aac_dev *dev);
1888int aac_sa_init(struct aac_dev *dev);
1889int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
1890unsigned int aac_response_normal(struct aac_queue * q);
1891unsigned int aac_command_normal(struct aac_queue * q);
1892unsigned int aac_intr_normal(struct aac_dev * dev, u32 Index);
1893int aac_reset_adapter(struct aac_dev * dev, int forced);
1894int aac_check_health(struct aac_dev * dev);
1895int aac_command_thread(void *data);
1896int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
1897int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
1898struct aac_driver_ident* aac_get_driver_ident(int devtype);
1899int aac_get_adapter_info(struct aac_dev* dev);
1900int aac_send_shutdown(struct aac_dev *dev);
1901int aac_probe_container(struct aac_dev *dev, int cid);
1902int _aac_rx_init(struct aac_dev *dev);
1903int aac_rx_select_comm(struct aac_dev *dev, int comm);
1904int aac_rx_deliver_producer(struct fib * fib);
1905char * get_container_type(unsigned type);
1906extern int numacb;
1907extern int acbsize;
1908extern char aac_driver_version[];
1909extern int startup_timeout;
1910extern int aif_timeout;
1911extern int expose_physicals;
1912extern int aac_reset_devices;
1913extern int aac_msi;
1914extern int aac_commit;
1915extern int update_interval;
1916extern int check_interval;
1917extern int aac_check_reset;
1918