linux/drivers/scsi/aic7xxx_old.c
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   1/*+M*************************************************************************
   2 * Adaptec AIC7xxx device driver for Linux.
   3 *
   4 * Copyright (c) 1994 John Aycock
   5 *   The University of Calgary Department of Computer Science.
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2, or (at your option)
  10 * any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; see the file COPYING.  If not, write to
  19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  20 *
  21 * Sources include the Adaptec 1740 driver (aha1740.c), the Ultrastor 24F
  22 * driver (ultrastor.c), various Linux kernel source, the Adaptec EISA
  23 * config file (!adp7771.cfg), the Adaptec AHA-2740A Series User's Guide,
  24 * the Linux Kernel Hacker's Guide, Writing a SCSI Device Driver for Linux,
  25 * the Adaptec 1542 driver (aha1542.c), the Adaptec EISA overlay file
  26 * (adp7770.ovl), the Adaptec AHA-2740 Series Technical Reference Manual,
  27 * the Adaptec AIC-7770 Data Book, the ANSI SCSI specification, the
  28 * ANSI SCSI-2 specification (draft 10c), ...
  29 *
  30 * --------------------------------------------------------------------------
  31 *
  32 *  Modifications by Daniel M. Eischen (deischen@iworks.InterWorks.org):
  33 *
  34 *  Substantially modified to include support for wide and twin bus
  35 *  adapters, DMAing of SCBs, tagged queueing, IRQ sharing, bug fixes,
  36 *  SCB paging, and other rework of the code.
  37 *
  38 *  Parts of this driver were also based on the FreeBSD driver by
  39 *  Justin T. Gibbs.  His copyright follows:
  40 *
  41 * --------------------------------------------------------------------------  
  42 * Copyright (c) 1994-1997 Justin Gibbs.
  43 * All rights reserved.
  44 *
  45 * Redistribution and use in source and binary forms, with or without
  46 * modification, are permitted provided that the following conditions
  47 * are met:
  48 * 1. Redistributions of source code must retain the above copyright
  49 *    notice, this list of conditions, and the following disclaimer,
  50 *    without modification, immediately at the beginning of the file.
  51 * 2. Redistributions in binary form must reproduce the above copyright
  52 *    notice, this list of conditions and the following disclaimer in the
  53 *    documentation and/or other materials provided with the distribution.
  54 * 3. The name of the author may not be used to endorse or promote products
  55 *    derived from this software without specific prior written permission.
  56 *
  57 * Where this Software is combined with software released under the terms of 
  58 * the GNU General Public License ("GPL") and the terms of the GPL would require the 
  59 * combined work to also be released under the terms of the GPL, the terms
  60 * and conditions of this License will apply in addition to those of the
  61 * GPL with the exception of any terms or conditions of this License that
  62 * conflict with, or are expressly prohibited by, the GPL.
  63 *
  64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  68 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  74 * SUCH DAMAGE.
  75 *
  76 *      $Id: aic7xxx.c,v 1.119 1997/06/27 19:39:18 gibbs Exp $
  77 *---------------------------------------------------------------------------
  78 *
  79 *  Thanks also go to (in alphabetical order) the following:
  80 *
  81 *    Rory Bolt     - Sequencer bug fixes
  82 *    Jay Estabrook - Initial DEC Alpha support
  83 *    Doug Ledford  - Much needed abort/reset bug fixes
  84 *    Kai Makisara  - DMAing of SCBs
  85 *
  86 *  A Boot time option was also added for not resetting the scsi bus.
  87 *
  88 *    Form:  aic7xxx=extended
  89 *           aic7xxx=no_reset
  90 *           aic7xxx=ultra
  91 *           aic7xxx=irq_trigger:[0,1]  # 0 edge, 1 level
  92 *           aic7xxx=verbose
  93 *
  94 *  Daniel M. Eischen, deischen@iworks.InterWorks.org, 1/23/97
  95 *
  96 *  $Id: aic7xxx.c,v 4.1 1997/06/12 08:23:42 deang Exp $
  97 *-M*************************************************************************/
  98
  99/*+M**************************************************************************
 100 *
 101 * Further driver modifications made by Doug Ledford <dledford@redhat.com>
 102 *
 103 * Copyright (c) 1997-1999 Doug Ledford
 104 *
 105 * These changes are released under the same licensing terms as the FreeBSD
 106 * driver written by Justin Gibbs.  Please see his Copyright notice above
 107 * for the exact terms and conditions covering my changes as well as the
 108 * warranty statement.
 109 *
 110 * Modifications made to the aic7xxx.c,v 4.1 driver from Dan Eischen include
 111 * but are not limited to:
 112 *
 113 *  1: Import of the latest FreeBSD sequencer code for this driver
 114 *  2: Modification of kernel code to accommodate different sequencer semantics
 115 *  3: Extensive changes throughout kernel portion of driver to improve
 116 *     abort/reset processing and error hanndling
 117 *  4: Other work contributed by various people on the Internet
 118 *  5: Changes to printk information and verbosity selection code
 119 *  6: General reliability related changes, especially in IRQ management
 120 *  7: Modifications to the default probe/attach order for supported cards
 121 *  8: SMP friendliness has been improved
 122 *
 123 * Overall, this driver represents a significant departure from the official
 124 * aic7xxx driver released by Dan Eischen in two ways.  First, in the code
 125 * itself.  A diff between the two version of the driver is now a several
 126 * thousand line diff.  Second, in approach to solving the same problem.  The
 127 * problem is importing the FreeBSD aic7xxx driver code to linux can be a
 128 * difficult and time consuming process, that also can be error prone.  Dan
 129 * Eischen's official driver uses the approach that the linux and FreeBSD
 130 * drivers should be as identical as possible.  To that end, his next version
 131 * of this driver will be using a mid-layer code library that he is developing
 132 * to moderate communications between the linux mid-level SCSI code and the
 133 * low level FreeBSD driver.  He intends to be able to essentially drop the
 134 * FreeBSD driver into the linux kernel with only a few minor tweaks to some
 135 * include files and the like and get things working, making for fast easy
 136 * imports of the FreeBSD code into linux.
 137 *
 138 * I disagree with Dan's approach.  Not that I don't think his way of doing
 139 * things would be nice, easy to maintain, and create a more uniform driver
 140 * between FreeBSD and Linux.  I have no objection to those issues.  My
 141 * disagreement is on the needed functionality.  There simply are certain
 142 * things that are done differently in FreeBSD than linux that will cause
 143 * problems for this driver regardless of any middle ware Dan implements.
 144 * The biggest example of this at the moment is interrupt semantics.  Linux
 145 * doesn't provide the same protection techniques as FreeBSD does, nor can
 146 * they be easily implemented in any middle ware code since they would truly
 147 * belong in the kernel proper and would effect all drivers.  For the time
 148 * being, I see issues such as these as major stumbling blocks to the 
 149 * reliability of code based upon such middle ware.  Therefore, I choose to
 150 * use a different approach to importing the FreeBSD code that doesn't
 151 * involve any middle ware type code.  My approach is to import the sequencer
 152 * code from FreeBSD wholesale.  Then, to only make changes in the kernel
 153 * portion of the driver as they are needed for the new sequencer semantics.
 154 * In this way, the portion of the driver that speaks to the rest of the
 155 * linux kernel is fairly static and can be changed/modified to solve
 156 * any problems one might encounter without concern for the FreeBSD driver.
 157 *
 158 * Note: If time and experience should prove me wrong that the middle ware
 159 * code Dan writes is reliable in its operation, then I'll retract my above
 160 * statements.  But, for those that don't know, I'm from Missouri (in the US)
 161 * and our state motto is "The Show-Me State".  Well, before I will put
 162 * faith into it, you'll have to show me that it works :)
 163 *
 164 *_M*************************************************************************/
 165
 166/*
 167 * The next three defines are user configurable.  These should be the only
 168 * defines a user might need to get in here and change.  There are other
 169 * defines buried deeper in the code, but those really shouldn't need touched
 170 * under normal conditions.
 171 */
 172
 173/*
 174 * AIC7XXX_STRICT_PCI_SETUP
 175 *   Should we assume the PCI config options on our controllers are set with
 176 *   sane and proper values, or should we be anal about our PCI config
 177 *   registers and force them to what we want?  The main advantage to
 178 *   defining this option is on non-Intel hardware where the BIOS may not
 179 *   have been run to set things up, or if you have one of the BIOSless
 180 *   Adaptec controllers, such as a 2910, that don't get set up by the
 181 *   BIOS.  However, keep in mind that we really do set the most important
 182 *   items in the driver regardless of this setting, this only controls some
 183 *   of the more esoteric PCI options on these cards.  In that sense, I
 184 *   would default to leaving this off.  However, if people wish to try
 185 *   things both ways, that would also help me to know if there are some
 186 *   machines where it works one way but not another.
 187 *
 188 *   -- July 7, 17:09
 189 *     OK...I need this on my machine for testing, so the default is to
 190 *     leave it defined.
 191 *
 192 *   -- July 7, 18:49
 193 *     I needed it for testing, but it didn't make any difference, so back
 194 *     off she goes.
 195 *
 196 *   -- July 16, 23:04
 197 *     I turned it back on to try and compensate for the 2.1.x PCI code
 198 *     which no longer relies solely on the BIOS and now tries to set
 199 *     things itself.
 200 */
 201
 202#define AIC7XXX_STRICT_PCI_SETUP
 203
 204/*
 205 * AIC7XXX_VERBOSE_DEBUGGING
 206 *   This option enables a lot of extra printk();s in the code, surrounded
 207 *   by if (aic7xxx_verbose ...) statements.  Executing all of those if
 208 *   statements and the extra checks can get to where it actually does have
 209 *   an impact on CPU usage and such, as well as code size.  Disabling this
 210 *   define will keep some of those from becoming part of the code.
 211 *
 212 *   NOTE:  Currently, this option has no real effect, I will be adding the
 213 *   various #ifdef's in the code later when I've decided a section is
 214 *   complete and no longer needs debugging.  OK...a lot of things are now
 215 *   surrounded by this define, so turning this off does have an impact.
 216 */
 217 
 218/*
 219 * #define AIC7XXX_VERBOSE_DEBUGGING
 220 */
 221 
 222#include <linux/module.h>
 223#include <stdarg.h>
 224#include <asm/io.h>
 225#include <asm/irq.h>
 226#include <asm/byteorder.h>
 227#include <linux/string.h>
 228#include <linux/errno.h>
 229#include <linux/kernel.h>
 230#include <linux/ioport.h>
 231#include <linux/delay.h>
 232#include <linux/pci.h>
 233#include <linux/proc_fs.h>
 234#include <linux/blkdev.h>
 235#include <linux/init.h>
 236#include <linux/spinlock.h>
 237#include <linux/smp.h>
 238#include <linux/interrupt.h>
 239#include "scsi.h"
 240#include <scsi/scsi_host.h>
 241#include "aic7xxx_old/aic7xxx.h"
 242
 243#include "aic7xxx_old/sequencer.h"
 244#include "aic7xxx_old/scsi_message.h"
 245#include "aic7xxx_old/aic7xxx_reg.h"
 246#include <scsi/scsicam.h>
 247
 248#include <linux/stat.h>
 249#include <linux/slab.h>        /* for kmalloc() */
 250
 251#define AIC7XXX_C_VERSION  "5.2.6"
 252
 253#define ALL_TARGETS -1
 254#define ALL_CHANNELS -1
 255#define ALL_LUNS -1
 256#define MAX_TARGETS  16
 257#define MAX_LUNS     8
 258#ifndef TRUE
 259#  define TRUE 1
 260#endif
 261#ifndef FALSE
 262#  define FALSE 0
 263#endif
 264
 265#if defined(__powerpc__) || defined(__i386__) || defined(__x86_64__)
 266#  define MMAPIO
 267#endif
 268
 269/*
 270 * You can try raising me for better performance or lowering me if you have
 271 * flaky devices that go off the scsi bus when hit with too many tagged
 272 * commands (like some IBM SCSI-3 LVD drives).
 273 */
 274#define AIC7XXX_CMDS_PER_DEVICE 32
 275
 276typedef struct
 277{
 278  unsigned char tag_commands[16];   /* Allow for wide/twin adapters. */
 279} adapter_tag_info_t;
 280
 281/*
 282 * Make a define that will tell the driver not to the default tag depth
 283 * everywhere.
 284 */
 285#define DEFAULT_TAG_COMMANDS {0, 0, 0, 0, 0, 0, 0, 0,\
 286                              0, 0, 0, 0, 0, 0, 0, 0}
 287
 288/*
 289 * Modify this as you see fit for your system.  By setting tag_commands
 290 * to 0, the driver will use it's own algorithm for determining the
 291 * number of commands to use (see above).  When 255, the driver will
 292 * not enable tagged queueing for that particular device.  When positive
 293 * (> 0) and (< 255) the values in the array are used for the queue_depth.
 294 * Note that the maximum value for an entry is 254, but you're insane if
 295 * you try to use that many commands on one device.
 296 *
 297 * In this example, the first line will disable tagged queueing for all
 298 * the devices on the first probed aic7xxx adapter.
 299 *
 300 * The second line enables tagged queueing with 4 commands/LUN for IDs
 301 * (1, 2-11, 13-15), disables tagged queueing for ID 12, and tells the
 302 * driver to use its own algorithm for ID 1.
 303 *
 304 * The third line is the same as the first line.
 305 *
 306 * The fourth line disables tagged queueing for devices 0 and 3.  It
 307 * enables tagged queueing for the other IDs, with 16 commands/LUN
 308 * for IDs 1 and 4, 127 commands/LUN for ID 8, and 4 commands/LUN for
 309 * IDs 2, 5-7, and 9-15.
 310 */
 311
 312/*
 313 * NOTE: The below structure is for reference only, the actual structure
 314 *       to modify in order to change things is found after this fake one.
 315 *
 316adapter_tag_info_t aic7xxx_tag_info[] =
 317{
 318  {DEFAULT_TAG_COMMANDS},
 319  {{4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 255, 4, 4, 4}},
 320  {DEFAULT_TAG_COMMANDS},
 321  {{255, 16, 4, 255, 16, 4, 4, 4, 127, 4, 4, 4, 4, 4, 4, 4}}
 322};
 323*/
 324
 325static adapter_tag_info_t aic7xxx_tag_info[] =
 326{
 327  {DEFAULT_TAG_COMMANDS},
 328  {DEFAULT_TAG_COMMANDS},
 329  {DEFAULT_TAG_COMMANDS},
 330  {DEFAULT_TAG_COMMANDS},
 331  {DEFAULT_TAG_COMMANDS},
 332  {DEFAULT_TAG_COMMANDS},
 333  {DEFAULT_TAG_COMMANDS},
 334  {DEFAULT_TAG_COMMANDS},
 335  {DEFAULT_TAG_COMMANDS},
 336  {DEFAULT_TAG_COMMANDS},
 337  {DEFAULT_TAG_COMMANDS},
 338  {DEFAULT_TAG_COMMANDS},
 339  {DEFAULT_TAG_COMMANDS},
 340  {DEFAULT_TAG_COMMANDS},
 341  {DEFAULT_TAG_COMMANDS},
 342  {DEFAULT_TAG_COMMANDS}
 343};
 344
 345
 346/*
 347 * Define an array of board names that can be indexed by aha_type.
 348 * Don't forget to change this when changing the types!
 349 */
 350static const char *board_names[] = {
 351  "AIC-7xxx Unknown",                                   /* AIC_NONE */
 352  "Adaptec AIC-7810 Hardware RAID Controller",          /* AIC_7810 */
 353  "Adaptec AIC-7770 SCSI host adapter",                 /* AIC_7770 */
 354  "Adaptec AHA-274X SCSI host adapter",                 /* AIC_7771 */
 355  "Adaptec AHA-284X SCSI host adapter",                 /* AIC_284x */
 356  "Adaptec AIC-7850 SCSI host adapter",                 /* AIC_7850 */
 357  "Adaptec AIC-7855 SCSI host adapter",                 /* AIC_7855 */
 358  "Adaptec AIC-7860 Ultra SCSI host adapter",           /* AIC_7860 */
 359  "Adaptec AHA-2940A Ultra SCSI host adapter",          /* AIC_7861 */
 360  "Adaptec AIC-7870 SCSI host adapter",                 /* AIC_7870 */
 361  "Adaptec AHA-294X SCSI host adapter",                 /* AIC_7871 */
 362  "Adaptec AHA-394X SCSI host adapter",                 /* AIC_7872 */
 363  "Adaptec AHA-398X SCSI host adapter",                 /* AIC_7873 */
 364  "Adaptec AHA-2944 SCSI host adapter",                 /* AIC_7874 */
 365  "Adaptec AIC-7880 Ultra SCSI host adapter",           /* AIC_7880 */
 366  "Adaptec AHA-294X Ultra SCSI host adapter",           /* AIC_7881 */
 367  "Adaptec AHA-394X Ultra SCSI host adapter",           /* AIC_7882 */
 368  "Adaptec AHA-398X Ultra SCSI host adapter",           /* AIC_7883 */
 369  "Adaptec AHA-2944 Ultra SCSI host adapter",           /* AIC_7884 */
 370  "Adaptec AHA-2940UW Pro Ultra SCSI host adapter",     /* AIC_7887 */
 371  "Adaptec AIC-7895 Ultra SCSI host adapter",           /* AIC_7895 */
 372  "Adaptec AIC-7890/1 Ultra2 SCSI host adapter",        /* AIC_7890 */
 373  "Adaptec AHA-293X Ultra2 SCSI host adapter",          /* AIC_7890 */
 374  "Adaptec AHA-294X Ultra2 SCSI host adapter",          /* AIC_7890 */
 375  "Adaptec AIC-7896/7 Ultra2 SCSI host adapter",        /* AIC_7896 */
 376  "Adaptec AHA-394X Ultra2 SCSI host adapter",          /* AIC_7897 */
 377  "Adaptec AHA-395X Ultra2 SCSI host adapter",          /* AIC_7897 */
 378  "Adaptec PCMCIA SCSI controller",                     /* card bus stuff */
 379  "Adaptec AIC-7892 Ultra 160/m SCSI host adapter",     /* AIC_7892 */
 380  "Adaptec AIC-7899 Ultra 160/m SCSI host adapter",     /* AIC_7899 */
 381};
 382
 383/*
 384 * There should be a specific return value for this in scsi.h, but
 385 * it seems that most drivers ignore it.
 386 */
 387#define DID_UNDERFLOW   DID_ERROR
 388
 389/*
 390 *  What we want to do is have the higher level scsi driver requeue
 391 *  the command to us. There is no specific driver status for this
 392 *  condition, but the higher level scsi driver will requeue the
 393 *  command on a DID_BUS_BUSY error.
 394 *
 395 *  Upon further inspection and testing, it seems that DID_BUS_BUSY
 396 *  will *always* retry the command.  We can get into an infinite loop
 397 *  if this happens when we really want some sort of counter that
 398 *  will automatically abort/reset the command after so many retries.
 399 *  Using DID_ERROR will do just that.  (Made by a suggestion by
 400 *  Doug Ledford 8/1/96)
 401 */
 402#define DID_RETRY_COMMAND DID_ERROR
 403
 404#define HSCSIID        0x07
 405#define SCSI_RESET     0x040
 406
 407/*
 408 * EISA/VL-bus stuff
 409 */
 410#define MINSLOT                1
 411#define MAXSLOT                15
 412#define SLOTBASE(x)        ((x) << 12)
 413#define BASE_TO_SLOT(x) ((x) >> 12)
 414
 415/*
 416 * Standard EISA Host ID regs  (Offset from slot base)
 417 */
 418#define AHC_HID0              0x80   /* 0,1: msb of ID2, 2-7: ID1      */
 419#define AHC_HID1              0x81   /* 0-4: ID3, 5-7: LSB ID2         */
 420#define AHC_HID2              0x82   /* product                        */
 421#define AHC_HID3              0x83   /* firmware revision              */
 422
 423/*
 424 * AIC-7770 I/O range to reserve for a card
 425 */
 426#define MINREG                0xC00
 427#define MAXREG                0xCFF
 428
 429#define INTDEF                0x5C      /* Interrupt Definition Register */
 430
 431/*
 432 * AIC-78X0 PCI registers
 433 */
 434#define        CLASS_PROGIF_REVID        0x08
 435#define                DEVREVID        0x000000FFul
 436#define                PROGINFC        0x0000FF00ul
 437#define                SUBCLASS        0x00FF0000ul
 438#define                BASECLASS        0xFF000000ul
 439
 440#define        CSIZE_LATTIME                0x0C
 441#define                CACHESIZE        0x0000003Ful        /* only 5 bits */
 442#define                LATTIME                0x0000FF00ul
 443
 444#define        DEVCONFIG                0x40
 445#define                SCBSIZE32        0x00010000ul        /* aic789X only */
 446#define                MPORTMODE        0x00000400ul        /* aic7870 only */
 447#define                RAMPSM           0x00000200ul        /* aic7870 only */
 448#define                RAMPSM_ULTRA2    0x00000004
 449#define                VOLSENSE         0x00000100ul
 450#define                SCBRAMSEL        0x00000080ul
 451#define                SCBRAMSEL_ULTRA2 0x00000008
 452#define                MRDCEN           0x00000040ul
 453#define                EXTSCBTIME       0x00000020ul        /* aic7870 only */
 454#define                EXTSCBPEN        0x00000010ul        /* aic7870 only */
 455#define                BERREN           0x00000008ul
 456#define                DACEN            0x00000004ul
 457#define                STPWLEVEL        0x00000002ul
 458#define                DIFACTNEGEN      0x00000001ul        /* aic7870 only */
 459
 460#define        SCAMCTL                  0x1a                /* Ultra2 only  */
 461#define        CCSCBBADDR               0xf0                /* aic7895/6/7  */
 462
 463/*
 464 * Define the different types of SEEPROMs on aic7xxx adapters
 465 * and make it also represent the address size used in accessing
 466 * its registers.  The 93C46 chips have 1024 bits organized into
 467 * 64 16-bit words, while the 93C56 chips have 2048 bits organized
 468 * into 128 16-bit words.  The C46 chips use 6 bits to address
 469 * each word, while the C56 and C66 (4096 bits) use 8 bits to
 470 * address each word.
 471 */
 472typedef enum {C46 = 6, C56_66 = 8} seeprom_chip_type;
 473
 474/*
 475 *
 476 * Define the format of the SEEPROM registers (16 bits).
 477 *
 478 */
 479struct seeprom_config {
 480
 481/*
 482 * SCSI ID Configuration Flags
 483 */
 484#define CFXFER                0x0007      /* synchronous transfer rate */
 485#define CFSYNCH               0x0008      /* enable synchronous transfer */
 486#define CFDISC                0x0010      /* enable disconnection */
 487#define CFWIDEB               0x0020      /* wide bus device (wide card) */
 488#define CFSYNCHISULTRA        0x0040      /* CFSYNC is an ultra offset */
 489#define CFNEWULTRAFORMAT      0x0080      /* Use the Ultra2 SEEPROM format */
 490#define CFSTART               0x0100      /* send start unit SCSI command */
 491#define CFINCBIOS             0x0200      /* include in BIOS scan */
 492#define CFRNFOUND             0x0400      /* report even if not found */
 493#define CFMULTILUN            0x0800      /* probe mult luns in BIOS scan */
 494#define CFWBCACHEYES          0x4000      /* Enable W-Behind Cache on drive */
 495#define CFWBCACHENC           0xc000      /* Don't change W-Behind Cache */
 496/* UNUSED                0x3000 */
 497  unsigned short device_flags[16];        /* words 0-15 */
 498
 499/*
 500 * BIOS Control Bits
 501 */
 502#define CFSUPREM        0x0001  /* support all removable drives */
 503#define CFSUPREMB       0x0002  /* support removable drives for boot only */
 504#define CFBIOSEN        0x0004  /* BIOS enabled */
 505/* UNUSED                0x0008 */
 506#define CFSM2DRV        0x0010  /* support more than two drives */
 507#define CF284XEXTEND    0x0020  /* extended translation (284x cards) */
 508/* UNUSED                0x0040 */
 509#define CFEXTEND        0x0080  /* extended translation enabled */
 510/* UNUSED                0xFF00 */
 511  unsigned short bios_control;  /* word 16 */
 512
 513/*
 514 * Host Adapter Control Bits
 515 */
 516#define CFAUTOTERM      0x0001  /* Perform Auto termination */
 517#define CFULTRAEN       0x0002  /* Ultra SCSI speed enable (Ultra cards) */
 518#define CF284XSELTO     0x0003  /* Selection timeout (284x cards) */
 519#define CF284XFIFO      0x000C  /* FIFO Threshold (284x cards) */
 520#define CFSTERM         0x0004  /* SCSI low byte termination */
 521#define CFWSTERM        0x0008  /* SCSI high byte termination (wide card) */
 522#define CFSPARITY       0x0010  /* SCSI parity */
 523#define CF284XSTERM     0x0020  /* SCSI low byte termination (284x cards) */
 524#define CFRESETB        0x0040  /* reset SCSI bus at boot */
 525#define CFBPRIMARY      0x0100  /* Channel B primary on 7895 chipsets */
 526#define CFSEAUTOTERM    0x0400  /* aic7890 Perform SE Auto Term */
 527#define CFLVDSTERM      0x0800  /* aic7890 LVD Termination */
 528/* UNUSED                0xF280 */
 529  unsigned short adapter_control;        /* word 17 */
 530
 531/*
 532 * Bus Release, Host Adapter ID
 533 */
 534#define CFSCSIID        0x000F                /* host adapter SCSI ID */
 535/* UNUSED                0x00F0 */
 536#define CFBRTIME        0xFF00                /* bus release time */
 537  unsigned short brtime_id;                /* word 18 */
 538
 539/*
 540 * Maximum targets
 541 */
 542#define CFMAXTARG        0x00FF        /* maximum targets */
 543/* UNUSED                0xFF00 */
 544  unsigned short max_targets;                /* word 19 */
 545
 546  unsigned short res_1[11];                /* words 20-30 */
 547  unsigned short checksum;                /* word 31 */
 548};
 549
 550#define SELBUS_MASK                0x0a
 551#define         SELNARROW        0x00
 552#define         SELBUSB                0x08
 553#define SINGLE_BUS                0x00
 554
 555#define SCB_TARGET(scb)         \
 556       (((scb)->hscb->target_channel_lun & TID) >> 4)
 557#define SCB_LUN(scb)            \
 558       ((scb)->hscb->target_channel_lun & LID)
 559#define SCB_IS_SCSIBUS_B(scb)   \
 560       (((scb)->hscb->target_channel_lun & SELBUSB) != 0)
 561
 562/*
 563 * If an error occurs during a data transfer phase, run the command
 564 * to completion - it's easier that way - making a note of the error
 565 * condition in this location. This then will modify a DID_OK status
 566 * into an appropriate error for the higher-level SCSI code.
 567 */
 568#define aic7xxx_error(cmd)        ((cmd)->SCp.Status)
 569
 570/*
 571 * Keep track of the targets returned status.
 572 */
 573#define aic7xxx_status(cmd)        ((cmd)->SCp.sent_command)
 574
 575/*
 576 * The position of the SCSI commands scb within the scb array.
 577 */
 578#define aic7xxx_position(cmd)        ((cmd)->SCp.have_data_in)
 579
 580/*
 581 * The stored DMA mapping for single-buffer data transfers.
 582 */
 583#define aic7xxx_mapping(cmd)         ((cmd)->SCp.phase)
 584
 585/*
 586 * Get out private data area from a scsi cmd pointer
 587 */
 588#define AIC_DEV(cmd)    ((struct aic_dev_data *)(cmd)->device->hostdata)
 589
 590/*
 591 * So we can keep track of our host structs
 592 */
 593static struct aic7xxx_host *first_aic7xxx = NULL;
 594
 595/*
 596 * As of Linux 2.1, the mid-level SCSI code uses virtual addresses
 597 * in the scatter-gather lists.  We need to convert the virtual
 598 * addresses to physical addresses.
 599 */
 600struct hw_scatterlist {
 601  unsigned int address;
 602  unsigned int length;
 603};
 604
 605/*
 606 * Maximum number of SG segments these cards can support.
 607 */
 608#define        AIC7XXX_MAX_SG 128
 609
 610/*
 611 * The maximum number of SCBs we could have for ANY type
 612 * of card. DON'T FORGET TO CHANGE THE SCB MASK IN THE
 613 * SEQUENCER CODE IF THIS IS MODIFIED!
 614 */
 615#define AIC7XXX_MAXSCB        255
 616
 617
 618struct aic7xxx_hwscb {
 619/* ------------    Begin hardware supported fields    ---------------- */
 620/* 0*/  unsigned char control;
 621/* 1*/  unsigned char target_channel_lun;       /* 4/1/3 bits */
 622/* 2*/  unsigned char target_status;
 623/* 3*/  unsigned char SG_segment_count;
 624/* 4*/  unsigned int  SG_list_pointer;
 625/* 8*/  unsigned char residual_SG_segment_count;
 626/* 9*/  unsigned char residual_data_count[3];
 627/*12*/  unsigned int  data_pointer;
 628/*16*/  unsigned int  data_count;
 629/*20*/  unsigned int  SCSI_cmd_pointer;
 630/*24*/  unsigned char SCSI_cmd_length;
 631/*25*/  unsigned char tag;          /* Index into our kernel SCB array.
 632                                     * Also used as the tag for tagged I/O
 633                                     */
 634#define SCB_PIO_TRANSFER_SIZE  26   /* amount we need to upload/download
 635                                     * via PIO to initialize a transaction.
 636                                     */
 637/*26*/  unsigned char next;         /* Used to thread SCBs awaiting selection
 638                                     * or disconnected down in the sequencer.
 639                                     */
 640/*27*/  unsigned char prev;
 641/*28*/  unsigned int pad;           /*
 642                                     * Unused by the kernel, but we require
 643                                     * the padding so that the array of
 644                                     * hardware SCBs is aligned on 32 byte
 645                                     * boundaries so the sequencer can index
 646                                     */
 647};
 648
 649typedef enum {
 650        SCB_FREE                = 0x0000,
 651        SCB_DTR_SCB             = 0x0001,
 652        SCB_WAITINGQ            = 0x0002,
 653        SCB_ACTIVE              = 0x0004,
 654        SCB_SENSE               = 0x0008,
 655        SCB_ABORT               = 0x0010,
 656        SCB_DEVICE_RESET        = 0x0020,
 657        SCB_RESET               = 0x0040,
 658        SCB_RECOVERY_SCB        = 0x0080,
 659        SCB_MSGOUT_PPR          = 0x0100,
 660        SCB_MSGOUT_SENT         = 0x0200,
 661        SCB_MSGOUT_SDTR         = 0x0400,
 662        SCB_MSGOUT_WDTR         = 0x0800,
 663        SCB_MSGOUT_BITS         = SCB_MSGOUT_PPR |
 664                                  SCB_MSGOUT_SENT | 
 665                                  SCB_MSGOUT_SDTR |
 666                                  SCB_MSGOUT_WDTR,
 667        SCB_QUEUED_ABORT        = 0x1000,
 668        SCB_QUEUED_FOR_DONE     = 0x2000,
 669        SCB_WAS_BUSY            = 0x4000,
 670        SCB_QUEUE_FULL          = 0x8000
 671} scb_flag_type;
 672
 673typedef enum {
 674        AHC_FNONE                 = 0x00000000,
 675        AHC_PAGESCBS              = 0x00000001,
 676        AHC_CHANNEL_B_PRIMARY     = 0x00000002,
 677        AHC_USEDEFAULTS           = 0x00000004,
 678        AHC_INDIRECT_PAGING       = 0x00000008,
 679        AHC_CHNLB                 = 0x00000020,
 680        AHC_CHNLC                 = 0x00000040,
 681        AHC_EXTEND_TRANS_A        = 0x00000100,
 682        AHC_EXTEND_TRANS_B        = 0x00000200,
 683        AHC_TERM_ENB_A            = 0x00000400,
 684        AHC_TERM_ENB_SE_LOW       = 0x00000400,
 685        AHC_TERM_ENB_B            = 0x00000800,
 686        AHC_TERM_ENB_SE_HIGH      = 0x00000800,
 687        AHC_HANDLING_REQINITS     = 0x00001000,
 688        AHC_TARGETMODE            = 0x00002000,
 689        AHC_NEWEEPROM_FMT         = 0x00004000,
 690 /*
 691  *  Here ends the FreeBSD defined flags and here begins the linux defined
 692  *  flags.  NOTE: I did not preserve the old flag name during this change
 693  *  specifically to force me to evaluate what flags were being used properly
 694  *  and what flags weren't.  This way, I could clean up the flag usage on
 695  *  a use by use basis.  Doug Ledford
 696  */
 697        AHC_MOTHERBOARD           = 0x00020000,
 698        AHC_NO_STPWEN             = 0x00040000,
 699        AHC_RESET_DELAY           = 0x00080000,
 700        AHC_A_SCANNED             = 0x00100000,
 701        AHC_B_SCANNED             = 0x00200000,
 702        AHC_MULTI_CHANNEL         = 0x00400000,
 703        AHC_BIOS_ENABLED          = 0x00800000,
 704        AHC_SEEPROM_FOUND         = 0x01000000,
 705        AHC_TERM_ENB_LVD          = 0x02000000,
 706        AHC_ABORT_PENDING         = 0x04000000,
 707        AHC_RESET_PENDING         = 0x08000000,
 708#define AHC_IN_ISR_BIT              28
 709        AHC_IN_ISR                = 0x10000000,
 710        AHC_IN_ABORT              = 0x20000000,
 711        AHC_IN_RESET              = 0x40000000,
 712        AHC_EXTERNAL_SRAM         = 0x80000000
 713} ahc_flag_type;
 714
 715typedef enum {
 716  AHC_NONE             = 0x0000,
 717  AHC_CHIPID_MASK      = 0x00ff,
 718  AHC_AIC7770          = 0x0001,
 719  AHC_AIC7850          = 0x0002,
 720  AHC_AIC7860          = 0x0003,
 721  AHC_AIC7870          = 0x0004,
 722  AHC_AIC7880          = 0x0005,
 723  AHC_AIC7890          = 0x0006,
 724  AHC_AIC7895          = 0x0007,
 725  AHC_AIC7896          = 0x0008,
 726  AHC_AIC7892          = 0x0009,
 727  AHC_AIC7899          = 0x000a,
 728  AHC_VL               = 0x0100,
 729  AHC_EISA             = 0x0200,
 730  AHC_PCI              = 0x0400,
 731} ahc_chip;
 732
 733typedef enum {
 734  AHC_FENONE           = 0x0000,
 735  AHC_ULTRA            = 0x0001,
 736  AHC_ULTRA2           = 0x0002,
 737  AHC_WIDE             = 0x0004,
 738  AHC_TWIN             = 0x0008,
 739  AHC_MORE_SRAM        = 0x0010,
 740  AHC_CMD_CHAN         = 0x0020,
 741  AHC_QUEUE_REGS       = 0x0040,
 742  AHC_SG_PRELOAD       = 0x0080,
 743  AHC_SPIOCAP          = 0x0100,
 744  AHC_ULTRA3           = 0x0200,
 745  AHC_NEW_AUTOTERM     = 0x0400,
 746  AHC_AIC7770_FE       = AHC_FENONE,
 747  AHC_AIC7850_FE       = AHC_SPIOCAP,
 748  AHC_AIC7860_FE       = AHC_ULTRA|AHC_SPIOCAP,
 749  AHC_AIC7870_FE       = AHC_FENONE,
 750  AHC_AIC7880_FE       = AHC_ULTRA,
 751  AHC_AIC7890_FE       = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA2|
 752                         AHC_QUEUE_REGS|AHC_SG_PRELOAD|AHC_NEW_AUTOTERM,
 753  AHC_AIC7895_FE       = AHC_MORE_SRAM|AHC_CMD_CHAN|AHC_ULTRA,
 754  AHC_AIC7896_FE       = AHC_AIC7890_FE,
 755  AHC_AIC7892_FE       = AHC_AIC7890_FE|AHC_ULTRA3,
 756  AHC_AIC7899_FE       = AHC_AIC7890_FE|AHC_ULTRA3,
 757} ahc_feature;
 758
 759#define SCB_DMA_ADDR(scb, addr) ((unsigned long)(addr) + (scb)->scb_dma->dma_offset)
 760
 761struct aic7xxx_scb_dma {
 762        unsigned long          dma_offset;    /* Correction you have to add
 763                                               * to virtual address to get
 764                                               * dma handle in this region */
 765        dma_addr_t             dma_address;   /* DMA handle of the start,
 766                                               * for unmap */
 767        unsigned int           dma_len;       /* DMA length */
 768};
 769
 770typedef enum {
 771  AHC_BUG_NONE            = 0x0000,
 772  AHC_BUG_TMODE_WIDEODD   = 0x0001,
 773  AHC_BUG_AUTOFLUSH       = 0x0002,
 774  AHC_BUG_CACHETHEN       = 0x0004,
 775  AHC_BUG_CACHETHEN_DIS   = 0x0008,
 776  AHC_BUG_PCI_2_1_RETRY   = 0x0010,
 777  AHC_BUG_PCI_MWI         = 0x0020,
 778  AHC_BUG_SCBCHAN_UPLOAD  = 0x0040,
 779} ahc_bugs;
 780
 781struct aic7xxx_scb {
 782        struct aic7xxx_hwscb    *hscb;          /* corresponding hardware scb */
 783        struct scsi_cmnd        *cmd;           /* scsi_cmnd for this scb */
 784        struct aic7xxx_scb      *q_next;        /* next scb in queue */
 785        volatile scb_flag_type  flags;          /* current state of scb */
 786        struct hw_scatterlist   *sg_list;       /* SG list in adapter format */
 787        unsigned char           tag_action;
 788        unsigned char           sg_count;
 789        unsigned char           *sense_cmd;     /*
 790                                                 * Allocate 6 characters for
 791                                                 * sense command.
 792                                                 */
 793        unsigned char           *cmnd;
 794        unsigned int            sg_length;      /*
 795                                                 * We init this during
 796                                                 * buildscb so we don't have
 797                                                 * to calculate anything during
 798                                                 * underflow/overflow/stat code
 799                                                 */
 800        void                    *kmalloc_ptr;
 801        struct aic7xxx_scb_dma  *scb_dma;
 802};
 803
 804/*
 805 * Define a linked list of SCBs.
 806 */
 807typedef struct {
 808  struct aic7xxx_scb *head;
 809  struct aic7xxx_scb *tail;
 810} scb_queue_type;
 811
 812static struct {
 813  unsigned char errno;
 814  const char *errmesg;
 815} hard_error[] = {
 816  { ILLHADDR,  "Illegal Host Access" },
 817  { ILLSADDR,  "Illegal Sequencer Address referenced" },
 818  { ILLOPCODE, "Illegal Opcode in sequencer program" },
 819  { SQPARERR,  "Sequencer Ram Parity Error" },
 820  { DPARERR,   "Data-Path Ram Parity Error" },
 821  { MPARERR,   "Scratch Ram/SCB Array Ram Parity Error" },
 822  { PCIERRSTAT,"PCI Error detected" },
 823  { CIOPARERR, "CIOBUS Parity Error" }
 824};
 825
 826static unsigned char
 827generic_sense[] = { REQUEST_SENSE, 0, 0, 0, 255, 0 };
 828
 829typedef struct {
 830  scb_queue_type free_scbs;        /*
 831                                    * SCBs assigned to free slot on
 832                                    * card (no paging required)
 833                                    */
 834  struct aic7xxx_scb   *scb_array[AIC7XXX_MAXSCB];
 835  struct aic7xxx_hwscb *hscbs;
 836  unsigned char  numscbs;          /* current number of scbs */
 837  unsigned char  maxhscbs;         /* hardware scbs */
 838  unsigned char  maxscbs;          /* max scbs including pageable scbs */
 839  dma_addr_t     hscbs_dma;        /* DMA handle to hscbs */
 840  unsigned int   hscbs_dma_len;    /* length of the above DMA area */
 841  void          *hscb_kmalloc_ptr;
 842} scb_data_type;
 843
 844struct target_cmd {
 845  unsigned char mesg_bytes[4];
 846  unsigned char command[28];
 847};
 848
 849#define AHC_TRANS_CUR    0x0001
 850#define AHC_TRANS_ACTIVE 0x0002
 851#define AHC_TRANS_GOAL   0x0004
 852#define AHC_TRANS_USER   0x0008
 853#define AHC_TRANS_QUITE  0x0010
 854typedef struct {
 855  unsigned char width;
 856  unsigned char period;
 857  unsigned char offset;
 858  unsigned char options;
 859} transinfo_type;
 860
 861struct aic_dev_data {
 862  volatile scb_queue_type  delayed_scbs;
 863  volatile unsigned short  temp_q_depth;
 864  unsigned short           max_q_depth;
 865  volatile unsigned char   active_cmds;
 866  /*
 867   * Statistics Kept:
 868   *
 869   * Total Xfers (count for each command that has a data xfer),
 870   * broken down by reads && writes.
 871   *
 872   * Further sorted into a few bins for keeping tabs on how many commands
 873   * we get of various sizes.
 874   *
 875   */
 876  long w_total;                          /* total writes */
 877  long r_total;                          /* total reads */
 878  long barrier_total;                    /* total num of REQ_BARRIER commands */
 879  long ordered_total;                    /* How many REQ_BARRIER commands we
 880                                            used ordered tags to satisfy */
 881  long w_bins[6];                       /* binned write */
 882  long r_bins[6];                       /* binned reads */
 883  transinfo_type        cur;
 884  transinfo_type        goal;
 885#define  BUS_DEVICE_RESET_PENDING       0x01
 886#define  DEVICE_RESET_DELAY             0x02
 887#define  DEVICE_PRINT_DTR               0x04
 888#define  DEVICE_WAS_BUSY                0x08
 889#define  DEVICE_DTR_SCANNED             0x10
 890#define  DEVICE_SCSI_3                  0x20
 891  volatile unsigned char   flags;
 892  unsigned needppr:1;
 893  unsigned needppr_copy:1;
 894  unsigned needsdtr:1;
 895  unsigned needsdtr_copy:1;
 896  unsigned needwdtr:1;
 897  unsigned needwdtr_copy:1;
 898  unsigned dtr_pending:1;
 899  struct scsi_device *SDptr;
 900  struct list_head list;
 901};
 902
 903/*
 904 * Define a structure used for each host adapter.  Note, in order to avoid
 905 * problems with architectures I can't test on (because I don't have one,
 906 * such as the Alpha based systems) which happen to give faults for
 907 * non-aligned memory accesses, care was taken to align this structure
 908 * in a way that gauranteed all accesses larger than 8 bits were aligned
 909 * on the appropriate boundary.  It's also organized to try and be more
 910 * cache line efficient.  Be careful when changing this lest you might hurt
 911 * overall performance and bring down the wrath of the masses.
 912 */
 913struct aic7xxx_host {
 914  /*
 915   *  This is the first 64 bytes in the host struct
 916   */
 917
 918  /*
 919   * We are grouping things here....first, items that get either read or
 920   * written with nearly every interrupt
 921   */
 922        volatile long   flags;
 923        ahc_feature     features;       /* chip features */
 924        unsigned long   base;           /* card base address */
 925        volatile unsigned char  __iomem *maddr; /* memory mapped address */
 926        unsigned long   isr_count;      /* Interrupt count */
 927        unsigned long   spurious_int;
 928        scb_data_type   *scb_data;
 929        struct aic7xxx_cmd_queue {
 930                struct scsi_cmnd *head;
 931                struct scsi_cmnd *tail;
 932        } completeq;
 933
 934        /*
 935        * Things read/written on nearly every entry into aic7xxx_queue()
 936        */
 937        volatile scb_queue_type waiting_scbs;
 938        unsigned char   unpause;        /* unpause value for HCNTRL */
 939        unsigned char   pause;          /* pause value for HCNTRL */
 940        volatile unsigned char  qoutfifonext;
 941        volatile unsigned char  activescbs;     /* active scbs */
 942        volatile unsigned char  max_activescbs;
 943        volatile unsigned char  qinfifonext;
 944        volatile unsigned char  *untagged_scbs;
 945        volatile unsigned char  *qoutfifo;
 946        volatile unsigned char  *qinfifo;
 947
 948        unsigned char   dev_last_queue_full[MAX_TARGETS];
 949        unsigned char   dev_last_queue_full_count[MAX_TARGETS];
 950        unsigned short  ultraenb; /* Gets downloaded to card as a bitmap */
 951        unsigned short  discenable; /* Gets downloaded to card as a bitmap */
 952        transinfo_type  user[MAX_TARGETS];
 953
 954        unsigned char   msg_buf[13];    /* The message for the target */
 955        unsigned char   msg_type;
 956#define MSG_TYPE_NONE              0x00
 957#define MSG_TYPE_INITIATOR_MSGOUT  0x01
 958#define MSG_TYPE_INITIATOR_MSGIN   0x02
 959        unsigned char   msg_len;        /* Length of message */
 960        unsigned char   msg_index;      /* Index into msg_buf array */
 961
 962
 963        /*
 964         * We put the less frequently used host structure items
 965         * after the more frequently used items to try and ease
 966         * the burden on the cache subsystem.
 967         * These entries are not *commonly* accessed, whereas
 968         * the preceding entries are accessed very often.
 969         */
 970
 971        unsigned int    irq;            /* IRQ for this adapter */
 972        int             instance;       /* aic7xxx instance number */
 973        int             scsi_id;        /* host adapter SCSI ID */
 974        int             scsi_id_b;      /* channel B for twin adapters */
 975        unsigned int    bios_address;
 976        int             board_name_index;
 977        unsigned short  bios_control;           /* bios control - SEEPROM */
 978        unsigned short  adapter_control;        /* adapter control - SEEPROM */
 979        struct pci_dev  *pdev;
 980        unsigned char   pci_bus;
 981        unsigned char   pci_device_fn;
 982        struct seeprom_config   sc;
 983        unsigned short  sc_type;
 984        unsigned short  sc_size;
 985        struct aic7xxx_host     *next;  /* allow for multiple IRQs */
 986        struct Scsi_Host        *host;  /* pointer to scsi host */
 987        struct list_head         aic_devs; /* all aic_dev structs on host */
 988        int             host_no;        /* SCSI host number */
 989        unsigned long   mbase;          /* I/O memory address */
 990        ahc_chip        chip;           /* chip type */
 991        ahc_bugs        bugs;
 992        dma_addr_t      fifo_dma;       /* DMA handle for fifo arrays */
 993};
 994
 995/*
 996 * Valid SCSIRATE values. (p. 3-17)
 997 * Provides a mapping of transfer periods in ns/4 to the proper value to
 998 * stick in the SCSIRATE reg to use that transfer rate.
 999 */
1000#define AHC_SYNCRATE_ULTRA3 0
1001#define AHC_SYNCRATE_ULTRA2 1
1002#define AHC_SYNCRATE_ULTRA  3
1003#define AHC_SYNCRATE_FAST   6
1004#define AHC_SYNCRATE_CRC 0x40
1005#define AHC_SYNCRATE_SE  0x10
1006static struct aic7xxx_syncrate {
1007  /* Rates in Ultra mode have bit 8 of sxfr set */
1008#define                ULTRA_SXFR 0x100
1009  int sxfr_ultra2;
1010  int sxfr;
1011  unsigned char period;
1012  const char *rate[2];
1013} aic7xxx_syncrates[] = {
1014  { 0x42,  0x000,   9,  {"80.0", "160.0"} },
1015  { 0x13,  0x000,  10,  {"40.0", "80.0"} },
1016  { 0x14,  0x000,  11,  {"33.0", "66.6"} },
1017  { 0x15,  0x100,  12,  {"20.0", "40.0"} },
1018  { 0x16,  0x110,  15,  {"16.0", "32.0"} },
1019  { 0x17,  0x120,  18,  {"13.4", "26.8"} },
1020  { 0x18,  0x000,  25,  {"10.0", "20.0"} },
1021  { 0x19,  0x010,  31,  {"8.0",  "16.0"} },
1022  { 0x1a,  0x020,  37,  {"6.67", "13.3"} },
1023  { 0x1b,  0x030,  43,  {"5.7",  "11.4"} },
1024  { 0x10,  0x040,  50,  {"5.0",  "10.0"} },
1025  { 0x00,  0x050,  56,  {"4.4",  "8.8" } },
1026  { 0x00,  0x060,  62,  {"4.0",  "8.0" } },
1027  { 0x00,  0x070,  68,  {"3.6",  "7.2" } },
1028  { 0x00,  0x000,  0,   {NULL, NULL}   },
1029};
1030
1031#define CTL_OF_SCB(scb) (((scb->hscb)->target_channel_lun >> 3) & 0x1),  \
1032                        (((scb->hscb)->target_channel_lun >> 4) & 0xf), \
1033                        ((scb->hscb)->target_channel_lun & 0x07)
1034
1035#define CTL_OF_CMD(cmd) ((cmd->device->channel) & 0x01),  \
1036                        ((cmd->device->id) & 0x0f), \
1037                        ((cmd->device->lun) & 0x07)
1038
1039#define TARGET_INDEX(cmd)  ((cmd)->device->id | ((cmd)->device->channel << 3))
1040
1041/*
1042 * A nice little define to make doing our printks a little easier
1043 */
1044
1045#define WARN_LEAD KERN_WARNING "(scsi%d:%d:%d:%d) "
1046#define INFO_LEAD KERN_INFO "(scsi%d:%d:%d:%d) "
1047
1048/*
1049 * XXX - these options apply unilaterally to _all_ 274x/284x/294x
1050 *       cards in the system.  This should be fixed.  Exceptions to this
1051 *       rule are noted in the comments.
1052 */
1053
1054/*
1055 * Use this as the default queue depth when setting tagged queueing on.
1056 */
1057static unsigned int aic7xxx_default_queue_depth = AIC7XXX_CMDS_PER_DEVICE;
1058
1059/*
1060 * Skip the scsi bus reset.  Non 0 make us skip the reset at startup.  This
1061 * has no effect on any later resets that might occur due to things like
1062 * SCSI bus timeouts.
1063 */
1064static unsigned int aic7xxx_no_reset = 0;
1065/*
1066 * Certain PCI motherboards will scan PCI devices from highest to lowest,
1067 * others scan from lowest to highest, and they tend to do all kinds of
1068 * strange things when they come into contact with PCI bridge chips.  The
1069 * net result of all this is that the PCI card that is actually used to boot
1070 * the machine is very hard to detect.  Most motherboards go from lowest
1071 * PCI slot number to highest, and the first SCSI controller found is the
1072 * one you boot from.  The only exceptions to this are when a controller
1073 * has its BIOS disabled.  So, we by default sort all of our SCSI controllers
1074 * from lowest PCI slot number to highest PCI slot number.  We also force
1075 * all controllers with their BIOS disabled to the end of the list.  This
1076 * works on *almost* all computers.  Where it doesn't work, we have this
1077 * option.  Setting this option to non-0 will reverse the order of the sort
1078 * to highest first, then lowest, but will still leave cards with their BIOS
1079 * disabled at the very end.  That should fix everyone up unless there are
1080 * really strange cirumstances.
1081 */
1082static int aic7xxx_reverse_scan = 0;
1083/*
1084 * Should we force EXTENDED translation on a controller.
1085 *     0 == Use whatever is in the SEEPROM or default to off
1086 *     1 == Use whatever is in the SEEPROM or default to on
1087 */
1088static unsigned int aic7xxx_extended = 0;
1089/*
1090 * The IRQ trigger method used on EISA controllers. Does not effect PCI cards.
1091 *   -1 = Use detected settings.
1092 *    0 = Force Edge triggered mode.
1093 *    1 = Force Level triggered mode.
1094 */
1095static int aic7xxx_irq_trigger = -1;
1096/*
1097 * This variable is used to override the termination settings on a controller.
1098 * This should not be used under normal conditions.  However, in the case
1099 * that a controller does not have a readable SEEPROM (so that we can't
1100 * read the SEEPROM settings directly) and that a controller has a buggered
1101 * version of the cable detection logic, this can be used to force the 
1102 * correct termination.  It is preferable to use the manual termination
1103 * settings in the BIOS if possible, but some motherboard controllers store
1104 * those settings in a format we can't read.  In other cases, auto term
1105 * should also work, but the chipset was put together with no auto term
1106 * logic (common on motherboard controllers).  In those cases, we have
1107 * 32 bits here to work with.  That's good for 8 controllers/channels.  The
1108 * bits are organized as 4 bits per channel, with scsi0 getting the lowest
1109 * 4 bits in the int.  A 1 in a bit position indicates the termination setting
1110 * that corresponds to that bit should be enabled, a 0 is disabled.
1111 * It looks something like this:
1112 *
1113 *    0x0f =  1111-Single Ended Low Byte Termination on/off
1114 *            ||\-Single Ended High Byte Termination on/off
1115 *            |\-LVD Low Byte Termination on/off
1116 *            \-LVD High Byte Termination on/off
1117 *
1118 * For non-Ultra2 controllers, the upper 2 bits are not important.  So, to
1119 * enable both high byte and low byte termination on scsi0, I would need to
1120 * make sure that the override_term variable was set to 0x03 (bits 0011).
1121 * To make sure that all termination is enabled on an Ultra2 controller at
1122 * scsi2 and only high byte termination on scsi1 and high and low byte
1123 * termination on scsi0, I would set override_term=0xf23 (bits 1111 0010 0011)
1124 *
1125 * For the most part, users should never have to use this, that's why I
1126 * left it fairly cryptic instead of easy to understand.  If you need it,
1127 * most likely someone will be telling you what your's needs to be set to.
1128 */
1129static int aic7xxx_override_term = -1;
1130/*
1131 * Certain motherboard chipset controllers tend to screw
1132 * up the polarity of the term enable output pin.  Use this variable
1133 * to force the correct polarity for your system.  This is a bitfield variable
1134 * similar to the previous one, but this one has one bit per channel instead
1135 * of four.
1136 *    0 = Force the setting to active low.
1137 *    1 = Force setting to active high.
1138 * Most Adaptec cards are active high, several motherboards are active low.
1139 * To force a 2940 card at SCSI 0 to active high and a motherboard 7895
1140 * controller at scsi1 and scsi2 to active low, and a 2910 card at scsi3
1141 * to active high, you would need to set stpwlev=0x9 (bits 1001).
1142 *
1143 * People shouldn't need to use this, but if you are experiencing lots of
1144 * SCSI timeout problems, this may help.  There is one sure way to test what
1145 * this option needs to be.  Using a boot floppy to boot the system, configure
1146 * your system to enable all SCSI termination (in the Adaptec SCSI BIOS) and
1147 * if needed then also pass a value to override_term to make sure that the
1148 * driver is enabling SCSI termination, then set this variable to either 0
1149 * or 1.  When the driver boots, make sure there are *NO* SCSI cables
1150 * connected to your controller.  If it finds and inits the controller
1151 * without problem, then the setting you passed to stpwlev was correct.  If
1152 * the driver goes into a reset loop and hangs the system, then you need the
1153 * other setting for this variable.  If neither setting lets the machine
1154 * boot then you have definite termination problems that may not be fixable.
1155 */
1156static int aic7xxx_stpwlev = -1;
1157/*
1158 * Set this to non-0 in order to force the driver to panic the kernel
1159 * and print out debugging info on a SCSI abort or reset cycle.
1160 */
1161static int aic7xxx_panic_on_abort = 0;
1162/*
1163 * PCI bus parity checking of the Adaptec controllers.  This is somewhat
1164 * dubious at best.  To my knowledge, this option has never actually
1165 * solved a PCI parity problem, but on certain machines with broken PCI
1166 * chipset configurations, it can generate tons of false error messages.
1167 * It's included in the driver for completeness.
1168 *   0 = Shut off PCI parity check
1169 *  -1 = Normal polarity pci parity checking
1170 *   1 = reverse polarity pci parity checking
1171 *
1172 * NOTE: you can't actually pass -1 on the lilo prompt.  So, to set this
1173 * variable to -1 you would actually want to simply pass the variable
1174 * name without a number.  That will invert the 0 which will result in
1175 * -1.
1176 */
1177static int aic7xxx_pci_parity = 0;
1178/*
1179 * Set this to any non-0 value to cause us to dump the contents of all
1180 * the card's registers in a hex dump format tailored to each model of
1181 * controller.
1182 * 
1183 * NOTE: THE CONTROLLER IS LEFT IN AN UNUSEABLE STATE BY THIS OPTION.
1184 *       YOU CANNOT BOOT UP WITH THIS OPTION, IT IS FOR DEBUGGING PURPOSES
1185 *       ONLY
1186 */
1187static int aic7xxx_dump_card = 0;
1188/*
1189 * Set this to a non-0 value to make us dump out the 32 bit instruction
1190 * registers on the card after completing the sequencer download.  This
1191 * allows the actual sequencer download to be verified.  It is possible
1192 * to use this option and still boot up and run your system.  This is
1193 * only intended for debugging purposes.
1194 */
1195static int aic7xxx_dump_sequencer = 0;
1196/*
1197 * Certain newer motherboards have put new PCI based devices into the
1198 * IO spaces that used to typically be occupied by VLB or EISA cards.
1199 * This overlap can cause these newer motherboards to lock up when scanned
1200 * for older EISA and VLB devices.  Setting this option to non-0 will
1201 * cause the driver to skip scanning for any VLB or EISA controllers and
1202 * only support the PCI controllers.  NOTE: this means that if the kernel
1203 * os compiled with PCI support disabled, then setting this to non-0
1204 * would result in never finding any devices :)
1205 */
1206static int aic7xxx_no_probe = 0;
1207/*
1208 * On some machines, enabling the external SCB RAM isn't reliable yet.  I
1209 * haven't had time to make test patches for things like changing the
1210 * timing mode on that external RAM either.  Some of those changes may
1211 * fix the problem.  Until then though, we default to external SCB RAM
1212 * off and give a command line option to enable it.
1213 */
1214static int aic7xxx_scbram = 0;
1215/*
1216 * So that we can set how long each device is given as a selection timeout.
1217 * The table of values goes like this:
1218 *   0 - 256ms
1219 *   1 - 128ms
1220 *   2 - 64ms
1221 *   3 - 32ms
1222 * We default to 64ms because it's fast.  Some old SCSI-I devices need a
1223 * longer time.  The final value has to be left shifted by 3, hence 0x10
1224 * is the final value.
1225 */
1226static int aic7xxx_seltime = 0x10;
1227/*
1228 * So that insmod can find the variable and make it point to something
1229 */
1230#ifdef MODULE
1231static char * aic7xxx = NULL;
1232module_param(aic7xxx, charp, 0);
1233#endif
1234
1235#define VERBOSE_NORMAL         0x0000
1236#define VERBOSE_NEGOTIATION    0x0001
1237#define VERBOSE_SEQINT         0x0002
1238#define VERBOSE_SCSIINT        0x0004
1239#define VERBOSE_PROBE          0x0008
1240#define VERBOSE_PROBE2         0x0010
1241#define VERBOSE_NEGOTIATION2   0x0020
1242#define VERBOSE_MINOR_ERROR    0x0040
1243#define VERBOSE_TRACING        0x0080
1244#define VERBOSE_ABORT          0x0f00
1245#define VERBOSE_ABORT_MID      0x0100
1246#define VERBOSE_ABORT_FIND     0x0200
1247#define VERBOSE_ABORT_PROCESS  0x0400
1248#define VERBOSE_ABORT_RETURN   0x0800
1249#define VERBOSE_RESET          0xf000
1250#define VERBOSE_RESET_MID      0x1000
1251#define VERBOSE_RESET_FIND     0x2000
1252#define VERBOSE_RESET_PROCESS  0x4000
1253#define VERBOSE_RESET_RETURN   0x8000
1254static int aic7xxx_verbose = VERBOSE_NORMAL | VERBOSE_NEGOTIATION |
1255           VERBOSE_PROBE;                     /* verbose messages */
1256
1257
1258/****************************************************************************
1259 *
1260 * We're going to start putting in function declarations so that order of
1261 * functions is no longer important.  As needed, they are added here.
1262 *
1263 ***************************************************************************/
1264
1265static int aic7xxx_release(struct Scsi_Host *host);
1266static void aic7xxx_set_syncrate(struct aic7xxx_host *p, 
1267                struct aic7xxx_syncrate *syncrate, int target, int channel,
1268                unsigned int period, unsigned int offset, unsigned char options,
1269                unsigned int type, struct aic_dev_data *aic_dev);
1270static void aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel,
1271                int lun, unsigned int width, unsigned int type,
1272                struct aic_dev_data *aic_dev);
1273static void aic7xxx_panic_abort(struct aic7xxx_host *p, struct scsi_cmnd *cmd);
1274static void aic7xxx_print_card(struct aic7xxx_host *p);
1275static void aic7xxx_print_scratch_ram(struct aic7xxx_host *p);
1276static void aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded);
1277#ifdef AIC7XXX_VERBOSE_DEBUGGING
1278static void aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer);
1279#endif
1280
1281/****************************************************************************
1282 *
1283 * These functions are now used.  They happen to be wrapped in useless
1284 * inb/outb port read/writes around the real reads and writes because it
1285 * seems that certain very fast CPUs have a problem dealing with us when
1286 * going at full speed.
1287 *
1288 ***************************************************************************/
1289
1290static unsigned char
1291aic_inb(struct aic7xxx_host *p, long port)
1292{
1293#ifdef MMAPIO
1294  unsigned char x;
1295  if(p->maddr)
1296  {
1297    x = readb(p->maddr + port);
1298  }
1299  else
1300  {
1301    x = inb(p->base + port);
1302  }
1303  return(x);
1304#else
1305  return(inb(p->base + port));
1306#endif
1307}
1308
1309static void
1310aic_outb(struct aic7xxx_host *p, unsigned char val, long port)
1311{
1312#ifdef MMAPIO
1313  if(p->maddr)
1314  {
1315    writeb(val, p->maddr + port);
1316    mb(); /* locked operation in order to force CPU ordering */
1317    readb(p->maddr + HCNTRL); /* dummy read to flush the PCI write */
1318  }
1319  else
1320  {
1321    outb(val, p->base + port);
1322    mb(); /* locked operation in order to force CPU ordering */
1323  }
1324#else
1325  outb(val, p->base + port);
1326  mb(); /* locked operation in order to force CPU ordering */
1327#endif
1328}
1329
1330/*+F*************************************************************************
1331 * Function:
1332 *   aic7xxx_setup
1333 *
1334 * Description:
1335 *   Handle Linux boot parameters. This routine allows for assigning a value
1336 *   to a parameter with a ':' between the parameter and the value.
1337 *   ie. aic7xxx=unpause:0x0A,extended
1338 *-F*************************************************************************/
1339static int
1340aic7xxx_setup(char *s)
1341{
1342  int   i, n;
1343  char *p;
1344  char *end;
1345
1346  static struct {
1347    const char *name;
1348    unsigned int *flag;
1349  } options[] = {
1350    { "extended",    &aic7xxx_extended },
1351    { "no_reset",    &aic7xxx_no_reset },
1352    { "irq_trigger", &aic7xxx_irq_trigger },
1353    { "verbose",     &aic7xxx_verbose },
1354    { "reverse_scan",&aic7xxx_reverse_scan },
1355    { "override_term", &aic7xxx_override_term },
1356    { "stpwlev", &aic7xxx_stpwlev },
1357    { "no_probe", &aic7xxx_no_probe },
1358    { "panic_on_abort", &aic7xxx_panic_on_abort },
1359    { "pci_parity", &aic7xxx_pci_parity },
1360    { "dump_card", &aic7xxx_dump_card },
1361    { "dump_sequencer", &aic7xxx_dump_sequencer },
1362    { "default_queue_depth", &aic7xxx_default_queue_depth },
1363    { "scbram", &aic7xxx_scbram },
1364    { "seltime", &aic7xxx_seltime },
1365    { "tag_info",    NULL }
1366  };
1367
1368  end = strchr(s, '\0');
1369
1370  while ((p = strsep(&s, ",.")) != NULL)
1371  {
1372    for (i = 0; i < ARRAY_SIZE(options); i++)
1373    {
1374      n = strlen(options[i].name);
1375      if (!strncmp(options[i].name, p, n))
1376      {
1377        if (!strncmp(p, "tag_info", n))
1378        {
1379          if (p[n] == ':')
1380          {
1381            char *base;
1382            char *tok, *tok_end, *tok_end2;
1383            char tok_list[] = { '.', ',', '{', '}', '\0' };
1384            int i, instance = -1, device = -1;
1385            unsigned char done = FALSE;
1386
1387            base = p;
1388            tok = base + n + 1;  /* Forward us just past the ':' */
1389            tok_end = strchr(tok, '\0');
1390            if (tok_end < end)
1391              *tok_end = ',';
1392            while(!done)
1393            {
1394              switch(*tok)
1395              {
1396                case '{':
1397                  if (instance == -1)
1398                    instance = 0;
1399                  else if (device == -1)
1400                    device = 0;
1401                  tok++;
1402                  break;
1403                case '}':
1404                  if (device != -1)
1405                    device = -1;
1406                  else if (instance != -1)
1407                    instance = -1;
1408                  tok++;
1409                  break;
1410                case ',':
1411                case '.':
1412                  if (instance == -1)
1413                    done = TRUE;
1414                  else if (device >= 0)
1415                    device++;
1416                  else if (instance >= 0)
1417                    instance++;
1418                  if ( (device >= MAX_TARGETS) || 
1419                       (instance >= ARRAY_SIZE(aic7xxx_tag_info)) )
1420                    done = TRUE;
1421                  tok++;
1422                  if (!done)
1423                  {
1424                    base = tok;
1425                  }
1426                  break;
1427                case '\0':
1428                  done = TRUE;
1429                  break;
1430                default:
1431                  done = TRUE;
1432                  tok_end = strchr(tok, '\0');
1433                  for(i=0; tok_list[i]; i++)
1434                  {
1435                    tok_end2 = strchr(tok, tok_list[i]);
1436                    if ( (tok_end2) && (tok_end2 < tok_end) )
1437                    {
1438                      tok_end = tok_end2;
1439                      done = FALSE;
1440                    }
1441                  }
1442                  if ( (instance >= 0) && (device >= 0) &&
1443                       (instance < ARRAY_SIZE(aic7xxx_tag_info)) &&
1444                       (device < MAX_TARGETS) )
1445                    aic7xxx_tag_info[instance].tag_commands[device] =
1446                      simple_strtoul(tok, NULL, 0) & 0xff;
1447                  tok = tok_end;
1448                  break;
1449              }
1450            }
1451            while((p != base) && (p != NULL))
1452              p = strsep(&s, ",.");
1453          }
1454        }
1455        else if (p[n] == ':')
1456        {
1457          *(options[i].flag) = simple_strtoul(p + n + 1, NULL, 0);
1458          if(!strncmp(p, "seltime", n))
1459          {
1460            *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1461          }
1462        }
1463        else if (!strncmp(p, "verbose", n))
1464        {
1465          *(options[i].flag) = 0xff29;
1466        }
1467        else
1468        {
1469          *(options[i].flag) = ~(*(options[i].flag));
1470          if(!strncmp(p, "seltime", n))
1471          {
1472            *(options[i].flag) = (*(options[i].flag) % 4) << 3;
1473          }
1474        }
1475      }
1476    }
1477  }
1478  return 1;
1479}
1480
1481__setup("aic7xxx=", aic7xxx_setup);
1482
1483/*+F*************************************************************************
1484 * Function:
1485 *   pause_sequencer
1486 *
1487 * Description:
1488 *   Pause the sequencer and wait for it to actually stop - this
1489 *   is important since the sequencer can disable pausing for critical
1490 *   sections.
1491 *-F*************************************************************************/
1492static void
1493pause_sequencer(struct aic7xxx_host *p)
1494{
1495  aic_outb(p, p->pause, HCNTRL);
1496  while ((aic_inb(p, HCNTRL) & PAUSE) == 0)
1497  {
1498    ;
1499  }
1500  if(p->features & AHC_ULTRA2)
1501  {
1502    aic_inb(p, CCSCBCTL);
1503  }
1504}
1505
1506/*+F*************************************************************************
1507 * Function:
1508 *   unpause_sequencer
1509 *
1510 * Description:
1511 *   Unpause the sequencer. Unremarkable, yet done often enough to
1512 *   warrant an easy way to do it.
1513 *-F*************************************************************************/
1514static void
1515unpause_sequencer(struct aic7xxx_host *p, int unpause_always)
1516{
1517  if (unpause_always ||
1518      ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
1519        !(p->flags & AHC_HANDLING_REQINITS) ) )
1520  {
1521    aic_outb(p, p->unpause, HCNTRL);
1522  }
1523}
1524
1525/*+F*************************************************************************
1526 * Function:
1527 *   restart_sequencer
1528 *
1529 * Description:
1530 *   Restart the sequencer program from address zero.  This assumes
1531 *   that the sequencer is already paused.
1532 *-F*************************************************************************/
1533static void
1534restart_sequencer(struct aic7xxx_host *p)
1535{
1536  aic_outb(p, 0, SEQADDR0);
1537  aic_outb(p, 0, SEQADDR1);
1538  aic_outb(p, FASTMODE, SEQCTL);
1539}
1540
1541/*
1542 * We include the aic7xxx_seq.c file here so that the other defines have
1543 * already been made, and so that it comes before the code that actually
1544 * downloads the instructions (since we don't typically use function
1545 * prototype, our code has to be ordered that way, it's a left-over from
1546 * the original driver days.....I should fix it some time DL).
1547 */
1548#include "aic7xxx_old/aic7xxx_seq.c"
1549
1550/*+F*************************************************************************
1551 * Function:
1552 *   aic7xxx_check_patch
1553 *
1554 * Description:
1555 *   See if the next patch to download should be downloaded.
1556 *-F*************************************************************************/
1557static int
1558aic7xxx_check_patch(struct aic7xxx_host *p,
1559  struct sequencer_patch **start_patch, int start_instr, int *skip_addr)
1560{
1561  struct sequencer_patch *cur_patch;
1562  struct sequencer_patch *last_patch;
1563  int num_patches;
1564
1565  num_patches = ARRAY_SIZE(sequencer_patches);
1566  last_patch = &sequencer_patches[num_patches];
1567  cur_patch = *start_patch;
1568
1569  while ((cur_patch < last_patch) && (start_instr == cur_patch->begin))
1570  {
1571    if (cur_patch->patch_func(p) == 0)
1572    {
1573      /*
1574       * Start rejecting code.
1575       */
1576      *skip_addr = start_instr + cur_patch->skip_instr;
1577      cur_patch += cur_patch->skip_patch;
1578    }
1579    else
1580    {
1581      /*
1582       * Found an OK patch.  Advance the patch pointer to the next patch
1583       * and wait for our instruction pointer to get here.
1584       */
1585      cur_patch++;
1586    }
1587  }
1588
1589  *start_patch = cur_patch;
1590  if (start_instr < *skip_addr)
1591    /*
1592     * Still skipping
1593     */
1594    return (0);
1595  return(1);
1596}
1597
1598
1599/*+F*************************************************************************
1600 * Function:
1601 *   aic7xxx_download_instr
1602 *
1603 * Description:
1604 *   Find the next patch to download.
1605 *-F*************************************************************************/
1606static void
1607aic7xxx_download_instr(struct aic7xxx_host *p, int instrptr,
1608  unsigned char *dconsts)
1609{
1610  union ins_formats instr;
1611  struct ins_format1 *fmt1_ins;
1612  struct ins_format3 *fmt3_ins;
1613  unsigned char opcode;
1614
1615  instr = *(union ins_formats*) &seqprog[instrptr * 4];
1616
1617  instr.integer = le32_to_cpu(instr.integer);
1618  
1619  fmt1_ins = &instr.format1;
1620  fmt3_ins = NULL;
1621
1622  /* Pull the opcode */
1623  opcode = instr.format1.opcode;
1624  switch (opcode)
1625  {
1626    case AIC_OP_JMP:
1627    case AIC_OP_JC:
1628    case AIC_OP_JNC:
1629    case AIC_OP_CALL:
1630    case AIC_OP_JNE:
1631    case AIC_OP_JNZ:
1632    case AIC_OP_JE:
1633    case AIC_OP_JZ:
1634    {
1635      struct sequencer_patch *cur_patch;
1636      int address_offset;
1637      unsigned int address;
1638      int skip_addr;
1639      int i;
1640
1641      fmt3_ins = &instr.format3;
1642      address_offset = 0;
1643      address = fmt3_ins->address;
1644      cur_patch = sequencer_patches;
1645      skip_addr = 0;
1646
1647      for (i = 0; i < address;)
1648      {
1649        aic7xxx_check_patch(p, &cur_patch, i, &skip_addr);
1650        if (skip_addr > i)
1651        {
1652          int end_addr;
1653
1654          end_addr = min_t(int, address, skip_addr);
1655          address_offset += end_addr - i;
1656          i = skip_addr;
1657        }
1658        else
1659        {
1660          i++;
1661        }
1662      }
1663      address -= address_offset;
1664      fmt3_ins->address = address;
1665      /* Fall Through to the next code section */
1666    }
1667    case AIC_OP_OR:
1668    case AIC_OP_AND:
1669    case AIC_OP_XOR:
1670    case AIC_OP_ADD:
1671    case AIC_OP_ADC:
1672    case AIC_OP_BMOV:
1673      if (fmt1_ins->parity != 0)
1674      {
1675        fmt1_ins->immediate = dconsts[fmt1_ins->immediate];
1676      }
1677      fmt1_ins->parity = 0;
1678      /* Fall Through to the next code section */
1679    case AIC_OP_ROL:
1680      if ((p->features & AHC_ULTRA2) != 0)
1681      {
1682        int i, count;
1683
1684        /* Calculate odd parity for the instruction */
1685        for ( i=0, count=0; i < 31; i++)
1686        {
1687          unsigned int mask;
1688
1689          mask = 0x01 << i;
1690          if ((instr.integer & mask) != 0)
1691            count++;
1692        }
1693        if (!(count & 0x01))
1694          instr.format1.parity = 1;
1695      }
1696      else
1697      {
1698        if (fmt3_ins != NULL)
1699        {
1700          instr.integer =  fmt3_ins->immediate |
1701                          (fmt3_ins->source << 8) |
1702                          (fmt3_ins->address << 16) |
1703                          (fmt3_ins->opcode << 25);
1704        }
1705        else
1706        {
1707          instr.integer =  fmt1_ins->immediate |
1708                          (fmt1_ins->source << 8) |
1709                          (fmt1_ins->destination << 16) |
1710                          (fmt1_ins->ret << 24) |
1711                          (fmt1_ins->opcode << 25);
1712        }
1713      }
1714      aic_outb(p, (instr.integer & 0xff), SEQRAM);
1715      aic_outb(p, ((instr.integer >> 8) & 0xff), SEQRAM);
1716      aic_outb(p, ((instr.integer >> 16) & 0xff), SEQRAM);
1717      aic_outb(p, ((instr.integer >> 24) & 0xff), SEQRAM);
1718      udelay(10);
1719      break;
1720
1721    default:
1722      panic("aic7xxx: Unknown opcode encountered in sequencer program.");
1723      break;
1724  }
1725}
1726
1727
1728/*+F*************************************************************************
1729 * Function:
1730 *   aic7xxx_loadseq
1731 *
1732 * Description:
1733 *   Load the sequencer code into the controller memory.
1734 *-F*************************************************************************/
1735static void
1736aic7xxx_loadseq(struct aic7xxx_host *p)
1737{
1738  struct sequencer_patch *cur_patch;
1739  int i;
1740  int downloaded;
1741  int skip_addr;
1742  unsigned char download_consts[4] = {0, 0, 0, 0};
1743
1744  if (aic7xxx_verbose & VERBOSE_PROBE)
1745  {
1746    printk(KERN_INFO "(scsi%d) Downloading sequencer code...", p->host_no);
1747  }
1748#if 0
1749  download_consts[TMODE_NUMCMDS] = p->num_targetcmds;
1750#endif
1751  download_consts[TMODE_NUMCMDS] = 0;
1752  cur_patch = &sequencer_patches[0];
1753  downloaded = 0;
1754  skip_addr = 0;
1755
1756  aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1757  aic_outb(p, 0, SEQADDR0);
1758  aic_outb(p, 0, SEQADDR1);
1759
1760  for (i = 0; i < sizeof(seqprog) / 4;  i++)
1761  {
1762    if (aic7xxx_check_patch(p, &cur_patch, i, &skip_addr) == 0)
1763    {
1764      /* Skip this instruction for this configuration. */
1765      continue;
1766    }
1767    aic7xxx_download_instr(p, i, &download_consts[0]);
1768    downloaded++;
1769  }
1770
1771  aic_outb(p, 0, SEQADDR0);
1772  aic_outb(p, 0, SEQADDR1);
1773  aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1774  unpause_sequencer(p, TRUE);
1775  mdelay(1);
1776  pause_sequencer(p);
1777  aic_outb(p, FASTMODE, SEQCTL);
1778  if (aic7xxx_verbose & VERBOSE_PROBE)
1779  {
1780    printk(" %d instructions downloaded\n", downloaded);
1781  }
1782  if (aic7xxx_dump_sequencer)
1783    aic7xxx_print_sequencer(p, downloaded);
1784}
1785
1786/*+F*************************************************************************
1787 * Function:
1788 *   aic7xxx_print_sequencer
1789 *
1790 * Description:
1791 *   Print the contents of the sequencer memory to the screen.
1792 *-F*************************************************************************/
1793static void
1794aic7xxx_print_sequencer(struct aic7xxx_host *p, int downloaded)
1795{
1796  int i, k, temp;
1797  
1798  aic_outb(p, PERRORDIS|LOADRAM|FAILDIS|FASTMODE, SEQCTL);
1799  aic_outb(p, 0, SEQADDR0);
1800  aic_outb(p, 0, SEQADDR1);
1801
1802  k = 0;
1803  for (i=0; i < downloaded; i++)
1804  {
1805    if ( k == 0 )
1806      printk("%03x: ", i);
1807    temp = aic_inb(p, SEQRAM);
1808    temp |= (aic_inb(p, SEQRAM) << 8);
1809    temp |= (aic_inb(p, SEQRAM) << 16);
1810    temp |= (aic_inb(p, SEQRAM) << 24);
1811    printk("%08x", temp);
1812    if ( ++k == 8 )
1813    {
1814      printk("\n");
1815      k = 0;
1816    }
1817    else
1818      printk(" ");
1819  }
1820  aic_outb(p, 0, SEQADDR0);
1821  aic_outb(p, 0, SEQADDR1);
1822  aic_outb(p, FASTMODE | FAILDIS, SEQCTL);
1823  unpause_sequencer(p, TRUE);
1824  mdelay(1);
1825  pause_sequencer(p);
1826  aic_outb(p, FASTMODE, SEQCTL);
1827  printk("\n");
1828}
1829
1830/*+F*************************************************************************
1831 * Function:
1832 *   aic7xxx_info
1833 *
1834 * Description:
1835 *   Return a string describing the driver.
1836 *-F*************************************************************************/
1837static const char *
1838aic7xxx_info(struct Scsi_Host *dooh)
1839{
1840  static char buffer[256];
1841  char *bp;
1842  struct aic7xxx_host *p;
1843
1844  bp = &buffer[0];
1845  p = (struct aic7xxx_host *)dooh->hostdata;
1846  memset(bp, 0, sizeof(buffer));
1847  strcpy(bp, "Adaptec AHA274x/284x/294x (EISA/VLB/PCI-Fast SCSI) ");
1848  strcat(bp, AIC7XXX_C_VERSION);
1849  strcat(bp, "/");
1850  strcat(bp, AIC7XXX_H_VERSION);
1851  strcat(bp, "\n");
1852  strcat(bp, "       <");
1853  strcat(bp, board_names[p->board_name_index]);
1854  strcat(bp, ">");
1855
1856  return(bp);
1857}
1858
1859/*+F*************************************************************************
1860 * Function:
1861 *   aic7xxx_find_syncrate
1862 *
1863 * Description:
1864 *   Look up the valid period to SCSIRATE conversion in our table
1865 *-F*************************************************************************/
1866static struct aic7xxx_syncrate *
1867aic7xxx_find_syncrate(struct aic7xxx_host *p, unsigned int *period,
1868  unsigned int maxsync, unsigned char *options)
1869{
1870  struct aic7xxx_syncrate *syncrate;
1871  int done = FALSE;
1872
1873  switch(*options)
1874  {
1875    case MSG_EXT_PPR_OPTION_DT_CRC:
1876    case MSG_EXT_PPR_OPTION_DT_UNITS:
1877      if(!(p->features & AHC_ULTRA3))
1878      {
1879        *options = 0;
1880        maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1881      }
1882      break;
1883    case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1884    case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1885      if(!(p->features & AHC_ULTRA3))
1886      {
1887        *options = 0;
1888        maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1889      }
1890      else
1891      {
1892        /*
1893         * we don't support the Quick Arbitration variants of dual edge
1894         * clocking.  As it turns out, we want to send back the
1895         * same basic option, but without the QA attribute.
1896         * We know that we are responding because we would never set
1897         * these options ourself, we would only respond to them.
1898         */
1899        switch(*options)
1900        {
1901          case MSG_EXT_PPR_OPTION_DT_CRC_QUICK:
1902            *options = MSG_EXT_PPR_OPTION_DT_CRC;
1903            break;
1904          case MSG_EXT_PPR_OPTION_DT_UNITS_QUICK:
1905            *options = MSG_EXT_PPR_OPTION_DT_UNITS;
1906            break;
1907        }
1908      }
1909      break;
1910    default:
1911      *options = 0;
1912      maxsync = max_t(unsigned int, maxsync, AHC_SYNCRATE_ULTRA2);
1913      break;
1914  }
1915  syncrate = &aic7xxx_syncrates[maxsync];
1916  while ( (syncrate->rate[0] != NULL) &&
1917         (!(p->features & AHC_ULTRA2) || syncrate->sxfr_ultra2) )
1918  {
1919    if (*period <= syncrate->period) 
1920    {
1921      switch(*options)
1922      {
1923        case MSG_EXT_PPR_OPTION_DT_CRC:
1924        case MSG_EXT_PPR_OPTION_DT_UNITS:
1925          if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
1926          {
1927            done = TRUE;
1928            /*
1929             * oops, we went too low for the CRC/DualEdge signalling, so
1930             * clear the options byte
1931             */
1932            *options = 0;
1933            /*
1934             * We'll be sending a reply to this packet to set the options
1935             * properly, so unilaterally set the period as well.
1936             */
1937            *period = syncrate->period;
1938          }
1939          else
1940          {
1941            done = TRUE;
1942            if(syncrate == &aic7xxx_syncrates[maxsync])
1943            {
1944              *period = syncrate->period;
1945            }
1946          }
1947          break;
1948        default:
1949          if(!(syncrate->sxfr_ultra2 & AHC_SYNCRATE_CRC))
1950          {
1951            done = TRUE;
1952            if(syncrate == &aic7xxx_syncrates[maxsync])
1953            {
1954              *period = syncrate->period;
1955            }
1956          }
1957          break;
1958      }
1959      if(done)
1960      {
1961        break;
1962      }
1963    }
1964    syncrate++;
1965  }
1966  if ( (*period == 0) || (syncrate->rate[0] == NULL) ||
1967       ((p->features & AHC_ULTRA2) && (syncrate->sxfr_ultra2 == 0)) )
1968  {
1969    /*
1970     * Use async transfers for this target
1971     */
1972    *options = 0;
1973    *period = 255;
1974    syncrate = NULL;
1975  }
1976  return (syncrate);
1977}
1978
1979
1980/*+F*************************************************************************
1981 * Function:
1982 *   aic7xxx_find_period
1983 *
1984 * Description:
1985 *   Look up the valid SCSIRATE to period conversion in our table
1986 *-F*************************************************************************/
1987static unsigned int
1988aic7xxx_find_period(struct aic7xxx_host *p, unsigned int scsirate,
1989  unsigned int maxsync)
1990{
1991  struct aic7xxx_syncrate *syncrate;
1992
1993  if (p->features & AHC_ULTRA2)
1994  {
1995    scsirate &= SXFR_ULTRA2;
1996  }
1997  else
1998  {
1999    scsirate &= SXFR;
2000  }
2001
2002  syncrate = &aic7xxx_syncrates[maxsync];
2003  while (syncrate->rate[0] != NULL)
2004  {
2005    if (p->features & AHC_ULTRA2)
2006    {
2007      if (syncrate->sxfr_ultra2 == 0)
2008        break;
2009      else if (scsirate == syncrate->sxfr_ultra2)
2010        return (syncrate->period);
2011      else if (scsirate == (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC))
2012        return (syncrate->period);
2013    }
2014    else if (scsirate == (syncrate->sxfr & ~ULTRA_SXFR))
2015    {
2016      return (syncrate->period);
2017    }
2018    syncrate++;
2019  }
2020  return (0); /* async */
2021}
2022
2023/*+F*************************************************************************
2024 * Function:
2025 *   aic7xxx_validate_offset
2026 *
2027 * Description:
2028 *   Set a valid offset value for a particular card in use and transfer
2029 *   settings in use.
2030 *-F*************************************************************************/
2031static void
2032aic7xxx_validate_offset(struct aic7xxx_host *p,
2033  struct aic7xxx_syncrate *syncrate, unsigned int *offset, int wide)
2034{
2035  unsigned int maxoffset;
2036
2037  /* Limit offset to what the card (and device) can do */
2038  if (syncrate == NULL)
2039  {
2040    maxoffset = 0;
2041  }
2042  else if (p->features & AHC_ULTRA2)
2043  {
2044    maxoffset = MAX_OFFSET_ULTRA2;
2045  }
2046  else
2047  {
2048    if (wide)
2049      maxoffset = MAX_OFFSET_16BIT;
2050    else
2051      maxoffset = MAX_OFFSET_8BIT;
2052  }
2053  *offset = min(*offset, maxoffset);
2054}
2055
2056/*+F*************************************************************************
2057 * Function:
2058 *   aic7xxx_set_syncrate
2059 *
2060 * Description:
2061 *   Set the actual syncrate down in the card and in our host structs
2062 *-F*************************************************************************/
2063static void
2064aic7xxx_set_syncrate(struct aic7xxx_host *p, struct aic7xxx_syncrate *syncrate,
2065    int target, int channel, unsigned int period, unsigned int offset,
2066    unsigned char options, unsigned int type, struct aic_dev_data *aic_dev)
2067{
2068  unsigned char tindex;
2069  unsigned short target_mask;
2070  unsigned char lun, old_options;
2071  unsigned int old_period, old_offset;
2072
2073  tindex = target | (channel << 3);
2074  target_mask = 0x01 << tindex;
2075  lun = aic_inb(p, SCB_TCL) & 0x07;
2076
2077  if (syncrate == NULL)
2078  {
2079    period = 0;
2080    offset = 0;
2081  }
2082
2083  old_period = aic_dev->cur.period;
2084  old_offset = aic_dev->cur.offset;
2085  old_options = aic_dev->cur.options;
2086
2087  
2088  if (type & AHC_TRANS_CUR)
2089  {
2090    unsigned int scsirate;
2091
2092    scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2093    if (p->features & AHC_ULTRA2)
2094    {
2095      scsirate &= ~SXFR_ULTRA2;
2096      if (syncrate != NULL)
2097      {
2098        switch(options)
2099        {
2100          case MSG_EXT_PPR_OPTION_DT_UNITS:
2101            /*
2102             * mask off the CRC bit in the xfer settings
2103             */
2104            scsirate |= (syncrate->sxfr_ultra2 & ~AHC_SYNCRATE_CRC);
2105            break;
2106          default:
2107            scsirate |= syncrate->sxfr_ultra2;
2108            break;
2109        }
2110      }
2111      if (type & AHC_TRANS_ACTIVE)
2112      {
2113        aic_outb(p, offset, SCSIOFFSET);
2114      }
2115      aic_outb(p, offset, TARG_OFFSET + tindex);
2116    }
2117    else /* Not an Ultra2 controller */
2118    {
2119      scsirate &= ~(SXFR|SOFS);
2120      p->ultraenb &= ~target_mask;
2121      if (syncrate != NULL)
2122      {
2123        if (syncrate->sxfr & ULTRA_SXFR)
2124        {
2125          p->ultraenb |= target_mask;
2126        }
2127        scsirate |= (syncrate->sxfr & SXFR);
2128        scsirate |= (offset & SOFS);
2129      }
2130      if (type & AHC_TRANS_ACTIVE)
2131      {
2132        unsigned char sxfrctl0;
2133
2134        sxfrctl0 = aic_inb(p, SXFRCTL0);
2135        sxfrctl0 &= ~FAST20;
2136        if (p->ultraenb & target_mask)
2137          sxfrctl0 |= FAST20;
2138        aic_outb(p, sxfrctl0, SXFRCTL0);
2139      }
2140      aic_outb(p, p->ultraenb & 0xff, ULTRA_ENB);
2141      aic_outb(p, (p->ultraenb >> 8) & 0xff, ULTRA_ENB + 1 );
2142    }
2143    if (type & AHC_TRANS_ACTIVE)
2144    {
2145      aic_outb(p, scsirate, SCSIRATE);
2146    }
2147    aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2148    aic_dev->cur.period = period;
2149    aic_dev->cur.offset = offset;
2150    aic_dev->cur.options = options;
2151    if ( !(type & AHC_TRANS_QUITE) &&
2152         (aic7xxx_verbose & VERBOSE_NEGOTIATION) &&
2153         (aic_dev->flags & DEVICE_PRINT_DTR) )
2154    {
2155      if (offset)
2156      {
2157        int rate_mod = (scsirate & WIDEXFER) ? 1 : 0;
2158      
2159        printk(INFO_LEAD "Synchronous at %s Mbyte/sec, "
2160               "offset %d.\n", p->host_no, channel, target, lun,
2161               syncrate->rate[rate_mod], offset);
2162      }
2163      else
2164      {
2165        printk(INFO_LEAD "Using asynchronous transfers.\n",
2166               p->host_no, channel, target, lun);
2167      }
2168      aic_dev->flags &= ~DEVICE_PRINT_DTR;
2169    }
2170  }
2171
2172  if (type & AHC_TRANS_GOAL)
2173  {
2174    aic_dev->goal.period = period;
2175    aic_dev->goal.offset = offset;
2176    aic_dev->goal.options = options;
2177  }
2178
2179  if (type & AHC_TRANS_USER)
2180  {
2181    p->user[tindex].period = period;
2182    p->user[tindex].offset = offset;
2183    p->user[tindex].options = options;
2184  }
2185}
2186
2187/*+F*************************************************************************
2188 * Function:
2189 *   aic7xxx_set_width
2190 *
2191 * Description:
2192 *   Set the actual width down in the card and in our host structs
2193 *-F*************************************************************************/
2194static void
2195aic7xxx_set_width(struct aic7xxx_host *p, int target, int channel, int lun,
2196    unsigned int width, unsigned int type, struct aic_dev_data *aic_dev)
2197{
2198  unsigned char tindex;
2199  unsigned short target_mask;
2200  unsigned int old_width;
2201
2202  tindex = target | (channel << 3);
2203  target_mask = 1 << tindex;
2204  
2205  old_width = aic_dev->cur.width;
2206
2207  if (type & AHC_TRANS_CUR) 
2208  {
2209    unsigned char scsirate;
2210
2211    scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
2212
2213    scsirate &= ~WIDEXFER;
2214    if (width == MSG_EXT_WDTR_BUS_16_BIT)
2215      scsirate |= WIDEXFER;
2216
2217    aic_outb(p, scsirate, TARG_SCSIRATE + tindex);
2218
2219    if (type & AHC_TRANS_ACTIVE)
2220      aic_outb(p, scsirate, SCSIRATE);
2221
2222    aic_dev->cur.width = width;
2223
2224    if ( !(type & AHC_TRANS_QUITE) &&
2225          (aic7xxx_verbose & VERBOSE_NEGOTIATION2) && 
2226          (aic_dev->flags & DEVICE_PRINT_DTR) )
2227    {
2228      printk(INFO_LEAD "Using %s transfers\n", p->host_no, channel, target,
2229        lun, (scsirate & WIDEXFER) ? "Wide(16bit)" : "Narrow(8bit)" );
2230    }
2231  }
2232
2233  if (type & AHC_TRANS_GOAL)
2234    aic_dev->goal.width = width;
2235  if (type & AHC_TRANS_USER)
2236    p->user[tindex].width = width;
2237
2238  if (aic_dev->goal.offset)
2239  {
2240    if (p->features & AHC_ULTRA2)
2241    {
2242      aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
2243    }
2244    else if (width == MSG_EXT_WDTR_BUS_16_BIT)
2245    {
2246      aic_dev->goal.offset = MAX_OFFSET_16BIT;
2247    }
2248    else
2249    {
2250      aic_dev->goal.offset = MAX_OFFSET_8BIT;
2251    }
2252  }
2253}
2254      
2255/*+F*************************************************************************
2256 * Function:
2257 *   scbq_init
2258 *
2259 * Description:
2260 *   SCB queue initialization.
2261 *
2262 *-F*************************************************************************/
2263static void
2264scbq_init(volatile scb_queue_type *queue)
2265{
2266  queue->head = NULL;
2267  queue->tail = NULL;
2268}
2269
2270/*+F*************************************************************************
2271 * Function:
2272 *   scbq_insert_head
2273 *
2274 * Description:
2275 *   Add an SCB to the head of the list.
2276 *
2277 *-F*************************************************************************/
2278static inline void
2279scbq_insert_head(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2280{
2281  scb->q_next = queue->head;
2282  queue->head = scb;
2283  if (queue->tail == NULL)       /* If list was empty, update tail. */
2284    queue->tail = queue->head;
2285}
2286
2287/*+F*************************************************************************
2288 * Function:
2289 *   scbq_remove_head
2290 *
2291 * Description:
2292 *   Remove an SCB from the head of the list.
2293 *
2294 *-F*************************************************************************/
2295static inline struct aic7xxx_scb *
2296scbq_remove_head(volatile scb_queue_type *queue)
2297{
2298  struct aic7xxx_scb * scbp;
2299
2300  scbp = queue->head;
2301  if (queue->head != NULL)
2302    queue->head = queue->head->q_next;
2303  if (queue->head == NULL)       /* If list is now empty, update tail. */
2304    queue->tail = NULL;
2305  return(scbp);
2306}
2307
2308/*+F*************************************************************************
2309 * Function:
2310 *   scbq_remove
2311 *
2312 * Description:
2313 *   Removes an SCB from the list.
2314 *
2315 *-F*************************************************************************/
2316static inline void
2317scbq_remove(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2318{
2319  if (queue->head == scb)
2320  {
2321    /* At beginning of queue, remove from head. */
2322    scbq_remove_head(queue);
2323  }
2324  else
2325  {
2326    struct aic7xxx_scb *curscb = queue->head;
2327
2328    /*
2329     * Search until the next scb is the one we're looking for, or
2330     * we run out of queue.
2331     */
2332    while ((curscb != NULL) && (curscb->q_next != scb))
2333    {
2334      curscb = curscb->q_next;
2335    }
2336    if (curscb != NULL)
2337    {
2338      /* Found it. */
2339      curscb->q_next = scb->q_next;
2340      if (scb->q_next == NULL)
2341      {
2342        /* Update the tail when removing the tail. */
2343        queue->tail = curscb;
2344      }
2345    }
2346  }
2347}
2348
2349/*+F*************************************************************************
2350 * Function:
2351 *   scbq_insert_tail
2352 *
2353 * Description:
2354 *   Add an SCB at the tail of the list.
2355 *
2356 *-F*************************************************************************/
2357static inline void
2358scbq_insert_tail(volatile scb_queue_type *queue, struct aic7xxx_scb *scb)
2359{
2360  scb->q_next = NULL;
2361  if (queue->tail != NULL)       /* Add the scb at the end of the list. */
2362    queue->tail->q_next = scb;
2363  queue->tail = scb;             /* Update the tail. */
2364  if (queue->head == NULL)       /* If list was empty, update head. */
2365    queue->head = queue->tail;
2366}
2367
2368/*+F*************************************************************************
2369 * Function:
2370 *   aic7xxx_match_scb
2371 *
2372 * Description:
2373 *   Checks to see if an scb matches the target/channel as specified.
2374 *   If target is ALL_TARGETS (-1), then we're looking for any device
2375 *   on the specified channel; this happens when a channel is going
2376 *   to be reset and all devices on that channel must be aborted.
2377 *-F*************************************************************************/
2378static int
2379aic7xxx_match_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2380    int target, int channel, int lun, unsigned char tag)
2381{
2382  int targ = (scb->hscb->target_channel_lun >> 4) & 0x0F;
2383  int chan = (scb->hscb->target_channel_lun >> 3) & 0x01;
2384  int slun = scb->hscb->target_channel_lun & 0x07;
2385  int match;
2386
2387  match = ((chan == channel) || (channel == ALL_CHANNELS));
2388  if (match != 0)
2389    match = ((targ == target) || (target == ALL_TARGETS));
2390  if (match != 0)
2391    match = ((lun == slun) || (lun == ALL_LUNS));
2392  if (match != 0)
2393    match = ((tag == scb->hscb->tag) || (tag == SCB_LIST_NULL));
2394
2395  return (match);
2396}
2397
2398/*+F*************************************************************************
2399 * Function:
2400 *   aic7xxx_add_curscb_to_free_list
2401 *
2402 * Description:
2403 *   Adds the current scb (in SCBPTR) to the list of free SCBs.
2404 *-F*************************************************************************/
2405static void
2406aic7xxx_add_curscb_to_free_list(struct aic7xxx_host *p)
2407{
2408  /*
2409   * Invalidate the tag so that aic7xxx_find_scb doesn't think
2410   * it's active
2411   */
2412  aic_outb(p, SCB_LIST_NULL, SCB_TAG);
2413  aic_outb(p, 0, SCB_CONTROL);
2414
2415  aic_outb(p, aic_inb(p, FREE_SCBH), SCB_NEXT);
2416  aic_outb(p, aic_inb(p, SCBPTR), FREE_SCBH);
2417}
2418
2419/*+F*************************************************************************
2420 * Function:
2421 *   aic7xxx_rem_scb_from_disc_list
2422 *
2423 * Description:
2424 *   Removes the current SCB from the disconnected list and adds it
2425 *   to the free list.
2426 *-F*************************************************************************/
2427static unsigned char
2428aic7xxx_rem_scb_from_disc_list(struct aic7xxx_host *p, unsigned char scbptr,
2429                               unsigned char prev)
2430{
2431  unsigned char next;
2432
2433  aic_outb(p, scbptr, SCBPTR);
2434  next = aic_inb(p, SCB_NEXT);
2435  aic7xxx_add_curscb_to_free_list(p);
2436
2437  if (prev != SCB_LIST_NULL)
2438  {
2439    aic_outb(p, prev, SCBPTR);
2440    aic_outb(p, next, SCB_NEXT);
2441  }
2442  else
2443  {
2444    aic_outb(p, next, DISCONNECTED_SCBH);
2445  }
2446
2447  return next;
2448}
2449
2450/*+F*************************************************************************
2451 * Function:
2452 *   aic7xxx_busy_target
2453 *
2454 * Description:
2455 *   Set the specified target busy.
2456 *-F*************************************************************************/
2457static inline void
2458aic7xxx_busy_target(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2459{
2460  p->untagged_scbs[scb->hscb->target_channel_lun] = scb->hscb->tag;
2461}
2462
2463/*+F*************************************************************************
2464 * Function:
2465 *   aic7xxx_index_busy_target
2466 *
2467 * Description:
2468 *   Returns the index of the busy target, and optionally sets the
2469 *   target inactive.
2470 *-F*************************************************************************/
2471static inline unsigned char
2472aic7xxx_index_busy_target(struct aic7xxx_host *p, unsigned char tcl,
2473    int unbusy)
2474{
2475  unsigned char busy_scbid;
2476
2477  busy_scbid = p->untagged_scbs[tcl];
2478  if (unbusy)
2479  {
2480    p->untagged_scbs[tcl] = SCB_LIST_NULL;
2481  }
2482  return (busy_scbid);
2483}
2484
2485/*+F*************************************************************************
2486 * Function:
2487 *   aic7xxx_find_scb
2488 *
2489 * Description:
2490 *   Look through the SCB array of the card and attempt to find the
2491 *   hardware SCB that corresponds to the passed in SCB.  Return
2492 *   SCB_LIST_NULL if unsuccessful.  This routine assumes that the
2493 *   card is already paused.
2494 *-F*************************************************************************/
2495static unsigned char
2496aic7xxx_find_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2497{
2498  unsigned char saved_scbptr;
2499  unsigned char curindex;
2500
2501  saved_scbptr = aic_inb(p, SCBPTR);
2502  curindex = 0;
2503  for (curindex = 0; curindex < p->scb_data->maxhscbs; curindex++)
2504  {
2505    aic_outb(p, curindex, SCBPTR);
2506    if (aic_inb(p, SCB_TAG) == scb->hscb->tag)
2507    {
2508      break;
2509    }
2510  }
2511  aic_outb(p, saved_scbptr, SCBPTR);
2512  if (curindex >= p->scb_data->maxhscbs)
2513  {
2514    curindex = SCB_LIST_NULL;
2515  }
2516
2517  return (curindex);
2518}
2519
2520/*+F*************************************************************************
2521 * Function:
2522 *   aic7xxx_allocate_scb
2523 *
2524 * Description:
2525 *   Get an SCB from the free list or by allocating a new one.
2526 *-F*************************************************************************/
2527static int
2528aic7xxx_allocate_scb(struct aic7xxx_host *p)
2529{
2530  struct aic7xxx_scb   *scbp = NULL;
2531  int scb_size = (sizeof (struct hw_scatterlist) * AIC7XXX_MAX_SG) + 12 + 6;
2532  int i;
2533  int step = PAGE_SIZE / 1024;
2534  unsigned long scb_count = 0;
2535  struct hw_scatterlist *hsgp;
2536  struct aic7xxx_scb *scb_ap;
2537  struct aic7xxx_scb_dma *scb_dma;
2538  unsigned char *bufs;
2539
2540  if (p->scb_data->numscbs < p->scb_data->maxscbs)
2541  {
2542    /*
2543     * Calculate the optimal number of SCBs to allocate.
2544     *
2545     * NOTE: This formula works because the sizeof(sg_array) is always
2546     * 1024.  Therefore, scb_size * i would always be > PAGE_SIZE *
2547     * (i/step).  The (i-1) allows the left hand side of the equation
2548     * to grow into the right hand side to a point of near perfect
2549     * efficiency since scb_size * (i -1) is growing slightly faster
2550     * than the right hand side.  If the number of SG array elements
2551     * is changed, this function may not be near so efficient any more.
2552     *
2553     * Since the DMA'able buffers are now allocated in a separate
2554     * chunk this algorithm has been modified to match.  The '12'
2555     * and '6' factors in scb_size are for the DMA'able command byte
2556     * and sensebuffers respectively.  -DaveM
2557     */
2558    for ( i=step;; i *= 2 )
2559    {
2560      if ( (scb_size * (i-1)) >= ( (PAGE_SIZE * (i/step)) - 64 ) )
2561      {
2562        i /= 2;
2563        break;
2564      }
2565    }
2566    scb_count = min( (i-1), p->scb_data->maxscbs - p->scb_data->numscbs);
2567    scb_ap = kmalloc(sizeof (struct aic7xxx_scb) * scb_count
2568                                           + sizeof(struct aic7xxx_scb_dma), GFP_ATOMIC);
2569    if (scb_ap == NULL)
2570      return(0);
2571    scb_dma = (struct aic7xxx_scb_dma *)&scb_ap[scb_count];
2572    hsgp = (struct hw_scatterlist *)
2573      pci_alloc_consistent(p->pdev, scb_size * scb_count,
2574                           &scb_dma->dma_address);
2575    if (hsgp == NULL)
2576    {
2577      kfree(scb_ap);
2578      return(0);
2579    }
2580    bufs = (unsigned char *)&hsgp[scb_count * AIC7XXX_MAX_SG];
2581#ifdef AIC7XXX_VERBOSE_DEBUGGING
2582    if (aic7xxx_verbose > 0xffff)
2583    {
2584      if (p->scb_data->numscbs == 0)
2585        printk(INFO_LEAD "Allocating initial %ld SCB structures.\n",
2586          p->host_no, -1, -1, -1, scb_count);
2587      else
2588        printk(INFO_LEAD "Allocating %ld additional SCB structures.\n",
2589          p->host_no, -1, -1, -1, scb_count);
2590    }
2591#endif
2592    memset(scb_ap, 0, sizeof (struct aic7xxx_scb) * scb_count);
2593    scb_dma->dma_offset = (unsigned long)scb_dma->dma_address
2594                          - (unsigned long)hsgp;
2595    scb_dma->dma_len = scb_size * scb_count;
2596    for (i=0; i < scb_count; i++)
2597    {
2598      scbp = &scb_ap[i];
2599      scbp->hscb = &p->scb_data->hscbs[p->scb_data->numscbs];
2600      scbp->sg_list = &hsgp[i * AIC7XXX_MAX_SG];
2601      scbp->sense_cmd = bufs;
2602      scbp->cmnd = bufs + 6;
2603      bufs += 12 + 6;
2604      scbp->scb_dma = scb_dma;
2605      memset(scbp->hscb, 0, sizeof(struct aic7xxx_hwscb));
2606      scbp->hscb->tag = p->scb_data->numscbs;
2607      /*
2608       * Place in the scb array; never is removed
2609       */
2610      p->scb_data->scb_array[p->scb_data->numscbs++] = scbp;
2611      scbq_insert_tail(&p->scb_data->free_scbs, scbp);
2612    }
2613    scbp->kmalloc_ptr = scb_ap;
2614  }
2615  return(scb_count);
2616}
2617
2618/*+F*************************************************************************
2619 * Function:
2620 *   aic7xxx_queue_cmd_complete
2621 *
2622 * Description:
2623 *   Due to race conditions present in the SCSI subsystem, it is easier
2624 *   to queue completed commands, then call scsi_done() on them when
2625 *   we're finished.  This function queues the completed commands.
2626 *-F*************************************************************************/
2627static void
2628aic7xxx_queue_cmd_complete(struct aic7xxx_host *p, struct scsi_cmnd *cmd)
2629{
2630  aic7xxx_position(cmd) = SCB_LIST_NULL;
2631  cmd->host_scribble = (char *)p->completeq.head;
2632  p->completeq.head = cmd;
2633}
2634
2635/*+F*************************************************************************
2636 * Function:
2637 *   aic7xxx_done_cmds_complete
2638 *
2639 * Description:
2640 *   Process the completed command queue.
2641 *-F*************************************************************************/
2642static void aic7xxx_done_cmds_complete(struct aic7xxx_host *p)
2643{
2644        struct scsi_cmnd *cmd;
2645
2646        while (p->completeq.head != NULL) {
2647                cmd = p->completeq.head;
2648                p->completeq.head = (struct scsi_cmnd *) cmd->host_scribble;
2649                cmd->host_scribble = NULL;
2650                cmd->scsi_done(cmd);
2651        }
2652}
2653
2654/*+F*************************************************************************
2655 * Function:
2656 *   aic7xxx_free_scb
2657 *
2658 * Description:
2659 *   Free the scb and insert into the free scb list.
2660 *-F*************************************************************************/
2661static void
2662aic7xxx_free_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2663{
2664
2665  scb->flags = SCB_FREE;
2666  scb->cmd = NULL;
2667  scb->sg_count = 0;
2668  scb->sg_length = 0;
2669  scb->tag_action = 0;
2670  scb->hscb->control = 0;
2671  scb->hscb->target_status = 0;
2672  scb->hscb->target_channel_lun = SCB_LIST_NULL;
2673
2674  scbq_insert_head(&p->scb_data->free_scbs, scb);
2675}
2676
2677/*+F*************************************************************************
2678 * Function:
2679 *   aic7xxx_done
2680 *
2681 * Description:
2682 *   Calls the higher level scsi done function and frees the scb.
2683 *-F*************************************************************************/
2684static void
2685aic7xxx_done(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
2686{
2687        struct scsi_cmnd *cmd = scb->cmd;
2688        struct aic_dev_data *aic_dev = cmd->device->hostdata;
2689        int tindex = TARGET_INDEX(cmd);
2690        struct aic7xxx_scb *scbp;
2691        unsigned char queue_depth;
2692
2693        scsi_dma_unmap(cmd);
2694
2695  if (scb->flags & SCB_SENSE)
2696  {
2697    pci_unmap_single(p->pdev,
2698                     le32_to_cpu(scb->sg_list[0].address),
2699                     SCSI_SENSE_BUFFERSIZE,
2700                     PCI_DMA_FROMDEVICE);
2701  }
2702  if (scb->flags & SCB_RECOVERY_SCB)
2703  {
2704    p->flags &= ~AHC_ABORT_PENDING;
2705  }
2706  if (scb->flags & (SCB_RESET|SCB_ABORT))
2707  {
2708    cmd->result |= (DID_RESET << 16);
2709  }
2710
2711  if ((scb->flags & SCB_MSGOUT_BITS) != 0)
2712  {
2713    unsigned short mask;
2714    int message_error = FALSE;
2715
2716    mask = 0x01 << tindex;
2717 
2718    /*
2719     * Check to see if we get an invalid message or a message error
2720     * after failing to negotiate a wide or sync transfer message.
2721     */
2722    if ((scb->flags & SCB_SENSE) && 
2723          ((scb->cmd->sense_buffer[12] == 0x43) ||  /* INVALID_MESSAGE */
2724          (scb->cmd->sense_buffer[12] == 0x49))) /* MESSAGE_ERROR  */
2725    {
2726      message_error = TRUE;
2727    }
2728
2729    if (scb->flags & SCB_MSGOUT_WDTR)
2730    {
2731      if (message_error)
2732      {
2733        if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2734             (aic_dev->flags & DEVICE_PRINT_DTR) )
2735        {
2736          printk(INFO_LEAD "Device failed to complete Wide Negotiation "
2737            "processing and\n", p->host_no, CTL_OF_SCB(scb));
2738          printk(INFO_LEAD "returned a sense error code for invalid message, "
2739            "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2740          printk(INFO_LEAD "Wide negotiation to this device.\n", p->host_no,
2741            CTL_OF_SCB(scb));
2742        }
2743        aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
2744      }
2745    }
2746    if (scb->flags & SCB_MSGOUT_SDTR)
2747    {
2748      if (message_error)
2749      {
2750        if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2751             (aic_dev->flags & DEVICE_PRINT_DTR) )
2752        {
2753          printk(INFO_LEAD "Device failed to complete Sync Negotiation "
2754            "processing and\n", p->host_no, CTL_OF_SCB(scb));
2755          printk(INFO_LEAD "returned a sense error code for invalid message, "
2756            "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2757          printk(INFO_LEAD "Sync negotiation to this device.\n", p->host_no,
2758            CTL_OF_SCB(scb));
2759          aic_dev->flags &= ~DEVICE_PRINT_DTR;
2760        }
2761        aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
2762      }
2763    }
2764    if (scb->flags & SCB_MSGOUT_PPR)
2765    {
2766      if(message_error)
2767      {
2768        if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
2769             (aic_dev->flags & DEVICE_PRINT_DTR) )
2770        {
2771          printk(INFO_LEAD "Device failed to complete Parallel Protocol "
2772            "Request processing and\n", p->host_no, CTL_OF_SCB(scb));
2773          printk(INFO_LEAD "returned a sense error code for invalid message, "
2774            "disabling future\n", p->host_no, CTL_OF_SCB(scb));
2775          printk(INFO_LEAD "Parallel Protocol Request negotiation to this "
2776            "device.\n", p->host_no, CTL_OF_SCB(scb));
2777        }
2778        /*
2779         * Disable PPR negotiation and revert back to WDTR and SDTR setup
2780         */
2781        aic_dev->needppr = aic_dev->needppr_copy = 0;
2782        aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
2783        aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
2784      }
2785    }
2786  }
2787
2788  queue_depth = aic_dev->temp_q_depth;
2789  if (queue_depth >= aic_dev->active_cmds)
2790  {
2791    scbp = scbq_remove_head(&aic_dev->delayed_scbs);
2792    if (scbp)
2793    {
2794      if (queue_depth == 1)
2795      {
2796        /*
2797         * Give extra preference to untagged devices, such as CD-R devices
2798         * This makes it more likely that a drive *won't* stuff up while
2799         * waiting on data at a critical time, such as CD-R writing and
2800         * audio CD ripping operations.  Should also benefit tape drives.
2801         */
2802        scbq_insert_head(&p->waiting_scbs, scbp);
2803      }
2804      else
2805      {
2806        scbq_insert_tail(&p->waiting_scbs, scbp);
2807      }
2808#ifdef AIC7XXX_VERBOSE_DEBUGGING
2809      if (aic7xxx_verbose > 0xffff)
2810        printk(INFO_LEAD "Moving SCB from delayed to waiting queue.\n",
2811               p->host_no, CTL_OF_SCB(scbp));
2812#endif
2813      if (queue_depth > aic_dev->active_cmds)
2814      {
2815        scbp = scbq_remove_head(&aic_dev->delayed_scbs);
2816        if (scbp)
2817          scbq_insert_tail(&p->waiting_scbs, scbp);
2818      }
2819    }
2820  }
2821  if (!(scb->tag_action))
2822  {
2823    aic7xxx_index_busy_target(p, scb->hscb->target_channel_lun,
2824                              /* unbusy */ TRUE);
2825    if (cmd->device->simple_tags)
2826    {
2827      aic_dev->temp_q_depth = aic_dev->max_q_depth;
2828    }
2829  }
2830  if(scb->flags & SCB_DTR_SCB)
2831  {
2832    aic_dev->dtr_pending = 0;
2833  }
2834  aic_dev->active_cmds--;
2835  p->activescbs--;
2836
2837  if ((scb->sg_length >= 512) && (((cmd->result >> 16) & 0xf) == DID_OK))
2838  {
2839    long *ptr;
2840    int x, i;
2841
2842
2843    if (rq_data_dir(cmd->request) == WRITE)
2844    {
2845      aic_dev->w_total++;
2846      ptr = aic_dev->w_bins;
2847    }
2848    else
2849    {
2850      aic_dev->r_total++;
2851      ptr = aic_dev->r_bins;
2852    }
2853    x = scb->sg_length;
2854    x >>= 10;
2855    for(i=0; i<6; i++)
2856    {
2857      x >>= 2;
2858      if(!x) {
2859        ptr[i]++;
2860        break;
2861      }
2862    }
2863    if(i == 6 && x)
2864      ptr[5]++;
2865  }
2866  aic7xxx_free_scb(p, scb);
2867  aic7xxx_queue_cmd_complete(p, cmd);
2868
2869}
2870
2871/*+F*************************************************************************
2872 * Function:
2873 *   aic7xxx_run_done_queue
2874 *
2875 * Description:
2876 *   Calls the aic7xxx_done() for the scsi_cmnd of each scb in the
2877 *   aborted list, and adds each scb to the free list.  If complete
2878 *   is TRUE, we also process the commands complete list.
2879 *-F*************************************************************************/
2880static void
2881aic7xxx_run_done_queue(struct aic7xxx_host *p, /*complete*/ int complete)
2882{
2883  struct aic7xxx_scb *scb;
2884  int i, found = 0;
2885
2886  for (i = 0; i < p->scb_data->numscbs; i++)
2887  {
2888    scb = p->scb_data->scb_array[i];
2889    if (scb->flags & SCB_QUEUED_FOR_DONE)
2890    {
2891      if (scb->flags & SCB_QUEUE_FULL)
2892      {
2893        scb->cmd->result = QUEUE_FULL << 1;
2894      }
2895      else
2896      {
2897        if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
2898          printk(INFO_LEAD "Aborting scb %d\n",
2899               p->host_no, CTL_OF_SCB(scb), scb->hscb->tag);
2900        /*
2901         * Clear any residual information since the normal aic7xxx_done() path
2902         * doesn't touch the residuals.
2903         */
2904        scb->hscb->residual_SG_segment_count = 0;
2905        scb->hscb->residual_data_count[0] = 0;
2906        scb->hscb->residual_data_count[1] = 0;
2907        scb->hscb->residual_data_count[2] = 0;
2908      }
2909      found++;
2910      aic7xxx_done(p, scb);
2911    }
2912  }
2913  if (aic7xxx_verbose & (VERBOSE_ABORT_RETURN | VERBOSE_RESET_RETURN))
2914  {
2915    printk(INFO_LEAD "%d commands found and queued for "
2916        "completion.\n", p->host_no, -1, -1, -1, found);
2917  }
2918  if (complete)
2919  {
2920    aic7xxx_done_cmds_complete(p);
2921  }
2922}
2923
2924/*+F*************************************************************************
2925 * Function:
2926 *   aic7xxx_abort_waiting_scb
2927 *
2928 * Description:
2929 *   Manipulate the waiting for selection list and return the
2930 *   scb that follows the one that we remove.
2931 *-F*************************************************************************/
2932static unsigned char
2933aic7xxx_abort_waiting_scb(struct aic7xxx_host *p, struct aic7xxx_scb *scb,
2934    unsigned char scbpos, unsigned char prev)
2935{
2936  unsigned char curscb, next;
2937
2938  /*
2939   * Select the SCB we want to abort and pull the next pointer out of it.
2940   */
2941  curscb = aic_inb(p, SCBPTR);
2942  aic_outb(p, scbpos, SCBPTR);
2943  next = aic_inb(p, SCB_NEXT);
2944
2945  aic7xxx_add_curscb_to_free_list(p);
2946
2947  /*
2948   * Update the waiting list
2949   */
2950  if (prev == SCB_LIST_NULL)
2951  {
2952    /*
2953     * First in the list
2954     */
2955    aic_outb(p, next, WAITING_SCBH);
2956  }
2957  else
2958  {
2959    /*
2960     * Select the scb that pointed to us and update its next pointer.
2961     */
2962    aic_outb(p, prev, SCBPTR);
2963    aic_outb(p, next, SCB_NEXT);
2964  }
2965  /*
2966   * Point us back at the original scb position and inform the SCSI
2967   * system that the command has been aborted.
2968   */
2969  aic_outb(p, curscb, SCBPTR);
2970  return (next);
2971}
2972
2973/*+F*************************************************************************
2974 * Function:
2975 *   aic7xxx_search_qinfifo
2976 *
2977 * Description:
2978 *   Search the queue-in FIFO for matching SCBs and conditionally
2979 *   requeue.  Returns the number of matching SCBs.
2980 *-F*************************************************************************/
2981static int
2982aic7xxx_search_qinfifo(struct aic7xxx_host *p, int target, int channel,
2983    int lun, unsigned char tag, int flags, int requeue,
2984    volatile scb_queue_type *queue)
2985{
2986  int      found;
2987  unsigned char qinpos, qintail;
2988  struct aic7xxx_scb *scbp;
2989
2990  found = 0;
2991  qinpos = aic_inb(p, QINPOS);
2992  qintail = p->qinfifonext;
2993
2994  p->qinfifonext = qinpos;
2995
2996  while (qinpos != qintail)
2997  {
2998    scbp = p->scb_data->scb_array[p->qinfifo[qinpos++]];
2999    if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3000    {
3001       /*
3002        * We found an scb that needs to be removed.
3003        */
3004       if (requeue && (queue != NULL))
3005       {
3006         if (scbp->flags & SCB_WAITINGQ)
3007         {
3008           scbq_remove(queue, scbp);
3009           scbq_remove(&p->waiting_scbs, scbp);
3010           scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp);
3011           AIC_DEV(scbp->cmd)->active_cmds++;
3012           p->activescbs++;
3013         }
3014         scbq_insert_tail(queue, scbp);
3015         AIC_DEV(scbp->cmd)->active_cmds--;
3016         p->activescbs--;
3017         scbp->flags |= SCB_WAITINGQ;
3018         if ( !(scbp->tag_action & TAG_ENB) )
3019         {
3020           aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3021             TRUE);
3022         }
3023       }
3024       else if (requeue)
3025       {
3026         p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3027       }
3028       else
3029       {
3030        /*
3031         * Preserve any SCB_RECOVERY_SCB flags on this scb then set the
3032         * flags we were called with, presumeably so aic7xxx_run_done_queue
3033         * can find this scb
3034         */
3035         scbp->flags = flags | (scbp->flags & SCB_RECOVERY_SCB);
3036         if (aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3037                                       FALSE) == scbp->hscb->tag)
3038         {
3039           aic7xxx_index_busy_target(p, scbp->hscb->target_channel_lun,
3040             TRUE);
3041         }
3042       }
3043       found++;
3044    }
3045    else
3046    {
3047      p->qinfifo[p->qinfifonext++] = scbp->hscb->tag;
3048    }
3049  }
3050  /*
3051   * Now that we've done the work, clear out any left over commands in the
3052   * qinfifo and update the KERNEL_QINPOS down on the card.
3053   *
3054   *  NOTE: This routine expect the sequencer to already be paused when
3055   *        it is run....make sure it's that way!
3056   */
3057  qinpos = p->qinfifonext;
3058  while(qinpos != qintail)
3059  {
3060    p->qinfifo[qinpos++] = SCB_LIST_NULL;
3061  }
3062  if (p->features & AHC_QUEUE_REGS)
3063    aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3064  else
3065    aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3066
3067  return (found);
3068}
3069
3070/*+F*************************************************************************
3071 * Function:
3072 *   aic7xxx_scb_on_qoutfifo
3073 *
3074 * Description:
3075 *   Is the scb that was passed to us currently on the qoutfifo?
3076 *-F*************************************************************************/
3077static int
3078aic7xxx_scb_on_qoutfifo(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3079{
3080  int i=0;
3081
3082  while(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] != SCB_LIST_NULL)
3083  {
3084    if(p->qoutfifo[(p->qoutfifonext + i) & 0xff ] == scb->hscb->tag)
3085      return TRUE;
3086    else
3087      i++;
3088  }
3089  return FALSE;
3090}
3091
3092
3093/*+F*************************************************************************
3094 * Function:
3095 *   aic7xxx_reset_device
3096 *
3097 * Description:
3098 *   The device at the given target/channel has been reset.  Abort
3099 *   all active and queued scbs for that target/channel.  This function
3100 *   need not worry about linked next pointers because if was a MSG_ABORT_TAG
3101 *   then we had a tagged command (no linked next), if it was MSG_ABORT or
3102 *   MSG_BUS_DEV_RESET then the device won't know about any commands any more
3103 *   and no busy commands will exist, and if it was a bus reset, then nothing
3104 *   knows about any linked next commands any more.  In all cases, we don't
3105 *   need to worry about the linked next or busy scb, we just need to clear
3106 *   them.
3107 *-F*************************************************************************/
3108static void
3109aic7xxx_reset_device(struct aic7xxx_host *p, int target, int channel,
3110                     int lun, unsigned char tag)
3111{
3112  struct aic7xxx_scb *scbp, *prev_scbp;
3113  struct scsi_device *sd;
3114  unsigned char active_scb, tcl, scb_tag;
3115  int i = 0, init_lists = FALSE;
3116  struct aic_dev_data *aic_dev;
3117
3118  /*
3119   * Restore this when we're done
3120   */
3121  active_scb = aic_inb(p, SCBPTR);
3122  scb_tag = aic_inb(p, SCB_TAG);
3123
3124  if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3125  {
3126    printk(INFO_LEAD "Reset device, hardware_scb %d,\n",
3127         p->host_no, channel, target, lun, active_scb);
3128    printk(INFO_LEAD "Current scb %d, SEQADDR 0x%x, LASTPHASE "
3129           "0x%x\n",
3130         p->host_no, channel, target, lun, scb_tag,
3131         aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
3132         aic_inb(p, LASTPHASE));
3133    printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
3134         p->host_no, channel, target, lun,
3135         (p->features & AHC_ULTRA2) ?  aic_inb(p, SG_CACHEPTR) : 0,
3136         aic_inb(p, SG_COUNT), aic_inb(p, SCSISIGI));
3137    printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
3138         p->host_no, channel, target, lun, aic_inb(p, SSTAT0),
3139         aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
3140  }
3141
3142  /*
3143   * Deal with the busy target and linked next issues.
3144   */
3145  list_for_each_entry(aic_dev, &p->aic_devs, list)
3146  {
3147    if (aic7xxx_verbose & (VERBOSE_RESET_PROCESS | VERBOSE_ABORT_PROCESS))
3148      printk(INFO_LEAD "processing aic_dev %p\n", p->host_no, channel, target,
3149                    lun, aic_dev);
3150    sd = aic_dev->SDptr;
3151
3152    if((target != ALL_TARGETS && target != sd->id) ||
3153       (channel != ALL_CHANNELS && channel != sd->channel))
3154      continue;
3155    if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3156        printk(INFO_LEAD "Cleaning up status information "
3157          "and delayed_scbs.\n", p->host_no, sd->channel, sd->id, sd->lun);
3158    aic_dev->flags &= ~BUS_DEVICE_RESET_PENDING;
3159    if ( tag == SCB_LIST_NULL )
3160    {
3161      aic_dev->dtr_pending = 0;
3162      aic_dev->needppr = aic_dev->needppr_copy;
3163      aic_dev->needsdtr = aic_dev->needsdtr_copy;
3164      aic_dev->needwdtr = aic_dev->needwdtr_copy;
3165      aic_dev->flags = DEVICE_PRINT_DTR;
3166      aic_dev->temp_q_depth = aic_dev->max_q_depth;
3167    }
3168    tcl = (sd->id << 4) | (sd->channel << 3) | sd->lun;
3169    if ( (aic7xxx_index_busy_target(p, tcl, FALSE) == tag) ||
3170         (tag == SCB_LIST_NULL) )
3171      aic7xxx_index_busy_target(p, tcl, /* unbusy */ TRUE);
3172    prev_scbp = NULL; 
3173    scbp = aic_dev->delayed_scbs.head;
3174    while (scbp != NULL)
3175    {
3176      prev_scbp = scbp;
3177      scbp = scbp->q_next;
3178      if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3179      {
3180        scbq_remove(&aic_dev->delayed_scbs, prev_scbp);
3181        if (prev_scbp->flags & SCB_WAITINGQ)
3182        {
3183          aic_dev->active_cmds++;
3184          p->activescbs++;
3185        }
3186        prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3187        prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3188      }
3189    }
3190  }
3191
3192  if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3193    printk(INFO_LEAD "Cleaning QINFIFO.\n", p->host_no, channel, target, lun );
3194  aic7xxx_search_qinfifo(p, target, channel, lun, tag,
3195      SCB_RESET | SCB_QUEUED_FOR_DONE, /* requeue */ FALSE, NULL);
3196
3197/*
3198 *  Search the waiting_scbs queue for matches, this catches any SCB_QUEUED
3199 *  ABORT/RESET commands.
3200 */
3201  if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3202    printk(INFO_LEAD "Cleaning waiting_scbs.\n", p->host_no, channel,
3203      target, lun );
3204  {
3205    struct aic7xxx_scb *scbp, *prev_scbp;
3206
3207    prev_scbp = NULL; 
3208    scbp = p->waiting_scbs.head;
3209    while (scbp != NULL)
3210    {
3211      prev_scbp = scbp;
3212      scbp = scbp->q_next;
3213      if (aic7xxx_match_scb(p, prev_scbp, target, channel, lun, tag))
3214      {
3215        scbq_remove(&p->waiting_scbs, prev_scbp);
3216        if (prev_scbp->flags & SCB_WAITINGQ)
3217        {
3218          AIC_DEV(prev_scbp->cmd)->active_cmds++;
3219          p->activescbs++;
3220        }
3221        prev_scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3222        prev_scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3223      }
3224    }
3225  }
3226
3227
3228  /*
3229   * Search waiting for selection list.
3230   */
3231  if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3232    printk(INFO_LEAD "Cleaning waiting for selection "
3233      "list.\n", p->host_no, channel, target, lun);
3234  {
3235    unsigned char next, prev, scb_index;
3236
3237    next = aic_inb(p, WAITING_SCBH);  /* Start at head of list. */
3238    prev = SCB_LIST_NULL;
3239    while (next != SCB_LIST_NULL)
3240    {
3241      aic_outb(p, next, SCBPTR);
3242      scb_index = aic_inb(p, SCB_TAG);
3243      if (scb_index >= p->scb_data->numscbs)
3244      {
3245       /*
3246        * No aic7xxx_verbose check here.....we want to see this since it
3247        * means either the kernel driver or the sequencer screwed things up
3248        */
3249        printk(WARN_LEAD "Waiting List inconsistency; SCB index=%d, "
3250          "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3251          p->scb_data->numscbs);
3252        next = aic_inb(p, SCB_NEXT);
3253        aic7xxx_add_curscb_to_free_list(p);
3254      }
3255      else
3256      {
3257        scbp = p->scb_data->scb_array[scb_index];
3258        if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3259        {
3260          next = aic7xxx_abort_waiting_scb(p, scbp, next, prev);
3261          if (scbp->flags & SCB_WAITINGQ)
3262          {
3263            AIC_DEV(scbp->cmd)->active_cmds++;
3264            p->activescbs++;
3265          }
3266          scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3267          scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3268          if (prev == SCB_LIST_NULL)
3269          {
3270            /*
3271             * This is either the first scb on the waiting list, or we
3272             * have already yanked the first and haven't left any behind.
3273             * Either way, we need to turn off the selection hardware if
3274             * it isn't already off.
3275             */
3276            aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
3277            aic_outb(p, CLRSELTIMEO, CLRSINT1);
3278          }
3279        }
3280        else
3281        {
3282          prev = next;
3283          next = aic_inb(p, SCB_NEXT);
3284        }
3285      }
3286    }
3287  }
3288
3289  /*
3290   * Go through disconnected list and remove any entries we have queued
3291   * for completion, zeroing their control byte too.
3292   */
3293  if (aic7xxx_verbose & (VERBOSE_ABORT_PROCESS | VERBOSE_RESET_PROCESS))
3294    printk(INFO_LEAD "Cleaning disconnected scbs "
3295      "list.\n", p->host_no, channel, target, lun);
3296  if (p->flags & AHC_PAGESCBS)
3297  {
3298    unsigned char next, prev, scb_index;
3299
3300    next = aic_inb(p, DISCONNECTED_SCBH);
3301    prev = SCB_LIST_NULL;
3302    while (next != SCB_LIST_NULL)
3303    {
3304      aic_outb(p, next, SCBPTR);
3305      scb_index = aic_inb(p, SCB_TAG);
3306      if (scb_index > p->scb_data->numscbs)
3307      {
3308        printk(WARN_LEAD "Disconnected List inconsistency; SCB index=%d, "
3309          "numscbs=%d\n", p->host_no, channel, target, lun, scb_index,
3310          p->scb_data->numscbs);
3311        next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3312      }
3313      else
3314      {
3315        scbp = p->scb_data->scb_array[scb_index];
3316        if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3317        {
3318          next = aic7xxx_rem_scb_from_disc_list(p, next, prev);
3319          if (scbp->flags & SCB_WAITINGQ)
3320          {
3321            AIC_DEV(scbp->cmd)->active_cmds++;
3322            p->activescbs++;
3323          }
3324          scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3325          scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3326          scbp->hscb->control = 0;
3327        }
3328        else
3329        {
3330          prev = next;
3331          next = aic_inb(p, SCB_NEXT);
3332        }
3333      }
3334    }
3335  }
3336
3337  /*
3338   * Walk the free list making sure no entries on the free list have
3339   * a valid SCB_TAG value or SCB_CONTROL byte.
3340   */
3341  if (p->flags & AHC_PAGESCBS)
3342  {
3343    unsigned char next;
3344
3345    next = aic_inb(p, FREE_SCBH);
3346    while (next != SCB_LIST_NULL)
3347    {
3348      aic_outb(p, next, SCBPTR);
3349      if (aic_inb(p, SCB_TAG) < p->scb_data->numscbs)
3350      {
3351        printk(WARN_LEAD "Free list inconsistency!.\n", p->host_no, channel,
3352          target, lun);
3353        init_lists = TRUE;
3354        next = SCB_LIST_NULL;
3355      }
3356      else
3357      {
3358        aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3359        aic_outb(p, 0, SCB_CONTROL);
3360        next = aic_inb(p, SCB_NEXT);
3361      }
3362    }
3363  }
3364
3365  /*
3366   * Go through the hardware SCB array looking for commands that
3367   * were active but not on any list.
3368   */
3369  if (init_lists)
3370  {
3371    aic_outb(p, SCB_LIST_NULL, FREE_SCBH);
3372    aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
3373    aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
3374  }
3375  for (i = p->scb_data->maxhscbs - 1; i >= 0; i--)
3376  {
3377    unsigned char scbid;
3378
3379    aic_outb(p, i, SCBPTR);
3380    if (init_lists)
3381    {
3382      aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3383      aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
3384      aic_outb(p, 0, SCB_CONTROL);
3385      aic7xxx_add_curscb_to_free_list(p);
3386    }
3387    else
3388    {
3389      scbid = aic_inb(p, SCB_TAG);
3390      if (scbid < p->scb_data->numscbs)
3391      {
3392        scbp = p->scb_data->scb_array[scbid];
3393        if (aic7xxx_match_scb(p, scbp, target, channel, lun, tag))
3394        {
3395          aic_outb(p, 0, SCB_CONTROL);
3396          aic_outb(p, SCB_LIST_NULL, SCB_TAG);
3397          aic7xxx_add_curscb_to_free_list(p);
3398        }
3399      }
3400    }
3401  }
3402
3403  /*
3404   * Go through the entire SCB array now and look for commands for
3405   * for this target that are stillactive.  These are other (most likely
3406   * tagged) commands that were disconnected when the reset occurred.
3407   * Any commands we find here we know this about, it wasn't on any queue,
3408   * it wasn't in the qinfifo, it wasn't in the disconnected or waiting
3409   * lists, so it really must have been a paged out SCB.  In that case,
3410   * we shouldn't need to bother with updating any counters, just mark
3411   * the correct flags and go on.
3412   */
3413  for (i = 0; i < p->scb_data->numscbs; i++)
3414  {
3415    scbp = p->scb_data->scb_array[i];
3416    if ((scbp->flags & SCB_ACTIVE) &&
3417        aic7xxx_match_scb(p, scbp, target, channel, lun, tag) &&
3418        !aic7xxx_scb_on_qoutfifo(p, scbp))
3419    {
3420      if (scbp->flags & SCB_WAITINGQ)
3421      {
3422        scbq_remove(&p->waiting_scbs, scbp);
3423        scbq_remove(&AIC_DEV(scbp->cmd)->delayed_scbs, scbp);
3424        AIC_DEV(scbp->cmd)->active_cmds++;
3425        p->activescbs++;
3426      }
3427      scbp->flags |= SCB_RESET | SCB_QUEUED_FOR_DONE;
3428      scbp->flags &= ~(SCB_ACTIVE | SCB_WAITINGQ);
3429    }
3430  }
3431
3432  aic_outb(p, active_scb, SCBPTR);
3433}
3434
3435
3436/*+F*************************************************************************
3437 * Function:
3438 *   aic7xxx_clear_intstat
3439 *
3440 * Description:
3441 *   Clears the interrupt status.
3442 *-F*************************************************************************/
3443static void
3444aic7xxx_clear_intstat(struct aic7xxx_host *p)
3445{
3446  /* Clear any interrupt conditions this may have caused. */
3447  aic_outb(p, CLRSELDO | CLRSELDI | CLRSELINGO, CLRSINT0);
3448  aic_outb(p, CLRSELTIMEO | CLRATNO | CLRSCSIRSTI | CLRBUSFREE | CLRSCSIPERR |
3449       CLRPHASECHG | CLRREQINIT, CLRSINT1);
3450  aic_outb(p, CLRSCSIINT | CLRSEQINT | CLRBRKADRINT | CLRPARERR, CLRINT);
3451}
3452
3453/*+F*************************************************************************
3454 * Function:
3455 *   aic7xxx_reset_current_bus
3456 *
3457 * Description:
3458 *   Reset the current SCSI bus.
3459 *-F*************************************************************************/
3460static void
3461aic7xxx_reset_current_bus(struct aic7xxx_host *p)
3462{
3463
3464  /* Disable reset interrupts. */
3465  aic_outb(p, aic_inb(p, SIMODE1) & ~ENSCSIRST, SIMODE1);
3466
3467  /* Turn off the bus' current operations, after all, we shouldn't have any
3468   * valid commands left to cause a RSELI and SELO once we've tossed the
3469   * bus away with this reset, so we might as well shut down the sequencer
3470   * until the bus is restarted as oppossed to saving the current settings
3471   * and restoring them (which makes no sense to me). */
3472
3473  /* Turn on the bus reset. */
3474  aic_outb(p, aic_inb(p, SCSISEQ) | SCSIRSTO, SCSISEQ);
3475  while ( (aic_inb(p, SCSISEQ) & SCSIRSTO) == 0)
3476    mdelay(5);
3477
3478  /*
3479   * Some of the new Ultra2 chipsets need a longer delay after a chip
3480   * reset than just the init setup creates, so we have to delay here
3481   * before we go into a reset in order to make the chips happy.
3482   */
3483  if (p->features & AHC_ULTRA2)
3484    mdelay(250);
3485  else
3486    mdelay(50);
3487
3488  /* Turn off the bus reset. */
3489  aic_outb(p, 0, SCSISEQ);
3490  mdelay(10);
3491
3492  aic7xxx_clear_intstat(p);
3493  /* Re-enable reset interrupts. */
3494  aic_outb(p, aic_inb(p, SIMODE1) | ENSCSIRST, SIMODE1);
3495
3496}
3497
3498/*+F*************************************************************************
3499 * Function:
3500 *   aic7xxx_reset_channel
3501 *
3502 * Description:
3503 *   Reset the channel.
3504 *-F*************************************************************************/
3505static void
3506aic7xxx_reset_channel(struct aic7xxx_host *p, int channel, int initiate_reset)
3507{
3508  unsigned long offset_min, offset_max;
3509  unsigned char sblkctl;
3510  int cur_channel;
3511
3512  if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3513    printk(INFO_LEAD "Reset channel called, %s initiate reset.\n",
3514      p->host_no, channel, -1, -1, (initiate_reset==TRUE) ? "will" : "won't" );
3515
3516
3517  if (channel == 1)
3518  {
3519    offset_min = 8;
3520    offset_max = 16;
3521  }
3522  else
3523  {
3524    if (p->features & AHC_TWIN)
3525    {
3526      /* Channel A */
3527      offset_min = 0;
3528      offset_max = 8;
3529    }
3530    else
3531    {
3532      offset_min = 0;
3533      if (p->features & AHC_WIDE)
3534      {
3535        offset_max = 16;
3536      }
3537      else
3538      {
3539        offset_max = 8;
3540      }
3541    }
3542  }
3543
3544  while (offset_min < offset_max)
3545  {
3546    /*
3547     * Revert to async/narrow transfers until we renegotiate.
3548     */
3549    aic_outb(p, 0, TARG_SCSIRATE + offset_min);
3550    if (p->features & AHC_ULTRA2)
3551    {
3552      aic_outb(p, 0, TARG_OFFSET + offset_min);
3553    }
3554    offset_min++;
3555  }
3556
3557  /*
3558   * Reset the bus and unpause/restart the controller
3559   */
3560  sblkctl = aic_inb(p, SBLKCTL);
3561  if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3562    cur_channel = (sblkctl & SELBUSB) >> 3;
3563  else
3564    cur_channel = 0;
3565  if ( (cur_channel != channel) && (p->features & AHC_TWIN) )
3566  {
3567    /*
3568     * Case 1: Command for another bus is active
3569     */
3570    if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3571      printk(INFO_LEAD "Stealthily resetting idle channel.\n", p->host_no,
3572        channel, -1, -1);
3573    /*
3574     * Stealthily reset the other bus without upsetting the current bus.
3575     */
3576    aic_outb(p, sblkctl ^ SELBUSB, SBLKCTL);
3577    aic_outb(p, aic_inb(p, SIMODE1) & ~ENBUSFREE, SIMODE1);
3578    if (initiate_reset)
3579    {
3580      aic7xxx_reset_current_bus(p);
3581    }
3582    aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3583    aic7xxx_clear_intstat(p);
3584    aic_outb(p, sblkctl, SBLKCTL);
3585  }
3586  else
3587  {
3588    /*
3589     * Case 2: A command from this bus is active or we're idle.
3590     */
3591    if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3592      printk(INFO_LEAD "Resetting currently active channel.\n", p->host_no,
3593        channel, -1, -1);
3594    aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
3595      SIMODE1);
3596    p->flags &= ~AHC_HANDLING_REQINITS;
3597    p->msg_type = MSG_TYPE_NONE;
3598    p->msg_len = 0;
3599    if (initiate_reset)
3600    {
3601      aic7xxx_reset_current_bus(p);
3602    }
3603    aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP), SCSISEQ);
3604    aic7xxx_clear_intstat(p);
3605  }
3606  if (aic7xxx_verbose & VERBOSE_RESET_RETURN)
3607    printk(INFO_LEAD "Channel reset\n", p->host_no, channel, -1, -1);
3608  /*
3609   * Clean up all the state information for the pending transactions
3610   * on this bus.
3611   */
3612  aic7xxx_reset_device(p, ALL_TARGETS, channel, ALL_LUNS, SCB_LIST_NULL);
3613
3614  if ( !(p->features & AHC_TWIN) )
3615  {
3616    restart_sequencer(p);
3617  }
3618
3619  return;
3620}
3621
3622/*+F*************************************************************************
3623 * Function:
3624 *   aic7xxx_run_waiting_queues
3625 *
3626 * Description:
3627 *   Scan the awaiting_scbs queue downloading and starting as many
3628 *   scbs as we can.
3629 *-F*************************************************************************/
3630static void
3631aic7xxx_run_waiting_queues(struct aic7xxx_host *p)
3632{
3633  struct aic7xxx_scb *scb;
3634  struct aic_dev_data *aic_dev;
3635  int sent;
3636
3637
3638  if (p->waiting_scbs.head == NULL)
3639    return;
3640
3641  sent = 0;
3642
3643  /*
3644   * First handle SCBs that are waiting but have been assigned a slot.
3645   */
3646  while ((scb = scbq_remove_head(&p->waiting_scbs)) != NULL)
3647  {
3648    aic_dev = scb->cmd->device->hostdata;
3649    if ( !scb->tag_action )
3650    {
3651      aic_dev->temp_q_depth = 1;
3652    }
3653    if ( aic_dev->active_cmds >= aic_dev->temp_q_depth)
3654    {
3655      scbq_insert_tail(&aic_dev->delayed_scbs, scb);
3656    }
3657    else
3658    {
3659        scb->flags &= ~SCB_WAITINGQ;
3660        aic_dev->active_cmds++;
3661        p->activescbs++;
3662        if ( !(scb->tag_action) )
3663        {
3664          aic7xxx_busy_target(p, scb);
3665        }
3666        p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
3667        sent++;
3668    }
3669  }
3670  if (sent)
3671  {
3672    if (p->features & AHC_QUEUE_REGS)
3673      aic_outb(p, p->qinfifonext, HNSCB_QOFF);
3674    else
3675    {
3676      pause_sequencer(p);
3677      aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
3678      unpause_sequencer(p, FALSE);
3679    }
3680    if (p->activescbs > p->max_activescbs)
3681      p->max_activescbs = p->activescbs;
3682  }
3683}
3684
3685#ifdef CONFIG_PCI
3686
3687#define  DPE 0x80
3688#define  SSE 0x40
3689#define  RMA 0x20
3690#define  RTA 0x10
3691#define  STA 0x08
3692#define  DPR 0x01
3693
3694/*+F*************************************************************************
3695 * Function:
3696 *   aic7xxx_pci_intr
3697 *
3698 * Description:
3699 *   Check the scsi card for PCI errors and clear the interrupt
3700 *
3701 *   NOTE: If you don't have this function and a 2940 card encounters
3702 *         a PCI error condition, the machine will end up locked as the
3703 *         interrupt handler gets slammed with non-stop PCI error interrupts
3704 *-F*************************************************************************/
3705static void
3706aic7xxx_pci_intr(struct aic7xxx_host *p)
3707{
3708  unsigned char status1;
3709
3710  pci_read_config_byte(p->pdev, PCI_STATUS + 1, &status1);
3711
3712  if ( (status1 & DPE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3713    printk(WARN_LEAD "Data Parity Error during PCI address or PCI write"
3714      "phase.\n", p->host_no, -1, -1, -1);
3715  if ( (status1 & SSE) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3716    printk(WARN_LEAD "Signal System Error Detected\n", p->host_no,
3717      -1, -1, -1);
3718  if ( (status1 & RMA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3719    printk(WARN_LEAD "Received a PCI Master Abort\n", p->host_no,
3720      -1, -1, -1);
3721  if ( (status1 & RTA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3722    printk(WARN_LEAD "Received a PCI Target Abort\n", p->host_no,
3723      -1, -1, -1);
3724  if ( (status1 & STA) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3725    printk(WARN_LEAD "Signaled a PCI Target Abort\n", p->host_no,
3726      -1, -1, -1);
3727  if ( (status1 & DPR) && (aic7xxx_verbose & VERBOSE_MINOR_ERROR) )
3728    printk(WARN_LEAD "Data Parity Error has been reported via PCI pin "
3729      "PERR#\n", p->host_no, -1, -1, -1);
3730  
3731  pci_write_config_byte(p->pdev, PCI_STATUS + 1, status1);
3732  if (status1 & (DPR|RMA|RTA))
3733    aic_outb(p,  CLRPARERR, CLRINT);
3734
3735  if ( (aic7xxx_panic_on_abort) && (p->spurious_int > 500) )
3736    aic7xxx_panic_abort(p, NULL);
3737
3738}
3739#endif /* CONFIG_PCI */
3740
3741/*+F*************************************************************************
3742 * Function:
3743 *   aic7xxx_construct_ppr
3744 *
3745 * Description:
3746 *   Build up a Parallel Protocol Request message for use with SCSI-3
3747 *   devices.
3748 *-F*************************************************************************/
3749static void
3750aic7xxx_construct_ppr(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3751{
3752  p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3753  p->msg_buf[p->msg_index++] = MSG_EXT_PPR_LEN;
3754  p->msg_buf[p->msg_index++] = MSG_EXT_PPR;
3755  p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.period;
3756  p->msg_buf[p->msg_index++] = 0;
3757  p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.offset;
3758  p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.width;
3759  p->msg_buf[p->msg_index++] = AIC_DEV(scb->cmd)->goal.options;
3760  p->msg_len += 8;
3761}
3762
3763/*+F*************************************************************************
3764 * Function:
3765 *   aic7xxx_construct_sdtr
3766 *
3767 * Description:
3768 *   Constucts a synchronous data transfer message in the message
3769 *   buffer on the sequencer.
3770 *-F*************************************************************************/
3771static void
3772aic7xxx_construct_sdtr(struct aic7xxx_host *p, unsigned char period,
3773        unsigned char offset)
3774{
3775  p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3776  p->msg_buf[p->msg_index++] = MSG_EXT_SDTR_LEN;
3777  p->msg_buf[p->msg_index++] = MSG_EXT_SDTR;
3778  p->msg_buf[p->msg_index++] = period;
3779  p->msg_buf[p->msg_index++] = offset;
3780  p->msg_len += 5;
3781}
3782
3783/*+F*************************************************************************
3784 * Function:
3785 *   aic7xxx_construct_wdtr
3786 *
3787 * Description:
3788 *   Constucts a wide data transfer message in the message buffer
3789 *   on the sequencer.
3790 *-F*************************************************************************/
3791static void
3792aic7xxx_construct_wdtr(struct aic7xxx_host *p, unsigned char bus_width)
3793{
3794  p->msg_buf[p->msg_index++] = MSG_EXTENDED;
3795  p->msg_buf[p->msg_index++] = MSG_EXT_WDTR_LEN;
3796  p->msg_buf[p->msg_index++] = MSG_EXT_WDTR;
3797  p->msg_buf[p->msg_index++] = bus_width;
3798  p->msg_len += 4;
3799}
3800
3801/*+F*************************************************************************
3802 * Function:
3803 *   aic7xxx_calc_residual
3804 *
3805 * Description:
3806 *   Calculate the residual data not yet transferred.
3807 *-F*************************************************************************/
3808static void
3809aic7xxx_calculate_residual (struct aic7xxx_host *p, struct aic7xxx_scb *scb)
3810{
3811        struct aic7xxx_hwscb *hscb;
3812        struct scsi_cmnd *cmd;
3813        int actual, i;
3814
3815  cmd = scb->cmd;
3816  hscb = scb->hscb;
3817
3818  /*
3819   *  Don't destroy valid residual information with
3820   *  residual coming from a check sense operation.
3821   */
3822  if (((scb->hscb->control & DISCONNECTED) == 0) &&
3823      (scb->flags & SCB_SENSE) == 0)
3824  {
3825    /*
3826     *  We had an underflow. At this time, there's only
3827     *  one other driver that bothers to check for this,
3828     *  and cmd->underflow seems to be set rather half-
3829     *  heartedly in the higher-level SCSI code.
3830     */
3831    actual = scb->sg_length;
3832    for (i=1; i < hscb->residual_SG_segment_count; i++)
3833    {
3834      actual -= scb->sg_list[scb->sg_count - i].length;
3835    }
3836    actual -= (hscb->residual_data_count[2] << 16) |
3837              (hscb->residual_data_count[1] <<  8) |
3838              hscb->residual_data_count[0];
3839
3840    if (actual < cmd->underflow)
3841    {
3842      if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
3843      {
3844        printk(INFO_LEAD "Underflow - Wanted %u, %s %u, residual SG "
3845          "count %d.\n", p->host_no, CTL_OF_SCB(scb), cmd->underflow,
3846          (rq_data_dir(cmd->request) == WRITE) ? "wrote" : "read", actual,
3847          hscb->residual_SG_segment_count);
3848        printk(INFO_LEAD "status 0x%x.\n", p->host_no, CTL_OF_SCB(scb),
3849          hscb->target_status);
3850      }
3851      /*
3852       * In 2.4, only send back the residual information, don't flag this
3853       * as an error.  Before 2.4 we had to flag this as an error because
3854       * the mid layer didn't check residual data counts to see if the
3855       * command needs retried.
3856       */
3857      scsi_set_resid(cmd, scb->sg_length - actual);
3858      aic7xxx_status(cmd) = hscb->target_status;
3859    }
3860  }
3861
3862  /*
3863   * Clean out the residual information in the SCB for the
3864   * next consumer.
3865   */
3866  hscb->residual_data_count[2] = 0;
3867  hscb->residual_data_count[1] = 0;
3868  hscb->residual_data_count[0] = 0;
3869  hscb->residual_SG_segment_count = 0;
3870}
3871
3872/*+F*************************************************************************
3873 * Function:
3874 *   aic7xxx_handle_device_reset
3875 *
3876 * Description:
3877 *   Interrupt handler for sequencer interrupts (SEQINT).
3878 *-F*************************************************************************/
3879static void
3880aic7xxx_handle_device_reset(struct aic7xxx_host *p, int target, int channel)
3881{
3882  unsigned char tindex = target;
3883
3884  tindex |= ((channel & 0x01) << 3);
3885
3886  /*
3887   * Go back to async/narrow transfers and renegotiate.
3888   */
3889  aic_outb(p, 0, TARG_SCSIRATE + tindex);
3890  if (p->features & AHC_ULTRA2)
3891    aic_outb(p, 0, TARG_OFFSET + tindex);
3892  aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
3893  if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
3894    printk(INFO_LEAD "Bus Device Reset delivered.\n", p->host_no, channel,
3895      target, -1);
3896  aic7xxx_run_done_queue(p, /*complete*/ TRUE);
3897}
3898
3899/*+F*************************************************************************
3900 * Function:
3901 *   aic7xxx_handle_seqint
3902 *
3903 * Description:
3904 *   Interrupt handler for sequencer interrupts (SEQINT).
3905 *-F*************************************************************************/
3906static void
3907aic7xxx_handle_seqint(struct aic7xxx_host *p, unsigned char intstat)
3908{
3909  struct aic7xxx_scb *scb;
3910  struct aic_dev_data *aic_dev;
3911  unsigned short target_mask;
3912  unsigned char target, lun, tindex;
3913  unsigned char queue_flag = FALSE;
3914  char channel;
3915  int result;
3916
3917  target = ((aic_inb(p, SAVED_TCL) >> 4) & 0x0f);
3918  if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
3919    channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
3920  else
3921    channel = 0;
3922  tindex = target + (channel << 3);
3923  lun = aic_inb(p, SAVED_TCL) & 0x07;
3924  target_mask = (0x01 << tindex);
3925
3926  /*
3927   * Go ahead and clear the SEQINT now, that avoids any interrupt race
3928   * conditions later on in case we enable some other interrupt.
3929   */
3930  aic_outb(p, CLRSEQINT, CLRINT);
3931  switch (intstat & SEQINT_MASK)
3932  {
3933    case NO_MATCH:
3934      {
3935        aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
3936                 SCSISEQ);
3937        printk(WARN_LEAD "No active SCB for reconnecting target - Issuing "
3938               "BUS DEVICE RESET.\n", p->host_no, channel, target, lun);
3939        printk(WARN_LEAD "      SAVED_TCL=0x%x, ARG_1=0x%x, SEQADDR=0x%x\n",
3940               p->host_no, channel, target, lun,
3941               aic_inb(p, SAVED_TCL), aic_inb(p, ARG_1),
3942               (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
3943        if (aic7xxx_panic_on_abort)
3944          aic7xxx_panic_abort(p, NULL);
3945      }
3946      break;
3947
3948    case SEND_REJECT:
3949      {
3950        if (aic7xxx_verbose & VERBOSE_MINOR_ERROR)
3951          printk(INFO_LEAD "Rejecting unknown message (0x%x) received from "
3952            "target, SEQ_FLAGS=0x%x\n", p->host_no, channel, target, lun,
3953            aic_inb(p, ACCUM), aic_inb(p, SEQ_FLAGS));
3954      }
3955      break;
3956
3957    case NO_IDENT:
3958      {
3959        /*
3960         * The reconnecting target either did not send an identify
3961         * message, or did, but we didn't find an SCB to match and
3962         * before it could respond to our ATN/abort, it hit a dataphase.
3963         * The only safe thing to do is to blow it away with a bus
3964         * reset.
3965         */
3966        if (aic7xxx_verbose & (VERBOSE_SEQINT | VERBOSE_RESET_MID))
3967          printk(INFO_LEAD "Target did not send an IDENTIFY message; "
3968            "LASTPHASE 0x%x, SAVED_TCL 0x%x\n", p->host_no, channel, target,
3969            lun, aic_inb(p, LASTPHASE), aic_inb(p, SAVED_TCL));
3970
3971        aic7xxx_reset_channel(p, channel, /*initiate reset*/ TRUE);
3972        aic7xxx_run_done_queue(p, TRUE);
3973
3974      }
3975      break;
3976
3977    case BAD_PHASE:
3978      if (aic_inb(p, LASTPHASE) == P_BUSFREE)
3979      {
3980        if (aic7xxx_verbose & VERBOSE_SEQINT)
3981          printk(INFO_LEAD "Missed busfree.\n", p->host_no, channel,
3982            target, lun);
3983        restart_sequencer(p);
3984      }
3985      else
3986      {
3987        if (aic7xxx_verbose & VERBOSE_SEQINT)
3988          printk(INFO_LEAD "Unknown scsi bus phase, continuing\n", p->host_no,
3989            channel, target, lun);
3990      }
3991      break;
3992
3993    case EXTENDED_MSG:
3994      {
3995        p->msg_type = MSG_TYPE_INITIATOR_MSGIN;
3996        p->msg_len = 0;
3997        p->msg_index = 0;
3998
3999#ifdef AIC7XXX_VERBOSE_DEBUGGING
4000        if (aic7xxx_verbose > 0xffff)
4001          printk(INFO_LEAD "Enabling REQINITs for MSG_IN\n", p->host_no,
4002                 channel, target, lun);
4003#endif
4004
4005       /*      
4006        * To actually receive the message, simply turn on
4007        * REQINIT interrupts and let our interrupt handler
4008        * do the rest (REQINIT should already be true).
4009        */
4010        p->flags |= AHC_HANDLING_REQINITS;
4011        aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4012
4013       /*
4014        * We don't want the sequencer unpaused yet so we return early
4015        */
4016        return;
4017      }
4018
4019    case REJECT_MSG:
4020      {
4021        /*
4022         * What we care about here is if we had an outstanding SDTR
4023         * or WDTR message for this target. If we did, this is a
4024         * signal that the target is refusing negotiation.
4025         */
4026        unsigned char scb_index;
4027        unsigned char last_msg;
4028
4029        scb_index = aic_inb(p, SCB_TAG);
4030        scb = p->scb_data->scb_array[scb_index];
4031        aic_dev = AIC_DEV(scb->cmd);
4032        last_msg = aic_inb(p, LAST_MSG);
4033
4034        if ( (last_msg == MSG_IDENTIFYFLAG) &&
4035             (scb->tag_action) &&
4036            !(scb->flags & SCB_MSGOUT_BITS) )
4037        {
4038          if (scb->tag_action == MSG_ORDERED_Q_TAG)
4039          {
4040            /*
4041             * OK...the device seems able to accept tagged commands, but
4042             * not ordered tag commands, only simple tag commands.  So, we
4043             * disable ordered tag commands and go on with life just like
4044             * normal.
4045             */
4046            scsi_adjust_queue_depth(scb->cmd->device, MSG_SIMPLE_TAG,
4047                            scb->cmd->device->queue_depth);
4048            scb->tag_action = MSG_SIMPLE_Q_TAG;
4049            scb->hscb->control &= ~SCB_TAG_TYPE;
4050            scb->hscb->control |= MSG_SIMPLE_Q_TAG;
4051            aic_outb(p, scb->hscb->control, SCB_CONTROL);
4052            /*
4053             * OK..we set the tag type to simple tag command, now we re-assert
4054             * ATNO and hope this will take us into the identify phase again
4055             * so we can resend the tag type and info to the device.
4056             */
4057            aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4058            aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4059          }
4060          else if (scb->tag_action == MSG_SIMPLE_Q_TAG)
4061          {
4062            unsigned char i;
4063            struct aic7xxx_scb *scbp;
4064            int old_verbose;
4065            /*
4066             * Hmmmm....the device is flaking out on tagged commands.
4067             */
4068            scsi_adjust_queue_depth(scb->cmd->device, 0 /* untagged */,
4069                            p->host->cmd_per_lun);
4070            aic_dev->max_q_depth = aic_dev->temp_q_depth = 1;
4071            /*
4072             * We set this command up as a bus device reset.  However, we have
4073             * to clear the tag type as it's causing us problems.  We shouldnt
4074             * have to worry about any other commands being active, since if
4075             * the device is refusing tagged commands, this should be the
4076             * first tagged command sent to the device, however, we do have
4077             * to worry about any other tagged commands that may already be
4078             * in the qinfifo.  The easiest way to do this, is to issue a BDR,
4079             * send all the commands back to the mid level code, then let them
4080             * come back and get rebuilt as untagged commands.
4081             */
4082            scb->tag_action = 0;
4083            scb->hscb->control &= ~(TAG_ENB | SCB_TAG_TYPE);
4084            aic_outb(p,  scb->hscb->control, SCB_CONTROL);
4085
4086            old_verbose = aic7xxx_verbose;
4087            aic7xxx_verbose &= ~(VERBOSE_RESET|VERBOSE_ABORT);
4088            for (i=0; i < p->scb_data->numscbs; i++)
4089            {
4090              scbp = p->scb_data->scb_array[i];
4091              if ((scbp->flags & SCB_ACTIVE) && (scbp != scb))
4092              {
4093                if (aic7xxx_match_scb(p, scbp, target, channel, lun, i))
4094                {
4095                  aic7xxx_reset_device(p, target, channel, lun, i);
4096                }
4097              }
4098            }
4099            aic7xxx_run_done_queue(p, TRUE);
4100            aic7xxx_verbose = old_verbose;
4101            /*
4102             * Wait until after the for loop to set the busy index since
4103             * aic7xxx_reset_device will clear the busy index during its
4104             * operation.
4105             */
4106            aic7xxx_busy_target(p, scb);
4107            printk(INFO_LEAD "Device is refusing tagged commands, using "
4108              "untagged I/O.\n", p->host_no, channel, target, lun);
4109            aic_outb(p, MSG_IDENTIFYFLAG, MSG_OUT);
4110            aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4111          }
4112        }
4113        else if (scb->flags & SCB_MSGOUT_PPR)
4114        {
4115          /*
4116           * As per the draft specs, any device capable of supporting any of
4117           * the option values other than 0 are not allowed to reject the
4118           * PPR message.  Instead, they must negotiate out what they do
4119           * support instead of rejecting our offering or else they cause
4120           * a parity error during msg_out phase to signal that they don't
4121           * like our settings.
4122           */
4123          aic_dev->needppr = aic_dev->needppr_copy = 0;
4124          aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4125            (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE), aic_dev);
4126          aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4127                               AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
4128                               aic_dev);
4129          aic_dev->goal.options = aic_dev->dtr_pending = 0;
4130          scb->flags &= ~SCB_MSGOUT_BITS;
4131          if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4132          {
4133            printk(INFO_LEAD "Device is rejecting PPR messages, falling "
4134              "back.\n", p->host_no, channel, target, lun);
4135          }
4136          if ( aic_dev->goal.width )
4137          {
4138            aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
4139            aic_dev->dtr_pending = 1;
4140            scb->flags |= SCB_MSGOUT_WDTR;
4141          }
4142          if ( aic_dev->goal.offset )
4143          {
4144            aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
4145            if( !aic_dev->dtr_pending )
4146            {
4147              aic_dev->dtr_pending = 1;
4148              scb->flags |= SCB_MSGOUT_SDTR;
4149            }
4150          }
4151          if ( aic_dev->dtr_pending )
4152          {
4153            aic_outb(p, HOST_MSG, MSG_OUT);
4154            aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
4155          }
4156        }
4157        else if (scb->flags & SCB_MSGOUT_WDTR)
4158        {
4159          /*
4160           * note 8bit xfers and clear flag
4161           */
4162          aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
4163          scb->flags &= ~SCB_MSGOUT_BITS;
4164          aic7xxx_set_width(p, target, channel, lun, MSG_EXT_WDTR_BUS_8_BIT,
4165            (AHC_TRANS_ACTIVE|AHC_TRANS_GOAL|AHC_TRANS_CUR), aic_dev);
4166          aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4167                               AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
4168                               aic_dev);
4169          if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4170          {
4171            printk(INFO_LEAD "Device is rejecting WDTR messages, using "
4172              "narrow transfers.\n", p->host_no, channel, target, lun);
4173          }
4174          aic_dev->needsdtr = aic_dev->needsdtr_copy;
4175        }
4176        else if (scb->flags & SCB_MSGOUT_SDTR)
4177        {
4178         /*
4179          * note asynch xfers and clear flag
4180          */
4181          aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
4182          scb->flags &= ~SCB_MSGOUT_BITS;
4183          aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
4184            (AHC_TRANS_CUR|AHC_TRANS_ACTIVE|AHC_TRANS_GOAL), aic_dev);
4185          if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4186          {
4187            printk(INFO_LEAD "Device is rejecting SDTR messages, using "
4188              "async transfers.\n", p->host_no, channel, target, lun);
4189          }
4190        }
4191        else if (aic7xxx_verbose & VERBOSE_SEQINT)
4192        {
4193          /*
4194           * Otherwise, we ignore it.
4195           */
4196          printk(INFO_LEAD "Received MESSAGE_REJECT for unknown cause.  "
4197            "Ignoring.\n", p->host_no, channel, target, lun);
4198        }
4199      }
4200      break;
4201
4202    case BAD_STATUS:
4203      {
4204        unsigned char scb_index;
4205        struct aic7xxx_hwscb *hscb;
4206        struct scsi_cmnd *cmd;
4207
4208        /* The sequencer will notify us when a command has an error that
4209         * would be of interest to the kernel.  This allows us to leave
4210         * the sequencer running in the common case of command completes
4211         * without error.  The sequencer will have DMA'd the SCB back
4212         * up to us, so we can reference the drivers SCB array.
4213         *
4214         * Set the default return value to 0 indicating not to send
4215         * sense.  The sense code will change this if needed and this
4216         * reduces code duplication.
4217         */
4218        aic_outb(p, 0, RETURN_1);
4219        scb_index = aic_inb(p, SCB_TAG);
4220        if (scb_index > p->scb_data->numscbs)
4221        {
4222          printk(WARN_LEAD "Invalid SCB during SEQINT 0x%02x, SCB_TAG %d.\n",
4223            p->host_no, channel, target, lun, intstat, scb_index);
4224          break;
4225        }
4226        scb = p->scb_data->scb_array[scb_index];
4227        hscb = scb->hscb;
4228
4229        if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4230        {
4231          printk(WARN_LEAD "Invalid SCB during SEQINT 0x%x, scb %d, flags 0x%x,"
4232            " cmd 0x%lx.\n", p->host_no, channel, target, lun, intstat,
4233            scb_index, scb->flags, (unsigned long) scb->cmd);
4234        }
4235        else
4236        {
4237          cmd = scb->cmd;
4238          aic_dev = AIC_DEV(scb->cmd);
4239          hscb->target_status = aic_inb(p, SCB_TARGET_STATUS);
4240          aic7xxx_status(cmd) = hscb->target_status;
4241
4242          cmd->result = hscb->target_status;
4243
4244          switch (status_byte(hscb->target_status))
4245          {
4246            case GOOD:
4247              if (aic7xxx_verbose & VERBOSE_SEQINT)
4248                printk(INFO_LEAD "Interrupted for status of GOOD???\n",
4249                  p->host_no, CTL_OF_SCB(scb));
4250              break;
4251
4252            case COMMAND_TERMINATED:
4253            case CHECK_CONDITION:
4254              if ( !(scb->flags & SCB_SENSE) )
4255              {
4256                /*
4257                 * Send a sense command to the requesting target.
4258                 * XXX - revisit this and get rid of the memcopys.
4259                 */
4260                memcpy(scb->sense_cmd, &generic_sense[0],
4261                       sizeof(generic_sense));
4262
4263                scb->sense_cmd[1] = (cmd->device->lun << 5);
4264                scb->sense_cmd[4] = SCSI_SENSE_BUFFERSIZE;
4265
4266                scb->sg_list[0].length = 
4267                  cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
4268                scb->sg_list[0].address =
4269                        cpu_to_le32(pci_map_single(p->pdev, cmd->sense_buffer,
4270                                                   SCSI_SENSE_BUFFERSIZE,
4271                                                   PCI_DMA_FROMDEVICE));
4272
4273                /*
4274                 * XXX - We should allow disconnection, but can't as it
4275                 * might allow overlapped tagged commands.
4276                 */
4277                /* hscb->control &= DISCENB; */
4278                hscb->control = 0;
4279                hscb->target_status = 0;
4280                hscb->SG_list_pointer = 
4281                  cpu_to_le32(SCB_DMA_ADDR(scb, scb->sg_list));
4282                hscb->SCSI_cmd_pointer = 
4283                  cpu_to_le32(SCB_DMA_ADDR(scb, scb->sense_cmd));
4284                hscb->data_count = scb->sg_list[0].length;
4285                hscb->data_pointer = scb->sg_list[0].address;
4286                hscb->SCSI_cmd_length = COMMAND_SIZE(scb->sense_cmd[0]);
4287                hscb->residual_SG_segment_count = 0;
4288                hscb->residual_data_count[0] = 0;
4289                hscb->residual_data_count[1] = 0;
4290                hscb->residual_data_count[2] = 0;
4291
4292                scb->sg_count = hscb->SG_segment_count = 1;
4293                scb->sg_length = SCSI_SENSE_BUFFERSIZE;
4294                scb->tag_action = 0;
4295                scb->flags |= SCB_SENSE;
4296                /*
4297                 * Ensure the target is busy since this will be an
4298                 * an untagged request.
4299                 */
4300#ifdef AIC7XXX_VERBOSE_DEBUGGING
4301                if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4302                {
4303                  if (scb->flags & SCB_MSGOUT_BITS)
4304                    printk(INFO_LEAD "Requesting SENSE with %s\n", p->host_no,
4305                           CTL_OF_SCB(scb), (scb->flags & SCB_MSGOUT_SDTR) ?
4306                           "SDTR" : "WDTR");
4307                  else
4308                    printk(INFO_LEAD "Requesting SENSE, no MSG\n", p->host_no,
4309                           CTL_OF_SCB(scb));
4310                }
4311#endif
4312                aic7xxx_busy_target(p, scb);
4313                aic_outb(p, SEND_SENSE, RETURN_1);
4314                aic7xxx_error(cmd) = DID_OK;
4315                break;
4316              }  /* first time sense, no errors */
4317              printk(INFO_LEAD "CHECK_CONDITION on REQUEST_SENSE, returning "
4318                     "an error.\n", p->host_no, CTL_OF_SCB(scb));
4319              aic7xxx_error(cmd) = DID_ERROR;
4320              scb->flags &= ~SCB_SENSE;
4321              break;
4322
4323            case QUEUE_FULL:
4324              queue_flag = TRUE;    /* Mark that this is a QUEUE_FULL and */
4325            case BUSY:              /* drop through to here */
4326            {
4327              struct aic7xxx_scb *next_scbp, *prev_scbp;
4328              unsigned char active_hscb, next_hscb, prev_hscb, scb_index;
4329              /*
4330               * We have to look three places for queued commands:
4331               *  1: p->waiting_scbs queue
4332               *  2: QINFIFO
4333               *  3: WAITING_SCBS list on card (for commands that are started
4334               *     but haven't yet made it to the device)
4335               *
4336               * Of special note here is that commands on 2 or 3 above will
4337               * have already been marked as active, while commands on 1 will
4338               * not.  The aic7xxx_done() function will want to unmark them
4339               * from active, so any commands we pull off of 1 need to
4340               * up the active count.
4341               */
4342              next_scbp = p->waiting_scbs.head;
4343              while ( next_scbp != NULL )
4344              {
4345                prev_scbp = next_scbp;
4346                next_scbp = next_scbp->q_next;
4347                if ( aic7xxx_match_scb(p, prev_scbp, target, channel, lun,
4348                     SCB_LIST_NULL) )
4349                {
4350                  scbq_remove(&p->waiting_scbs, prev_scbp);
4351                  scb->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL;
4352                  p->activescbs++;
4353                  aic_dev->active_cmds++;
4354                }
4355              }
4356              aic7xxx_search_qinfifo(p, target, channel, lun,
4357                SCB_LIST_NULL, SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL,
4358                FALSE, NULL);
4359              next_scbp = NULL;
4360              active_hscb = aic_inb(p, SCBPTR);
4361              prev_hscb = next_hscb = scb_index = SCB_LIST_NULL;
4362              next_hscb = aic_inb(p, WAITING_SCBH);
4363              while (next_hscb != SCB_LIST_NULL)
4364              {
4365                aic_outb(p, next_hscb, SCBPTR);
4366                scb_index = aic_inb(p, SCB_TAG);
4367                if (scb_index < p->scb_data->numscbs)
4368                {
4369                  next_scbp = p->scb_data->scb_array[scb_index];
4370                  if (aic7xxx_match_scb(p, next_scbp, target, channel, lun,
4371                      SCB_LIST_NULL) )
4372                  {
4373                    next_scbp->flags = SCB_QUEUED_FOR_DONE | SCB_QUEUE_FULL;
4374                    next_hscb = aic_inb(p, SCB_NEXT);
4375                    aic_outb(p, 0, SCB_CONTROL);
4376                    aic_outb(p, SCB_LIST_NULL, SCB_TAG);
4377                    aic7xxx_add_curscb_to_free_list(p);
4378                    if (prev_hscb == SCB_LIST_NULL)
4379                    {
4380                      /* We were first on the list,
4381                       * so we kill the selection
4382                       * hardware.  Let the sequencer
4383                       * re-init the hardware itself
4384                       */
4385                      aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
4386                      aic_outb(p, CLRSELTIMEO, CLRSINT1);
4387                      aic_outb(p, next_hscb, WAITING_SCBH);
4388                    }
4389                    else
4390                    {
4391                      aic_outb(p, prev_hscb, SCBPTR);
4392                      aic_outb(p, next_hscb, SCB_NEXT);
4393                    }
4394                  }
4395                  else
4396                  {
4397                    prev_hscb = next_hscb;
4398                    next_hscb = aic_inb(p, SCB_NEXT);
4399                  }
4400                } /* scb_index >= p->scb_data->numscbs */
4401              }
4402              aic_outb(p, active_hscb, SCBPTR);
4403              aic7xxx_run_done_queue(p, FALSE);
4404                  
4405#ifdef AIC7XXX_VERBOSE_DEBUGGING
4406              if( (aic7xxx_verbose & VERBOSE_MINOR_ERROR) ||
4407                  (aic7xxx_verbose > 0xffff) )
4408              {
4409                if (queue_flag)
4410                  printk(INFO_LEAD "Queue full received; queue depth %d, "
4411                    "active %d\n", p->host_no, CTL_OF_SCB(scb),
4412                    aic_dev->max_q_depth, aic_dev->active_cmds);
4413                else
4414                  printk(INFO_LEAD "Target busy\n", p->host_no, CTL_OF_SCB(scb));
4415              }
4416#endif
4417              if (queue_flag)
4418              {
4419                int diff;
4420                result = scsi_track_queue_full(cmd->device,
4421                                aic_dev->active_cmds);
4422                if ( result < 0 )
4423                {
4424                  if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4425                    printk(INFO_LEAD "Tagged Command Queueing disabled.\n",
4426                        p->host_no, CTL_OF_SCB(scb));
4427                  diff = aic_dev->max_q_depth - p->host->cmd_per_lun;
4428                  aic_dev->temp_q_depth = 1;
4429                  aic_dev->max_q_depth = 1;
4430                }
4431                else if ( result > 0 )
4432                {
4433                  if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4434                    printk(INFO_LEAD "Queue depth reduced to %d\n", p->host_no,
4435                      CTL_OF_SCB(scb), result);
4436                  diff = aic_dev->max_q_depth - result;
4437                  aic_dev->max_q_depth = result;
4438                  /* temp_q_depth could have been dropped to 1 for an untagged
4439                   * command that might be coming up */
4440                  if(aic_dev->temp_q_depth > result)
4441                    aic_dev->temp_q_depth = result;
4442                }
4443                /* We should free up the no unused SCB entries.  But, that's
4444                 * a difficult thing to do because we use a direct indexed
4445                 * array, so we can't just take any entries and free them,
4446                 * we *have* to free the ones at the end of the array, and
4447                 * they very well could be in use right now, which means
4448                 * in order to do this right, we have to add a delayed
4449                 * freeing mechanism tied into the scb_free() code area.
4450                 * We'll add that later.
4451                 */
4452              }
4453              break;
4454            }
4455            
4456            default:
4457              if (aic7xxx_verbose & VERBOSE_SEQINT)
4458                printk(INFO_LEAD "Unexpected target status 0x%x.\n", p->host_no,
4459                     CTL_OF_SCB(scb), scb->hscb->target_status);
4460              if (!aic7xxx_error(cmd))
4461              {
4462                aic7xxx_error(cmd) = DID_RETRY_COMMAND;
4463              }
4464              break;
4465          }  /* end switch */
4466        }  /* end else of */
4467      }
4468      break;
4469
4470    case AWAITING_MSG:
4471      {
4472        unsigned char scb_index, msg_out;
4473
4474        scb_index = aic_inb(p, SCB_TAG);
4475        msg_out = aic_inb(p, MSG_OUT);
4476        scb = p->scb_data->scb_array[scb_index];
4477        aic_dev = AIC_DEV(scb->cmd);
4478        p->msg_index = p->msg_len = 0;
4479        /*
4480         * This SCB had a MK_MESSAGE set in its control byte informing
4481         * the sequencer that we wanted to send a special message to
4482         * this target.
4483         */
4484
4485        if ( !(scb->flags & SCB_DEVICE_RESET) &&
4486              (msg_out == MSG_IDENTIFYFLAG) &&
4487              (scb->hscb->control & TAG_ENB) )
4488        {
4489          p->msg_buf[p->msg_index++] = scb->tag_action;
4490          p->msg_buf[p->msg_index++] = scb->hscb->tag;
4491          p->msg_len += 2;
4492        }
4493
4494        if (scb->flags & SCB_DEVICE_RESET)
4495        {
4496          p->msg_buf[p->msg_index++] = MSG_BUS_DEV_RESET;
4497          p->msg_len++;
4498          if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
4499            printk(INFO_LEAD "Bus device reset mailed.\n",
4500                 p->host_no, CTL_OF_SCB(scb));
4501        }
4502        else if (scb->flags & SCB_ABORT)
4503        {
4504          if (scb->tag_action)
4505          {
4506            p->msg_buf[p->msg_index++] = MSG_ABORT_TAG;
4507          }
4508          else
4509          {
4510            p->msg_buf[p->msg_index++] = MSG_ABORT;
4511          }
4512          p->msg_len++;
4513          if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
4514            printk(INFO_LEAD "Abort message mailed.\n", p->host_no,
4515              CTL_OF_SCB(scb));
4516        }
4517        else if (scb->flags & SCB_MSGOUT_PPR)
4518        {
4519          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4520          {
4521            printk(INFO_LEAD "Sending PPR (%d/%d/%d/%d) message.\n",
4522                   p->host_no, CTL_OF_SCB(scb),
4523                   aic_dev->goal.period,
4524                   aic_dev->goal.offset,
4525                   aic_dev->goal.width,
4526                   aic_dev->goal.options);
4527          }
4528          aic7xxx_construct_ppr(p, scb);
4529        }
4530        else if (scb->flags & SCB_MSGOUT_WDTR)
4531        {
4532          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4533          {
4534            printk(INFO_LEAD "Sending WDTR message.\n", p->host_no,
4535                   CTL_OF_SCB(scb));
4536          }
4537          aic7xxx_construct_wdtr(p, aic_dev->goal.width);
4538        }
4539        else if (scb->flags & SCB_MSGOUT_SDTR)
4540        {
4541          unsigned int max_sync, period;
4542          unsigned char options = 0;
4543          /*
4544           * Now that the device is selected, use the bits in SBLKCTL and
4545           * SSTAT2 to determine the max sync rate for this device.
4546           */
4547          if (p->features & AHC_ULTRA2)
4548          {
4549            if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
4550                !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
4551            {
4552              max_sync = AHC_SYNCRATE_ULTRA2;
4553            }
4554            else
4555            {
4556              max_sync = AHC_SYNCRATE_ULTRA;
4557            }
4558          }
4559          else if (p->features & AHC_ULTRA)
4560          {
4561            max_sync = AHC_SYNCRATE_ULTRA;
4562          }
4563          else
4564          {
4565            max_sync = AHC_SYNCRATE_FAST;
4566          }
4567          period = aic_dev->goal.period;
4568          aic7xxx_find_syncrate(p, &period, max_sync, &options);
4569          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
4570          {
4571            printk(INFO_LEAD "Sending SDTR %d/%d message.\n", p->host_no,
4572                   CTL_OF_SCB(scb), period,
4573                   aic_dev->goal.offset);
4574          }
4575          aic7xxx_construct_sdtr(p, period, aic_dev->goal.offset);
4576        }
4577        else 
4578        {
4579          panic("aic7xxx: AWAITING_MSG for an SCB that does "
4580                "not have a waiting message.\n");
4581        }
4582        /*
4583         * We've set everything up to send our message, now to actually do
4584         * so we need to enable reqinit interrupts and let the interrupt
4585         * handler do the rest.  We don't want to unpause the sequencer yet
4586         * though so we'll return early.  We also have to make sure that
4587         * we clear the SEQINT *BEFORE* we set the REQINIT handler active
4588         * or else it's possible on VLB cards to lose the first REQINIT
4589         * interrupt.  Edge triggered EISA cards could also lose this
4590         * interrupt, although PCI and level triggered cards should not
4591         * have this problem since they continually interrupt the kernel
4592         * until we take care of the situation.
4593         */
4594        scb->flags |= SCB_MSGOUT_SENT;
4595        p->msg_index = 0;
4596        p->msg_type = MSG_TYPE_INITIATOR_MSGOUT;
4597        p->flags |= AHC_HANDLING_REQINITS;
4598        aic_outb(p, aic_inb(p, SIMODE1) | ENREQINIT, SIMODE1);
4599        return;
4600      }
4601      break;
4602
4603    case DATA_OVERRUN:
4604      {
4605        unsigned char scb_index = aic_inb(p, SCB_TAG);
4606        unsigned char lastphase = aic_inb(p, LASTPHASE);
4607        unsigned int i;
4608
4609        scb = (p->scb_data->scb_array[scb_index]);
4610        /*
4611         * XXX - What do we really want to do on an overrun?  The
4612         *       mid-level SCSI code should handle this, but for now,
4613         *       we'll just indicate that the command should retried.
4614         *    If we retrieved sense info on this target, then the 
4615         *    base SENSE info should have been saved prior to the
4616         *    overrun error.  In that case, we return DID_OK and let
4617         *    the mid level code pick up on the sense info.  Otherwise
4618         *    we return DID_ERROR so the command will get retried.
4619         */
4620        if ( !(scb->flags & SCB_SENSE) )
4621        {
4622          printk(WARN_LEAD "Data overrun detected in %s phase, tag %d;\n",
4623            p->host_no, CTL_OF_SCB(scb), 
4624            (lastphase == P_DATAIN) ? "Data-In" : "Data-Out", scb->hscb->tag);
4625          printk(KERN_WARNING "  %s seen Data Phase. Length=%d, NumSGs=%d.\n",
4626            (aic_inb(p, SEQ_FLAGS) & DPHASE) ? "Have" : "Haven't",
4627            scb->sg_length, scb->sg_count);
4628          printk(KERN_WARNING "  Raw SCSI Command: 0x");
4629          for (i = 0; i < scb->hscb->SCSI_cmd_length; i++)
4630          {
4631            printk("%02x ", scb->cmd->cmnd[i]);
4632          }
4633          printk("\n");
4634          if(aic7xxx_verbose > 0xffff)
4635          {
4636            for (i = 0; i < scb->sg_count; i++)
4637            {
4638              printk(KERN_WARNING "     sg[%d] - Addr 0x%x : Length %d\n",
4639                 i, 
4640                 le32_to_cpu(scb->sg_list[i].address),
4641                 le32_to_cpu(scb->sg_list[i].length) );
4642            }
4643          }
4644          aic7xxx_error(scb->cmd) = DID_ERROR;
4645        }
4646        else
4647          printk(INFO_LEAD "Data Overrun during SEND_SENSE operation.\n",
4648            p->host_no, CTL_OF_SCB(scb));
4649      }
4650      break;
4651
4652    case WIDE_RESIDUE:
4653      {
4654        unsigned char resid_sgcnt, index;
4655        unsigned char scb_index = aic_inb(p, SCB_TAG);
4656        unsigned int cur_addr, resid_dcnt;
4657        unsigned int native_addr, native_length, sg_addr;
4658        int i;
4659
4660        if(scb_index > p->scb_data->numscbs)
4661        {
4662          printk(WARN_LEAD "invalid scb_index during WIDE_RESIDUE.\n",
4663            p->host_no, -1, -1, -1);
4664          /*
4665           * XXX: Add error handling here
4666           */
4667          break;
4668        }
4669        scb = p->scb_data->scb_array[scb_index];
4670        if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4671        {
4672          printk(WARN_LEAD "invalid scb during WIDE_RESIDUE flags:0x%x "
4673                 "scb->cmd:0x%lx\n", p->host_no, CTL_OF_SCB(scb),
4674                 scb->flags, (unsigned long)scb->cmd);
4675          break;
4676        }
4677        if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4678          printk(INFO_LEAD "Got WIDE_RESIDUE message, patching up data "
4679                 "pointer.\n", p->host_no, CTL_OF_SCB(scb));
4680
4681        /*
4682         * We have a valid scb to use on this WIDE_RESIDUE message, so
4683         * we need to walk the sg list looking for this particular sg
4684         * segment, then see if we happen to be at the very beginning of
4685         * the segment.  If we are, then we have to back things up to
4686         * the previous segment.  If not, then we simply need to remove
4687         * one byte from this segments address and add one to the byte
4688         * count.
4689         */
4690        cur_addr = aic_inb(p, SHADDR) | (aic_inb(p, SHADDR + 1) << 8) |
4691          (aic_inb(p, SHADDR + 2) << 16) | (aic_inb(p, SHADDR + 3) << 24);
4692        sg_addr = aic_inb(p, SG_COUNT + 1) | (aic_inb(p, SG_COUNT + 2) << 8) |
4693          (aic_inb(p, SG_COUNT + 3) << 16) | (aic_inb(p, SG_COUNT + 4) << 24);
4694        resid_sgcnt = aic_inb(p, SCB_RESID_SGCNT);
4695        resid_dcnt = aic_inb(p, SCB_RESID_DCNT) |
4696          (aic_inb(p, SCB_RESID_DCNT + 1) << 8) |
4697          (aic_inb(p, SCB_RESID_DCNT + 2) << 16);
4698        index = scb->sg_count - ((resid_sgcnt) ? resid_sgcnt : 1);
4699        native_addr = le32_to_cpu(scb->sg_list[index].address);
4700        native_length = le32_to_cpu(scb->sg_list[index].length);
4701        /*
4702         * If resid_dcnt == native_length, then we just loaded this SG
4703         * segment and we need to back it up one...
4704         */
4705        if(resid_dcnt == native_length)
4706        {
4707          if(index == 0)
4708          {
4709            /*
4710             * Oops, this isn't right, we can't back up to before the
4711             * beginning.  This must be a bogus message, ignore it.
4712             */
4713            break;
4714          }
4715          resid_dcnt = 1;
4716          resid_sgcnt += 1;
4717          native_addr = le32_to_cpu(scb->sg_list[index - 1].address);
4718          native_length = le32_to_cpu(scb->sg_list[index - 1].length);
4719          cur_addr = native_addr + (native_length - 1);
4720          sg_addr -= sizeof(struct hw_scatterlist);
4721        }
4722        else
4723        {
4724          /*
4725           * resid_dcnt != native_length, so we are in the middle of a SG
4726           * element.  Back it up one byte and leave the rest alone.
4727           */
4728          resid_dcnt += 1;
4729          cur_addr -= 1;
4730        }
4731        
4732        /*
4733         * Output the new addresses and counts to the right places on the
4734         * card.
4735         */
4736        aic_outb(p, resid_sgcnt, SG_COUNT);
4737        aic_outb(p, resid_sgcnt, SCB_RESID_SGCNT);
4738        aic_outb(p, sg_addr & 0xff, SG_COUNT + 1);
4739        aic_outb(p, (sg_addr >> 8) & 0xff, SG_COUNT + 2);
4740        aic_outb(p, (sg_addr >> 16) & 0xff, SG_COUNT + 3);
4741        aic_outb(p, (sg_addr >> 24) & 0xff, SG_COUNT + 4);
4742        aic_outb(p, resid_dcnt & 0xff, SCB_RESID_DCNT);
4743        aic_outb(p, (resid_dcnt >> 8) & 0xff, SCB_RESID_DCNT + 1);
4744        aic_outb(p, (resid_dcnt >> 16) & 0xff, SCB_RESID_DCNT + 2);
4745
4746        /*
4747         * The sequencer actually wants to find the new address
4748         * in the SHADDR register set.  On the Ultra2 and later controllers
4749         * this register set is readonly.  In order to get the right number
4750         * into the register, you actually have to enter it in HADDR and then
4751         * use the PRELOADEN bit of DFCNTRL to drop it through from the
4752         * HADDR register to the SHADDR register.  On non-Ultra2 controllers,
4753         * we simply write it direct.
4754         */
4755        if(p->features & AHC_ULTRA2)
4756        {
4757          /*
4758           * We might as well be accurate and drop both the resid_dcnt and
4759           * cur_addr into HCNT and HADDR and have both of them drop
4760           * through to the shadow layer together.
4761           */
4762          aic_outb(p, resid_dcnt & 0xff, HCNT);
4763          aic_outb(p, (resid_dcnt >> 8) & 0xff, HCNT + 1);
4764          aic_outb(p, (resid_dcnt >> 16) & 0xff, HCNT + 2);
4765          aic_outb(p, cur_addr & 0xff, HADDR);
4766          aic_outb(p, (cur_addr >> 8) & 0xff, HADDR + 1);
4767          aic_outb(p, (cur_addr >> 16) & 0xff, HADDR + 2);
4768          aic_outb(p, (cur_addr >> 24) & 0xff, HADDR + 3);
4769          aic_outb(p, aic_inb(p, DMAPARAMS) | PRELOADEN, DFCNTRL);
4770          udelay(1);
4771          aic_outb(p, aic_inb(p, DMAPARAMS) & ~(SCSIEN|HDMAEN), DFCNTRL);
4772          i=0;
4773          while(((aic_inb(p, DFCNTRL) & (SCSIEN|HDMAEN)) != 0) && (i++ < 1000))
4774          {
4775            udelay(1);
4776          }
4777        }
4778        else
4779        {
4780          aic_outb(p, cur_addr & 0xff, SHADDR);
4781          aic_outb(p, (cur_addr >> 8) & 0xff, SHADDR + 1);
4782          aic_outb(p, (cur_addr >> 16) & 0xff, SHADDR + 2);
4783          aic_outb(p, (cur_addr >> 24) & 0xff, SHADDR + 3);
4784        }
4785      }
4786      break;
4787
4788    case SEQ_SG_FIXUP:
4789    {
4790      unsigned char scb_index, tmp;
4791      int sg_addr, sg_length;
4792
4793      scb_index = aic_inb(p, SCB_TAG);
4794
4795      if(scb_index > p->scb_data->numscbs)
4796      {
4797        printk(WARN_LEAD "invalid scb_index during SEQ_SG_FIXUP.\n",
4798          p->host_no, -1, -1, -1);
4799        printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
4800           "0x%x\n", p->host_no, -1, -1, -1,
4801           aic_inb(p, SCSISIGI),
4802           aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
4803           aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
4804        printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
4805           p->host_no, -1, -1, -1, aic_inb(p, SG_CACHEPTR),
4806           aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
4807           aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
4808        /*
4809         * XXX: Add error handling here
4810         */
4811        break;
4812      }
4813      scb = p->scb_data->scb_array[scb_index];
4814      if(!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
4815      {
4816        printk(WARN_LEAD "invalid scb during SEQ_SG_FIXUP flags:0x%x "
4817               "scb->cmd:0x%p\n", p->host_no, CTL_OF_SCB(scb),
4818               scb->flags, scb->cmd);
4819        printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
4820           "0x%x\n", p->host_no, CTL_OF_SCB(scb),
4821           aic_inb(p, SCSISIGI),
4822           aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
4823           aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
4824        printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n",
4825           p->host_no, CTL_OF_SCB(scb), aic_inb(p, SG_CACHEPTR),
4826           aic_inb(p, SSTAT2), aic_inb(p, STCNT + 2) << 16 |
4827           aic_inb(p, STCNT + 1) << 8 | aic_inb(p, STCNT));
4828        break;
4829      }
4830      if(aic7xxx_verbose & VERBOSE_MINOR_ERROR)
4831        printk(INFO_LEAD "Fixing up SG address for sequencer.\n", p->host_no,
4832               CTL_OF_SCB(scb));
4833      /*
4834       * Advance the SG pointer to the next element in the list
4835       */
4836      tmp = aic_inb(p, SG_NEXT);
4837      tmp += SG_SIZEOF;
4838      aic_outb(p, tmp, SG_NEXT);
4839      if( tmp < SG_SIZEOF )
4840        aic_outb(p, aic_inb(p, SG_NEXT + 1) + 1, SG_NEXT + 1);
4841      tmp = aic_inb(p, SG_COUNT) - 1;
4842      aic_outb(p, tmp, SG_COUNT);
4843      sg_addr = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].address);
4844      sg_length = le32_to_cpu(scb->sg_list[scb->sg_count - tmp].length);
4845      /*
4846       * Now stuff the element we just advanced past down onto the
4847       * card so it can be stored in the residual area.
4848       */
4849      aic_outb(p, sg_addr & 0xff, HADDR);
4850      aic_outb(p, (sg_addr >> 8) & 0xff, HADDR + 1);
4851      aic_outb(p, (sg_addr >> 16) & 0xff, HADDR + 2);
4852      aic_outb(p, (sg_addr >> 24) & 0xff, HADDR + 3);
4853      aic_outb(p, sg_length & 0xff, HCNT);
4854      aic_outb(p, (sg_length >> 8) & 0xff, HCNT + 1);
4855      aic_outb(p, (sg_length >> 16) & 0xff, HCNT + 2);
4856      aic_outb(p, (tmp << 2) | ((tmp == 1) ? LAST_SEG : 0), SG_CACHEPTR);
4857      aic_outb(p, aic_inb(p, DMAPARAMS), DFCNTRL);
4858      while(aic_inb(p, SSTAT0) & SDONE) udelay(1);
4859      while(aic_inb(p, DFCNTRL) & (HDMAEN|SCSIEN)) aic_outb(p, 0, DFCNTRL);
4860    }
4861    break;
4862
4863#ifdef AIC7XXX_NOT_YET 
4864    case TRACEPOINT2:
4865      {
4866        printk(INFO_LEAD "Tracepoint #2 reached.\n", p->host_no,
4867               channel, target, lun);
4868      }
4869      break;
4870
4871    /* XXX Fill these in later */
4872    case MSG_BUFFER_BUSY:
4873      printk("aic7xxx: Message buffer busy.\n");
4874      break;
4875    case MSGIN_PHASEMIS:
4876      printk("aic7xxx: Message-in phasemis.\n");
4877      break;
4878#endif
4879
4880    default:                   /* unknown */
4881      printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
4882             p->host_no, channel, target, lun, intstat,
4883             aic_inb(p, SCSISIGI));
4884      break;
4885  }
4886
4887  /*
4888   * Clear the sequencer interrupt and unpause the sequencer.
4889   */
4890  unpause_sequencer(p, /* unpause always */ TRUE);
4891}
4892
4893/*+F*************************************************************************
4894 * Function:
4895 *   aic7xxx_parse_msg
4896 *
4897 * Description:
4898 *   Parses incoming messages into actions on behalf of
4899 *   aic7xxx_handle_reqinit
4900 *_F*************************************************************************/
4901static int
4902aic7xxx_parse_msg(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
4903{
4904  int reject, reply, done;
4905  unsigned char target_scsirate, tindex;
4906  unsigned short target_mask;
4907  unsigned char target, channel, lun;
4908  unsigned char bus_width, new_bus_width;
4909  unsigned char trans_options, new_trans_options;
4910  unsigned int period, new_period, offset, new_offset, maxsync;
4911  struct aic7xxx_syncrate *syncrate;
4912  struct aic_dev_data *aic_dev;
4913
4914  target = scb->cmd->device->id;
4915  channel = scb->cmd->device->channel;
4916  lun = scb->cmd->device->lun;
4917  reply = reject = done = FALSE;
4918  tindex = TARGET_INDEX(scb->cmd);
4919  aic_dev = AIC_DEV(scb->cmd);
4920  target_scsirate = aic_inb(p, TARG_SCSIRATE + tindex);
4921  target_mask = (0x01 << tindex);
4922
4923  /*
4924   * Parse as much of the message as is available,
4925   * rejecting it if we don't support it.  When
4926   * the entire message is available and has been
4927   * handled, return TRUE indicating that we have
4928   * parsed an entire message.
4929   */
4930
4931  if (p->msg_buf[0] != MSG_EXTENDED)
4932  {
4933    reject = TRUE;
4934  }
4935
4936  /*
4937   * Even if we are an Ultra3 card, don't allow Ultra3 sync rates when
4938   * using the SDTR messages.  We need the PPR messages to enable the
4939   * higher speeds that include things like Dual Edge clocking.
4940   */
4941  if (p->features & AHC_ULTRA2)
4942  {
4943    if ( (aic_inb(p, SBLKCTL) & ENAB40) &&
4944         !(aic_inb(p, SSTAT2) & EXP_ACTIVE) )
4945    {
4946      if (p->features & AHC_ULTRA3)
4947        maxsync = AHC_SYNCRATE_ULTRA3;
4948      else
4949        maxsync = AHC_SYNCRATE_ULTRA2;
4950    }
4951    else
4952    {
4953      maxsync = AHC_SYNCRATE_ULTRA;
4954    }
4955  }
4956  else if (p->features & AHC_ULTRA)
4957  {
4958    maxsync = AHC_SYNCRATE_ULTRA;
4959  }
4960  else
4961  {
4962    maxsync = AHC_SYNCRATE_FAST;
4963  }
4964
4965  /*
4966   * Just accept the length byte outright and perform
4967   * more checking once we know the message type.
4968   */
4969
4970  if ( !reject && (p->msg_len > 2) )
4971  {
4972    switch(p->msg_buf[2])
4973    {
4974      case MSG_EXT_SDTR:
4975      {
4976        
4977        if (p->msg_buf[1] != MSG_EXT_SDTR_LEN)
4978        {
4979          reject = TRUE;
4980          break;
4981        }
4982
4983        if (p->msg_len < (MSG_EXT_SDTR_LEN + 2))
4984        {
4985          break;
4986        }
4987
4988        period = new_period = p->msg_buf[3];
4989        offset = new_offset = p->msg_buf[4];
4990        trans_options = new_trans_options = 0;
4991        bus_width = new_bus_width = target_scsirate & WIDEXFER;
4992
4993        /*
4994         * If our current max syncrate is in the Ultra3 range, bump it back
4995         * down to Ultra2 since we can't negotiate DT transfers using SDTR
4996         */
4997        if(maxsync == AHC_SYNCRATE_ULTRA3)
4998          maxsync = AHC_SYNCRATE_ULTRA2;
4999
5000        /*
5001         * We might have a device that is starting negotiation with us
5002         * before we can start up negotiation with it....be prepared to
5003         * have a device ask for a higher speed then we want to give it
5004         * in that case
5005         */
5006        if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR)) !=
5007             (SCB_MSGOUT_SENT|SCB_MSGOUT_SDTR) )
5008        {
5009          if (!(aic_dev->flags & DEVICE_DTR_SCANNED))
5010          {
5011            /*
5012             * We shouldn't get here unless this is a narrow drive, wide
5013             * devices should trigger this same section of code in the WDTR
5014             * handler first instead.
5015             */
5016            aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT;
5017            aic_dev->goal.options = 0;
5018            if(p->user[tindex].offset)
5019            {
5020              aic_dev->needsdtr_copy = 1;
5021              aic_dev->goal.period = max_t(unsigned char, 10,p->user[tindex].period);
5022              if(p->features & AHC_ULTRA2)
5023              {
5024                aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5025              }
5026              else
5027              {
5028                aic_dev->goal.offset = MAX_OFFSET_8BIT;
5029              }
5030            }
5031            else
5032            {
5033              aic_dev->needsdtr_copy = 0;
5034              aic_dev->goal.period = 255;
5035              aic_dev->goal.offset = 0;
5036            }
5037            aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5038          }
5039          else if (aic_dev->needsdtr_copy == 0)
5040          {
5041            /*
5042             * This is a preemptive message from the target, we've already
5043             * scanned this target and set our options for it, and we
5044             * don't need a SDTR with this target (for whatever reason),
5045             * so reject this incoming SDTR
5046             */
5047            reject = TRUE;
5048            break;
5049          }
5050
5051          /* The device is sending this message first and we have to reply */
5052          reply = TRUE;
5053          
5054          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5055          {
5056            printk(INFO_LEAD "Received pre-emptive SDTR message from "
5057                   "target.\n", p->host_no, CTL_OF_SCB(scb));
5058          }
5059          /*
5060           * Validate the values the device passed to us against our SEEPROM
5061           * settings.  We don't have to do this if we aren't replying since
5062           * the device isn't allowed to send values greater than the ones
5063           * we first sent to it.
5064           */
5065          new_period = max_t(unsigned int, period, aic_dev->goal.period);
5066          new_offset = min_t(unsigned int, offset, aic_dev->goal.offset);
5067        }
5068 
5069        /*
5070         * Use our new_period, new_offset, bus_width, and card options
5071         * to determine the actual syncrate settings
5072         */
5073        syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5074                                         &trans_options);
5075        aic7xxx_validate_offset(p, syncrate, &new_offset, bus_width);
5076
5077        /*
5078         * Did we drop to async?  If so, send a reply regardless of whether
5079         * or not we initiated this negotiation.
5080         */
5081        if ((new_offset == 0) && (new_offset != offset))
5082        {
5083          aic_dev->needsdtr_copy = 0;
5084          reply = TRUE;
5085        }
5086        
5087        /*
5088         * Did we start this, if not, or if we went too low and had to
5089         * go async, then send an SDTR back to the target
5090         */
5091        if(reply)
5092        {
5093          /* when sending a reply, make sure that the goal settings are
5094           * updated along with current and active since the code that
5095           * will actually build the message for the sequencer uses the
5096           * goal settings as its guidelines.
5097           */
5098          aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5099                               new_offset, trans_options,
5100                               AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5101                               aic_dev);
5102          scb->flags &= ~SCB_MSGOUT_BITS;
5103          scb->flags |= SCB_MSGOUT_SDTR;
5104          aic_outb(p, HOST_MSG, MSG_OUT);
5105          aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5106        }
5107        else
5108        {
5109          aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5110                               new_offset, trans_options,
5111                               AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5112          aic_dev->needsdtr = 0;
5113        }
5114        done = TRUE;
5115        break;
5116      }
5117      case MSG_EXT_WDTR:
5118      {
5119          
5120        if (p->msg_buf[1] != MSG_EXT_WDTR_LEN)
5121        {
5122          reject = TRUE;
5123          break;
5124        }
5125
5126        if (p->msg_len < (MSG_EXT_WDTR_LEN + 2))
5127        {
5128          break;
5129        }
5130
5131        bus_width = new_bus_width = p->msg_buf[3];
5132
5133        if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR)) ==
5134             (SCB_MSGOUT_SENT|SCB_MSGOUT_WDTR) )
5135        {
5136          switch(bus_width)
5137          {
5138            default:
5139            {
5140              reject = TRUE;
5141              if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5142                   ((aic_dev->flags & DEVICE_PRINT_DTR) ||
5143                    (aic7xxx_verbose > 0xffff)) )
5144              {
5145                printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5146                  p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5147              }
5148            } /* We fall through on purpose */
5149            case MSG_EXT_WDTR_BUS_8_BIT:
5150            {
5151              aic_dev->goal.width = MSG_EXT_WDTR_BUS_8_BIT;
5152              aic_dev->needwdtr_copy &= ~target_mask;
5153              break;
5154            }
5155            case MSG_EXT_WDTR_BUS_16_BIT:
5156            {
5157              break;
5158            }
5159          }
5160          aic_dev->needwdtr = 0;
5161          aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5162                            AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5163        }
5164        else
5165        {
5166          if ( !(aic_dev->flags & DEVICE_DTR_SCANNED) )
5167          {
5168            /* 
5169             * Well, we now know the WDTR and SYNC caps of this device since
5170             * it contacted us first, mark it as such and copy the user stuff
5171             * over to the goal stuff.
5172             */
5173            if( (p->features & AHC_WIDE) && p->user[tindex].width )
5174            {
5175              aic_dev->goal.width = MSG_EXT_WDTR_BUS_16_BIT;
5176              aic_dev->needwdtr_copy = 1;
5177            }
5178            
5179            /*
5180             * Devices that support DT transfers don't start WDTR requests
5181             */
5182            aic_dev->goal.options = 0;
5183
5184            if(p->user[tindex].offset)
5185            {
5186              aic_dev->needsdtr_copy = 1;
5187              aic_dev->goal.period = max_t(unsigned char, 10, p->user[tindex].period);
5188              if(p->features & AHC_ULTRA2)
5189              {
5190                aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5191              }
5192              else if( aic_dev->goal.width )
5193              {
5194                aic_dev->goal.offset = MAX_OFFSET_16BIT;
5195              }
5196              else
5197              {
5198                aic_dev->goal.offset = MAX_OFFSET_8BIT;
5199              }
5200            } else {
5201              aic_dev->needsdtr_copy = 0;
5202              aic_dev->goal.period = 255;
5203              aic_dev->goal.offset = 0;
5204            }
5205            
5206            aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5207          }
5208          else if (aic_dev->needwdtr_copy == 0)
5209          {
5210            /*
5211             * This is a preemptive message from the target, we've already
5212             * scanned this target and set our options for it, and we
5213             * don't need a WDTR with this target (for whatever reason),
5214             * so reject this incoming WDTR
5215             */
5216            reject = TRUE;
5217            break;
5218          }
5219
5220          /* The device is sending this message first and we have to reply */
5221          reply = TRUE;
5222
5223          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5224          {
5225            printk(INFO_LEAD "Received pre-emptive WDTR message from "
5226                   "target.\n", p->host_no, CTL_OF_SCB(scb));
5227          }
5228          switch(bus_width)
5229          {
5230            case MSG_EXT_WDTR_BUS_16_BIT:
5231            {
5232              if ( (p->features & AHC_WIDE) &&
5233                   (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) )
5234              {
5235                new_bus_width = MSG_EXT_WDTR_BUS_16_BIT;
5236                break;
5237              }
5238            } /* Fall through if we aren't a wide card */
5239            default:
5240            case MSG_EXT_WDTR_BUS_8_BIT:
5241            {
5242              aic_dev->needwdtr_copy = 0;
5243              new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5244              break;
5245            }
5246          }
5247          scb->flags &= ~SCB_MSGOUT_BITS;
5248          scb->flags |= SCB_MSGOUT_WDTR;
5249          aic_dev->needwdtr = 0;
5250          if(aic_dev->dtr_pending == 0)
5251          {
5252            /* there is no other command with SCB_DTR_SCB already set that will
5253             * trigger the release of the dtr_pending bit.  Both set the bit
5254             * and set scb->flags |= SCB_DTR_SCB
5255             */
5256            aic_dev->dtr_pending = 1;
5257            scb->flags |= SCB_DTR_SCB;
5258          }
5259          aic_outb(p, HOST_MSG, MSG_OUT);
5260          aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5261          /* when sending a reply, make sure that the goal settings are
5262           * updated along with current and active since the code that
5263           * will actually build the message for the sequencer uses the
5264           * goal settings as its guidelines.
5265           */
5266          aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5267                          AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5268                          aic_dev);
5269        }
5270        
5271        /*
5272         * By virtue of the SCSI spec, a WDTR message negates any existing
5273         * SDTR negotiations.  So, even if needsdtr isn't marked for this
5274         * device, we still have to do a new SDTR message if the device
5275         * supports SDTR at all.  Therefore, we check needsdtr_copy instead
5276         * of needstr.
5277         */
5278        aic7xxx_set_syncrate(p, NULL, target, channel, 0, 0, 0,
5279                             AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
5280                             aic_dev);
5281        aic_dev->needsdtr = aic_dev->needsdtr_copy;
5282        done = TRUE;
5283        break;
5284      }
5285      case MSG_EXT_PPR:
5286      {
5287        
5288        if (p->msg_buf[1] != MSG_EXT_PPR_LEN)
5289        {
5290          reject = TRUE;
5291          break;
5292        }
5293
5294        if (p->msg_len < (MSG_EXT_PPR_LEN + 2))
5295        {
5296          break;
5297        }
5298
5299        period = new_period = p->msg_buf[3];
5300        offset = new_offset = p->msg_buf[5];
5301        bus_width = new_bus_width = p->msg_buf[6];
5302        trans_options = new_trans_options = p->msg_buf[7] & 0xf;
5303
5304        if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5305        {
5306          printk(INFO_LEAD "Parsing PPR message (%d/%d/%d/%d)\n",
5307                 p->host_no, CTL_OF_SCB(scb), period, offset, bus_width,
5308                 trans_options);
5309        }
5310
5311        /*
5312         * We might have a device that is starting negotiation with us
5313         * before we can start up negotiation with it....be prepared to
5314         * have a device ask for a higher speed then we want to give it
5315         * in that case
5316         */
5317        if ( (scb->flags & (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR)) !=
5318             (SCB_MSGOUT_SENT|SCB_MSGOUT_PPR) )
5319        { 
5320          /* Have we scanned the device yet? */
5321          if (!(aic_dev->flags & DEVICE_DTR_SCANNED))
5322          {
5323            /* The device is electing to use PPR messages, so we will too until
5324             * we know better */
5325            aic_dev->needppr = aic_dev->needppr_copy = 1;
5326            aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
5327            aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
5328          
5329            /* We know the device is SCSI-3 compliant due to PPR */
5330            aic_dev->flags |= DEVICE_SCSI_3;
5331          
5332            /*
5333             * Not only is the device starting this up, but it also hasn't
5334             * been scanned yet, so this would likely be our TUR or our
5335             * INQUIRY command at scan time, so we need to use the
5336             * settings from the SEEPROM if they existed.  Of course, even
5337             * if we didn't find a SEEPROM, we stuffed default values into
5338             * the user settings anyway, so use those in all cases.
5339             */
5340            aic_dev->goal.width = p->user[tindex].width;
5341            if(p->user[tindex].offset)
5342            {
5343              aic_dev->goal.period = p->user[tindex].period;
5344              aic_dev->goal.options = p->user[tindex].options;
5345              if(p->features & AHC_ULTRA2)
5346              {
5347                aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
5348              }
5349              else if( aic_dev->goal.width &&
5350                       (bus_width == MSG_EXT_WDTR_BUS_16_BIT) &&
5351                       p->features & AHC_WIDE )
5352              {
5353                aic_dev->goal.offset = MAX_OFFSET_16BIT;
5354              }
5355              else
5356              {
5357                aic_dev->goal.offset = MAX_OFFSET_8BIT;
5358              }
5359            }
5360            else
5361            {
5362              aic_dev->goal.period = 255;
5363              aic_dev->goal.offset = 0;
5364              aic_dev->goal.options = 0;
5365            }
5366            aic_dev->flags |= DEVICE_DTR_SCANNED | DEVICE_PRINT_DTR;
5367          }
5368          else if (aic_dev->needppr_copy == 0)
5369          {
5370            /*
5371             * This is a preemptive message from the target, we've already
5372             * scanned this target and set our options for it, and we
5373             * don't need a PPR with this target (for whatever reason),
5374             * so reject this incoming PPR
5375             */
5376            reject = TRUE;
5377            break;
5378          }
5379
5380          /* The device is sending this message first and we have to reply */
5381          reply = TRUE;
5382          
5383          if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
5384          {
5385            printk(INFO_LEAD "Received pre-emptive PPR message from "
5386                   "target.\n", p->host_no, CTL_OF_SCB(scb));
5387          }
5388
5389        }
5390
5391        switch(bus_width)
5392        {
5393          case MSG_EXT_WDTR_BUS_16_BIT:
5394          {
5395            if ( (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT) &&
5396                            p->features & AHC_WIDE)
5397            {
5398              break;
5399            }
5400          }
5401          default:
5402          {
5403            if ( (aic7xxx_verbose & VERBOSE_NEGOTIATION2) &&
5404                 ((aic_dev->flags & DEVICE_PRINT_DTR) ||
5405                  (aic7xxx_verbose > 0xffff)) )
5406            {
5407              reply = TRUE;
5408              printk(INFO_LEAD "Requesting %d bit transfers, rejecting.\n",
5409                p->host_no, CTL_OF_SCB(scb), 8 * (0x01 << bus_width));
5410            }
5411          } /* We fall through on purpose */
5412          case MSG_EXT_WDTR_BUS_8_BIT:
5413          {
5414            /*
5415             * According to the spec, if we aren't wide, we also can't be
5416             * Dual Edge so clear the options byte
5417             */
5418            new_trans_options = 0;
5419            new_bus_width = MSG_EXT_WDTR_BUS_8_BIT;
5420            break;
5421          }
5422        }
5423
5424        if(reply)
5425        {
5426          /* when sending a reply, make sure that the goal settings are
5427           * updated along with current and active since the code that
5428           * will actually build the message for the sequencer uses the
5429           * goal settings as its guidelines.
5430           */
5431          aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5432                            AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5433                            aic_dev);
5434          syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5435                                           &new_trans_options);
5436          aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5437          aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5438                               new_offset, new_trans_options,
5439                               AHC_TRANS_GOAL|AHC_TRANS_ACTIVE|AHC_TRANS_CUR,
5440                               aic_dev);
5441        }
5442        else
5443        {
5444          aic7xxx_set_width(p, target, channel, lun, new_bus_width,
5445                            AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5446          syncrate = aic7xxx_find_syncrate(p, &new_period, maxsync,
5447                                           &new_trans_options);
5448          aic7xxx_validate_offset(p, syncrate, &new_offset, new_bus_width);
5449          aic7xxx_set_syncrate(p, syncrate, target, channel, new_period,
5450                               new_offset, new_trans_options,
5451                               AHC_TRANS_ACTIVE|AHC_TRANS_CUR, aic_dev);
5452        }
5453
5454        /*
5455         * As it turns out, if we don't *have* to have PPR messages, then
5456         * configure ourselves not to use them since that makes some
5457         * external drive chassis work (those chassis can't parse PPR
5458         * messages and they mangle the SCSI bus until you send a WDTR
5459         * and SDTR that they can understand).
5460         */
5461        if(new_trans_options == 0)
5462        {
5463          aic_dev->needppr = aic_dev->needppr_copy = 0;
5464          if(new_offset)
5465          {
5466            aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
5467          }
5468          if (new_bus_width)
5469          {
5470            aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
5471          }
5472        }
5473
5474        if((new_offset == 0) && (offset != 0))
5475        {
5476          /*
5477           * Oops, the syncrate went to low for this card and we fell off
5478           * to async (should never happen with a device that uses PPR
5479           * messages, but have to be complete)
5480           */
5481          reply = TRUE;
5482        }
5483
5484        if(reply)
5485        {
5486          scb->flags &= ~SCB_MSGOUT_BITS;
5487          scb->flags |= SCB_MSGOUT_PPR;
5488          aic_outb(p, HOST_MSG, MSG_OUT);
5489          aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5490        }
5491        else
5492        {
5493          aic_dev->needppr = 0;
5494        }
5495        done = TRUE;
5496        break;
5497      }
5498      default:
5499      {
5500        reject = TRUE;
5501        break;
5502      }
5503    } /* end of switch(p->msg_type) */
5504  } /* end of if (!reject && (p->msg_len > 2)) */
5505
5506  if (!reply && reject)
5507  {
5508    aic_outb(p, MSG_MESSAGE_REJECT, MSG_OUT);
5509    aic_outb(p, aic_inb(p, SCSISIGO) | ATNO, SCSISIGO);
5510    done = TRUE;
5511  }
5512  return(done);
5513}
5514
5515
5516/*+F*************************************************************************
5517 * Function:
5518 *   aic7xxx_handle_reqinit
5519 *
5520 * Description:
5521 *   Interrupt handler for REQINIT interrupts (used to transfer messages to
5522 *    and from devices).
5523 *_F*************************************************************************/
5524static void
5525aic7xxx_handle_reqinit(struct aic7xxx_host *p, struct aic7xxx_scb *scb)
5526{
5527  unsigned char lastbyte;
5528  unsigned char phasemis;
5529  int done = FALSE;
5530
5531  switch(p->msg_type)
5532  {
5533    case MSG_TYPE_INITIATOR_MSGOUT:
5534      {
5535        if (p->msg_len == 0)
5536          panic("aic7xxx: REQINIT with no active message!\n");
5537
5538        lastbyte = (p->msg_index == (p->msg_len - 1));
5539        phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK) != P_MESGOUT;
5540
5541        if (lastbyte || phasemis)
5542        {
5543          /* Time to end the message */
5544          p->msg_len = 0;
5545          p->msg_type = MSG_TYPE_NONE;
5546          /*
5547           * NOTE-TO-MYSELF: If you clear the REQINIT after you
5548           * disable REQINITs, then cases of REJECT_MSG stop working
5549           * and hang the bus
5550           */
5551          aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
5552          aic_outb(p, CLRSCSIINT, CLRINT);
5553          p->flags &= ~AHC_HANDLING_REQINITS;
5554
5555          if (phasemis == 0)
5556          {
5557            aic_outb(p, p->msg_buf[p->msg_index], SINDEX);
5558            aic_outb(p, 0, RETURN_1);
5559#ifdef AIC7XXX_VERBOSE_DEBUGGING
5560            if (aic7xxx_verbose > 0xffff)
5561              printk(INFO_LEAD "Completed sending of REQINIT message.\n",
5562                     p->host_no, CTL_OF_SCB(scb));
5563#endif
5564          }
5565          else
5566          {
5567            aic_outb(p, MSGOUT_PHASEMIS, RETURN_1);
5568#ifdef AIC7XXX_VERBOSE_DEBUGGING
5569            if (aic7xxx_verbose > 0xffff)
5570              printk(INFO_LEAD "PHASEMIS while sending REQINIT message.\n",
5571                     p->host_no, CTL_OF_SCB(scb));
5572#endif
5573          }
5574          unpause_sequencer(p, TRUE);
5575        }
5576        else
5577        {
5578          /*
5579           * Present the byte on the bus (clearing REQINIT) but don't
5580           * unpause the sequencer.
5581           */
5582          aic_outb(p, CLRREQINIT, CLRSINT1);
5583          aic_outb(p, CLRSCSIINT, CLRINT);
5584          aic_outb(p,  p->msg_buf[p->msg_index++], SCSIDATL);
5585        }
5586        break;
5587      }
5588    case MSG_TYPE_INITIATOR_MSGIN:
5589      {
5590        phasemis = ( aic_inb(p, SCSISIGI) & PHASE_MASK ) != P_MESGIN;
5591
5592        if (phasemis == 0)
5593        {
5594          p->msg_len++;
5595          /* Pull the byte in without acking it */
5596          p->msg_buf[p->msg_index] = aic_inb(p, SCSIBUSL);
5597          done = aic7xxx_parse_msg(p, scb);
5598          /* Ack the byte */
5599          aic_outb(p, CLRREQINIT, CLRSINT1);
5600          aic_outb(p, CLRSCSIINT, CLRINT);
5601          aic_inb(p, SCSIDATL);
5602          p->msg_index++;
5603        }
5604        if (phasemis || done)
5605        {
5606#ifdef AIC7XXX_VERBOSE_DEBUGGING
5607          if (aic7xxx_verbose > 0xffff)
5608          {
5609            if (phasemis)
5610              printk(INFO_LEAD "PHASEMIS while receiving REQINIT message.\n",
5611                     p->host_no, CTL_OF_SCB(scb));
5612            else
5613              printk(INFO_LEAD "Completed receipt of REQINIT message.\n",
5614                     p->host_no, CTL_OF_SCB(scb));
5615          }
5616#endif
5617          /* Time to end our message session */
5618          p->msg_len = 0;
5619          p->msg_type = MSG_TYPE_NONE;
5620          aic_outb(p, aic_inb(p, SIMODE1) & ~ENREQINIT, SIMODE1);
5621          aic_outb(p, CLRSCSIINT, CLRINT);
5622          p->flags &= ~AHC_HANDLING_REQINITS;
5623          unpause_sequencer(p, TRUE);
5624        }
5625        break;
5626      }
5627    default:
5628      {
5629        panic("aic7xxx: Unknown REQINIT message type.\n");
5630        break;
5631      }
5632  } /* End of switch(p->msg_type) */
5633}
5634
5635/*+F*************************************************************************
5636 * Function:
5637 *   aic7xxx_handle_scsiint
5638 *
5639 * Description:
5640 *   Interrupt handler for SCSI interrupts (SCSIINT).
5641 *-F*************************************************************************/
5642static void
5643aic7xxx_handle_scsiint(struct aic7xxx_host *p, unsigned char intstat)
5644{
5645  unsigned char scb_index;
5646  unsigned char status;
5647  struct aic7xxx_scb *scb;
5648  struct aic_dev_data *aic_dev;
5649
5650  scb_index = aic_inb(p, SCB_TAG);
5651  status = aic_inb(p, SSTAT1);
5652
5653  if (scb_index < p->scb_data->numscbs)
5654  {
5655    scb = p->scb_data->scb_array[scb_index];
5656    if ((scb->flags & SCB_ACTIVE) == 0)
5657    {
5658      scb = NULL;
5659    }
5660  }
5661  else
5662  {
5663    scb = NULL;
5664  }
5665
5666
5667  if ((status & SCSIRSTI) != 0)
5668  {
5669    int channel;
5670
5671    if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
5672      channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
5673    else
5674      channel = 0;
5675
5676    if (aic7xxx_verbose & VERBOSE_RESET)
5677      printk(WARN_LEAD "Someone else reset the channel!!\n",
5678           p->host_no, channel, -1, -1);
5679    if (aic7xxx_panic_on_abort)
5680      aic7xxx_panic_abort(p, NULL);
5681    /*
5682     * Go through and abort all commands for the channel, but do not
5683     * reset the channel again.
5684     */
5685    aic7xxx_reset_channel(p, channel, /* Initiate Reset */ FALSE);
5686    aic7xxx_run_done_queue(p, TRUE);
5687    scb = NULL;
5688  }
5689  else if ( ((status & BUSFREE) != 0) && ((status & SELTO) == 0) )
5690  {
5691    /*
5692     * First look at what phase we were last in.  If it's message-out,
5693     * chances are pretty good that the bus free was in response to
5694     * one of our abort requests.
5695     */
5696    unsigned char lastphase = aic_inb(p, LASTPHASE);
5697    unsigned char saved_tcl = aic_inb(p, SAVED_TCL);
5698    unsigned char target = (saved_tcl >> 4) & 0x0F;
5699    int channel;
5700    int printerror = TRUE;
5701
5702    if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
5703      channel = (aic_inb(p, SBLKCTL) & SELBUSB) >> 3;
5704    else
5705      channel = 0;
5706
5707    aic_outb(p, aic_inb(p, SCSISEQ) & (ENSELI|ENRSELI|ENAUTOATNP),
5708             SCSISEQ);
5709    if (lastphase == P_MESGOUT)
5710    {
5711      unsigned char message;
5712
5713      message = aic_inb(p, SINDEX);
5714
5715      if ((message == MSG_ABORT) || (message == MSG_ABORT_TAG))
5716      {
5717        if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
5718          printk(INFO_LEAD "SCB %d abort delivered.\n", p->host_no,
5719            CTL_OF_SCB(scb), scb->hscb->tag);
5720        aic7xxx_reset_device(p, target, channel, ALL_LUNS,
5721                (message == MSG_ABORT) ? SCB_LIST_NULL : scb->hscb->tag );
5722        aic7xxx_run_done_queue(p, TRUE);
5723        scb = NULL;
5724        printerror = 0;
5725      }
5726      else if (message == MSG_BUS_DEV_RESET)
5727      {
5728        aic7xxx_handle_device_reset(p, target, channel);
5729        scb = NULL;
5730        printerror = 0;
5731      }
5732    }
5733    if ( (scb != NULL) && (scb->flags & SCB_DTR_SCB) ) 
5734    {
5735      /*
5736       * Hmmm...error during a negotiation command.  Either we have a
5737       * borken bus, or the device doesn't like our negotiation message.
5738       * Since we check the INQUIRY data of a device before sending it
5739       * negotiation messages, assume the bus is borken for whatever
5740       * reason.  Complete the command.
5741       */
5742      printerror = 0;
5743      aic7xxx_reset_device(p, target, channel, ALL_LUNS, scb->hscb->tag);
5744      aic7xxx_run_done_queue(p, TRUE);
5745      scb = NULL;
5746    }
5747    if (printerror != 0)
5748    {
5749      if (scb != NULL)
5750      {
5751        unsigned char tag;
5752
5753        if ((scb->hscb->control & TAG_ENB) != 0)
5754        {
5755          tag = scb->hscb->tag;
5756        }
5757        else
5758        {
5759          tag = SCB_LIST_NULL;
5760        }
5761        aic7xxx_reset_device(p, target, channel, ALL_LUNS, tag);
5762        aic7xxx_run_done_queue(p, TRUE);
5763      }
5764      else
5765      {
5766        aic7xxx_reset_device(p, target, channel, ALL_LUNS, SCB_LIST_NULL);
5767        aic7xxx_run_done_queue(p, TRUE);
5768      }
5769      printk(INFO_LEAD "Unexpected busfree, LASTPHASE = 0x%x, "
5770             "SEQADDR = 0x%x\n", p->host_no, channel, target, -1, lastphase,
5771             (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
5772      scb = NULL;
5773    }
5774    aic_outb(p, MSG_NOOP, MSG_OUT);
5775    aic_outb(p, aic_inb(p, SIMODE1) & ~(ENBUSFREE|ENREQINIT),
5776      SIMODE1);
5777    p->flags &= ~AHC_HANDLING_REQINITS;
5778    aic_outb(p, CLRBUSFREE, CLRSINT1);
5779    aic_outb(p, CLRSCSIINT, CLRINT);
5780    restart_sequencer(p);
5781    unpause_sequencer(p, TRUE);
5782  }
5783  else if ((status & SELTO) != 0)
5784  {
5785        unsigned char scbptr;
5786        unsigned char nextscb;
5787        struct scsi_cmnd *cmd;
5788
5789    scbptr = aic_inb(p, WAITING_SCBH);
5790    if (scbptr > p->scb_data->maxhscbs)
5791    {
5792      /*
5793       * I'm still trying to track down exactly how this happens, but until
5794       * I find it, this code will make sure we aren't passing bogus values
5795       * into the SCBPTR register, even if that register will just wrap
5796       * things around, we still don't like having out of range variables.
5797       *
5798       * NOTE: Don't check the aic7xxx_verbose variable, I want this message
5799       * to always be displayed.
5800       */
5801      printk(INFO_LEAD "Invalid WAITING_SCBH value %d, improvising.\n",
5802             p->host_no, -1, -1, -1, scbptr);
5803      if (p->scb_data->maxhscbs > 4)
5804        scbptr &= (p->scb_data->maxhscbs - 1);
5805      else
5806        scbptr &= 0x03;
5807    }
5808    aic_outb(p, scbptr, SCBPTR);
5809    scb_index = aic_inb(p, SCB_TAG);
5810
5811    scb = NULL;
5812    if (scb_index < p->scb_data->numscbs)
5813    {
5814      scb = p->scb_data->scb_array[scb_index];
5815      if ((scb->flags & SCB_ACTIVE) == 0)
5816      {
5817        scb = NULL;
5818      }
5819    }
5820    if (scb == NULL)
5821    {
5822      printk(WARN_LEAD "Referenced SCB %d not valid during SELTO.\n",
5823             p->host_no, -1, -1, -1, scb_index);
5824      printk(KERN_WARNING "        SCSISEQ = 0x%x SEQADDR = 0x%x SSTAT0 = 0x%x "
5825             "SSTAT1 = 0x%x\n", aic_inb(p, SCSISEQ),
5826             aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
5827             aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
5828      if (aic7xxx_panic_on_abort)
5829        aic7xxx_panic_abort(p, NULL);
5830    }
5831    else
5832    {
5833      cmd = scb->cmd;
5834      cmd->result = (DID_TIME_OUT << 16);
5835
5836      /*
5837       * Clear out this hardware SCB
5838       */
5839      aic_outb(p, 0, SCB_CONTROL);
5840
5841      /*
5842       * Clear out a few values in the card that are in an undetermined
5843       * state.
5844       */
5845      aic_outb(p, MSG_NOOP, MSG_OUT);
5846
5847      /*
5848       * Shift the waiting for selection queue forward
5849       */
5850      nextscb = aic_inb(p, SCB_NEXT);
5851      aic_outb(p, nextscb, WAITING_SCBH);
5852
5853      /*
5854       * Put this SCB back on the free list.
5855       */
5856      aic7xxx_add_curscb_to_free_list(p);
5857#ifdef AIC7XXX_VERBOSE_DEBUGGING
5858      if (aic7xxx_verbose > 0xffff)
5859        printk(INFO_LEAD "Selection Timeout.\n", p->host_no, CTL_OF_SCB(scb));
5860#endif
5861      if (scb->flags & SCB_QUEUED_ABORT)
5862      {
5863        /*
5864         * We know that this particular SCB had to be the queued abort since
5865         * the disconnected SCB would have gotten a reconnect instead.
5866         * What we need to do then is to let the command timeout again so
5867         * we get a reset since this abort just failed.
5868         */
5869        cmd->result = 0;
5870        scb = NULL;
5871      }
5872    }
5873    /*
5874     * Keep the sequencer from trying to restart any selections
5875     */
5876    aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
5877    /*
5878     * Make sure the data bits on the bus are released
5879     * Don't do this on 7770 chipsets, it makes them give us
5880     * a BRKADDRINT and kills the card.
5881     */
5882    if( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
5883      aic_outb(p, 0, SCSIBUSL);
5884
5885    /*
5886     * Delay for the selection timeout delay period then stop the selection
5887     */
5888    udelay(301);
5889    aic_outb(p, CLRSELINGO, CLRSINT0);
5890    /*
5891     * Clear out all the interrupt status bits
5892     */
5893    aic_outb(p, aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1);
5894    p->flags &= ~AHC_HANDLING_REQINITS;
5895    aic_outb(p, CLRSELTIMEO | CLRBUSFREE, CLRSINT1);
5896    aic_outb(p, CLRSCSIINT, CLRINT);
5897    /*
5898     * Restarting the sequencer will stop the selection and make sure devices
5899     * are allowed to reselect in.
5900     */
5901    restart_sequencer(p);
5902    unpause_sequencer(p, TRUE);
5903  }
5904  else if (scb == NULL)
5905  {
5906    printk(WARN_LEAD "aic7xxx_isr - referenced scb not valid "
5907           "during scsiint 0x%x scb(%d)\n"
5908           "      SIMODE0 0x%x, SIMODE1 0x%x, SSTAT0 0x%x, SEQADDR 0x%x\n",
5909           p->host_no, -1, -1, -1, status, scb_index, aic_inb(p, SIMODE0),
5910           aic_inb(p, SIMODE1), aic_inb(p, SSTAT0),
5911           (aic_inb(p, SEQADDR1) << 8) | aic_inb(p, SEQADDR0));
5912    /*
5913     * Turn off the interrupt and set status to zero, so that it
5914     * falls through the rest of the SCSIINT code.
5915     */
5916    aic_outb(p, status, CLRSINT1);
5917    aic_outb(p, CLRSCSIINT, CLRINT);
5918    unpause_sequencer(p, /* unpause always */ TRUE);
5919    scb = NULL;
5920  }
5921  else if (status & SCSIPERR)
5922  {
5923    /*
5924     * Determine the bus phase and queue an appropriate message.
5925     */
5926        char  *phase;
5927        struct scsi_cmnd *cmd;
5928        unsigned char mesg_out = MSG_NOOP;
5929        unsigned char lastphase = aic_inb(p, LASTPHASE);
5930        unsigned char sstat2 = aic_inb(p, SSTAT2);
5931
5932    cmd = scb->cmd;
5933    switch (lastphase)
5934    {
5935      case P_DATAOUT:
5936        phase = "Data-Out";
5937        break;
5938      case P_DATAIN:
5939        phase = "Data-In";
5940        mesg_out = MSG_INITIATOR_DET_ERR;
5941        break;
5942      case P_COMMAND:
5943        phase = "Command";
5944        break;
5945      case P_MESGOUT:
5946        phase = "Message-Out";
5947        break;
5948      case P_STATUS:
5949        phase = "Status";
5950        mesg_out = MSG_INITIATOR_DET_ERR;
5951        break;
5952      case P_MESGIN:
5953        phase = "Message-In";
5954        mesg_out = MSG_PARITY_ERROR;
5955        break;
5956      default:
5957        phase = "unknown";
5958        break;
5959    }
5960
5961    /*
5962     * A parity error has occurred during a data
5963     * transfer phase. Flag it and continue.
5964     */
5965    if( (p->features & AHC_ULTRA3) && 
5966        (aic_inb(p, SCSIRATE) & AHC_SYNCRATE_CRC) &&
5967        (lastphase == P_DATAIN) )
5968    {
5969      printk(WARN_LEAD "CRC error during %s phase.\n",
5970             p->host_no, CTL_OF_SCB(scb), phase);
5971      if(sstat2 & CRCVALERR)
5972      {
5973        printk(WARN_LEAD "  CRC error in intermediate CRC packet.\n",
5974               p->host_no, CTL_OF_SCB(scb));
5975      }
5976      if(sstat2 & CRCENDERR)
5977      {
5978        printk(WARN_LEAD "  CRC error in ending CRC packet.\n",
5979               p->host_no, CTL_OF_SCB(scb));
5980      }
5981      if(sstat2 & CRCREQERR)
5982      {
5983        printk(WARN_LEAD "  Target incorrectly requested a CRC packet.\n",
5984               p->host_no, CTL_OF_SCB(scb));
5985      }
5986      if(sstat2 & DUAL_EDGE_ERROR)
5987      {
5988        printk(WARN_LEAD "  Dual Edge transmission error.\n",
5989               p->host_no, CTL_OF_SCB(scb));
5990      }
5991    }
5992    else if( (lastphase == P_MESGOUT) &&
5993             (scb->flags & SCB_MSGOUT_PPR) )
5994    {
5995      /*
5996       * As per the draft specs, any device capable of supporting any of
5997       * the option values other than 0 are not allowed to reject the
5998       * PPR message.  Instead, they must negotiate out what they do
5999       * support instead of rejecting our offering or else they cause
6000       * a parity error during msg_out phase to signal that they don't
6001       * like our settings.
6002       */
6003      aic_dev = AIC_DEV(scb->cmd);
6004      aic_dev->needppr = aic_dev->needppr_copy = 0;
6005      aic7xxx_set_width(p, scb->cmd->device->id, scb->cmd->device->channel, scb->cmd->device->lun,
6006                        MSG_EXT_WDTR_BUS_8_BIT,
6007                        (AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE),
6008                        aic_dev);
6009      aic7xxx_set_syncrate(p, NULL, scb->cmd->device->id, scb->cmd->device->channel, 0, 0,
6010                           0, AHC_TRANS_ACTIVE|AHC_TRANS_CUR|AHC_TRANS_QUITE,
6011                           aic_dev);
6012      aic_dev->goal.options = 0;
6013      scb->flags &= ~SCB_MSGOUT_BITS;
6014      if(aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6015      {
6016        printk(INFO_LEAD "parity error during PPR message, reverting "
6017               "to WDTR/SDTR\n", p->host_no, CTL_OF_SCB(scb));
6018      }
6019      if ( aic_dev->goal.width )
6020      {
6021        aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
6022      }
6023      if ( aic_dev->goal.offset )
6024      {
6025        if( aic_dev->goal.period <= 9 )
6026        {
6027          aic_dev->goal.period = 10;
6028        }
6029        aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
6030      }
6031      scb = NULL;
6032    }
6033
6034    /*
6035     * We've set the hardware to assert ATN if we get a parity
6036     * error on "in" phases, so all we need to do is stuff the
6037     * message buffer with the appropriate message.  "In" phases
6038     * have set mesg_out to something other than MSG_NOP.
6039     */
6040    if (mesg_out != MSG_NOOP)
6041    {
6042      aic_outb(p, mesg_out, MSG_OUT);
6043      aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
6044      scb = NULL;
6045    }
6046    aic_outb(p, CLRSCSIPERR, CLRSINT1);
6047    aic_outb(p, CLRSCSIINT, CLRINT);
6048    unpause_sequencer(p, /* unpause_always */ TRUE);
6049  }
6050  else if ( (status & REQINIT) &&
6051            (p->flags & AHC_HANDLING_REQINITS) )
6052  {
6053#ifdef AIC7XXX_VERBOSE_DEBUGGING
6054    if (aic7xxx_verbose > 0xffff)
6055      printk(INFO_LEAD "Handling REQINIT, SSTAT1=0x%x.\n", p->host_no,
6056             CTL_OF_SCB(scb), aic_inb(p, SSTAT1));
6057#endif
6058    aic7xxx_handle_reqinit(p, scb);
6059    return;
6060  }
6061  else
6062  {
6063    /*
6064     * We don't know what's going on. Turn off the
6065     * interrupt source and try to continue.
6066     */
6067    if (aic7xxx_verbose & VERBOSE_SCSIINT)
6068      printk(INFO_LEAD "Unknown SCSIINT status, SSTAT1(0x%x).\n",
6069        p->host_no, -1, -1, -1, status);
6070    aic_outb(p, status, CLRSINT1);
6071    aic_outb(p, CLRSCSIINT, CLRINT);
6072    unpause_sequencer(p, /* unpause always */ TRUE);
6073    scb = NULL;
6074  }
6075  if (scb != NULL)
6076  {
6077    aic7xxx_done(p, scb);
6078  }
6079}
6080
6081#ifdef AIC7XXX_VERBOSE_DEBUGGING
6082static void
6083aic7xxx_check_scbs(struct aic7xxx_host *p, char *buffer)
6084{
6085  unsigned char saved_scbptr, free_scbh, dis_scbh, wait_scbh, temp;
6086  int i, bogus, lost;
6087  static unsigned char scb_status[AIC7XXX_MAXSCB];
6088
6089#define SCB_NO_LIST 0
6090#define SCB_FREE_LIST 1
6091#define SCB_WAITING_LIST 2
6092#define SCB_DISCONNECTED_LIST 4
6093#define SCB_CURRENTLY_ACTIVE 8
6094
6095  /*
6096   * Note, these checks will fail on a regular basis once the machine moves
6097   * beyond the bus scan phase.  The problem is race conditions concerning
6098   * the scbs and where they are linked in.  When you have 30 or so commands
6099   * outstanding on the bus, and run this twice with every interrupt, the
6100   * chances get pretty good that you'll catch the sequencer with an SCB
6101   * only partially linked in.  Therefore, once we pass the scan phase
6102   * of the bus, we really should disable this function.
6103   */
6104  bogus = FALSE;
6105  memset(&scb_status[0], 0, sizeof(scb_status));
6106  pause_sequencer(p);
6107  saved_scbptr = aic_inb(p, SCBPTR);
6108  if (saved_scbptr >= p->scb_data->maxhscbs)
6109  {
6110    printk("Bogus SCBPTR %d\n", saved_scbptr);
6111    bogus = TRUE;
6112  }
6113  scb_status[saved_scbptr] = SCB_CURRENTLY_ACTIVE;
6114  free_scbh = aic_inb(p, FREE_SCBH);
6115  if ( (free_scbh != SCB_LIST_NULL) &&
6116       (free_scbh >= p->scb_data->maxhscbs) )
6117  {
6118    printk("Bogus FREE_SCBH %d\n", free_scbh);
6119    bogus = TRUE;
6120  }
6121  else
6122  {
6123    temp = free_scbh;
6124    while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6125    {
6126      if(scb_status[temp] & 0x07)
6127      {
6128        printk("HSCB %d on multiple lists, status 0x%02x", temp,
6129               scb_status[temp] | SCB_FREE_LIST);
6130        bogus = TRUE;
6131      }
6132      scb_status[temp] |= SCB_FREE_LIST;
6133      aic_outb(p, temp, SCBPTR);
6134      temp = aic_inb(p, SCB_NEXT);
6135    }
6136  }
6137
6138  dis_scbh = aic_inb(p, DISCONNECTED_SCBH);
6139  if ( (dis_scbh != SCB_LIST_NULL) &&
6140       (dis_scbh >= p->scb_data->maxhscbs) )
6141  {
6142    printk("Bogus DISCONNECTED_SCBH %d\n", dis_scbh);
6143    bogus = TRUE;
6144  }
6145  else
6146  {
6147    temp = dis_scbh;
6148    while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6149    {
6150      if(scb_status[temp] & 0x07)
6151      {
6152        printk("HSCB %d on multiple lists, status 0x%02x", temp,
6153               scb_status[temp] | SCB_DISCONNECTED_LIST);
6154        bogus = TRUE;
6155      }
6156      scb_status[temp] |= SCB_DISCONNECTED_LIST;
6157      aic_outb(p, temp, SCBPTR);
6158      temp = aic_inb(p, SCB_NEXT);
6159    }
6160  }
6161  
6162  wait_scbh = aic_inb(p, WAITING_SCBH);
6163  if ( (wait_scbh != SCB_LIST_NULL) &&
6164       (wait_scbh >= p->scb_data->maxhscbs) )
6165  {
6166    printk("Bogus WAITING_SCBH %d\n", wait_scbh);
6167    bogus = TRUE;
6168  }
6169  else
6170  {
6171    temp = wait_scbh;
6172    while( (temp != SCB_LIST_NULL) && (temp < p->scb_data->maxhscbs) )
6173    {
6174      if(scb_status[temp] & 0x07)
6175      {
6176        printk("HSCB %d on multiple lists, status 0x%02x", temp,
6177               scb_status[temp] | SCB_WAITING_LIST);
6178        bogus = TRUE;
6179      }
6180      scb_status[temp] |= SCB_WAITING_LIST;
6181      aic_outb(p, temp, SCBPTR);
6182      temp = aic_inb(p, SCB_NEXT);
6183    }
6184  }
6185
6186  lost=0;
6187  for(i=0; i < p->scb_data->maxhscbs; i++)
6188  {
6189    aic_outb(p, i, SCBPTR);
6190    temp = aic_inb(p, SCB_NEXT);
6191    if ( ((temp != SCB_LIST_NULL) &&
6192          (temp >= p->scb_data->maxhscbs)) )
6193    {
6194      printk("HSCB %d bad, SCB_NEXT invalid(%d).\n", i, temp);
6195      bogus = TRUE;
6196    }
6197    if ( temp == i )
6198    {
6199      printk("HSCB %d bad, SCB_NEXT points to self.\n", i);
6200      bogus = TRUE;
6201    }
6202    if (scb_status[i] == 0)
6203      lost++;
6204    if (lost > 1)
6205    {
6206      printk("Too many lost scbs.\n");
6207      bogus=TRUE;
6208    }
6209  }
6210  aic_outb(p, saved_scbptr, SCBPTR);
6211  unpause_sequencer(p, FALSE);
6212  if (bogus)
6213  {
6214    printk("Bogus parameters found in card SCB array structures.\n");
6215    printk("%s\n", buffer);
6216    aic7xxx_panic_abort(p, NULL);
6217  }
6218  return;
6219}
6220#endif
6221
6222
6223/*+F*************************************************************************
6224 * Function:
6225 *   aic7xxx_handle_command_completion_intr
6226 *
6227 * Description:
6228 *   SCSI command completion interrupt handler.
6229 *-F*************************************************************************/
6230static void
6231aic7xxx_handle_command_completion_intr(struct aic7xxx_host *p)
6232{
6233        struct aic7xxx_scb *scb = NULL;
6234        struct aic_dev_data *aic_dev;
6235        struct scsi_cmnd *cmd;
6236        unsigned char scb_index, tindex;
6237
6238#ifdef AIC7XXX_VERBOSE_DEBUGGING
6239  if( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) )
6240    printk(INFO_LEAD "Command Complete Int.\n", p->host_no, -1, -1, -1);
6241#endif
6242    
6243  /*
6244   * Read the INTSTAT location after clearing the CMDINT bit.  This forces
6245   * any posted PCI writes to flush to memory.  Gerard Roudier suggested
6246   * this fix to the possible race of clearing the CMDINT bit but not
6247   * having all command bytes flushed onto the qoutfifo.
6248   */
6249  aic_outb(p, CLRCMDINT, CLRINT);
6250  aic_inb(p, INTSTAT);
6251  /*
6252   * The sequencer will continue running when it
6253   * issues this interrupt. There may be >1 commands
6254   * finished, so loop until we've processed them all.
6255   */
6256
6257  while (p->qoutfifo[p->qoutfifonext] != SCB_LIST_NULL)
6258  {
6259    scb_index = p->qoutfifo[p->qoutfifonext];
6260    p->qoutfifo[p->qoutfifonext++] = SCB_LIST_NULL;
6261    if ( scb_index >= p->scb_data->numscbs )
6262    {
6263      printk(WARN_LEAD "CMDCMPLT with invalid SCB index %d\n", p->host_no,
6264        -1, -1, -1, scb_index);
6265      continue;
6266    }
6267    scb = p->scb_data->scb_array[scb_index];
6268    if (!(scb->flags & SCB_ACTIVE) || (scb->cmd == NULL))
6269    {
6270      printk(WARN_LEAD "CMDCMPLT without command for SCB %d, SCB flags "
6271        "0x%x, cmd 0x%lx\n", p->host_no, -1, -1, -1, scb_index, scb->flags,
6272        (unsigned long) scb->cmd);
6273      continue;
6274    }
6275    tindex = TARGET_INDEX(scb->cmd);
6276    aic_dev = AIC_DEV(scb->cmd);
6277    if (scb->flags & SCB_QUEUED_ABORT)
6278    {
6279      pause_sequencer(p);
6280      if ( ((aic_inb(p, LASTPHASE) & PHASE_MASK) != P_BUSFREE) &&
6281           (aic_inb(p, SCB_TAG) == scb->hscb->tag) )
6282      {
6283        unpause_sequencer(p, FALSE);
6284        continue;
6285      }
6286      aic7xxx_reset_device(p, scb->cmd->device->id, scb->cmd->device->channel,
6287        scb->cmd->device->lun, scb->hscb->tag);
6288      scb->flags &= ~(SCB_QUEUED_FOR_DONE | SCB_RESET | SCB_ABORT |
6289        SCB_QUEUED_ABORT);
6290      unpause_sequencer(p, FALSE);
6291    }
6292    else if (scb->flags & SCB_ABORT)
6293    {
6294      /*
6295       * We started to abort this, but it completed on us, let it
6296       * through as successful
6297       */
6298      scb->flags &= ~(SCB_ABORT|SCB_RESET);
6299    }
6300    else if (scb->flags & SCB_SENSE)
6301    {
6302      char *buffer = &scb->cmd->sense_buffer[0];
6303
6304      if (buffer[12] == 0x47 || buffer[12] == 0x54)
6305      {
6306        /*
6307         * Signal that we need to re-negotiate things.
6308         */
6309        aic_dev->needppr = aic_dev->needppr_copy;
6310        aic_dev->needsdtr = aic_dev->needsdtr_copy;
6311        aic_dev->needwdtr = aic_dev->needwdtr_copy;
6312      }
6313    }
6314    cmd = scb->cmd;
6315    if (scb->hscb->residual_SG_segment_count != 0)
6316    {
6317      aic7xxx_calculate_residual(p, scb);
6318    }
6319    cmd->result |= (aic7xxx_error(cmd) << 16);
6320    aic7xxx_done(p, scb);
6321  }
6322}
6323
6324/*+F*************************************************************************
6325 * Function:
6326 *   aic7xxx_isr
6327 *
6328 * Description:
6329 *   SCSI controller interrupt handler.
6330 *-F*************************************************************************/
6331static void
6332aic7xxx_isr(void *dev_id)
6333{
6334  struct aic7xxx_host *p;
6335  unsigned char intstat;
6336
6337  p = dev_id;
6338
6339  /*
6340   * Just a few sanity checks.  Make sure that we have an int pending.
6341   * Also, if PCI, then we are going to check for a PCI bus error status
6342   * should we get too many spurious interrupts.
6343   */
6344  if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND))
6345  {
6346#ifdef CONFIG_PCI
6347    if ( (p->chip & AHC_PCI) && (p->spurious_int > 500) &&
6348        !(p->flags & AHC_HANDLING_REQINITS) )
6349    {
6350      if ( aic_inb(p, ERROR) & PCIERRSTAT )
6351      {
6352        aic7xxx_pci_intr(p);
6353      }
6354      p->spurious_int = 0;
6355    }
6356    else if ( !(p->flags & AHC_HANDLING_REQINITS) )
6357    {
6358      p->spurious_int++;
6359    }
6360#endif
6361    return;
6362  }
6363
6364  p->spurious_int = 0;
6365
6366  /*
6367   * Keep track of interrupts for /proc/scsi
6368   */
6369  p->isr_count++;
6370
6371#ifdef AIC7XXX_VERBOSE_DEBUGGING
6372  if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6373       (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6374    aic7xxx_check_scbs(p, "Bogus settings at start of interrupt.");
6375#endif
6376
6377  /*
6378   * Handle all the interrupt sources - especially for SCSI
6379   * interrupts, we won't get a second chance at them.
6380   */
6381  if (intstat & CMDCMPLT)
6382  {
6383    aic7xxx_handle_command_completion_intr(p);
6384  }
6385
6386  if (intstat & BRKADRINT)
6387  {
6388    int i;
6389    unsigned char errno = aic_inb(p, ERROR);
6390
6391    printk(KERN_ERR "(scsi%d) BRKADRINT error(0x%x):\n", p->host_no, errno);
6392    for (i = 0; i < ARRAY_SIZE(hard_error); i++)
6393    {
6394      if (errno & hard_error[i].errno)
6395      {
6396        printk(KERN_ERR "  %s\n", hard_error[i].errmesg);
6397      }
6398    }
6399    printk(KERN_ERR "(scsi%d)   SEQADDR=0x%x\n", p->host_no,
6400      (((aic_inb(p, SEQADDR1) << 8) & 0x100) | aic_inb(p, SEQADDR0)));
6401    if (aic7xxx_panic_on_abort)
6402      aic7xxx_panic_abort(p, NULL);
6403#ifdef CONFIG_PCI
6404    if (errno & PCIERRSTAT)
6405      aic7xxx_pci_intr(p);
6406#endif
6407    if (errno & (SQPARERR | ILLOPCODE | ILLSADDR))
6408    {
6409      panic("aic7xxx: unrecoverable BRKADRINT.\n");
6410    }
6411    if (errno & ILLHADDR)
6412    {
6413      printk(KERN_ERR "(scsi%d) BUG! Driver accessed chip without first "
6414             "pausing controller!\n", p->host_no);
6415    }
6416#ifdef AIC7XXX_VERBOSE_DEBUGGING
6417    if (errno & DPARERR)
6418    {
6419      if (aic_inb(p, DMAPARAMS) & DIRECTION)
6420        printk("(scsi%d) while DMAing SCB from host to card.\n", p->host_no);
6421      else
6422        printk("(scsi%d) while DMAing SCB from card to host.\n", p->host_no);
6423    }
6424#endif
6425    aic_outb(p, CLRPARERR | CLRBRKADRINT, CLRINT);
6426    unpause_sequencer(p, FALSE);
6427  }
6428
6429  if (intstat & SEQINT)
6430  {
6431    /*
6432     * Read the CCSCBCTL register to work around a bug in the Ultra2 cards
6433     */
6434    if(p->features & AHC_ULTRA2)
6435    {
6436      aic_inb(p, CCSCBCTL);
6437    }
6438    aic7xxx_handle_seqint(p, intstat);
6439  }
6440
6441  if (intstat & SCSIINT)
6442  {
6443    aic7xxx_handle_scsiint(p, intstat);
6444  }
6445
6446#ifdef AIC7XXX_VERBOSE_DEBUGGING
6447  if ( (p->isr_count < 16) && (aic7xxx_verbose > 0xffff) &&
6448       (aic7xxx_panic_on_abort) && (p->flags & AHC_PAGESCBS) )
6449    aic7xxx_check_scbs(p, "Bogus settings at end of interrupt.");
6450#endif
6451
6452}
6453
6454/*+F*************************************************************************
6455 * Function:
6456 *   do_aic7xxx_isr
6457 *
6458 * Description:
6459 *   This is a gross hack to solve a problem in linux kernels 2.1.85 and
6460 *   above.  Please, children, do not try this at home, and if you ever see
6461 *   anything like it, please inform the Gross Hack Police immediately
6462 *-F*************************************************************************/
6463static irqreturn_t
6464do_aic7xxx_isr(int irq, void *dev_id)
6465{
6466  unsigned long cpu_flags;
6467  struct aic7xxx_host *p;
6468  
6469  p = dev_id;
6470  if(!p)
6471    return IRQ_NONE;
6472  spin_lock_irqsave(p->host->host_lock, cpu_flags);
6473  p->flags |= AHC_IN_ISR;
6474  do
6475  {
6476    aic7xxx_isr(dev_id);
6477  } while ( (aic_inb(p, INTSTAT) & INT_PEND) );
6478  aic7xxx_done_cmds_complete(p);
6479  aic7xxx_run_waiting_queues(p);
6480  p->flags &= ~AHC_IN_ISR;
6481  spin_unlock_irqrestore(p->host->host_lock, cpu_flags);
6482
6483  return IRQ_HANDLED;
6484}
6485
6486/*+F*************************************************************************
6487 * Function:
6488 *   aic7xxx_init_transinfo
6489 *
6490 * Description:
6491 *   Set up the initial aic_dev values from the BIOS settings and from
6492 *   INQUIRY results
6493 *-F*************************************************************************/
6494static void
6495aic7xxx_init_transinfo(struct aic7xxx_host *p, struct aic_dev_data *aic_dev)
6496{
6497  struct scsi_device *sdpnt = aic_dev->SDptr;
6498  unsigned char tindex;
6499
6500  tindex = sdpnt->id | (sdpnt->channel << 3);
6501  if (!(aic_dev->flags & DEVICE_DTR_SCANNED))
6502  {
6503    aic_dev->flags |= DEVICE_DTR_SCANNED;
6504
6505    if ( sdpnt->wdtr && (p->features & AHC_WIDE) )
6506    {
6507      aic_dev->needwdtr = aic_dev->needwdtr_copy = 1;
6508      aic_dev->goal.width = p->user[tindex].width;
6509    }
6510    else
6511    {
6512      aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
6513      pause_sequencer(p);
6514      aic7xxx_set_width(p, sdpnt->id, sdpnt->channel, sdpnt->lun,
6515                        MSG_EXT_WDTR_BUS_8_BIT, (AHC_TRANS_ACTIVE |
6516                                                 AHC_TRANS_GOAL |
6517                                                 AHC_TRANS_CUR), aic_dev );
6518      unpause_sequencer(p, FALSE);
6519    }
6520    if ( sdpnt->sdtr && p->user[tindex].offset )
6521    {
6522      aic_dev->goal.period = p->user[tindex].period;
6523      aic_dev->goal.options = p->user[tindex].options;
6524      if (p->features & AHC_ULTRA2)
6525        aic_dev->goal.offset = MAX_OFFSET_ULTRA2;
6526      else if (aic_dev->goal.width == MSG_EXT_WDTR_BUS_16_BIT)
6527        aic_dev->goal.offset = MAX_OFFSET_16BIT;
6528      else
6529        aic_dev->goal.offset = MAX_OFFSET_8BIT;
6530      if ( sdpnt->ppr && p->user[tindex].period <= 9 &&
6531             p->user[tindex].options )
6532      {
6533        aic_dev->needppr = aic_dev->needppr_copy = 1;
6534        aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
6535        aic_dev->needwdtr = aic_dev->needwdtr_copy = 0;
6536        aic_dev->flags |= DEVICE_SCSI_3;
6537      }
6538      else
6539      {
6540        aic_dev->needsdtr = aic_dev->needsdtr_copy = 1;
6541        aic_dev->goal.period = max_t(unsigned char, 10, aic_dev->goal.period);
6542        aic_dev->goal.options = 0;
6543      }
6544    }
6545    else
6546    {
6547      aic_dev->needsdtr = aic_dev->needsdtr_copy = 0;
6548      aic_dev->goal.period = 255;
6549      aic_dev->goal.offset = 0;
6550      aic_dev->goal.options = 0;
6551    }
6552    aic_dev->flags |= DEVICE_PRINT_DTR;
6553  }
6554}
6555
6556/*+F*************************************************************************
6557 * Function:
6558 *   aic7xxx_slave_alloc
6559 *
6560 * Description:
6561 *   Set up the initial aic_dev struct pointers
6562 *-F*************************************************************************/
6563static int
6564aic7xxx_slave_alloc(struct scsi_device *SDptr)
6565{
6566  struct aic7xxx_host *p = (struct aic7xxx_host *)SDptr->host->hostdata;
6567  struct aic_dev_data *aic_dev;
6568
6569  aic_dev = kmalloc(sizeof(struct aic_dev_data), GFP_KERNEL);
6570  if(!aic_dev)
6571    return 1;
6572  /*
6573   * Check to see if channel was scanned.
6574   */
6575  
6576  if (!(p->flags & AHC_A_SCANNED) && (SDptr->channel == 0))
6577  {
6578    if (aic7xxx_verbose & VERBOSE_PROBE2)
6579      printk(INFO_LEAD "Scanning channel for devices.\n",
6580        p->host_no, 0, -1, -1);
6581    p->flags |= AHC_A_SCANNED;
6582  }
6583  else
6584  {
6585    if (!(p->flags & AHC_B_SCANNED) && (SDptr->channel == 1))
6586    {
6587      if (aic7xxx_verbose & VERBOSE_PROBE2)
6588        printk(INFO_LEAD "Scanning channel for devices.\n",
6589          p->host_no, 1, -1, -1);
6590      p->flags |= AHC_B_SCANNED;
6591    }
6592  }
6593
6594  memset(aic_dev, 0, sizeof(struct aic_dev_data));
6595  SDptr->hostdata = aic_dev;
6596  aic_dev->SDptr = SDptr;
6597  aic_dev->max_q_depth = 1;
6598  aic_dev->temp_q_depth = 1;
6599  scbq_init(&aic_dev->delayed_scbs);
6600  INIT_LIST_HEAD(&aic_dev->list);
6601  list_add_tail(&aic_dev->list, &p->aic_devs);
6602  return 0;
6603}
6604
6605/*+F*************************************************************************
6606 * Function:
6607 *   aic7xxx_device_queue_depth
6608 *
6609 * Description:
6610 *   Determines the queue depth for a given device.  There are two ways
6611 *   a queue depth can be obtained for a tagged queueing device.  One
6612 *   way is the default queue depth which is determined by whether
6613 *   aic7xxx_default_queue_depth.  The other is by the aic7xxx_tag_info
6614 *   array.
6615 *
6616 *   If tagged queueing isn't supported on the device, then we set the
6617 *   depth to p->host->hostt->cmd_per_lun for internal driver queueing.
6618 *   as the default queue depth.  Otherwise, we use either 4 or 8 as the
6619 *   default queue depth (dependent on the number of hardware SCBs).
6620 *   The other way we determine queue depth is through the use of the
6621 *   aic7xxx_tag_info array which is enabled by defining
6622 *   AIC7XXX_TAGGED_QUEUEING_BY_DEVICE.  This array can be initialized
6623 *   with queue depths for individual devices.  It also allows tagged
6624 *   queueing to be [en|dis]abled for a specific adapter.
6625 *-F*************************************************************************/
6626static void
6627aic7xxx_device_queue_depth(struct aic7xxx_host *p, struct scsi_device *device)
6628{
6629  int tag_enabled = FALSE;
6630  struct aic_dev_data *aic_dev = device->hostdata;
6631  unsigned char tindex;
6632
6633  tindex = device->id | (device->channel << 3);
6634
6635  if (device->simple_tags)
6636    return; // We've already enabled this device
6637
6638  if (device->tagged_supported)
6639  {
6640    tag_enabled = TRUE;
6641
6642    if (!(p->discenable & (1 << tindex)))
6643    {
6644      if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6645        printk(INFO_LEAD "Disconnection disabled, unable to "
6646             "enable tagged queueing.\n",
6647             p->host_no, device->channel, device->id, device->lun);
6648      tag_enabled = FALSE;
6649    }
6650    else
6651    {
6652      if (p->instance >= ARRAY_SIZE(aic7xxx_tag_info))
6653      {
6654        static int print_warning = TRUE;
6655        if(print_warning)
6656        {
6657          printk(KERN_INFO "aic7xxx: WARNING, insufficient tag_info instances for"
6658                           " installed controllers.\n");
6659          printk(KERN_INFO "aic7xxx: Please update the aic7xxx_tag_info array in"
6660                           " the aic7xxx.c source file.\n");
6661          print_warning = FALSE;
6662        }
6663        aic_dev->max_q_depth = aic_dev->temp_q_depth =
6664                aic7xxx_default_queue_depth;
6665      }
6666      else
6667      {
6668
6669        if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 255)
6670        {
6671          tag_enabled = FALSE;
6672        }
6673        else if (aic7xxx_tag_info[p->instance].tag_commands[tindex] == 0)
6674        {
6675          aic_dev->max_q_depth = aic_dev->temp_q_depth =
6676                  aic7xxx_default_queue_depth;
6677        }
6678        else
6679        {
6680          aic_dev->max_q_depth = aic_dev->temp_q_depth = 
6681            aic7xxx_tag_info[p->instance].tag_commands[tindex];
6682        }
6683      }
6684    }
6685  }
6686  if (tag_enabled)
6687  {
6688    if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6689    {
6690          printk(INFO_LEAD "Tagged queuing enabled, queue depth %d.\n",
6691            p->host_no, device->channel, device->id,
6692            device->lun, aic_dev->max_q_depth);
6693    }
6694    scsi_adjust_queue_depth(device, MSG_ORDERED_TAG, aic_dev->max_q_depth);
6695  }
6696  else
6697  {
6698    if (aic7xxx_verbose & VERBOSE_NEGOTIATION2)
6699    {
6700          printk(INFO_LEAD "Tagged queuing disabled, queue depth %d.\n",
6701            p->host_no, device->channel, device->id,
6702            device->lun, device->host->cmd_per_lun);
6703    }
6704    scsi_adjust_queue_depth(device, 0, device->host->cmd_per_lun);
6705  }
6706  return;
6707}
6708
6709/*+F*************************************************************************
6710 * Function:
6711 *   aic7xxx_slave_destroy
6712 *
6713 * Description:
6714 *   prepare for this device to go away
6715 *-F*************************************************************************/
6716static void
6717aic7xxx_slave_destroy(struct scsi_device *SDptr)
6718{
6719  struct aic_dev_data *aic_dev = SDptr->hostdata;
6720
6721  list_del(&aic_dev->list);
6722  SDptr->hostdata = NULL;
6723  kfree(aic_dev);
6724  return;
6725}
6726
6727/*+F*************************************************************************
6728 * Function:
6729 *   aic7xxx_slave_configure
6730 *
6731 * Description:
6732 *   Configure the device we are attaching to the controller.  This is
6733 *   where we get to do things like scan the INQUIRY data, set queue
6734 *   depths, allocate command structs, etc.
6735 *-F*************************************************************************/
6736static int
6737aic7xxx_slave_configure(struct scsi_device *SDptr)
6738{
6739  struct aic7xxx_host *p = (struct aic7xxx_host *) SDptr->host->hostdata;
6740  struct aic_dev_data *aic_dev;
6741  int scbnum;
6742
6743  aic_dev = (struct aic_dev_data *)SDptr->hostdata;
6744
6745  aic7xxx_init_transinfo(p, aic_dev);
6746  aic7xxx_device_queue_depth(p, SDptr);
6747  if(list_empty(&aic_dev->list))
6748    list_add_tail(&aic_dev->list, &p->aic_devs);
6749
6750  scbnum = 0;
6751  list_for_each_entry(aic_dev, &p->aic_devs, list) {
6752    scbnum += aic_dev->max_q_depth;
6753  }
6754  while (scbnum > p->scb_data->numscbs)
6755  {
6756    /*
6757     * Pre-allocate the needed SCBs to get around the possibility of having
6758     * to allocate some when memory is more or less exhausted and we need
6759     * the SCB in order to perform a swap operation (possible deadlock)
6760     */
6761    if ( aic7xxx_allocate_scb(p) == 0 )
6762      break;
6763  }
6764
6765
6766  return(0);
6767}
6768
6769/*+F*************************************************************************
6770 * Function:
6771 *   aic7xxx_probe
6772 *
6773 * Description:
6774 *   Probing for EISA boards: it looks like the first two bytes
6775 *   are a manufacturer code - three characters, five bits each:
6776 *
6777 *               BYTE 0   BYTE 1   BYTE 2   BYTE 3
6778 *              ?1111122 22233333 PPPPPPPP RRRRRRRR
6779 *
6780 *   The characters are baselined off ASCII '@', so add that value
6781 *   to each to get the real ASCII code for it. The next two bytes
6782 *   appear to be a product and revision number, probably vendor-
6783 *   specific. This is what is being searched for at each port,
6784 *   and what should probably correspond to the ID= field in the
6785 *   ECU's .cfg file for the card - if your card is not detected,
6786 *   make sure your signature is listed in the array.
6787 *
6788 *   The fourth byte's lowest bit seems to be an enabled/disabled
6789 *   flag (rest of the bits are reserved?).
6790 *
6791 * NOTE:  This function is only needed on Intel and Alpha platforms,
6792 *   the other platforms we support don't have EISA/VLB busses.  So,
6793 *   we #ifdef this entire function to avoid compiler warnings about
6794 *   an unused function.
6795 *-F*************************************************************************/
6796#if defined(__i386__) || defined(__alpha__)
6797static int
6798aic7xxx_probe(int slot, int base, ahc_flag_type *flags)
6799{
6800  int i;
6801  unsigned char buf[4];
6802
6803  static struct {
6804    int n;
6805    unsigned char signature[sizeof(buf)];
6806    ahc_chip type;
6807    int bios_disabled;
6808  } AIC7xxx[] = {
6809    { 4, { 0x04, 0x90, 0x77, 0x70 },
6810      AHC_AIC7770|AHC_EISA, FALSE },  /* mb 7770  */
6811    { 4, { 0x04, 0x90, 0x77, 0x71 },
6812      AHC_AIC7770|AHC_EISA, FALSE }, /* host adapter 274x */
6813    { 4, { 0x04, 0x90, 0x77, 0x56 },
6814      AHC_AIC7770|AHC_VL, FALSE }, /* 284x BIOS enabled */
6815    { 4, { 0x04, 0x90, 0x77, 0x57 },
6816      AHC_AIC7770|AHC_VL, TRUE }   /* 284x BIOS disabled */
6817  };
6818
6819  /*
6820   * The VL-bus cards need to be primed by
6821   * writing before a signature check.
6822   */
6823  for (i = 0; i < sizeof(buf); i++)
6824  {
6825    outb(0x80 + i, base);
6826    buf[i] = inb(base + i);
6827  }
6828
6829  for (i = 0; i < ARRAY_SIZE(AIC7xxx); i++)
6830  {
6831    /*
6832     * Signature match on enabled card?
6833     */
6834    if (!memcmp(buf, AIC7xxx[i].signature, AIC7xxx[i].n))
6835    {
6836      if (inb(base + 4) & 1)
6837      {
6838        if (AIC7xxx[i].bios_disabled)
6839        {
6840          *flags |= AHC_USEDEFAULTS;
6841        }
6842        else
6843        {
6844          *flags |= AHC_BIOS_ENABLED;
6845        }
6846        return (i);
6847      }
6848
6849      printk("aic7xxx: <Adaptec 7770 SCSI Host Adapter> "
6850             "disabled at slot %d, ignored.\n", slot);
6851    }
6852  }
6853
6854  return (-1);
6855}
6856#endif /* (__i386__) || (__alpha__) */
6857
6858
6859/*+F*************************************************************************
6860 * Function:
6861 *   read_2840_seeprom
6862 *
6863 * Description:
6864 *   Reads the 2840 serial EEPROM and returns 1 if successful and 0 if
6865 *   not successful.
6866 *
6867 *   See read_seeprom (for the 2940) for the instruction set of the 93C46
6868 *   chip.
6869 *
6870 *   The 2840 interface to the 93C46 serial EEPROM is through the
6871 *   STATUS_2840 and SEECTL_2840 registers.  The CS_2840, CK_2840, and
6872 *   DO_2840 bits of the SEECTL_2840 register are connected to the chip
6873 *   select, clock, and data out lines respectively of the serial EEPROM.
6874 *   The DI_2840 bit of the STATUS_2840 is connected to the data in line
6875 *   of the serial EEPROM.  The EEPROM_TF bit of STATUS_2840 register is
6876 *   useful in that it gives us an 800 nsec timer.  After a read from the
6877 *   SEECTL_2840 register the timing flag is cleared and goes high 800 nsec
6878 *   later.
6879 *-F*************************************************************************/
6880static int
6881read_284x_seeprom(struct aic7xxx_host *p, struct seeprom_config *sc)
6882{
6883  int i = 0, k = 0;
6884  unsigned char temp;
6885  unsigned short checksum = 0;
6886  unsigned short *seeprom = (unsigned short *) sc;
6887  struct seeprom_cmd {
6888    unsigned char len;
6889    unsigned char bits[3];
6890  };
6891  struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
6892
6893#define CLOCK_PULSE(p) \
6894  while ((aic_inb(p, STATUS_2840) & EEPROM_TF) == 0)        \
6895  {                                                \
6896    ;  /* Do nothing */                                \
6897  }                                                \
6898  (void) aic_inb(p, SEECTL_2840);
6899
6900  /*
6901   * Read the first 32 registers of the seeprom.  For the 2840,
6902   * the 93C46 SEEPROM is a 1024-bit device with 64 16-bit registers
6903   * but only the first 32 are used by Adaptec BIOS.  The loop
6904   * will range from 0 to 31.
6905   */
6906  for (k = 0; k < (sizeof(*sc) / 2); k++)
6907  {
6908    /*
6909     * Send chip select for one clock cycle.
6910     */
6911    aic_outb(p, CK_2840 | CS_2840, SEECTL_2840);
6912    CLOCK_PULSE(p);
6913
6914    /*
6915     * Now we're ready to send the read command followed by the
6916     * address of the 16-bit register we want to read.
6917     */
6918    for (i = 0; i < seeprom_read.len; i++)
6919    {
6920      temp = CS_2840 | seeprom_read.bits[i];
6921      aic_outb(p, temp, SEECTL_2840);
6922      CLOCK_PULSE(p);
6923      temp = temp ^ CK_2840;
6924      aic_outb(p, temp, SEECTL_2840);
6925      CLOCK_PULSE(p);
6926    }
6927    /*
6928     * Send the 6 bit address (MSB first, LSB last).
6929     */
6930    for (i = 5; i >= 0; i--)
6931    {
6932      temp = k;
6933      temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
6934      temp = CS_2840 | temp;
6935      aic_outb(p, temp, SEECTL_2840);
6936      CLOCK_PULSE(p);
6937      temp = temp ^ CK_2840;
6938      aic_outb(p, temp, SEECTL_2840);
6939      CLOCK_PULSE(p);
6940    }
6941
6942    /*
6943     * Now read the 16 bit register.  An initial 0 precedes the
6944     * register contents which begins with bit 15 (MSB) and ends
6945     * with bit 0 (LSB).  The initial 0 will be shifted off the
6946     * top of our word as we let the loop run from 0 to 16.
6947     */
6948    for (i = 0; i <= 16; i++)
6949    {
6950      temp = CS_2840;
6951      aic_outb(p, temp, SEECTL_2840);
6952      CLOCK_PULSE(p);
6953      temp = temp ^ CK_2840;
6954      seeprom[k] = (seeprom[k] << 1) | (aic_inb(p, STATUS_2840) & DI_2840);
6955      aic_outb(p, temp, SEECTL_2840);
6956      CLOCK_PULSE(p);
6957    }
6958    /*
6959     * The serial EEPROM has a checksum in the last word.  Keep a
6960     * running checksum for all words read except for the last
6961     * word.  We'll verify the checksum after all words have been
6962     * read.
6963     */
6964    if (k < (sizeof(*sc) / 2) - 1)
6965    {
6966      checksum = checksum + seeprom[k];
6967    }
6968
6969    /*
6970     * Reset the chip select for the next command cycle.
6971     */
6972    aic_outb(p, 0, SEECTL_2840);
6973    CLOCK_PULSE(p);
6974    aic_outb(p, CK_2840, SEECTL_2840);
6975    CLOCK_PULSE(p);
6976    aic_outb(p, 0, SEECTL_2840);
6977    CLOCK_PULSE(p);
6978  }
6979
6980#if 0
6981  printk("Computed checksum 0x%x, checksum read 0x%x\n", checksum, sc->checksum);
6982  printk("Serial EEPROM:");
6983  for (k = 0; k < (sizeof(*sc) / 2); k++)
6984  {
6985    if (((k % 8) == 0) && (k != 0))
6986    {
6987      printk("\n              ");
6988    }
6989    printk(" 0x%x", seeprom[k]);
6990  }
6991  printk("\n");
6992#endif
6993
6994  if (checksum != sc->checksum)
6995  {
6996    printk("aic7xxx: SEEPROM checksum error, ignoring SEEPROM settings.\n");
6997    return (0);
6998  }
6999
7000  return (1);
7001#undef CLOCK_PULSE
7002}
7003
7004#define CLOCK_PULSE(p)                                               \
7005  do {                                                               \
7006    int limit = 0;                                                   \
7007    do {                                                             \
7008      mb();                                                          \
7009      pause_sequencer(p);  /* This is just to generate some PCI */   \
7010                           /* traffic so the PCI read is flushed */  \
7011                           /* it shouldn't be needed, but some */    \
7012                           /* chipsets do indeed appear to need */   \
7013                           /* something to force PCI reads to get */ \
7014                           /* flushed */                             \
7015      udelay(1);           /* Do nothing */                          \
7016    } while (((aic_inb(p, SEECTL) & SEERDY) == 0) && (++limit < 1000)); \
7017  } while(0)
7018
7019/*+F*************************************************************************
7020 * Function:
7021 *   acquire_seeprom
7022 *
7023 * Description:
7024 *   Acquires access to the memory port on PCI controllers.
7025 *-F*************************************************************************/
7026static int
7027acquire_seeprom(struct aic7xxx_host *p)
7028{
7029
7030  /*
7031   * Request access of the memory port.  When access is
7032   * granted, SEERDY will go high.  We use a 1 second
7033   * timeout which should be near 1 second more than
7034   * is needed.  Reason: after the 7870 chip reset, there
7035   * should be no contention.
7036   */
7037  aic_outb(p, SEEMS, SEECTL);
7038  CLOCK_PULSE(p);
7039  if ((aic_inb(p, SEECTL) & SEERDY) == 0)
7040  {
7041    aic_outb(p, 0, SEECTL);
7042    return (0);
7043  }
7044  return (1);
7045}
7046
7047/*+F*************************************************************************
7048 * Function:
7049 *   release_seeprom
7050 *
7051 * Description:
7052 *   Releases access to the memory port on PCI controllers.
7053 *-F*************************************************************************/
7054static void
7055release_seeprom(struct aic7xxx_host *p)
7056{
7057  /*
7058   * Make sure the SEEPROM is ready before we release it.
7059   */
7060  CLOCK_PULSE(p);
7061  aic_outb(p, 0, SEECTL);
7062}
7063
7064/*+F*************************************************************************
7065 * Function:
7066 *   read_seeprom
7067 *
7068 * Description:
7069 *   Reads the serial EEPROM and returns 1 if successful and 0 if
7070 *   not successful.
7071 *
7072 *   The instruction set of the 93C46/56/66 chips is as follows:
7073 *
7074 *               Start  OP
7075 *     Function   Bit  Code  Address    Data     Description
7076 *     -------------------------------------------------------------------
7077 *     READ        1    10   A5 - A0             Reads data stored in memory,
7078 *                                               starting at specified address
7079 *     EWEN        1    00   11XXXX              Write enable must precede
7080 *                                               all programming modes
7081 *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
7082 *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
7083 *     ERAL        1    00   10XXXX              Erase all registers
7084 *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
7085 *     EWDS        1    00   00XXXX              Disables all programming
7086 *                                               instructions
7087 *     *Note: A value of X for address is a don't care condition.
7088 *     *Note: The 93C56 and 93C66 have 8 address bits.
7089 * 
7090 *
7091 *   The 93C46 has a four wire interface: clock, chip select, data in, and
7092 *   data out.  In order to perform one of the above functions, you need
7093 *   to enable the chip select for a clock period (typically a minimum of
7094 *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
7095 *   respectively.  While the chip select remains high, you can clock in
7096 *   the instructions (above) starting with the start bit, followed by the
7097 *   OP code, Address, and Data (if needed).  For the READ instruction, the
7098 *   requested 16-bit register contents is read from the data out line but
7099 *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
7100 *   first).  The clock cycling from low to high initiates the next data
7101 *   bit to be sent from the chip.
7102 *
7103 *   The 78xx interface to the 93C46 serial EEPROM is through the SEECTL
7104 *   register.  After successful arbitration for the memory port, the
7105 *   SEECS bit of the SEECTL register is connected to the chip select.
7106 *   The SEECK, SEEDO, and SEEDI are connected to the clock, data out,
7107 *   and data in lines respectively.  The SEERDY bit of SEECTL is useful
7108 *   in that it gives us an 800 nsec timer.  After a write to the SEECTL
7109 *   register, the SEERDY goes high 800 nsec later.  The one exception
7110 *   to this is when we first request access to the memory port.  The
7111 *   SEERDY goes high to signify that access has been granted and, for
7112 *   this case, has no implied timing.
7113 *-F*************************************************************************/
7114static int
7115read_seeprom(struct aic7xxx_host *p, int offset, 
7116    unsigned short *scarray, unsigned int len, seeprom_chip_type chip)
7117{
7118  int i = 0, k;
7119  unsigned char temp;
7120  unsigned short checksum = 0;
7121  struct seeprom_cmd {
7122    unsigned char len;
7123    unsigned char bits[3];
7124  };
7125  struct seeprom_cmd seeprom_read = {3, {1, 1, 0}};
7126
7127  /*
7128   * Request access of the memory port.
7129   */
7130  if (acquire_seeprom(p) == 0)
7131  {
7132    return (0);
7133  }
7134
7135  /*
7136   * Read 'len' registers of the seeprom.  For the 7870, the 93C46
7137   * SEEPROM is a 1024-bit device with 64 16-bit registers but only
7138   * the first 32 are used by Adaptec BIOS.  Some adapters use the
7139   * 93C56 SEEPROM which is a 2048-bit device.  The loop will range
7140   * from 0 to 'len' - 1.
7141   */
7142  for (k = 0; k < len; k++)
7143  {
7144    /*
7145     * Send chip select for one clock cycle.
7146     */
7147    aic_outb(p, SEEMS | SEECK | SEECS, SEECTL);
7148    CLOCK_PULSE(p);
7149
7150    /*
7151     * Now we're ready to send the read command followed by the
7152     * address of the 16-bit register we want to read.
7153     */
7154    for (i = 0; i < seeprom_read.len; i++)
7155    {
7156      temp = SEEMS | SEECS | (seeprom_read.bits[i] << 1);
7157      aic_outb(p, temp, SEECTL);
7158      CLOCK_PULSE(p);
7159      temp = temp ^ SEECK;
7160      aic_outb(p, temp, SEECTL);
7161      CLOCK_PULSE(p);
7162    }
7163    /*
7164     * Send the 6 or 8 bit address (MSB first, LSB last).
7165     */
7166    for (i = ((int) chip - 1); i >= 0; i--)
7167    {
7168      temp = k + offset;
7169      temp = (temp >> i) & 1;  /* Mask out all but lower bit. */
7170      temp = SEEMS | SEECS | (temp << 1);
7171      aic_outb(p, temp, SEECTL);
7172      CLOCK_PULSE(p);
7173      temp = temp ^ SEECK;
7174      aic_outb(p, temp, SEECTL);
7175      CLOCK_PULSE(p);
7176    }
7177
7178    /*
7179     * Now read the 16 bit register.  An initial 0 precedes the
7180     * register contents which begins with bit 15 (MSB) and ends
7181     * with bit 0 (LSB).  The initial 0 will be shifted off the
7182     * top of our word as we let the loop run from 0 to 16.
7183     */
7184    for (i = 0; i <= 16; i++)
7185    {
7186      temp = SEEMS | SEECS;
7187      aic_outb(p, temp, SEECTL);
7188      CLOCK_PULSE(p);
7189      temp = temp ^ SEECK;
7190      scarray[k] = (scarray[k] << 1) | (aic_inb(p, SEECTL) & SEEDI);
7191      aic_outb(p, temp, SEECTL);
7192      CLOCK_PULSE(p);
7193    }
7194
7195    /*
7196     * The serial EEPROM should have a checksum in the last word.
7197     * Keep a running checksum for all words read except for the
7198     * last word.  We'll verify the checksum after all words have
7199     * been read.
7200     */
7201    if (k < (len - 1))
7202    {
7203      checksum = checksum + scarray[k];
7204    }
7205
7206    /*
7207     * Reset the chip select for the next command cycle.
7208     */
7209    aic_outb(p, SEEMS, SEECTL);
7210    CLOCK_PULSE(p);
7211    aic_outb(p, SEEMS | SEECK, SEECTL);
7212    CLOCK_PULSE(p);
7213    aic_outb(p, SEEMS, SEECTL);
7214    CLOCK_PULSE(p);
7215  }
7216
7217  /*
7218   * Release access to the memory port and the serial EEPROM.
7219   */
7220  release_seeprom(p);
7221
7222#if 0
7223  printk("Computed checksum 0x%x, checksum read 0x%x\n",
7224         checksum, scarray[len - 1]);
7225  printk("Serial EEPROM:");
7226  for (k = 0; k < len; k++)
7227  {
7228    if (((k % 8) == 0) && (k != 0))
7229    {
7230      printk("\n              ");
7231    }
7232    printk(" 0x%x", scarray[k]);
7233  }
7234  printk("\n");
7235#endif
7236  if ( (checksum != scarray[len - 1]) || (checksum == 0) )
7237  {
7238    return (0);
7239  }
7240
7241  return (1);
7242}
7243
7244/*+F*************************************************************************
7245 * Function:
7246 *   read_brdctl
7247 *
7248 * Description:
7249 *   Reads the BRDCTL register.
7250 *-F*************************************************************************/
7251static unsigned char
7252read_brdctl(struct aic7xxx_host *p)
7253{
7254  unsigned char brdctl, value;
7255
7256  /*
7257   * Make sure the SEEPROM is ready before we access it
7258   */
7259  CLOCK_PULSE(p);
7260  if (p->features & AHC_ULTRA2)
7261  {
7262    brdctl = BRDRW_ULTRA2;
7263    aic_outb(p, brdctl, BRDCTL);
7264    CLOCK_PULSE(p);
7265    value = aic_inb(p, BRDCTL);
7266    CLOCK_PULSE(p);
7267    return(value);
7268  }
7269  brdctl = BRDRW;
7270  if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7271        (p->flags & AHC_CHNLB) )
7272  {
7273    brdctl |= BRDCS;
7274  }
7275  aic_outb(p, brdctl, BRDCTL);
7276  CLOCK_PULSE(p);
7277  value = aic_inb(p, BRDCTL);
7278  CLOCK_PULSE(p);
7279  aic_outb(p, 0, BRDCTL);
7280  CLOCK_PULSE(p);
7281  return (value);
7282}
7283
7284/*+F*************************************************************************
7285 * Function:
7286 *   write_brdctl
7287 *
7288 * Description:
7289 *   Writes a value to the BRDCTL register.
7290 *-F*************************************************************************/
7291static void
7292write_brdctl(struct aic7xxx_host *p, unsigned char value)
7293{
7294  unsigned char brdctl;
7295
7296  /*
7297   * Make sure the SEEPROM is ready before we access it
7298   */
7299  CLOCK_PULSE(p);
7300  if (p->features & AHC_ULTRA2)
7301  {
7302    brdctl = value;
7303    aic_outb(p, brdctl, BRDCTL);
7304    CLOCK_PULSE(p);
7305    brdctl |= BRDSTB_ULTRA2;
7306    aic_outb(p, brdctl, BRDCTL);
7307    CLOCK_PULSE(p);
7308    brdctl &= ~BRDSTB_ULTRA2;
7309    aic_outb(p, brdctl, BRDCTL);
7310    CLOCK_PULSE(p);
7311    read_brdctl(p);
7312    CLOCK_PULSE(p);
7313  }
7314  else
7315  {
7316    brdctl = BRDSTB;
7317    if ( !((p->chip & AHC_CHIPID_MASK) == AHC_AIC7895) ||
7318          (p->flags & AHC_CHNLB) )
7319    {
7320      brdctl |= BRDCS;
7321    }
7322    brdctl = BRDSTB | BRDCS;
7323    aic_outb(p, brdctl, BRDCTL);
7324    CLOCK_PULSE(p);
7325    brdctl |= value;
7326    aic_outb(p, brdctl, BRDCTL);
7327    CLOCK_PULSE(p);
7328    brdctl &= ~BRDSTB;
7329    aic_outb(p, brdctl, BRDCTL);
7330    CLOCK_PULSE(p);
7331    brdctl &= ~BRDCS;
7332    aic_outb(p, brdctl, BRDCTL);
7333    CLOCK_PULSE(p);
7334  }
7335}
7336
7337/*+F*************************************************************************
7338 * Function:
7339 *   aic785x_cable_detect
7340 *
7341 * Description:
7342 *   Detect the cables that are present on aic785x class controller chips
7343 *-F*************************************************************************/
7344static void
7345aic785x_cable_detect(struct aic7xxx_host *p, int *int_50,
7346    int *ext_present, int *eeprom)
7347{
7348  unsigned char brdctl;
7349
7350  aic_outb(p, BRDRW | BRDCS, BRDCTL);
7351  CLOCK_PULSE(p);
7352  aic_outb(p, 0, BRDCTL);
7353  CLOCK_PULSE(p);
7354  brdctl = aic_inb(p, BRDCTL);
7355  CLOCK_PULSE(p);
7356  *int_50 = !(brdctl & BRDDAT5);
7357  *ext_present = !(brdctl & BRDDAT6);
7358  *eeprom = (aic_inb(p, SPIOCAP) & EEPROM);
7359}
7360
7361#undef CLOCK_PULSE
7362
7363/*+F*************************************************************************
7364 * Function:
7365 *   aic2940_uwpro_cable_detect
7366 *
7367 * Description:
7368 *   Detect the cables that are present on the 2940-UWPro cards
7369 *
7370 * NOTE: This function assumes the SEEPROM will have already been acquired
7371 *       prior to invocation of this function.
7372 *-F*************************************************************************/
7373static void
7374aic2940_uwpro_wide_cable_detect(struct aic7xxx_host *p, int *int_68,
7375    int *ext_68, int *eeprom)
7376{
7377  unsigned char brdctl;
7378
7379  /*
7380   * First read the status of our cables.  Set the rom bank to
7381   * 0 since the bank setting serves as a multiplexor for the
7382   * cable detection logic.  BRDDAT5 controls the bank switch.
7383   */
7384  write_brdctl(p, 0);
7385
7386  /*
7387   * Now we read the state of the internal 68 connector.  BRDDAT6
7388   * is don't care, BRDDAT7 is internal 68.  The cable is
7389   * present if the bit is 0
7390   */
7391  brdctl = read_brdctl(p);
7392  *int_68 = !(brdctl & BRDDAT7);
7393
7394  /*
7395   * Set the bank bit in brdctl and then read the external cable state
7396   * and the EEPROM status
7397   */
7398  write_brdctl(p, BRDDAT5);
7399  brdctl = read_brdctl(p);
7400
7401  *ext_68 = !(brdctl & BRDDAT6);
7402  *eeprom = !(brdctl & BRDDAT7);
7403
7404  /*
7405   * We're done, the calling function will release the SEEPROM for us
7406   */
7407}
7408
7409/*+F*************************************************************************
7410 * Function:
7411 *   aic787x_cable_detect
7412 *
7413 * Description:
7414 *   Detect the cables that are present on aic787x class controller chips
7415 *
7416 * NOTE: This function assumes the SEEPROM will have already been acquired
7417 *       prior to invocation of this function.
7418 *-F*************************************************************************/
7419static void
7420aic787x_cable_detect(struct aic7xxx_host *p, int *int_50, int *int_68,
7421    int *ext_present, int *eeprom)
7422{
7423  unsigned char brdctl;
7424
7425  /*
7426   * First read the status of our cables.  Set the rom bank to
7427   * 0 since the bank setting serves as a multiplexor for the
7428   * cable detection logic.  BRDDAT5 controls the bank switch.
7429   */
7430  write_brdctl(p, 0);
7431
7432  /*
7433   * Now we read the state of the two internal connectors.  BRDDAT6
7434   * is internal 50, BRDDAT7 is internal 68.  For each, the cable is
7435   * present if the bit is 0
7436   */
7437  brdctl = read_brdctl(p);
7438  *int_50 = !(brdctl & BRDDAT6);
7439  *int_68 = !(brdctl & BRDDAT7);
7440
7441  /*
7442   * Set the bank bit in brdctl and then read the external cable state
7443   * and the EEPROM status
7444   */
7445  write_brdctl(p, BRDDAT5);
7446  brdctl = read_brdctl(p);
7447
7448  *ext_present = !(brdctl & BRDDAT6);
7449  *eeprom = !(brdctl & BRDDAT7);
7450
7451  /*
7452   * We're done, the calling function will release the SEEPROM for us
7453   */
7454}
7455
7456/*+F*************************************************************************
7457 * Function:
7458 *   aic787x_ultra2_term_detect
7459 *
7460 * Description:
7461 *   Detect the termination settings present on ultra2 class controllers
7462 *
7463 * NOTE: This function assumes the SEEPROM will have already been acquired
7464 *       prior to invocation of this function.
7465 *-F*************************************************************************/
7466static void
7467aic7xxx_ultra2_term_detect(struct aic7xxx_host *p, int *enableSE_low,
7468                           int *enableSE_high, int *enableLVD_low,
7469                           int *enableLVD_high, int *eprom_present)
7470{
7471  unsigned char brdctl;
7472
7473  brdctl = read_brdctl(p);
7474
7475  *eprom_present  = (brdctl & BRDDAT7);
7476  *enableSE_high  = (brdctl & BRDDAT6);
7477  *enableSE_low   = (brdctl & BRDDAT5);
7478  *enableLVD_high = (brdctl & BRDDAT4);
7479  *enableLVD_low  = (brdctl & BRDDAT3);
7480}
7481
7482/*+F*************************************************************************
7483 * Function:
7484 *   configure_termination
7485 *
7486 * Description:
7487 *   Configures the termination settings on PCI adapters that have
7488 *   SEEPROMs available.
7489 *-F*************************************************************************/
7490static void
7491configure_termination(struct aic7xxx_host *p)
7492{
7493  int internal50_present = 0;
7494  int internal68_present = 0;
7495  int external_present = 0;
7496  int eprom_present = 0;
7497  int enableSE_low = 0;
7498  int enableSE_high = 0;
7499  int enableLVD_low = 0;
7500  int enableLVD_high = 0;
7501  unsigned char brddat = 0;
7502  unsigned char max_target = 0;
7503  unsigned char sxfrctl1 = aic_inb(p, SXFRCTL1);
7504
7505  if (acquire_seeprom(p))
7506  {
7507    if (p->features & (AHC_WIDE|AHC_TWIN))
7508      max_target = 16;
7509    else
7510      max_target = 8;
7511    aic_outb(p, SEEMS | SEECS, SEECTL);
7512    sxfrctl1 &= ~STPWEN;
7513    /*
7514     * The termination/cable detection logic is split into three distinct
7515     * groups.  Ultra2 and later controllers, 2940UW-Pro controllers, and
7516     * older 7850, 7860, 7870, 7880, and 7895 controllers.  Each has its
7517     * own unique way of detecting their cables and writing the results
7518     * back to the card.
7519     */
7520    if (p->features & AHC_ULTRA2)
7521    {
7522      /*
7523       * As long as user hasn't overridden term settings, always check the
7524       * cable detection logic
7525       */
7526      if (aic7xxx_override_term == -1)
7527      {
7528        aic7xxx_ultra2_term_detect(p, &enableSE_low, &enableSE_high,
7529                                   &enableLVD_low, &enableLVD_high,
7530                                   &eprom_present);
7531      }
7532      
7533      /*
7534       * If the user is overriding settings, then they have been preserved
7535       * to here as fake adapter_control entries.  Parse them and allow
7536       * them to override the detected settings (if we even did detection).
7537       */
7538      if (!(p->adapter_control & CFSEAUTOTERM))
7539      {
7540        enableSE_low = (p->adapter_control & CFSTERM);
7541        enableSE_high = (p->adapter_control & CFWSTERM);
7542      }
7543      if (!(p->adapter_control & CFAUTOTERM))
7544      {
7545        enableLVD_low = enableLVD_high = (p->adapter_control & CFLVDSTERM);
7546      }
7547
7548      /*
7549       * Now take those settings that we have and translate them into the
7550       * values that must be written into the registers.
7551       *
7552       * Flash Enable = BRDDAT7
7553       * Secondary High Term Enable = BRDDAT6
7554       * Secondary Low Term Enable = BRDDAT5
7555       * LVD/Primary High Term Enable = BRDDAT4
7556       * LVD/Primary Low Term Enable = STPWEN bit in SXFRCTL1
7557       */
7558      if (enableLVD_low != 0)
7559      {
7560        sxfrctl1 |= STPWEN;
7561        p->flags |= AHC_TERM_ENB_LVD;
7562        if (aic7xxx_verbose & VERBOSE_PROBE2)
7563          printk(KERN_INFO "(scsi%d) LVD/Primary Low byte termination "
7564                 "Enabled\n", p->host_no);
7565      }
7566          
7567      if (enableLVD_high != 0)
7568      {
7569        brddat |= BRDDAT4;
7570        if (aic7xxx_verbose & VERBOSE_PROBE2)
7571          printk(KERN_INFO "(scsi%d) LVD/Primary High byte termination "
7572                 "Enabled\n", p->host_no);
7573      }
7574
7575      if (enableSE_low != 0)
7576      {
7577        brddat |= BRDDAT5;
7578        if (aic7xxx_verbose & VERBOSE_PROBE2)
7579          printk(KERN_INFO "(scsi%d) Secondary Low byte termination "
7580                 "Enabled\n", p->host_no);
7581      }
7582
7583      if (enableSE_high != 0)
7584      {
7585        brddat |= BRDDAT6;
7586        if (aic7xxx_verbose & VERBOSE_PROBE2)
7587          printk(KERN_INFO "(scsi%d) Secondary High byte termination "
7588                 "Enabled\n", p->host_no);
7589      }
7590    }
7591    else if (p->features & AHC_NEW_AUTOTERM)
7592    {
7593      /*
7594       * The 50 pin connector termination is controlled by STPWEN in the
7595       * SXFRCTL1 register.  Since the Adaptec docs typically say the
7596       * controller is not allowed to be in the middle of a cable and
7597       * this is the only connection on that stub of the bus, there is
7598       * no need to even check for narrow termination, it's simply
7599       * always on.
7600       */
7601      sxfrctl1 |= STPWEN;
7602      if (aic7xxx_verbose & VERBOSE_PROBE2)
7603        printk(KERN_INFO "(scsi%d) Narrow channel termination Enabled\n",
7604               p->host_no);
7605
7606      if (p->adapter_control & CFAUTOTERM)
7607      {
7608        aic2940_uwpro_wide_cable_detect(p, &internal68_present,
7609                                        &external_present,
7610                                        &eprom_present);
7611        printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
7612               "Ext-68 %s)\n", p->host_no,
7613               "Don't Care",
7614               internal68_present ? "YES" : "NO",
7615               external_present ? "YES" : "NO");
7616        if (aic7xxx_verbose & VERBOSE_PROBE2)
7617          printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
7618               eprom_present ? "is" : "is not");
7619        if (internal68_present && external_present)
7620        {
7621          brddat = 0;
7622          p->flags &= ~AHC_TERM_ENB_SE_HIGH;
7623          if (aic7xxx_verbose & VERBOSE_PROBE2)
7624            printk(KERN_INFO "(scsi%d) Wide channel termination Disabled\n",
7625                   p->host_no);
7626        }
7627        else
7628        {
7629          brddat = BRDDAT6;
7630          p->flags |= AHC_TERM_ENB_SE_HIGH;
7631          if (aic7xxx_verbose & VERBOSE_PROBE2)
7632            printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
7633                   p->host_no);
7634        }
7635      }
7636      else
7637      {
7638        /*
7639         * The termination of the Wide channel is done more like normal
7640         * though, and the setting of this termination is done by writing
7641         * either a 0 or 1 to BRDDAT6 of the BRDDAT register
7642         */
7643        if (p->adapter_control & CFWSTERM)
7644        {
7645          brddat = BRDDAT6;
7646          p->flags |= AHC_TERM_ENB_SE_HIGH;
7647          if (aic7xxx_verbose & VERBOSE_PROBE2)
7648            printk(KERN_INFO "(scsi%d) Wide channel termination Enabled\n",
7649                   p->host_no);
7650        }
7651        else
7652        {
7653          brddat = 0;
7654        }
7655      }
7656    }
7657    else
7658    {
7659      if (p->adapter_control & CFAUTOTERM)
7660      {
7661        if (p->flags & AHC_MOTHERBOARD)
7662        {
7663          printk(KERN_INFO "(scsi%d) Warning - detected auto-termination\n",
7664                 p->host_no);
7665          printk(KERN_INFO "(scsi%d) Please verify driver detected settings "
7666            "are correct.\n", p->host_no);
7667          printk(KERN_INFO "(scsi%d) If not, then please properly set the "
7668            "device termination\n", p->host_no);
7669          printk(KERN_INFO "(scsi%d) in the Adaptec SCSI BIOS by hitting "
7670            "CTRL-A when prompted\n", p->host_no);
7671          printk(KERN_INFO "(scsi%d) during machine bootup.\n", p->host_no);
7672        }
7673        /* Configure auto termination. */
7674
7675        if ( (p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870 )
7676        {
7677          aic787x_cable_detect(p, &internal50_present, &internal68_present,
7678            &external_present, &eprom_present);
7679        }
7680        else
7681        {
7682          aic785x_cable_detect(p, &internal50_present, &external_present,
7683            &eprom_present);
7684        }
7685
7686        if (max_target <= 8)
7687          internal68_present = 0;
7688
7689        if (max_target > 8)
7690        {
7691          printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Int-68 %s, "
7692                 "Ext-68 %s)\n", p->host_no,
7693                 internal50_present ? "YES" : "NO",
7694                 internal68_present ? "YES" : "NO",
7695                 external_present ? "YES" : "NO");
7696        }
7697        else
7698        {
7699          printk(KERN_INFO "(scsi%d) Cables present (Int-50 %s, Ext-50 %s)\n",
7700                 p->host_no,
7701                 internal50_present ? "YES" : "NO",
7702                 external_present ? "YES" : "NO");
7703        }
7704        if (aic7xxx_verbose & VERBOSE_PROBE2)
7705          printk(KERN_INFO "(scsi%d) EEPROM %s present.\n", p->host_no,
7706               eprom_present ? "is" : "is not");
7707
7708        /*
7709         * Now set the termination based on what we found.  BRDDAT6
7710         * controls wide termination enable.
7711         * Flash Enable = BRDDAT7
7712         * SE High Term Enable = BRDDAT6
7713         */
7714        if (internal50_present && internal68_present && external_present)
7715        {
7716          printk(KERN_INFO "(scsi%d) Illegal cable configuration!!  Only two\n",
7717                 p->host_no);
7718          printk(KERN_INFO "(scsi%d) connectors on the SCSI controller may be "
7719                 "in use at a time!\n", p->host_no);
7720          /*
7721           * Force termination (low and high byte) on.  This is safer than
7722           * leaving it completely off, especially since this message comes
7723           * most often from motherboard controllers that don't even have 3
7724           * connectors, but instead are failing the cable detection.
7725           */
7726          internal50_present = external_present = 0;
7727          enableSE_high = enableSE_low = 1;
7728        }
7729
7730        if ((max_target > 8) &&
7731            ((external_present == 0) || (internal68_present == 0)) )
7732        {
7733          brddat |= BRDDAT6;
7734          p->flags |= AHC_TERM_ENB_SE_HIGH;
7735          if (aic7xxx_verbose & VERBOSE_PROBE2)
7736            printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
7737                   p->host_no);
7738        }
7739
7740        if ( ((internal50_present ? 1 : 0) +
7741              (internal68_present ? 1 : 0) +
7742              (external_present   ? 1 : 0)) <= 1 )
7743        {
7744          sxfrctl1 |= STPWEN;
7745          p->flags |= AHC_TERM_ENB_SE_LOW;
7746          if (aic7xxx_verbose & VERBOSE_PROBE2)
7747            printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
7748                   p->host_no);
7749        }
7750      }
7751      else /* p->adapter_control & CFAUTOTERM */
7752      {
7753        if (p->adapter_control & CFSTERM)
7754        {
7755          sxfrctl1 |= STPWEN;
7756          if (aic7xxx_verbose & VERBOSE_PROBE2)
7757            printk(KERN_INFO "(scsi%d) SE Low byte termination Enabled\n",
7758                   p->host_no);
7759        }
7760
7761        if (p->adapter_control & CFWSTERM)
7762        {
7763          brddat |= BRDDAT6;
7764          if (aic7xxx_verbose & VERBOSE_PROBE2)
7765            printk(KERN_INFO "(scsi%d) SE High byte termination Enabled\n",
7766                   p->host_no);
7767        }
7768      }
7769    }
7770
7771    aic_outb(p, sxfrctl1, SXFRCTL1);
7772    write_brdctl(p, brddat);
7773    release_seeprom(p);
7774  }
7775}
7776
7777/*+F*************************************************************************
7778 * Function:
7779 *   detect_maxscb
7780 *
7781 * Description:
7782 *   Detects the maximum number of SCBs for the controller and returns
7783 *   the count and a mask in p (p->maxscbs, p->qcntmask).
7784 *-F*************************************************************************/
7785static void
7786detect_maxscb(struct aic7xxx_host *p)
7787{
7788  int i;
7789
7790  /*
7791   * It's possible that we've already done this for multichannel
7792   * adapters.
7793   */
7794  if (p->scb_data->maxhscbs == 0)
7795  {
7796    /*
7797     * We haven't initialized the SCB settings yet.  Walk the SCBs to
7798     * determince how many there are.
7799     */
7800    aic_outb(p, 0, FREE_SCBH);
7801
7802    for (i = 0; i < AIC7XXX_MAXSCB; i++)
7803    {
7804      aic_outb(p, i, SCBPTR);
7805      aic_outb(p, i, SCB_CONTROL);
7806      if (aic_inb(p, SCB_CONTROL) != i)
7807        break;
7808      aic_outb(p, 0, SCBPTR);
7809      if (aic_inb(p, SCB_CONTROL) != 0)
7810        break;
7811
7812      aic_outb(p, i, SCBPTR);
7813      aic_outb(p, 0, SCB_CONTROL);   /* Clear the control byte. */
7814      aic_outb(p, i + 1, SCB_NEXT);  /* Set the next pointer. */
7815      aic_outb(p, SCB_LIST_NULL, SCB_TAG);  /* Make the tag invalid. */
7816      aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS);  /* no busy untagged */
7817      aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+1);/* targets active yet */
7818      aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+2);
7819      aic_outb(p, SCB_LIST_NULL, SCB_BUSYTARGETS+3);
7820    }
7821
7822    /* Make sure the last SCB terminates the free list. */
7823    aic_outb(p, i - 1, SCBPTR);
7824    aic_outb(p, SCB_LIST_NULL, SCB_NEXT);
7825
7826    /* Ensure we clear the first (0) SCBs control byte. */
7827    aic_outb(p, 0, SCBPTR);
7828    aic_outb(p, 0, SCB_CONTROL);
7829
7830    p->scb_data->maxhscbs = i;
7831    /*
7832     * Use direct indexing instead for speed
7833     */
7834    if ( i == AIC7XXX_MAXSCB )
7835      p->flags &= ~AHC_PAGESCBS;
7836  }
7837
7838}
7839
7840/*+F*************************************************************************
7841 * Function:
7842 *   aic7xxx_register
7843 *
7844 * Description:
7845 *   Register a Adaptec aic7xxx chip SCSI controller with the kernel.
7846 *-F*************************************************************************/
7847static int
7848aic7xxx_register(struct scsi_host_template *template, struct aic7xxx_host *p,
7849  int reset_delay)
7850{
7851  int i, result;
7852  int max_targets;
7853  int found = 1;
7854  unsigned char term, scsi_conf;
7855  struct Scsi_Host *host;
7856
7857  host = p->host;
7858
7859  p->scb_data->maxscbs = AIC7XXX_MAXSCB;
7860  host->can_queue = AIC7XXX_MAXSCB;
7861  host->cmd_per_lun = 3;
7862  host->sg_tablesize = AIC7XXX_MAX_SG;
7863  host->this_id = p->scsi_id;
7864  host->io_port = p->base;
7865  host->n_io_port = 0xFF;
7866  host->base = p->mbase;
7867  host->irq = p->irq;
7868  if (p->features & AHC_WIDE)
7869  {
7870    host->max_id = 16;
7871  }
7872  if (p->features & AHC_TWIN)
7873  {
7874    host->max_channel = 1;
7875  }
7876
7877  p->host = host;
7878  p->host_no = host->host_no;
7879  host->unique_id = p->instance;
7880  p->isr_count = 0;
7881  p->next = NULL;
7882  p->completeq.head = NULL;
7883  p->completeq.tail = NULL;
7884  scbq_init(&p->scb_data->free_scbs);
7885  scbq_init(&p->waiting_scbs);
7886  INIT_LIST_HEAD(&p->aic_devs);
7887
7888  /*
7889   * We currently have no commands of any type
7890   */
7891  p->qinfifonext = 0;
7892  p->qoutfifonext = 0;
7893
7894  printk(KERN_INFO "(scsi%d) <%s> found at ", p->host_no,
7895    board_names[p->board_name_index]);
7896  switch(p->chip)
7897  {
7898    case (AHC_AIC7770|AHC_EISA):
7899      printk("EISA slot %d\n", p->pci_device_fn);
7900      break;
7901    case (AHC_AIC7770|AHC_VL):
7902      printk("VLB slot %d\n", p->pci_device_fn);
7903      break;
7904    default:
7905      printk("PCI %d/%d/%d\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
7906        PCI_FUNC(p->pci_device_fn));
7907      break;
7908  }
7909  if (p->features & AHC_TWIN)
7910  {
7911    printk(KERN_INFO "(scsi%d) Twin Channel, A SCSI ID %d, B SCSI ID %d, ",
7912           p->host_no, p->scsi_id, p->scsi_id_b);
7913  }
7914  else
7915  {
7916    char *channel;
7917
7918    channel = "";
7919
7920    if ((p->flags & AHC_MULTI_CHANNEL) != 0)
7921    {
7922      channel = " A";
7923
7924      if ( (p->flags & (AHC_CHNLB|AHC_CHNLC)) != 0 )
7925      {
7926        channel = (p->flags & AHC_CHNLB) ? " B" : " C";
7927      }
7928    }
7929    if (p->features & AHC_WIDE)
7930    {
7931      printk(KERN_INFO "(scsi%d) Wide ", p->host_no);
7932    }
7933    else
7934    {
7935      printk(KERN_INFO "(scsi%d) Narrow ", p->host_no);
7936    }
7937    printk("Channel%s, SCSI ID=%d, ", channel, p->scsi_id);
7938  }
7939  aic_outb(p, 0, SEQ_FLAGS);
7940
7941  detect_maxscb(p);
7942
7943  printk("%d/%d SCBs\n", p->scb_data->maxhscbs, p->scb_data->maxscbs);
7944  if (aic7xxx_verbose & VERBOSE_PROBE2)
7945  {
7946    printk(KERN_INFO "(scsi%d) BIOS %sabled, IO Port 0x%lx, IRQ %d\n",
7947      p->host_no, (p->flags & AHC_BIOS_ENABLED) ? "en" : "dis",
7948      p->base, p->irq);
7949    printk(KERN_INFO "(scsi%d) IO Memory at 0x%lx, MMAP Memory at %p\n",
7950      p->host_no, p->mbase, p->maddr);
7951  }
7952
7953#ifdef CONFIG_PCI
7954  /*
7955   * Now that we know our instance number, we can set the flags we need to
7956   * force termination if need be.
7957   */
7958  if (aic7xxx_stpwlev != -1)
7959  {
7960    /*
7961     * This option only applies to PCI controllers.
7962     */
7963    if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
7964    {
7965      unsigned char devconfig;
7966
7967      pci_read_config_byte(p->pdev, DEVCONFIG, &devconfig);
7968      if ( (aic7xxx_stpwlev >> p->instance) & 0x01 )
7969      {
7970        devconfig |= STPWLEVEL;
7971        if (aic7xxx_verbose & VERBOSE_PROBE2)
7972          printk("(scsi%d) Force setting STPWLEVEL bit\n", p->host_no);
7973      }
7974      else
7975      {
7976        devconfig &= ~STPWLEVEL;
7977        if (aic7xxx_verbose & VERBOSE_PROBE2)
7978          printk("(scsi%d) Force clearing STPWLEVEL bit\n", p->host_no);
7979      }
7980      pci_write_config_byte(p->pdev, DEVCONFIG, devconfig);
7981    }
7982  }
7983#endif
7984
7985  /*
7986   * That took care of devconfig and stpwlev, now for the actual termination
7987   * settings.
7988   */
7989  if (aic7xxx_override_term != -1)
7990  {
7991    /*
7992     * Again, this only applies to PCI controllers.  We don't have problems
7993     * with the termination on 274x controllers to the best of my knowledge.
7994     */
7995    if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI)
7996    {
7997      unsigned char term_override;
7998
7999      term_override = ( (aic7xxx_override_term >> (p->instance * 4)) & 0x0f);
8000      p->adapter_control &= 
8001        ~(CFSTERM|CFWSTERM|CFLVDSTERM|CFAUTOTERM|CFSEAUTOTERM);
8002      if ( (p->features & AHC_ULTRA2) && (term_override & 0x0c) )
8003      {
8004        p->adapter_control |= CFLVDSTERM;
8005      }
8006      if (term_override & 0x02)
8007      {
8008        p->adapter_control |= CFWSTERM;
8009      }
8010      if (term_override & 0x01)
8011      {
8012        p->adapter_control |= CFSTERM;
8013      }
8014    }
8015  }
8016
8017  if ( (p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1) )
8018  {
8019    if (p->features & AHC_SPIOCAP)
8020    {
8021      if ( aic_inb(p, SPIOCAP) & SSPIOCPS )
8022      /*
8023       * Update the settings in sxfrctl1 to match the termination
8024       * settings.
8025       */
8026        configure_termination(p);
8027    }
8028    else if ((p->chip & AHC_CHIPID_MASK) >= AHC_AIC7870)
8029    {
8030      configure_termination(p);
8031    }
8032  }
8033
8034  /*
8035   * Set the SCSI Id, SXFRCTL0, SXFRCTL1, and SIMODE1, for both channels
8036   */
8037  if (p->features & AHC_TWIN)
8038  {
8039    /* Select channel B */
8040    aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8041
8042    if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8043      term = (aic_inb(p, SXFRCTL1) & STPWEN);
8044    else
8045      term = ((p->flags & AHC_TERM_ENB_B) ? STPWEN : 0);
8046
8047    aic_outb(p, p->scsi_id_b, SCSIID);
8048    scsi_conf = aic_inb(p, SCSICONF + 1);
8049    aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8050    aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | 
8051         ENSTIMER | ACTNEGEN, SXFRCTL1);
8052    aic_outb(p, 0, SIMODE0);
8053    aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8054    aic_outb(p, 0, SCSIRATE);
8055
8056    /* Select channel A */
8057    aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8058  }
8059
8060  if (p->features & AHC_ULTRA2)
8061  {
8062    aic_outb(p, p->scsi_id, SCSIID_ULTRA2);
8063  }
8064  else
8065  {
8066    aic_outb(p, p->scsi_id, SCSIID);
8067  }
8068  if ((p->flags & AHC_SEEPROM_FOUND) || (aic7xxx_override_term != -1))
8069    term = (aic_inb(p, SXFRCTL1) & STPWEN);
8070  else
8071    term = ((p->flags & (AHC_TERM_ENB_A|AHC_TERM_ENB_LVD)) ? STPWEN : 0);
8072  scsi_conf = aic_inb(p, SCSICONF);
8073  aic_outb(p, DFON | SPIOEN, SXFRCTL0);
8074  aic_outb(p, (scsi_conf & ENSPCHK) | aic7xxx_seltime | term | 
8075       ENSTIMER | ACTNEGEN, SXFRCTL1);
8076  aic_outb(p, 0, SIMODE0);
8077  /*
8078   * If we are a cardbus adapter then don't enable SCSI reset detection.
8079   * We shouldn't likely be sharing SCSI busses with someone else, and
8080   * if we don't have a cable currently plugged into the controller then
8081   * we won't have a power source for the SCSI termination, which means
8082   * we'll see infinite incoming bus resets.
8083   */
8084  if(p->flags & AHC_NO_STPWEN)
8085    aic_outb(p, ENSELTIMO | ENSCSIPERR, SIMODE1);
8086  else
8087    aic_outb(p, ENSELTIMO | ENSCSIRST | ENSCSIPERR, SIMODE1);
8088  aic_outb(p, 0, SCSIRATE);
8089  if ( p->features & AHC_ULTRA2)
8090    aic_outb(p, 0, SCSIOFFSET);
8091
8092  /*
8093   * Look at the information that board initialization or the board
8094   * BIOS has left us. In the lower four bits of each target's
8095   * scratch space any value other than 0 indicates that we should
8096   * initiate synchronous transfers. If it's zero, the user or the
8097   * BIOS has decided to disable synchronous negotiation to that
8098   * target so we don't activate the needsdtr flag.
8099   */
8100  if ((p->features & (AHC_TWIN|AHC_WIDE)) == 0)
8101  {
8102    max_targets = 8;
8103  }
8104  else
8105  {
8106    max_targets = 16;
8107  }
8108
8109  if (!(aic7xxx_no_reset))
8110  {
8111    /*
8112     * If we reset the bus, then clear the transfer settings, else leave
8113     * them be.
8114     */
8115    aic_outb(p, 0, ULTRA_ENB);
8116    aic_outb(p, 0, ULTRA_ENB + 1);
8117    p->ultraenb = 0;
8118  }
8119
8120  /*
8121   * Allocate enough hardware scbs to handle the maximum number of
8122   * concurrent transactions we can have.  We have to make sure that
8123   * the allocated memory is contiguous memory.  The Linux kmalloc
8124   * routine should only allocate contiguous memory, but note that
8125   * this could be a problem if kmalloc() is changed.
8126   */
8127  {
8128    size_t array_size;
8129    unsigned int hscb_physaddr;
8130
8131    array_size = p->scb_data->maxscbs * sizeof(struct aic7xxx_hwscb);
8132    if (p->scb_data->hscbs == NULL)
8133    {
8134      /* pci_alloc_consistent enforces the alignment already and
8135       * clears the area as well.
8136       */
8137      p->scb_data->hscbs = pci_alloc_consistent(p->pdev, array_size,
8138                                                &p->scb_data->hscbs_dma);
8139      /* We have to use pci_free_consistent, not kfree */
8140      p->scb_data->hscb_kmalloc_ptr = NULL;
8141      p->scb_data->hscbs_dma_len = array_size;
8142    }
8143    if (p->scb_data->hscbs == NULL)
8144    {
8145      printk("(scsi%d) Unable to allocate hardware SCB array; "
8146             "failing detection.\n", p->host_no);
8147      aic_outb(p, 0, SIMODE1);
8148      p->irq = 0;
8149      return(0);
8150    }
8151
8152    hscb_physaddr = p->scb_data->hscbs_dma;
8153    aic_outb(p, hscb_physaddr & 0xFF, HSCB_ADDR);
8154    aic_outb(p, (hscb_physaddr >> 8) & 0xFF, HSCB_ADDR + 1);
8155    aic_outb(p, (hscb_physaddr >> 16) & 0xFF, HSCB_ADDR + 2);
8156    aic_outb(p, (hscb_physaddr >> 24) & 0xFF, HSCB_ADDR + 3);
8157
8158    /* Set up the fifo areas at the same time */
8159    p->untagged_scbs = pci_alloc_consistent(p->pdev, 3*256, &p->fifo_dma);
8160    if (p->untagged_scbs == NULL)
8161    {
8162      printk("(scsi%d) Unable to allocate hardware FIFO arrays; "
8163             "failing detection.\n", p->host_no);
8164      p->irq = 0;
8165      return(0);
8166    }
8167
8168    p->qoutfifo = p->untagged_scbs + 256;
8169    p->qinfifo = p->qoutfifo + 256;
8170    for (i = 0; i < 256; i++)
8171    {
8172      p->untagged_scbs[i] = SCB_LIST_NULL;
8173      p->qinfifo[i] = SCB_LIST_NULL;
8174      p->qoutfifo[i] = SCB_LIST_NULL;
8175    }
8176
8177    hscb_physaddr = p->fifo_dma;
8178    aic_outb(p, hscb_physaddr & 0xFF, SCBID_ADDR);
8179    aic_outb(p, (hscb_physaddr >> 8) & 0xFF, SCBID_ADDR + 1);
8180    aic_outb(p, (hscb_physaddr >> 16) & 0xFF, SCBID_ADDR + 2);
8181    aic_outb(p, (hscb_physaddr >> 24) & 0xFF, SCBID_ADDR + 3);
8182  }
8183
8184  /* The Q-FIFOs we just set up are all empty */
8185  aic_outb(p, 0, QINPOS);
8186  aic_outb(p, 0, KERNEL_QINPOS);
8187  aic_outb(p, 0, QOUTPOS);
8188
8189  if(p->features & AHC_QUEUE_REGS)
8190  {
8191    aic_outb(p, SCB_QSIZE_256, QOFF_CTLSTA);
8192    aic_outb(p, 0, SDSCB_QOFF);
8193    aic_outb(p, 0, SNSCB_QOFF);
8194    aic_outb(p, 0, HNSCB_QOFF);
8195  }
8196
8197  /*
8198   * We don't have any waiting selections or disconnected SCBs.
8199   */
8200  aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
8201  aic_outb(p, SCB_LIST_NULL, DISCONNECTED_SCBH);
8202
8203  /*
8204   * Message out buffer starts empty
8205   */
8206  aic_outb(p, MSG_NOOP, MSG_OUT);
8207  aic_outb(p, MSG_NOOP, LAST_MSG);
8208
8209  /*
8210   * Set all the other asundry items that haven't been set yet.
8211   * This includes just dumping init values to a lot of registers simply
8212   * to make sure they've been touched and are ready for use parity wise
8213   * speaking.
8214   */
8215  aic_outb(p, 0, TMODE_CMDADDR);
8216  aic_outb(p, 0, TMODE_CMDADDR + 1);
8217  aic_outb(p, 0, TMODE_CMDADDR + 2);
8218  aic_outb(p, 0, TMODE_CMDADDR + 3);
8219  aic_outb(p, 0, TMODE_CMDADDR_NEXT);
8220
8221  /*
8222   * Link us into the list of valid hosts
8223   */
8224  p->next = first_aic7xxx;
8225  first_aic7xxx = p;
8226
8227  /*
8228   * Allocate the first set of scbs for this controller.  This is to stream-
8229   * line code elsewhere in the driver.  If we have to check for the existence
8230   * of scbs in certain code sections, it slows things down.  However, as
8231   * soon as we register the IRQ for this card, we could get an interrupt that
8232   * includes possibly the SCSI_RSTI interrupt.  If we catch that interrupt
8233   * then we are likely to segfault if we don't have at least one chunk of
8234   * SCBs allocated or add checks all through the reset code to make sure
8235   * that the SCBs have been allocated which is an invalid running condition
8236   * and therefore I think it's preferable to simply pre-allocate the first
8237   * chunk of SCBs.
8238   */
8239  aic7xxx_allocate_scb(p);
8240
8241  /*
8242   * Load the sequencer program, then re-enable the board -
8243   * resetting the AIC-7770 disables it, leaving the lights
8244   * on with nobody home.
8245   */
8246  aic7xxx_loadseq(p);
8247
8248  /*
8249   * Make sure the AUTOFLUSHDIS bit is *not* set in the SBLKCTL register
8250   */
8251  aic_outb(p, aic_inb(p, SBLKCTL) & ~AUTOFLUSHDIS, SBLKCTL);
8252
8253  if ( (p->chip & AHC_CHIPID_MASK) == AHC_AIC7770 )
8254  {
8255    aic_outb(p, ENABLE, BCTL);  /* Enable the boards BUS drivers. */
8256  }
8257
8258  if ( !(aic7xxx_no_reset) )
8259  {
8260    if (p->features & AHC_TWIN)
8261    {
8262      if (aic7xxx_verbose & VERBOSE_PROBE2)
8263        printk(KERN_INFO "(scsi%d) Resetting channel B\n", p->host_no);
8264      aic_outb(p, aic_inb(p, SBLKCTL) | SELBUSB, SBLKCTL);
8265      aic7xxx_reset_current_bus(p);
8266      aic_outb(p, aic_inb(p, SBLKCTL) & ~SELBUSB, SBLKCTL);
8267    }
8268    /* Reset SCSI bus A. */
8269    if (aic7xxx_verbose & VERBOSE_PROBE2)
8270    {  /* In case we are a 3940, 3985, or 7895, print the right channel */
8271      char *channel = "";
8272      if (p->flags & AHC_MULTI_CHANNEL)
8273      {
8274        channel = " A";
8275        if (p->flags & (AHC_CHNLB|AHC_CHNLC))
8276          channel = (p->flags & AHC_CHNLB) ? " B" : " C";
8277      }
8278      printk(KERN_INFO "(scsi%d) Resetting channel%s\n", p->host_no, channel);
8279    }
8280    
8281    aic7xxx_reset_current_bus(p);
8282
8283  }
8284  else
8285  {
8286    if (!reset_delay)
8287    {
8288      printk(KERN_INFO "(scsi%d) Not resetting SCSI bus.  Note: Don't use "
8289             "the no_reset\n", p->host_no);
8290      printk(KERN_INFO "(scsi%d) option unless you have a verifiable need "
8291             "for it.\n", p->host_no);
8292    }
8293  }
8294  
8295  /*
8296   * Register IRQ with the kernel.  Only allow sharing IRQs with
8297   * PCI devices.
8298   */
8299  if (!(p->chip & AHC_PCI))
8300  {
8301    result = (request_irq(p->irq, do_aic7xxx_isr, 0, "aic7xxx", p));
8302  }
8303  else
8304  {
8305    result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_SHARED,
8306              "aic7xxx", p));
8307    if (result < 0)
8308    {
8309      result = (request_irq(p->irq, do_aic7xxx_isr, IRQF_DISABLED | IRQF_SHARED,
8310              "aic7xxx", p));
8311    }
8312  }
8313  if (result < 0)
8314  {
8315    printk(KERN_WARNING "(scsi%d) Couldn't register IRQ %d, ignoring "
8316           "controller.\n", p->host_no, p->irq);
8317    aic_outb(p, 0, SIMODE1);
8318    p->irq = 0;
8319    return (0);
8320  }
8321
8322  if(aic_inb(p, INTSTAT) & INT_PEND)
8323    printk(INFO_LEAD "spurious interrupt during configuration, cleared.\n",
8324      p->host_no, -1, -1 , -1);
8325  aic7xxx_clear_intstat(p);
8326
8327  unpause_sequencer(p, /* unpause_always */ TRUE);
8328
8329  return (found);
8330}
8331
8332/*+F*************************************************************************
8333 * Function:
8334 *   aic7xxx_chip_reset
8335 *
8336 * Description:
8337 *   Perform a chip reset on the aic7xxx SCSI controller.  The controller
8338 *   is paused upon return.
8339 *-F*************************************************************************/
8340static int
8341aic7xxx_chip_reset(struct aic7xxx_host *p)
8342{
8343  unsigned char sblkctl;
8344  int wait;
8345
8346  /*
8347   * For some 274x boards, we must clear the CHIPRST bit and pause
8348   * the sequencer. For some reason, this makes the driver work.
8349   */
8350  aic_outb(p, PAUSE | CHIPRST, HCNTRL);
8351
8352  /*
8353   * In the future, we may call this function as a last resort for
8354   * error handling.  Let's be nice and not do any unnecessary delays.
8355   */
8356  wait = 1000;  /* 1 msec (1000 * 1 msec) */
8357  while (--wait && !(aic_inb(p, HCNTRL) & CHIPRSTACK))
8358  {
8359    udelay(1);  /* 1 usec */
8360  }
8361
8362  pause_sequencer(p);
8363
8364  sblkctl = aic_inb(p, SBLKCTL) & (SELBUSB|SELWIDE);
8365  if (p->chip & AHC_PCI)
8366    sblkctl &= ~SELBUSB;
8367  switch( sblkctl )
8368  {
8369    case 0:  /* normal narrow card */
8370      break;
8371    case 2:  /* Wide card */
8372      p->features |= AHC_WIDE;
8373      break;
8374    case 8:  /* Twin card */
8375      p->features |= AHC_TWIN;
8376      p->flags |= AHC_MULTI_CHANNEL;
8377      break;
8378    default: /* hmmm...we don't know what this is */
8379      printk(KERN_WARNING "aic7xxx: Unsupported adapter type %d, ignoring.\n",
8380        aic_inb(p, SBLKCTL) & 0x0a);
8381      return(-1);
8382  }
8383  return(0);
8384}
8385
8386/*+F*************************************************************************
8387 * Function:
8388 *   aic7xxx_alloc
8389 *
8390 * Description:
8391 *   Allocate and initialize a host structure.  Returns NULL upon error
8392 *   and a pointer to a aic7xxx_host struct upon success.
8393 *-F*************************************************************************/
8394static struct aic7xxx_host *
8395aic7xxx_alloc(struct scsi_host_template *sht, struct aic7xxx_host *temp)
8396{
8397  struct aic7xxx_host *p = NULL;
8398  struct Scsi_Host *host;
8399
8400  /*
8401   * Allocate a storage area by registering us with the mid-level
8402   * SCSI layer.
8403   */
8404  host = scsi_register(sht, sizeof(struct aic7xxx_host));
8405
8406  if (host != NULL)
8407  {
8408    p = (struct aic7xxx_host *) host->hostdata;
8409    memset(p, 0, sizeof(struct aic7xxx_host));
8410    *p = *temp;
8411    p->host = host;
8412
8413    p->scb_data = kzalloc(sizeof(scb_data_type), GFP_ATOMIC);
8414    if (p->scb_data)
8415    {
8416      scbq_init (&p->scb_data->free_scbs);
8417    }
8418    else
8419    {
8420      /*
8421       * For some reason we don't have enough memory.  Free the
8422       * allocated memory for the aic7xxx_host struct, and return NULL.
8423       */
8424      release_region(p->base, MAXREG - MINREG);
8425      scsi_unregister(host);
8426      return(NULL);
8427    }
8428    p->host_no = host->host_no;
8429  }
8430  return (p);
8431}
8432
8433/*+F*************************************************************************
8434 * Function:
8435 *   aic7xxx_free
8436 *
8437 * Description:
8438 *   Frees and releases all resources associated with an instance of
8439 *   the driver (struct aic7xxx_host *).
8440 *-F*************************************************************************/
8441static void
8442aic7xxx_free(struct aic7xxx_host *p)
8443{
8444  int i;
8445
8446  /*
8447   * Free the allocated hardware SCB space.
8448   */
8449  if (p->scb_data != NULL)
8450  {
8451    struct aic7xxx_scb_dma *scb_dma = NULL;
8452    if (p->scb_data->hscbs != NULL)
8453    {
8454      pci_free_consistent(p->pdev, p->scb_data->hscbs_dma_len,
8455                          p->scb_data->hscbs, p->scb_data->hscbs_dma);
8456      p->scb_data->hscbs = p->scb_data->hscb_kmalloc_ptr = NULL;
8457    }
8458    /*
8459     * Free the driver SCBs.  These were allocated on an as-need
8460     * basis.  We allocated these in groups depending on how many
8461     * we could fit into a given amount of RAM.  The tail SCB for
8462     * these allocations has a pointer to the alloced area.
8463     */
8464    for (i = 0; i < p->scb_data->numscbs; i++)
8465    {
8466      if (p->scb_data->scb_array[i]->scb_dma != scb_dma)
8467      {
8468        scb_dma = p->scb_data->scb_array[i]->scb_dma;
8469        pci_free_consistent(p->pdev, scb_dma->dma_len,
8470                            (void *)((unsigned long)scb_dma->dma_address
8471                                     - scb_dma->dma_offset),
8472                            scb_dma->dma_address);
8473      }
8474      kfree(p->scb_data->scb_array[i]->kmalloc_ptr);
8475      p->scb_data->scb_array[i] = NULL;
8476    }
8477  
8478    /*
8479     * Free the SCB data area.
8480     */
8481    kfree(p->scb_data);
8482  }
8483
8484  pci_free_consistent(p->pdev, 3*256, (void *)p->untagged_scbs, p->fifo_dma);
8485}
8486
8487/*+F*************************************************************************
8488 * Function:
8489 *   aic7xxx_load_seeprom
8490 *
8491 * Description:
8492 *   Load the seeprom and configure adapter and target settings.
8493 *   Returns 1 if the load was successful and 0 otherwise.
8494 *-F*************************************************************************/
8495static void
8496aic7xxx_load_seeprom(struct aic7xxx_host *p, unsigned char *sxfrctl1)
8497{
8498  int have_seeprom = 0;
8499  int i, max_targets, mask;
8500  unsigned char scsirate, scsi_conf;
8501  unsigned short scarray[128];
8502  struct seeprom_config *sc = (struct seeprom_config *) scarray;
8503
8504  if (aic7xxx_verbose & VERBOSE_PROBE2)
8505  {
8506    printk(KERN_INFO "aic7xxx: Loading serial EEPROM...");
8507  }
8508  switch (p->chip)
8509  {
8510    case (AHC_AIC7770|AHC_EISA):  /* None of these adapters have seeproms. */
8511      if (aic_inb(p, SCSICONF) & TERM_ENB)
8512        p->flags |= AHC_TERM_ENB_A;
8513      if ( (p->features & AHC_TWIN) && (aic_inb(p, SCSICONF + 1) & TERM_ENB) )
8514        p->flags |= AHC_TERM_ENB_B;
8515      break;
8516
8517    case (AHC_AIC7770|AHC_VL):
8518      have_seeprom = read_284x_seeprom(p, (struct seeprom_config *) scarray);
8519      break;
8520
8521    default:
8522      have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8523                                  scarray, p->sc_size, p->sc_type);
8524      if (!have_seeprom)
8525      {
8526        if(p->sc_type == C46)
8527          have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8528                                      scarray, p->sc_size, C56_66);
8529        else
8530          have_seeprom = read_seeprom(p, (p->flags & (AHC_CHNLB|AHC_CHNLC)),
8531                                      scarray, p->sc_size, C46);
8532      }
8533      if (!have_seeprom)
8534      {
8535        p->sc_size = 128;
8536        have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
8537                                    scarray, p->sc_size, p->sc_type);
8538        if (!have_seeprom)
8539        {
8540          if(p->sc_type == C46)
8541            have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
8542                                        scarray, p->sc_size, C56_66);
8543          else
8544            have_seeprom = read_seeprom(p, 4*(p->flags & (AHC_CHNLB|AHC_CHNLC)),
8545                                        scarray, p->sc_size, C46);
8546        }
8547      }
8548      break;
8549  }
8550
8551  if (!have_seeprom)
8552  {
8553    if (aic7xxx_verbose & VERBOSE_PROBE2)
8554    {
8555      printk("\naic7xxx: No SEEPROM available.\n");
8556    }
8557    p->flags |= AHC_NEWEEPROM_FMT;
8558    if (aic_inb(p, SCSISEQ) == 0)
8559    {
8560      p->flags |= AHC_USEDEFAULTS;
8561      p->flags &= ~AHC_BIOS_ENABLED;
8562      p->scsi_id = p->scsi_id_b = 7;
8563      *sxfrctl1 |= STPWEN;
8564      if (aic7xxx_verbose & VERBOSE_PROBE2)
8565      {
8566        printk("aic7xxx: Using default values.\n");
8567      }
8568    }
8569    else if (aic7xxx_verbose & VERBOSE_PROBE2)
8570    {
8571      printk("aic7xxx: Using leftover BIOS values.\n");
8572    }
8573    if ( ((p->chip & ~AHC_CHIPID_MASK) == AHC_PCI) && (*sxfrctl1 & STPWEN) )
8574    {
8575      p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
8576      sc->adapter_control &= ~CFAUTOTERM;
8577      sc->adapter_control |= CFSTERM | CFWSTERM | CFLVDSTERM;
8578    }
8579    if (aic7xxx_extended)
8580      p->flags |= (AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
8581    else
8582      p->flags &= ~(AHC_EXTEND_TRANS_A | AHC_EXTEND_TRANS_B);
8583  }
8584  else
8585  {
8586    if (aic7xxx_verbose & VERBOSE_PROBE2)
8587    {
8588      printk("done\n");
8589    }
8590
8591    /*
8592     * Note things in our flags
8593     */
8594    p->flags |= AHC_SEEPROM_FOUND;
8595
8596    /*
8597     * Update the settings in sxfrctl1 to match the termination settings.
8598     */
8599    *sxfrctl1 = 0;
8600
8601    /*
8602     * Get our SCSI ID from the SEEPROM setting...
8603     */
8604    p->scsi_id = (sc->brtime_id & CFSCSIID);
8605
8606    /*
8607     * First process the settings that are different between the VLB
8608     * and PCI adapter seeproms.
8609     */
8610    if ((p->chip & AHC_CHIPID_MASK) == AHC_AIC7770)
8611    {
8612      /* VLB adapter seeproms */
8613      if (sc->bios_control & CF284XEXTEND)
8614        p->flags |= AHC_EXTEND_TRANS_A;
8615
8616      if (sc->adapter_control & CF284XSTERM)
8617      {
8618        *sxfrctl1 |= STPWEN;
8619        p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
8620      }
8621    }
8622    else
8623    {
8624      /* PCI adapter seeproms */
8625      if (sc->bios_control & CFEXTEND)
8626        p->flags |= AHC_EXTEND_TRANS_A;
8627      if (sc->bios_control & CFBIOSEN)
8628        p->flags |= AHC_BIOS_ENABLED;
8629      else
8630        p->flags &= ~AHC_BIOS_ENABLED;
8631
8632      if (sc->adapter_control & CFSTERM)
8633      {
8634        *sxfrctl1 |= STPWEN;
8635        p->flags |= AHC_TERM_ENB_SE_LOW | AHC_TERM_ENB_SE_HIGH;
8636      }
8637    }
8638    memcpy(&p->sc, sc, sizeof(struct seeprom_config));
8639  }
8640
8641  p->discenable = 0;
8642
8643  /*
8644   * Limit to 16 targets just in case.  The 2842 for one is known to
8645   * blow the max_targets setting, future cards might also.
8646   */
8647  max_targets = ((p->features & (AHC_TWIN | AHC_WIDE)) ? 16 : 8);
8648
8649  if (have_seeprom)
8650  {
8651    for (i = 0; i < max_targets; i++)
8652    {
8653      if( ((p->features & AHC_ULTRA) &&
8654          !(sc->adapter_control & CFULTRAEN) &&
8655           (sc->device_flags[i] & CFSYNCHISULTRA)) ||
8656          (sc->device_flags[i] & CFNEWULTRAFORMAT) )
8657      {
8658        p->flags |= AHC_NEWEEPROM_FMT;
8659        break;
8660      }
8661    }
8662  }
8663
8664  for (i = 0; i < max_targets; i++)
8665  {
8666    mask = (0x01 << i);
8667    if (!have_seeprom)
8668    {
8669      if (aic_inb(p, SCSISEQ) != 0)
8670      {
8671        /*
8672         * OK...the BIOS set things up and left behind the settings we need.
8673         * Just make our sc->device_flags[i] entry match what the card has
8674         * set for this device.
8675         */
8676        p->discenable =
8677          ~(aic_inb(p, DISC_DSB) | (aic_inb(p, DISC_DSB + 1) << 8) );
8678        p->ultraenb =
8679          (aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8) );
8680        sc->device_flags[i] = (p->discenable & mask) ? CFDISC : 0;
8681        if (aic_inb(p, TARG_SCSIRATE + i) & WIDEXFER)
8682          sc->device_flags[i] |= CFWIDEB;
8683        if (p->features & AHC_ULTRA2)
8684        {
8685          if (aic_inb(p, TARG_OFFSET + i))
8686          {
8687            sc->device_flags[i] |= CFSYNCH;
8688            sc->device_flags[i] |= (aic_inb(p, TARG_SCSIRATE + i) & 0x07);
8689            if ( (aic_inb(p, TARG_SCSIRATE + i) & 0x18) == 0x18 )
8690              sc->device_flags[i] |= CFSYNCHISULTRA;
8691          }
8692        }
8693        else
8694        {
8695          if (aic_inb(p, TARG_SCSIRATE + i) & ~WIDEXFER)
8696          {
8697            sc->device_flags[i] |= CFSYNCH;
8698            if (p->features & AHC_ULTRA)
8699              sc->device_flags[i] |= ((p->ultraenb & mask) ?
8700                                      CFSYNCHISULTRA : 0);
8701          }
8702        }
8703      }
8704      else
8705      {
8706        /*
8707         * Assume the BIOS has NOT been run on this card and nothing between
8708         * the card and the devices is configured yet.
8709         */
8710        sc->device_flags[i] = CFDISC;
8711        if (p->features & AHC_WIDE)
8712          sc->device_flags[i] |= CFWIDEB;
8713        if (p->features & AHC_ULTRA3)
8714          sc->device_flags[i] |= 2;
8715        else if (p->features & AHC_ULTRA2)
8716          sc->device_flags[i] |= 3;
8717        else if (p->features & AHC_ULTRA)
8718          sc->device_flags[i] |= CFSYNCHISULTRA;
8719        sc->device_flags[i] |= CFSYNCH;
8720        aic_outb(p, 0, TARG_SCSIRATE + i);
8721        if (p->features & AHC_ULTRA2)
8722          aic_outb(p, 0, TARG_OFFSET + i);
8723      }
8724    }
8725    if (sc->device_flags[i] & CFDISC)
8726    {
8727      p->discenable |= mask;
8728    }
8729    if (p->flags & AHC_NEWEEPROM_FMT)
8730    {
8731      if ( !(p->features & AHC_ULTRA2) )
8732      {
8733        /*
8734         * I know of two different Ultra BIOSes that do this differently.
8735         * One on the Gigabyte 6BXU mb that wants flags[i] & CFXFER to
8736         * be == to 0x03 and SYNCHISULTRA to be true to mean 40MByte/s
8737         * while on the IBM Netfinity 5000 they want the same thing
8738         * to be something else, while flags[i] & CFXFER == 0x03 and
8739         * SYNCHISULTRA false should be 40MByte/s.  So, we set both to
8740         * 40MByte/s and the lower speeds be damned.  People will have
8741         * to select around the conversely mapped lower speeds in order
8742         * to select lower speeds on these boards.
8743         */
8744        if ( (sc->device_flags[i] & CFNEWULTRAFORMAT) &&
8745            ((sc->device_flags[i] & CFXFER) == 0x03) )
8746        {
8747          sc->device_flags[i] &= ~CFXFER;
8748          sc->device_flags[i] |= CFSYNCHISULTRA;
8749        }
8750        if (sc->device_flags[i] & CFSYNCHISULTRA)
8751        {
8752          p->ultraenb |= mask;
8753        }
8754      }
8755      else if ( !(sc->device_flags[i] & CFNEWULTRAFORMAT) &&
8756                 (p->features & AHC_ULTRA2) &&
8757                 (sc->device_flags[i] & CFSYNCHISULTRA) )
8758      {
8759        p->ultraenb |= mask;
8760      }
8761    }
8762    else if (sc->adapter_control & CFULTRAEN)
8763    {
8764      p->ultraenb |= mask;
8765    }
8766    if ( (sc->device_flags[i] & CFSYNCH) == 0)
8767    {
8768      sc->device_flags[i] &= ~CFXFER;
8769      p->ultraenb &= ~mask;
8770      p->user[i].offset = 0;
8771      p->user[i].period = 0;
8772      p->user[i].options = 0;
8773    }
8774    else
8775    {
8776      if (p->features & AHC_ULTRA3)
8777      {
8778        p->user[i].offset = MAX_OFFSET_ULTRA2;
8779        if( (sc->device_flags[i] & CFXFER) < 0x03 )
8780        {
8781          scsirate = (sc->device_flags[i] & CFXFER);
8782          p->user[i].options = MSG_EXT_PPR_OPTION_DT_CRC;
8783        }
8784        else
8785        {
8786          scsirate = (sc->device_flags[i] & CFXFER) |
8787                     ((p->ultraenb & mask) ? 0x18 : 0x10);
8788          p->user[i].options = 0;
8789        }
8790        p->user[i].period = aic7xxx_find_period(p, scsirate,
8791                                       AHC_SYNCRATE_ULTRA3);
8792      }
8793      else if (p->features & AHC_ULTRA2)
8794      {
8795        p->user[i].offset = MAX_OFFSET_ULTRA2;
8796        scsirate = (sc->device_flags[i] & CFXFER) |
8797                   ((p->ultraenb & mask) ? 0x18 : 0x10);
8798        p->user[i].options = 0;
8799        p->user[i].period = aic7xxx_find_period(p, scsirate,
8800                                       AHC_SYNCRATE_ULTRA2);
8801      }
8802      else
8803      {
8804        scsirate = (sc->device_flags[i] & CFXFER) << 4;
8805        p->user[i].options = 0;
8806        p->user[i].offset = MAX_OFFSET_8BIT;
8807        if (p->features & AHC_ULTRA)
8808        {
8809          short ultraenb;
8810          ultraenb = aic_inb(p, ULTRA_ENB) |
8811            (aic_inb(p, ULTRA_ENB + 1) << 8);
8812          p->user[i].period = aic7xxx_find_period(p, scsirate,
8813                                          (p->ultraenb & mask) ?
8814                                          AHC_SYNCRATE_ULTRA :
8815                                          AHC_SYNCRATE_FAST);
8816        }
8817        else
8818          p->user[i].period = aic7xxx_find_period(p, scsirate,
8819                                          AHC_SYNCRATE_FAST);
8820      }
8821    }
8822    if ( (sc->device_flags[i] & CFWIDEB) && (p->features & AHC_WIDE) )
8823    {
8824      p->user[i].width = MSG_EXT_WDTR_BUS_16_BIT;
8825    }
8826    else
8827    {
8828      p->user[i].width = MSG_EXT_WDTR_BUS_8_BIT;
8829    }
8830  }
8831  aic_outb(p, ~(p->discenable & 0xFF), DISC_DSB);
8832  aic_outb(p, ~((p->discenable >> 8) & 0xFF), DISC_DSB + 1);
8833
8834  /*
8835   * We set the p->ultraenb from the SEEPROM to begin with, but now we make
8836   * it match what is already down in the card.  If we are doing a reset
8837   * on the card then this will get put back to a default state anyway.
8838   * This allows us to not have to pre-emptively negotiate when using the
8839   * no_reset option.
8840   */
8841  if (p->features & AHC_ULTRA)
8842    p->ultraenb = aic_inb(p, ULTRA_ENB) | (aic_inb(p, ULTRA_ENB + 1) << 8);
8843
8844  
8845  scsi_conf = (p->scsi_id & HSCSIID);
8846
8847  if(have_seeprom)
8848  {
8849    p->adapter_control = sc->adapter_control;
8850    p->bios_control = sc->bios_control;
8851
8852    switch (p->chip & AHC_CHIPID_MASK)
8853    {
8854      case AHC_AIC7895:
8855      case AHC_AIC7896:
8856      case AHC_AIC7899:
8857        if (p->adapter_control & CFBPRIMARY)
8858          p->flags |= AHC_CHANNEL_B_PRIMARY;
8859      default:
8860        break;
8861    }
8862
8863    if (sc->adapter_control & CFSPARITY)
8864      scsi_conf |= ENSPCHK;
8865  }
8866  else
8867  {
8868    scsi_conf |= ENSPCHK | RESET_SCSI;
8869  }
8870
8871  /*
8872   * Only set the SCSICONF and SCSICONF + 1 registers if we are a PCI card.
8873   * The 2842 and 2742 cards already have these registers set and we don't
8874   * want to muck with them since we don't set all the bits they do.
8875   */
8876  if ( (p->chip & ~AHC_CHIPID_MASK) == AHC_PCI )
8877  {
8878    /* Set the host ID */
8879    aic_outb(p, scsi_conf, SCSICONF);
8880    /* In case we are a wide card */
8881    aic_outb(p, p->scsi_id, SCSICONF + 1);
8882  }
8883}
8884
8885/*+F*************************************************************************
8886 * Function:
8887 *   aic7xxx_configure_bugs
8888 *
8889 * Description:
8890 *   Take the card passed in and set the appropriate bug flags based upon
8891 *   the card model.  Also make any changes needed to device registers or
8892 *   PCI registers while we are here.
8893 *-F*************************************************************************/
8894static void
8895aic7xxx_configure_bugs(struct aic7xxx_host *p)
8896{
8897  unsigned short tmp_word;
8898 
8899  switch(p->chip & AHC_CHIPID_MASK)
8900  {
8901    case AHC_AIC7860:
8902      p->bugs |= AHC_BUG_PCI_2_1_RETRY;
8903      /* fall through */
8904    case AHC_AIC7850:
8905    case AHC_AIC7870:
8906      p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
8907      break;
8908    case AHC_AIC7880:
8909      p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
8910                 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
8911      break;
8912    case AHC_AIC7890:
8913      p->bugs |= AHC_BUG_AUTOFLUSH | AHC_BUG_CACHETHEN;
8914      break;
8915    case AHC_AIC7892:
8916      p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
8917      break;
8918    case AHC_AIC7895:
8919      p->bugs |= AHC_BUG_TMODE_WIDEODD | AHC_BUG_PCI_2_1_RETRY |
8920                 AHC_BUG_CACHETHEN | AHC_BUG_PCI_MWI;
8921      break;
8922    case AHC_AIC7896:
8923      p->bugs |= AHC_BUG_CACHETHEN_DIS;
8924      break;
8925    case AHC_AIC7899:
8926      p->bugs |= AHC_BUG_SCBCHAN_UPLOAD;
8927      break;
8928    default:
8929      /* Nothing to do */
8930      break;
8931  }
8932
8933  /*
8934   * Now handle the bugs that require PCI register or card register tweaks
8935   */
8936  pci_read_config_word(p->pdev, PCI_COMMAND, &tmp_word);
8937  if(p->bugs & AHC_BUG_PCI_MWI)
8938  {
8939    tmp_word &= ~PCI_COMMAND_INVALIDATE;
8940  }
8941  else
8942  {
8943    tmp_word |= PCI_COMMAND_INVALIDATE;
8944  }
8945  pci_write_config_word(p->pdev, PCI_COMMAND, tmp_word);
8946
8947  if(p->bugs & AHC_BUG_CACHETHEN)
8948  {
8949    aic_outb(p, aic_inb(p, DSCOMMAND0) & ~CACHETHEN, DSCOMMAND0);
8950  }
8951  else if (p->bugs & AHC_BUG_CACHETHEN_DIS)
8952  {
8953    aic_outb(p, aic_inb(p, DSCOMMAND0) | CACHETHEN, DSCOMMAND0);
8954  }
8955
8956  return;
8957}
8958
8959
8960/*+F*************************************************************************
8961 * Function:
8962 *   aic7xxx_detect
8963 *
8964 * Description:
8965 *   Try to detect and register an Adaptec 7770 or 7870 SCSI controller.
8966 *
8967 * XXX - This should really be called aic7xxx_probe().  A sequence of
8968 *       probe(), attach()/detach(), and init() makes more sense than
8969 *       one do-it-all function.  This may be useful when (and if) the
8970 *       mid-level SCSI code is overhauled.
8971 *-F*************************************************************************/
8972static int
8973aic7xxx_detect(struct scsi_host_template *template)
8974{
8975  struct aic7xxx_host *temp_p = NULL;
8976  struct aic7xxx_host *current_p = NULL;
8977  struct aic7xxx_host *list_p = NULL;
8978  int found = 0;
8979#if defined(__i386__) || defined(__alpha__)
8980  ahc_flag_type flags = 0;
8981  int type;
8982#endif
8983  unsigned char sxfrctl1;
8984#if defined(__i386__) || defined(__alpha__)
8985  unsigned char hcntrl, hostconf;
8986  unsigned int slot, base;
8987#endif
8988
8989#ifdef MODULE
8990  /*
8991   * If we are called as a module, the aic7xxx pointer may not be null
8992   * and it would point to our bootup string, just like on the lilo
8993   * command line.  IF not NULL, then process this config string with
8994   * aic7xxx_setup
8995   */
8996  if(aic7xxx)
8997    aic7xxx_setup(aic7xxx);
8998#endif
8999
9000  template->proc_name = "aic7xxx";
9001  template->sg_tablesize = AIC7XXX_MAX_SG;
9002
9003
9004#ifdef CONFIG_PCI
9005  /*
9006   * PCI-bus probe.
9007   */
9008  {
9009    static struct
9010    {
9011      unsigned short      vendor_id;
9012      unsigned short      device_id;
9013      ahc_chip            chip;
9014      ahc_flag_type       flags;
9015      ahc_feature         features;
9016      int                 board_name_index;
9017      unsigned short      seeprom_size;
9018      unsigned short      seeprom_type;
9019    } const aic_pdevs[] = {
9020      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7810, AHC_NONE,
9021       AHC_FNONE, AHC_FENONE,                                1,
9022       32, C46 },
9023      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7850, AHC_AIC7850,
9024       AHC_PAGESCBS, AHC_AIC7850_FE,                         5,
9025       32, C46 },
9026      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7855, AHC_AIC7850,
9027       AHC_PAGESCBS, AHC_AIC7850_FE,                         6,
9028       32, C46 },
9029      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7821, AHC_AIC7860,
9030       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9031       AHC_AIC7860_FE,                                       7,
9032       32, C46 },
9033      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_3860, AHC_AIC7860,
9034       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9035       AHC_AIC7860_FE,                                       7,
9036       32, C46 },
9037      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9038       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9039       AHC_AIC7860_FE,                                       7,
9040       32, C46 },
9041      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_38602, AHC_AIC7860,
9042       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9043       AHC_AIC7860_FE,                                       7,
9044       32, C46 },
9045      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7860, AHC_AIC7860,
9046       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9047       AHC_AIC7860_FE,                                       7,
9048       32, C46 },
9049      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7861, AHC_AIC7860,
9050       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9051       AHC_AIC7860_FE,                                       8,
9052       32, C46 },
9053      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7870, AHC_AIC7870,
9054       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9055       AHC_AIC7870_FE,                                       9,
9056       32, C46 },
9057      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7871, AHC_AIC7870,
9058       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE,     10,
9059       32, C46 },
9060      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7872, AHC_AIC7870,
9061       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9062       AHC_AIC7870_FE,                                      11,
9063       32, C56_66 },
9064      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7873, AHC_AIC7870,
9065       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9066       AHC_AIC7870_FE,                                      12,
9067       32, C56_66 },
9068      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7874, AHC_AIC7870,
9069       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7870_FE,     13,
9070       32, C46 },
9071      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7880, AHC_AIC7880,
9072       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MOTHERBOARD,
9073       AHC_AIC7880_FE,                                      14,
9074       32, C46 },
9075      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7881, AHC_AIC7880,
9076       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE,     15,
9077       32, C46 },
9078      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7882, AHC_AIC7880,
9079       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9080       AHC_AIC7880_FE,                                      16,
9081       32, C56_66 },
9082      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7883, AHC_AIC7880,
9083       AHC_PAGESCBS | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9084       AHC_AIC7880_FE,                                      17,
9085       32, C56_66 },
9086      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7884, AHC_AIC7880,
9087       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE,     18,
9088       32, C46 },
9089      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7885, AHC_AIC7880,
9090       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE,     18,
9091       32, C46 },
9092      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7886, AHC_AIC7880,
9093       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE,     18,
9094       32, C46 },
9095      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7887, AHC_AIC7880,
9096       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE | AHC_NEW_AUTOTERM, 19,
9097       32, C46 },
9098      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7888, AHC_AIC7880,
9099       AHC_PAGESCBS | AHC_BIOS_ENABLED, AHC_AIC7880_FE,     18,
9100       32, C46 },
9101      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_7895, AHC_AIC7895,
9102       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9103       AHC_AIC7895_FE,                                      20,
9104       32, C56_66 },
9105      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890, AHC_AIC7890,
9106       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9107       AHC_AIC7890_FE,                                      21,
9108       32, C46 },
9109      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7890B, AHC_AIC7890,
9110       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9111       AHC_AIC7890_FE,                                      21,
9112       32, C46 },
9113      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2930U2, AHC_AIC7890,
9114       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9115       AHC_AIC7890_FE,                                      22,
9116       32, C46 },
9117      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_2940U2, AHC_AIC7890,
9118       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9119       AHC_AIC7890_FE,                                      23,
9120       32, C46 },
9121      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7896, AHC_AIC7896,
9122       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9123       AHC_AIC7896_FE,                                      24,
9124       32, C56_66 },
9125      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3940U2, AHC_AIC7896,
9126       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9127       AHC_AIC7896_FE,                                      25,
9128       32, C56_66 },
9129      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_3950U2D, AHC_AIC7896,
9130       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9131       AHC_AIC7896_FE,                                      26,
9132       32, C56_66 },
9133      {PCI_VENDOR_ID_ADAPTEC, PCI_DEVICE_ID_ADAPTEC_1480A, AHC_AIC7860,
9134       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_NO_STPWEN,
9135       AHC_AIC7860_FE,                                      27,
9136       32, C46 },
9137      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892A, AHC_AIC7892,
9138       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9139       AHC_AIC7892_FE,                                      28,
9140       32, C46 },
9141      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892B, AHC_AIC7892,
9142       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9143       AHC_AIC7892_FE,                                      28,
9144       32, C46 },
9145      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892D, AHC_AIC7892,
9146       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9147       AHC_AIC7892_FE,                                      28,
9148       32, C46 },
9149      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7892P, AHC_AIC7892,
9150       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED,
9151       AHC_AIC7892_FE,                                      28,
9152       32, C46 },
9153      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899A, AHC_AIC7899,
9154       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9155       AHC_AIC7899_FE,                                      29,
9156       32, C56_66 },
9157      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899B, AHC_AIC7899,
9158       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9159       AHC_AIC7899_FE,                                      29,
9160       32, C56_66 },
9161      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899D, AHC_AIC7899,
9162       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9163       AHC_AIC7899_FE,                                      29,
9164       32, C56_66 },
9165      {PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_7899P, AHC_AIC7899,
9166       AHC_PAGESCBS | AHC_NEWEEPROM_FMT | AHC_BIOS_ENABLED | AHC_MULTI_CHANNEL,
9167       AHC_AIC7899_FE,                                      29,
9168       32, C56_66 },
9169    };
9170
9171    unsigned short command;
9172    unsigned int  devconfig, i, oldverbose;
9173    struct pci_dev *pdev = NULL;
9174
9175    for (i = 0; i < ARRAY_SIZE(aic_pdevs); i++)
9176    {
9177      pdev = NULL;
9178      while ((pdev = pci_get_device(aic_pdevs[i].vendor_id,
9179                                     aic_pdevs[i].device_id,
9180                                     pdev))) {
9181        if (pci_enable_device(pdev))
9182                continue;
9183        if ( i == 0 ) /* We found one, but it's the 7810 RAID cont. */
9184        {
9185          if (aic7xxx_verbose & (VERBOSE_PROBE|VERBOSE_PROBE2))
9186          {
9187            printk(KERN_INFO "aic7xxx: The 7810 RAID controller is not "
9188              "supported by\n");
9189            printk(KERN_INFO "         this driver, we are ignoring it.\n");
9190          }
9191        }
9192        else if ( (temp_p = kzalloc(sizeof(struct aic7xxx_host),
9193                                    GFP_ATOMIC)) != NULL )
9194        {
9195          temp_p->chip = aic_pdevs[i].chip | AHC_PCI;
9196          temp_p->flags = aic_pdevs[i].flags;
9197          temp_p->features = aic_pdevs[i].features;
9198          temp_p->board_name_index = aic_pdevs[i].board_name_index;
9199          temp_p->sc_size = aic_pdevs[i].seeprom_size;
9200          temp_p->sc_type = aic_pdevs[i].seeprom_type;
9201
9202          /*
9203           * Read sundry information from PCI BIOS.
9204           */
9205          temp_p->irq = pdev->irq;
9206          temp_p->pdev = pdev;
9207          temp_p->pci_bus = pdev->bus->number;
9208          temp_p->pci_device_fn = pdev->devfn;
9209          temp_p->base = pci_resource_start(pdev, 0);
9210          temp_p->mbase = pci_resource_start(pdev, 1);
9211          current_p = list_p;
9212          while(current_p && temp_p)
9213          {
9214            if ( ((current_p->pci_bus == temp_p->pci_bus) &&
9215                  (current_p->pci_device_fn == temp_p->pci_device_fn)) ||
9216                 (temp_p->base && (current_p->base == temp_p->base)) ||
9217                 (temp_p->mbase && (current_p->mbase == temp_p->mbase)) )
9218            {
9219              /* duplicate PCI entry, skip it */
9220              kfree(temp_p);
9221              temp_p = NULL;
9222              continue;
9223            }
9224            current_p = current_p->next;
9225          }
9226          if(pci_request_regions(temp_p->pdev, "aic7xxx"))
9227          {
9228            printk("aic7xxx: <%s> at PCI %d/%d/%d\n", 
9229              board_names[aic_pdevs[i].board_name_index],
9230              temp_p->pci_bus,
9231              PCI_SLOT(temp_p->pci_device_fn),
9232              PCI_FUNC(temp_p->pci_device_fn));
9233            printk("aic7xxx: I/O ports already in use, ignoring.\n");
9234            kfree(temp_p);
9235            continue;
9236          }
9237
9238          if (aic7xxx_verbose & VERBOSE_PROBE2)
9239            printk("aic7xxx: <%s> at PCI %d/%d\n", 
9240              board_names[aic_pdevs[i].board_name_index],
9241              PCI_SLOT(pdev->devfn),
9242              PCI_FUNC(pdev->devfn));
9243          pci_read_config_word(pdev, PCI_COMMAND, &command);
9244          if (aic7xxx_verbose & VERBOSE_PROBE2)
9245          {
9246            printk("aic7xxx: Initial PCI_COMMAND value was 0x%x\n",
9247              (int)command);
9248          }
9249#ifdef AIC7XXX_STRICT_PCI_SETUP
9250          command |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY |
9251            PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9252#else
9253          command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
9254#endif
9255          command &= ~PCI_COMMAND_INVALIDATE;
9256          if (aic7xxx_pci_parity == 0)
9257            command &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
9258          pci_write_config_word(pdev, PCI_COMMAND, command);
9259#ifdef AIC7XXX_STRICT_PCI_SETUP
9260          pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9261          if (aic7xxx_verbose & VERBOSE_PROBE2)
9262          {
9263            printk("aic7xxx: Initial DEVCONFIG value was 0x%x\n", devconfig);
9264          }
9265          devconfig |= 0x80000040;
9266          pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9267#endif /* AIC7XXX_STRICT_PCI_SETUP */
9268
9269          temp_p->unpause = INTEN;
9270          temp_p->pause = temp_p->unpause | PAUSE;
9271          if ( ((temp_p->base == 0) &&
9272                (temp_p->mbase == 0)) ||
9273               (temp_p->irq == 0) )
9274          {
9275            printk("aic7xxx: <%s> at PCI %d/%d/%d\n", 
9276              board_names[aic_pdevs[i].board_name_index],
9277              temp_p->pci_bus,
9278              PCI_SLOT(temp_p->pci_device_fn),
9279              PCI_FUNC(temp_p->pci_device_fn));
9280            printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9281            goto skip_pci_controller;
9282          }
9283
9284#ifdef MMAPIO
9285          if ( !(temp_p->base) || !(temp_p->flags & AHC_MULTI_CHANNEL) ||
9286               ((temp_p->chip != (AHC_AIC7870 | AHC_PCI)) &&
9287                (temp_p->chip != (AHC_AIC7880 | AHC_PCI))) )
9288          {
9289            temp_p->maddr = ioremap_nocache(temp_p->mbase, 256);
9290            if(temp_p->maddr)
9291            {
9292              /*
9293               * We need to check the I/O with the MMAPed address.  Some machines
9294               * simply fail to work with MMAPed I/O and certain controllers.
9295               */
9296              if(aic_inb(temp_p, HCNTRL) == 0xff)
9297              {
9298                /*
9299                 * OK.....we failed our test....go back to programmed I/O
9300                 */
9301                printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", 
9302                  board_names[aic_pdevs[i].board_name_index],
9303                  temp_p->pci_bus,
9304                  PCI_SLOT(temp_p->pci_device_fn),
9305                  PCI_FUNC(temp_p->pci_device_fn));
9306                printk(KERN_INFO "aic7xxx: MMAPed I/O failed, reverting to "
9307                                 "Programmed I/O.\n");
9308                iounmap(temp_p->maddr);
9309                temp_p->maddr = NULL;
9310                if(temp_p->base == 0)
9311                {
9312                  printk("aic7xxx: <%s> at PCI %d/%d/%d\n", 
9313                    board_names[aic_pdevs[i].board_name_index],
9314                    temp_p->pci_bus,
9315                    PCI_SLOT(temp_p->pci_device_fn),
9316                    PCI_FUNC(temp_p->pci_device_fn));
9317                  printk("aic7xxx: Controller disabled by BIOS, ignoring.\n");
9318                  goto skip_pci_controller;
9319                }
9320              }
9321            }
9322          }
9323#endif
9324
9325          /*
9326           * We HAVE to make sure the first pause_sequencer() and all other
9327           * subsequent I/O that isn't PCI config space I/O takes place
9328           * after the MMAPed I/O region is configured and tested.  The
9329           * problem is the PowerPC architecture that doesn't support
9330           * programmed I/O at all, so we have to have the MMAP I/O set up
9331           * for this pause to even work on those machines.
9332           */
9333          pause_sequencer(temp_p);
9334
9335          /*
9336           * Clear out any pending PCI error status messages.  Also set
9337           * verbose to 0 so that we don't emit strange PCI error messages
9338           * while cleaning out the current status bits.
9339           */
9340          oldverbose = aic7xxx_verbose;
9341          aic7xxx_verbose = 0;
9342          aic7xxx_pci_intr(temp_p);
9343          aic7xxx_verbose = oldverbose;
9344
9345          temp_p->bios_address = 0;
9346
9347          /*
9348           * Remember how the card was setup in case there is no seeprom.
9349           */
9350          if (temp_p->features & AHC_ULTRA2)
9351            temp_p->scsi_id = aic_inb(temp_p, SCSIID_ULTRA2) & OID;
9352          else
9353            temp_p->scsi_id = aic_inb(temp_p, SCSIID) & OID;
9354          /*
9355           * Get current termination setting
9356           */
9357          sxfrctl1 = aic_inb(temp_p, SXFRCTL1);
9358
9359          if (aic7xxx_chip_reset(temp_p) == -1)
9360          {
9361            goto skip_pci_controller;
9362          }
9363          /*
9364           * Very quickly put the term setting back into the register since
9365           * the chip reset may cause odd things to happen.  This is to keep
9366           * LVD busses with lots of drives from draining the power out of
9367           * the diffsense line before we get around to running the
9368           * configure_termination() function.  Also restore the STPWLEVEL
9369           * bit of DEVCONFIG
9370           */
9371          aic_outb(temp_p, sxfrctl1, SXFRCTL1);
9372          pci_write_config_dword(temp_p->pdev, DEVCONFIG, devconfig);
9373          sxfrctl1 &= STPWEN;
9374
9375          /*
9376           * We need to set the CHNL? assignments before loading the SEEPROM
9377           * The 3940 and 3985 cards (original stuff, not any of the later
9378           * stuff) are 7870 and 7880 class chips.  The Ultra2 stuff falls
9379           * under 7896 and 7897.  The 7895 is in a class by itself :)
9380           */
9381          switch (temp_p->chip & AHC_CHIPID_MASK)
9382          {
9383            case AHC_AIC7870: /* 3840 / 3985 */
9384            case AHC_AIC7880: /* 3840 UW / 3985 UW */
9385              if(temp_p->flags & AHC_MULTI_CHANNEL)
9386              {
9387                switch(PCI_SLOT(temp_p->pci_device_fn))
9388                {
9389                  case 5:
9390                    temp_p->flags |= AHC_CHNLB;
9391                    break;
9392                  case 8:
9393                    temp_p->flags |= AHC_CHNLB;
9394                    break;
9395                  case 12:
9396                    temp_p->flags |= AHC_CHNLC;
9397                    break;
9398                  default:
9399                    break;
9400                }
9401              }
9402              break;
9403
9404            case AHC_AIC7895: /* 7895 */
9405            case AHC_AIC7896: /* 7896/7 */
9406            case AHC_AIC7899: /* 7899 */
9407              if (PCI_FUNC(pdev->devfn) != 0)
9408              {
9409                temp_p->flags |= AHC_CHNLB;
9410              }
9411              /*
9412               * The 7895 is the only chipset that sets the SCBSIZE32 param
9413               * in the DEVCONFIG register.  The Ultra2 chipsets use
9414               * the DSCOMMAND0 register instead.
9415               */
9416              if ((temp_p->chip & AHC_CHIPID_MASK) == AHC_AIC7895)
9417              {
9418                pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9419                devconfig |= SCBSIZE32;
9420                pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9421              }
9422              break;
9423            default:
9424              break;
9425          }
9426
9427          /*
9428           * Loading of the SEEPROM needs to come after we've set the flags
9429           * to indicate possible CHNLB and CHNLC assigments.  Otherwise,
9430           * on 394x and 398x cards we'll end up reading the wrong settings
9431           * for channels B and C
9432           */
9433          switch (temp_p->chip & AHC_CHIPID_MASK)
9434          {
9435            case AHC_AIC7892:
9436            case AHC_AIC7899:
9437              aic_outb(temp_p, 0, SCAMCTL);
9438              /*
9439               * Switch to the alt mode of the chip...
9440               */
9441              aic_outb(temp_p, aic_inb(temp_p, SFUNCT) | ALT_MODE, SFUNCT);
9442              /*
9443               * Set our options...the last two items set our CRC after x byte
9444               * count in target mode...
9445               */
9446              aic_outb(temp_p, AUTO_MSGOUT_DE | DIS_MSGIN_DUALEDGE, OPTIONMODE);
9447              aic_outb(temp_p, 0x00, 0x0b);
9448              aic_outb(temp_p, 0x10, 0x0a);
9449              /*
9450               * switch back to normal mode...
9451               */
9452              aic_outb(temp_p, aic_inb(temp_p, SFUNCT) & ~ALT_MODE, SFUNCT);
9453              aic_outb(temp_p, CRCVALCHKEN | CRCENDCHKEN | CRCREQCHKEN |
9454                               TARGCRCENDEN | TARGCRCCNTEN,
9455                       CRCCONTROL1);
9456              aic_outb(temp_p, ((aic_inb(temp_p, DSCOMMAND0) | USCBSIZE32 |
9457                                 MPARCKEN | CIOPARCKEN | CACHETHEN) & 
9458                               ~DPARCKEN), DSCOMMAND0);
9459              aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9460              break;
9461            case AHC_AIC7890:
9462            case AHC_AIC7896:
9463              aic_outb(temp_p, 0, SCAMCTL);
9464              aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
9465                                CACHETHEN | MPARCKEN | USCBSIZE32 |
9466                                CIOPARCKEN) & ~DPARCKEN, DSCOMMAND0);
9467              aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9468              break;
9469            case AHC_AIC7850:
9470            case AHC_AIC7860:
9471              /*
9472               * Set the DSCOMMAND0 register on these cards different from
9473               * on the 789x cards.  Also, read the SEEPROM as well.
9474               */
9475              aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
9476                                CACHETHEN | MPARCKEN) & ~DPARCKEN,
9477                       DSCOMMAND0);
9478              /* FALLTHROUGH */
9479            default:
9480              aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9481              break;
9482            case AHC_AIC7880:
9483              /*
9484               * Check the rev of the chipset before we change DSCOMMAND0
9485               */
9486              pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9487              if ((devconfig & 0xff) >= 1)
9488              {
9489                aic_outb(temp_p, (aic_inb(temp_p, DSCOMMAND0) |
9490                                  CACHETHEN | MPARCKEN) & ~DPARCKEN,
9491                         DSCOMMAND0);
9492              }
9493              aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9494              break;
9495          }
9496          
9497
9498          /*
9499           * and then we need another switch based on the type in order to
9500           * make sure the channel B primary flag is set properly on 7895
9501           * controllers....Arrrgggghhh!!!  We also have to catch the fact
9502           * that when you disable the BIOS on the 7895 on the Intel DK440LX
9503           * motherboard, and possibly others, it only sets the BIOS disabled
9504           * bit on the A channel...I think I'm starting to lean towards
9505           * going postal....
9506           */
9507          switch(temp_p->chip & AHC_CHIPID_MASK)
9508          {
9509            case AHC_AIC7895:
9510            case AHC_AIC7896:
9511            case AHC_AIC7899:
9512              current_p = list_p;
9513              while(current_p != NULL)
9514              {
9515                if ( (current_p->pci_bus == temp_p->pci_bus) &&
9516                     (PCI_SLOT(current_p->pci_device_fn) ==
9517                      PCI_SLOT(temp_p->pci_device_fn)) )
9518                {
9519                  if ( PCI_FUNC(current_p->pci_device_fn) == 0 )
9520                  {
9521                    temp_p->flags |= 
9522                      (current_p->flags & AHC_CHANNEL_B_PRIMARY);
9523                    temp_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
9524                    temp_p->flags |=
9525                      (current_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
9526                  }
9527                  else
9528                  {
9529                    current_p->flags |=
9530                      (temp_p->flags & AHC_CHANNEL_B_PRIMARY);
9531                    current_p->flags &= ~(AHC_BIOS_ENABLED|AHC_USEDEFAULTS);
9532                    current_p->flags |=
9533                      (temp_p->flags & (AHC_BIOS_ENABLED|AHC_USEDEFAULTS));
9534                  }
9535                }
9536                current_p = current_p->next;
9537              }
9538              break;
9539            default:
9540              break;
9541          }
9542
9543          /*
9544           * We only support external SCB RAM on the 7895/6/7 chipsets.
9545           * We could support it on the 7890/1 easy enough, but I don't
9546           * know of any 7890/1 based cards that have it.  I do know
9547           * of 7895/6/7 cards that have it and they work properly.
9548           */
9549          switch(temp_p->chip & AHC_CHIPID_MASK)
9550          {
9551            default:
9552              break;
9553            case AHC_AIC7895:
9554            case AHC_AIC7896:
9555            case AHC_AIC7899:
9556              pci_read_config_dword(pdev, DEVCONFIG, &devconfig);
9557              if (temp_p->features & AHC_ULTRA2)
9558              {
9559                if ( (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2) &&
9560                     (aic7xxx_scbram) )
9561                {
9562                  aic_outb(temp_p,
9563                           aic_inb(temp_p, DSCOMMAND0) & ~SCBRAMSEL_ULTRA2,
9564                           DSCOMMAND0);
9565                  temp_p->flags |= AHC_EXTERNAL_SRAM;
9566                  devconfig |= EXTSCBPEN;
9567                }
9568                else if (aic_inb(temp_p, DSCOMMAND0) & RAMPSM_ULTRA2)
9569                {
9570                  printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", 
9571                    board_names[aic_pdevs[i].board_name_index],
9572                    temp_p->pci_bus,
9573                    PCI_SLOT(temp_p->pci_device_fn),
9574                    PCI_FUNC(temp_p->pci_device_fn));
9575                  printk("aic7xxx: external SCB RAM detected, "
9576                         "but not enabled\n");
9577                }
9578              }
9579              else
9580              {
9581                if ((devconfig & RAMPSM) && (aic7xxx_scbram))
9582                {
9583                  devconfig &= ~SCBRAMSEL;
9584                  devconfig |= EXTSCBPEN;
9585                  temp_p->flags |= AHC_EXTERNAL_SRAM;
9586                }
9587                else if (devconfig & RAMPSM)
9588                {
9589                  printk(KERN_INFO "aic7xxx: <%s> at PCI %d/%d/%d\n", 
9590                    board_names[aic_pdevs[i].board_name_index],
9591                    temp_p->pci_bus,
9592                    PCI_SLOT(temp_p->pci_device_fn),
9593                    PCI_FUNC(temp_p->pci_device_fn));
9594                  printk("aic7xxx: external SCB RAM detected, "
9595                         "but not enabled\n");
9596                }
9597              }
9598              pci_write_config_dword(pdev, DEVCONFIG, devconfig);
9599              if ( (temp_p->flags & AHC_EXTERNAL_SRAM) &&
9600                   (temp_p->flags & AHC_CHNLB) )
9601                aic_outb(temp_p, 1, CCSCBBADDR);
9602              break;
9603          }
9604
9605          /*
9606           * Take the LED out of diagnostic mode
9607           */
9608          aic_outb(temp_p, 
9609            (aic_inb(temp_p, SBLKCTL) & ~(DIAGLEDEN | DIAGLEDON)),
9610            SBLKCTL);
9611
9612          /*
9613           * We don't know where this is set in the SEEPROM or by the
9614           * BIOS, so we default to 100%.  On Ultra2 controllers, use 75%
9615           * instead.
9616           */
9617          if (temp_p->features & AHC_ULTRA2)
9618          {
9619            aic_outb(temp_p, RD_DFTHRSH_MAX | WR_DFTHRSH_MAX, DFF_THRSH);
9620          }
9621          else
9622          {
9623            aic_outb(temp_p, DFTHRSH_100, DSPCISTATUS);
9624          }
9625
9626          /*
9627           * Call our function to fixup any bugs that exist on this chipset.
9628           * This may muck with PCI settings and other device settings, so
9629           * make sure it's after all the other PCI and device register
9630           * tweaks so it can back out bad settings on specific broken cards.
9631           */
9632          aic7xxx_configure_bugs(temp_p);
9633
9634          /* Hold a pci device reference */
9635          pci_dev_get(temp_p->pdev);
9636
9637          if ( list_p == NULL )
9638          {
9639            list_p = current_p = temp_p;
9640          }
9641          else
9642          {
9643            current_p = list_p;
9644            while(current_p->next != NULL)
9645              current_p = current_p->next;
9646            current_p->next = temp_p;
9647          }
9648          temp_p->next = NULL;
9649          found++;
9650          continue;
9651skip_pci_controller:
9652#ifdef CONFIG_PCI
9653          pci_release_regions(temp_p->pdev);
9654#endif
9655          kfree(temp_p);
9656        }  /* Found an Adaptec PCI device. */
9657        else /* Well, we found one, but we couldn't get any memory */
9658        {
9659          printk("aic7xxx: Found <%s>\n", 
9660            board_names[aic_pdevs[i].board_name_index]);
9661          printk(KERN_INFO "aic7xxx: Unable to allocate device memory, "
9662            "skipping.\n");
9663        }
9664      } /* while(pdev=....) */
9665    } /* for PCI_DEVICES */
9666  }
9667#endif /* CONFIG_PCI */
9668
9669#if defined(__i386__) || defined(__alpha__)
9670  /*
9671   * EISA/VL-bus card signature probe.
9672   */
9673  slot = MINSLOT;
9674  while ( (slot <= MAXSLOT) &&
9675         !(aic7xxx_no_probe) )
9676  {
9677    base = SLOTBASE(slot) + MINREG;
9678
9679    if (!request_region(base, MAXREG - MINREG, "aic7xxx"))
9680    {
9681      /*
9682       * Some other driver has staked a
9683       * claim to this i/o region already.
9684       */
9685      slot++;
9686      continue; /* back to the beginning of the for loop */
9687    }
9688    flags = 0;
9689    type = aic7xxx_probe(slot, base + AHC_HID0, &flags);
9690    if (type == -1)
9691    {
9692      release_region(base, MAXREG - MINREG);
9693      slot++;
9694      continue;
9695    }
9696    temp_p = kmalloc(sizeof(struct aic7xxx_host), GFP_ATOMIC);
9697    if (temp_p == NULL)
9698    {
9699      printk(KERN_WARNING "aic7xxx: Unable to allocate device space.\n");
9700      release_region(base, MAXREG - MINREG);
9701      slot++;
9702      continue; /* back to the beginning of the while loop */
9703    }
9704
9705    /*
9706     * Pause the card preserving the IRQ type.  Allow the operator
9707     * to override the IRQ trigger.
9708     */
9709    if (aic7xxx_irq_trigger == 1)
9710      hcntrl = IRQMS;  /* Level */
9711    else if (aic7xxx_irq_trigger == 0)
9712      hcntrl = 0;  /* Edge */
9713    else
9714      hcntrl = inb(base + HCNTRL) & IRQMS;  /* Default */
9715    memset(temp_p, 0, sizeof(struct aic7xxx_host));
9716    temp_p->unpause = hcntrl | INTEN;
9717    temp_p->pause = hcntrl | PAUSE | INTEN;
9718    temp_p->base = base;
9719    temp_p->mbase = 0;
9720    temp_p->maddr = NULL;
9721    temp_p->pci_bus = 0;
9722    temp_p->pci_device_fn = slot;
9723    aic_outb(temp_p, hcntrl | PAUSE, HCNTRL);
9724    while( (aic_inb(temp_p, HCNTRL) & PAUSE) == 0 ) ;
9725    if (aic7xxx_chip_reset(temp_p) == -1)
9726      temp_p->irq = 0;
9727    else
9728      temp_p->irq = aic_inb(temp_p, INTDEF) & 0x0F;
9729    temp_p->flags |= AHC_PAGESCBS;
9730
9731    switch (temp_p->irq)
9732    {
9733      case 9:
9734      case 10:
9735      case 11:
9736      case 12:
9737      case 14:
9738      case 15:
9739        break;
9740
9741      default:
9742        printk(KERN_WARNING "aic7xxx: Host adapter uses unsupported IRQ "
9743          "level %d, ignoring.\n", temp_p->irq);
9744        kfree(temp_p);
9745        release_region(base, MAXREG - MINREG);
9746        slot++;
9747        continue; /* back to the beginning of the while loop */
9748    }
9749
9750    /*
9751     * We are commited now, everything has been checked and this card
9752     * has been found, now we just set it up
9753     */
9754
9755    /*
9756     * Insert our new struct into the list at the end
9757     */
9758    if (list_p == NULL)
9759    {
9760      list_p = current_p = temp_p;
9761    }
9762    else
9763    {
9764      current_p = list_p;
9765      while (current_p->next != NULL)
9766        current_p = current_p->next;
9767      current_p->next = temp_p;
9768    }
9769
9770    switch (type)
9771    {
9772      case 0:
9773        temp_p->board_name_index = 2;
9774        if (aic7xxx_verbose & VERBOSE_PROBE2)
9775          printk("aic7xxx: <%s> at EISA %d\n",
9776               board_names[2], slot);
9777        /* FALLTHROUGH */
9778      case 1:
9779      {
9780        temp_p->chip = AHC_AIC7770 | AHC_EISA;
9781        temp_p->features |= AHC_AIC7770_FE;
9782        temp_p->bios_control = aic_inb(temp_p, HA_274_BIOSCTRL);
9783
9784        /*
9785         * Get the primary channel information.  Right now we don't
9786         * do anything with this, but someday we will be able to inform
9787         * the mid-level SCSI code which channel is primary.
9788         */
9789        if (temp_p->board_name_index == 0)
9790        {
9791          temp_p->board_name_index = 3;
9792          if (aic7xxx_verbose & VERBOSE_PROBE2)
9793            printk("aic7xxx: <%s> at EISA %d\n",
9794                 board_names[3], slot);
9795        }
9796        if (temp_p->bios_control & CHANNEL_B_PRIMARY)
9797        {
9798          temp_p->flags |= AHC_CHANNEL_B_PRIMARY;
9799        }
9800
9801        if ((temp_p->bios_control & BIOSMODE) == BIOSDISABLED)
9802        {
9803          temp_p->flags &= ~AHC_BIOS_ENABLED;
9804        }
9805        else
9806        {
9807          temp_p->flags &= ~AHC_USEDEFAULTS;
9808          temp_p->flags |= AHC_BIOS_ENABLED;
9809          if ( (temp_p->bios_control & 0x20) == 0 )
9810          {
9811            temp_p->bios_address = 0xcc000;
9812            temp_p->bios_address += (0x4000 * (temp_p->bios_control & 0x07));
9813          }
9814          else
9815          {
9816            temp_p->bios_address = 0xd0000;
9817            temp_p->bios_address += (0x8000 * (temp_p->bios_control & 0x06));
9818          }
9819        }
9820        temp_p->adapter_control = aic_inb(temp_p, SCSICONF) << 8;
9821        temp_p->adapter_control |= aic_inb(temp_p, SCSICONF + 1);
9822        if (temp_p->features & AHC_WIDE)
9823        {
9824          temp_p->scsi_id = temp_p->adapter_control & HWSCSIID;
9825          temp_p->scsi_id_b = temp_p->scsi_id;
9826        }
9827        else
9828        {
9829          temp_p->scsi_id = (temp_p->adapter_control >> 8) & HSCSIID;
9830          temp_p->scsi_id_b = temp_p->adapter_control & HSCSIID;
9831        }
9832        aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9833        break;
9834      }
9835
9836      case 2:
9837      case 3:
9838        temp_p->chip = AHC_AIC7770 | AHC_VL;
9839        temp_p->features |= AHC_AIC7770_FE;
9840        if (type == 2)
9841          temp_p->flags |= AHC_BIOS_ENABLED;
9842        else
9843          temp_p->flags &= ~AHC_BIOS_ENABLED;
9844        if (aic_inb(temp_p, SCSICONF) & TERM_ENB)
9845          sxfrctl1 = STPWEN;
9846        aic7xxx_load_seeprom(temp_p, &sxfrctl1);
9847        temp_p->board_name_index = 4;
9848        if (aic7xxx_verbose & VERBOSE_PROBE2)
9849          printk("aic7xxx: <%s> at VLB %d\n",
9850               board_names[2], slot);
9851        switch( aic_inb(temp_p, STATUS_2840) & BIOS_SEL )
9852        {
9853          case 0x00:
9854            temp_p->bios_address = 0xe0000;
9855            break;
9856          case 0x20:
9857            temp_p->bios_address = 0xc8000;
9858            break;
9859          case 0x40:
9860            temp_p->bios_address = 0xd0000;
9861            break;
9862          case 0x60:
9863            temp_p->bios_address = 0xd8000;
9864            break;
9865          default:
9866            break; /* can't get here */
9867        }
9868        break;
9869
9870      default:  /* Won't get here. */
9871        break;
9872    }
9873    if (aic7xxx_verbose & VERBOSE_PROBE2)
9874    {
9875      printk(KERN_INFO "aic7xxx: BIOS %sabled, IO Port 0x%lx, IRQ %d (%s)\n",
9876        (temp_p->flags & AHC_USEDEFAULTS) ? "dis" : "en", temp_p->base,
9877        temp_p->irq,
9878        (temp_p->pause & IRQMS) ? "level sensitive" : "edge triggered");
9879      printk(KERN_INFO "aic7xxx: Extended translation %sabled.\n",
9880             (temp_p->flags & AHC_EXTEND_TRANS_A) ? "en" : "dis");
9881    }
9882
9883    /*
9884     * All the 7770 based chipsets have this bug
9885     */
9886    temp_p->bugs |= AHC_BUG_TMODE_WIDEODD;
9887
9888    /*
9889     * Set the FIFO threshold and the bus off time.
9890     */
9891    hostconf = aic_inb(temp_p, HOSTCONF);
9892    aic_outb(temp_p, hostconf & DFTHRSH, BUSSPD);
9893    aic_outb(temp_p, (hostconf << 2) & BOFF, BUSTIME);
9894    slot++;
9895    found++;
9896  }
9897
9898#endif /* defined(__i386__) || defined(__alpha__) */
9899
9900  /*
9901   * Now, we re-order the probed devices by BIOS address and BUS class.
9902   * In general, we follow this algorithm to make the adapters show up
9903   * in the same order under linux that the computer finds them.
9904   *  1: All VLB/EISA cards with BIOS_ENABLED first, according to BIOS
9905   *     address, going from lowest to highest.
9906   *  2: All PCI controllers with BIOS_ENABLED next, according to BIOS
9907   *     address, going from lowest to highest.
9908   *  3: Remaining VLB/EISA controllers going in slot order.
9909   *  4: Remaining PCI controllers, going in PCI device order (reversable)
9910   */
9911
9912  {
9913    struct aic7xxx_host *sort_list[4] = { NULL, NULL, NULL, NULL };
9914    struct aic7xxx_host *vlb, *pci;
9915    struct aic7xxx_host *prev_p;
9916    struct aic7xxx_host *p;
9917    unsigned char left;
9918
9919    prev_p = vlb = pci = NULL;
9920
9921    temp_p = list_p;
9922    while (temp_p != NULL)
9923    {
9924      switch(temp_p->chip & ~AHC_CHIPID_MASK)
9925      {
9926        case AHC_EISA:
9927        case AHC_VL:
9928        {
9929          p = temp_p;
9930          if (p->flags & AHC_BIOS_ENABLED)
9931            vlb = sort_list[0];
9932          else
9933            vlb = sort_list[2];
9934
9935          if (vlb == NULL)
9936          {
9937            vlb = temp_p;
9938            temp_p = temp_p->next;
9939            vlb->next = NULL;
9940          }
9941          else
9942          {
9943            current_p = vlb;
9944            prev_p = NULL;
9945            while ( (current_p != NULL) &&
9946                    (current_p->bios_address < temp_p->bios_address))
9947            {
9948              prev_p = current_p;
9949              current_p = current_p->next;
9950            }
9951            if (prev_p != NULL)
9952            {
9953              prev_p->next = temp_p;
9954              temp_p = temp_p->next;
9955              prev_p->next->next = current_p;
9956            }
9957            else
9958            {
9959              vlb = temp_p;
9960              temp_p = temp_p->next;
9961              vlb->next = current_p;
9962            }
9963          }
9964          
9965          if (p->flags & AHC_BIOS_ENABLED)
9966            sort_list[0] = vlb;
9967          else
9968            sort_list[2] = vlb;
9969          
9970          break;
9971        }
9972        default:  /* All PCI controllers fall through to default */
9973        {
9974
9975          p = temp_p;
9976          if (p->flags & AHC_BIOS_ENABLED) 
9977            pci = sort_list[1];
9978          else
9979            pci = sort_list[3];
9980
9981          if (pci == NULL)
9982          {
9983            pci = temp_p;
9984            temp_p = temp_p->next;
9985            pci->next = NULL;
9986          }
9987          else
9988          {
9989            current_p = pci;
9990            prev_p = NULL;
9991            if (!aic7xxx_reverse_scan)
9992            {
9993              while ( (current_p != NULL) &&
9994                      ( (PCI_SLOT(current_p->pci_device_fn) |
9995                        (current_p->pci_bus << 8)) < 
9996                        (PCI_SLOT(temp_p->pci_device_fn) |
9997                        (temp_p->pci_bus << 8)) ) )
9998              {
9999                prev_p = current_p;
10000                current_p = current_p->next;
10001              }
10002            }
10003            else
10004            {
10005              while ( (current_p != NULL) &&
10006                      ( (PCI_SLOT(current_p->pci_device_fn) |
10007                        (current_p->pci_bus << 8)) > 
10008                        (PCI_SLOT(temp_p->pci_device_fn) |
10009                        (temp_p->pci_bus << 8)) ) )
10010              {
10011                prev_p = current_p;
10012                current_p = current_p->next;
10013              }
10014            }
10015            /*
10016             * Are we dealing with a 7895/6/7/9 where we need to sort the
10017             * channels as well, if so, the bios_address values should
10018             * be the same
10019             */
10020            if ( (current_p) && (temp_p->flags & AHC_MULTI_CHANNEL) &&
10021                 (temp_p->pci_bus == current_p->pci_bus) &&
10022                 (PCI_SLOT(temp_p->pci_device_fn) ==
10023                  PCI_SLOT(current_p->pci_device_fn)) )
10024            {
10025              if (temp_p->flags & AHC_CHNLB)
10026              {
10027                if ( !(temp_p->flags & AHC_CHANNEL_B_PRIMARY) )
10028                {
10029                  prev_p = current_p;
10030                  current_p = current_p->next;
10031                }
10032              }
10033              else
10034              {
10035                if (temp_p->flags & AHC_CHANNEL_B_PRIMARY)
10036                {
10037                  prev_p = current_p;
10038                  current_p = current_p->next;
10039                }
10040              }
10041            }
10042            if (prev_p != NULL)
10043            {
10044              prev_p->next = temp_p;
10045              temp_p = temp_p->next;
10046              prev_p->next->next = current_p;
10047            }
10048            else
10049            {
10050              pci = temp_p;
10051              temp_p = temp_p->next;
10052              pci->next = current_p;
10053            }
10054          }
10055
10056          if (p->flags & AHC_BIOS_ENABLED)
10057            sort_list[1] = pci;
10058          else
10059            sort_list[3] = pci;
10060
10061          break;
10062        }
10063      }  /* End of switch(temp_p->type) */
10064    } /* End of while (temp_p != NULL) */
10065    /*
10066     * At this point, the cards have been broken into 4 sorted lists, now
10067     * we run through the lists in order and register each controller
10068     */
10069    {
10070      int i;
10071      
10072      left = found;
10073      for (i=0; i<ARRAY_SIZE(sort_list); i++)
10074      {
10075        temp_p = sort_list[i];
10076        while(temp_p != NULL)
10077        {
10078          template->name = board_names[temp_p->board_name_index];
10079          p = aic7xxx_alloc(template, temp_p);
10080          if (p != NULL)
10081          {
10082            p->instance = found - left;
10083            if (aic7xxx_register(template, p, (--left)) == 0)
10084            {
10085              found--;
10086              aic7xxx_release(p->host);
10087              scsi_unregister(p->host);
10088            }
10089            else if (aic7xxx_dump_card)
10090            {
10091              pause_sequencer(p);
10092              aic7xxx_print_card(p);
10093              aic7xxx_print_scratch_ram(p);
10094              unpause_sequencer(p, TRUE);
10095            }
10096          }
10097          current_p = temp_p;
10098          temp_p = (struct aic7xxx_host *)temp_p->next;
10099          kfree(current_p);
10100        }
10101      }
10102    }
10103  }
10104  return (found);
10105}
10106
10107/*+F*************************************************************************
10108 * Function:
10109 *   aic7xxx_buildscb
10110 *
10111 * Description:
10112 *   Build a SCB.
10113 *-F*************************************************************************/
10114static void aic7xxx_buildscb(struct aic7xxx_host *p, struct scsi_cmnd *cmd,
10115                             struct aic7xxx_scb *scb)
10116{
10117  unsigned short mask;
10118  struct aic7xxx_hwscb *hscb;
10119  struct aic_dev_data *aic_dev = cmd->device->hostdata;
10120  struct scsi_device *sdptr = cmd->device;
10121  unsigned char tindex = TARGET_INDEX(cmd);
10122  int use_sg;
10123
10124  mask = (0x01 << tindex);
10125  hscb = scb->hscb;
10126
10127  /*
10128   * Setup the control byte if we need negotiation and have not
10129   * already requested it.
10130   */
10131  hscb->control = 0;
10132  scb->tag_action = 0;
10133
10134  if (p->discenable & mask)
10135  {
10136    hscb->control |= DISCENB;
10137    /* We always force TEST_UNIT_READY to untagged */
10138    if (cmd->cmnd[0] != TEST_UNIT_READY && sdptr->simple_tags)
10139    {
10140      hscb->control |= MSG_SIMPLE_Q_TAG;
10141      scb->tag_action = MSG_SIMPLE_Q_TAG;
10142    }
10143  }
10144  if ( !(aic_dev->dtr_pending) &&
10145        (aic_dev->needppr || aic_dev->needwdtr || aic_dev->needsdtr) &&
10146        (aic_dev->flags & DEVICE_DTR_SCANNED) )
10147  {
10148    aic_dev->dtr_pending = 1;
10149    scb->tag_action = 0;
10150    hscb->control &= DISCENB;
10151    hscb->control |= MK_MESSAGE;
10152    if(aic_dev->needppr)
10153    {
10154      scb->flags |= SCB_MSGOUT_PPR;
10155    }
10156    else if(aic_dev->needwdtr)
10157    {
10158      scb->flags |= SCB_MSGOUT_WDTR;
10159    }
10160    else if(aic_dev->needsdtr)
10161    {
10162      scb->flags |= SCB_MSGOUT_SDTR;
10163    }
10164    scb->flags |= SCB_DTR_SCB;
10165  }
10166  hscb->target_channel_lun = ((cmd->device->id << 4) & 0xF0) |
10167        ((cmd->device->channel & 0x01) << 3) | (cmd->device->lun & 0x07);
10168
10169  /*
10170   * The interpretation of request_buffer and request_bufflen
10171   * changes depending on whether or not use_sg is zero; a
10172   * non-zero use_sg indicates the number of elements in the
10173   * scatter-gather array.
10174   */
10175
10176  /*
10177   * XXX - this relies on the host data being stored in a
10178   *       little-endian format.
10179   */
10180  hscb->SCSI_cmd_length = cmd->cmd_len;
10181  memcpy(scb->cmnd, cmd->cmnd, cmd->cmd_len);
10182  hscb->SCSI_cmd_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, scb->cmnd));
10183
10184  use_sg = scsi_dma_map(cmd);
10185  BUG_ON(use_sg < 0);
10186
10187  if (use_sg) {
10188    struct scatterlist *sg;  /* Must be mid-level SCSI code scatterlist */
10189
10190    /*
10191     * We must build an SG list in adapter format, as the kernel's SG list
10192     * cannot be used directly because of data field size (__alpha__)
10193     * differences and the kernel SG list uses virtual addresses where
10194     * we need physical addresses.
10195     */
10196    int i;
10197
10198    scb->sg_length = 0;
10199
10200
10201    /*
10202     * Copy the segments into the SG array.  NOTE!!! - We used to
10203     * have the first entry both in the data_pointer area and the first
10204     * SG element.  That has changed somewhat.  We still have the first
10205     * entry in both places, but now we download the address of
10206     * scb->sg_list[1] instead of 0 to the sg pointer in the hscb.
10207     */
10208    scsi_for_each_sg(cmd, sg, use_sg, i) {
10209      unsigned int len = sg_dma_len(sg);
10210      scb->sg_list[i].address = cpu_to_le32(sg_dma_address(sg));
10211      scb->sg_list[i].length = cpu_to_le32(len);
10212      scb->sg_length += len;
10213    }
10214    /* Copy the first SG into the data pointer area. */
10215    hscb->data_pointer = scb->sg_list[0].address;
10216    hscb->data_count = scb->sg_list[0].length;
10217    scb->sg_count = i;
10218    hscb->SG_segment_count = i;
10219    hscb->SG_list_pointer = cpu_to_le32(SCB_DMA_ADDR(scb, &scb->sg_list[1]));
10220  } else {
10221      scb->sg_count = 0;
10222      scb->sg_length = 0;
10223      hscb->SG_segment_count = 0;
10224      hscb->SG_list_pointer = 0;
10225      hscb->data_count = 0;
10226      hscb->data_pointer = 0;
10227  }
10228}
10229
10230/*+F*************************************************************************
10231 * Function:
10232 *   aic7xxx_queue
10233 *
10234 * Description:
10235 *   Queue a SCB to the controller.
10236 *-F*************************************************************************/
10237static int aic7xxx_queue_lck(struct scsi_cmnd *cmd, void (*fn)(struct scsi_cmnd *))
10238{
10239  struct aic7xxx_host *p;
10240  struct aic7xxx_scb *scb;
10241  struct aic_dev_data *aic_dev;
10242
10243  p = (struct aic7xxx_host *) cmd->device->host->hostdata;
10244
10245  aic_dev = cmd->device->hostdata;  
10246#ifdef AIC7XXX_VERBOSE_DEBUGGING
10247  if (aic_dev->active_cmds > aic_dev->max_q_depth)
10248  {
10249    printk(WARN_LEAD "Commands queued exceeds queue "
10250           "depth, active=%d\n",
10251           p->host_no, CTL_OF_CMD(cmd), 
10252           aic_dev->active_cmds);
10253  }
10254#endif
10255
10256  scb = scbq_remove_head(&p->scb_data->free_scbs);
10257  if (scb == NULL)
10258  {
10259    aic7xxx_allocate_scb(p);
10260    scb = scbq_remove_head(&p->scb_data->free_scbs);
10261    if(scb == NULL)
10262    {
10263      printk(WARN_LEAD "Couldn't get a free SCB.\n", p->host_no,
10264             CTL_OF_CMD(cmd));
10265      return 1;
10266    }
10267  }
10268  scb->cmd = cmd;
10269
10270        /*
10271        * Make sure the scsi_cmnd pointer is saved, the struct it points to
10272        * is set up properly, and the parity error flag is reset, then send
10273        * the SCB to the sequencer and watch the fun begin.
10274        */
10275  aic7xxx_position(cmd) = scb->hscb->tag;
10276  cmd->scsi_done = fn;
10277  cmd->result = DID_OK;
10278  aic7xxx_error(cmd) = DID_OK;
10279  aic7xxx_status(cmd) = 0;
10280  cmd->host_scribble = NULL;
10281
10282  /*
10283   * Construct the SCB beforehand, so the sequencer is
10284   * paused a minimal amount of time.
10285   */
10286  aic7xxx_buildscb(p, cmd, scb);
10287
10288  scb->flags |= SCB_ACTIVE | SCB_WAITINGQ;
10289
10290  scbq_insert_tail(&p->waiting_scbs, scb);
10291  aic7xxx_run_waiting_queues(p);
10292  return (0);
10293}
10294
10295static DEF_SCSI_QCMD(aic7xxx_queue)
10296
10297/*+F*************************************************************************
10298 * Function:
10299 *   aic7xxx_bus_device_reset
10300 *
10301 * Description:
10302 *   Abort or reset the current SCSI command(s).  If the scb has not
10303 *   previously been aborted, then we attempt to send a BUS_DEVICE_RESET
10304 *   message to the target.  If the scb has previously been unsuccessfully
10305 *   aborted, then we will reset the channel and have all devices renegotiate.
10306 *   Returns an enumerated type that indicates the status of the operation.
10307 *-F*************************************************************************/
10308static int __aic7xxx_bus_device_reset(struct scsi_cmnd *cmd)
10309{
10310  struct aic7xxx_host  *p;
10311  struct aic7xxx_scb   *scb;
10312  struct aic7xxx_hwscb *hscb;
10313  int channel;
10314  unsigned char saved_scbptr, lastphase;
10315  unsigned char hscb_index;
10316  int disconnected;
10317  struct aic_dev_data *aic_dev;
10318
10319  if(cmd == NULL)
10320  {
10321    printk(KERN_ERR "aic7xxx_bus_device_reset: called with NULL cmd!\n");
10322    return FAILED;
10323  }
10324  p = (struct aic7xxx_host *)cmd->device->host->hostdata;
10325  aic_dev = AIC_DEV(cmd);
10326  if(aic7xxx_position(cmd) < p->scb_data->numscbs)
10327    scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
10328  else
10329    return FAILED;
10330
10331  hscb = scb->hscb;
10332
10333  aic7xxx_isr(p);
10334  aic7xxx_done_cmds_complete(p);
10335  /* If the command was already complete or just completed, then we didn't
10336   * do a reset, return FAILED */
10337  if(!(scb->flags & SCB_ACTIVE))
10338    return FAILED;
10339
10340  pause_sequencer(p);
10341  lastphase = aic_inb(p, LASTPHASE);
10342  if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
10343  {
10344    printk(INFO_LEAD "Bus Device reset, scb flags 0x%x, ",
10345         p->host_no, CTL_OF_SCB(scb), scb->flags);
10346    switch (lastphase)
10347    {
10348      case P_DATAOUT:
10349        printk("Data-Out phase\n");
10350        break;
10351      case P_DATAIN:
10352        printk("Data-In phase\n");
10353        break;
10354      case P_COMMAND:
10355        printk("Command phase\n");
10356        break;
10357      case P_MESGOUT:
10358        printk("Message-Out phase\n");
10359        break;
10360      case P_STATUS:
10361        printk("Status phase\n");
10362        break;
10363      case P_MESGIN:
10364        printk("Message-In phase\n");
10365        break;
10366      default:
10367      /*
10368       * We're not in a valid phase, so assume we're idle.
10369       */
10370        printk("while idle, LASTPHASE = 0x%x\n", lastphase);
10371        break;
10372    }
10373    printk(INFO_LEAD "SCSISIGI 0x%x, SEQADDR 0x%x, SSTAT0 0x%x, SSTAT1 "
10374         "0x%x\n", p->host_no, CTL_OF_SCB(scb),
10375         aic_inb(p, SCSISIGI),
10376         aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
10377         aic_inb(p, SSTAT0), aic_inb(p, SSTAT1));
10378    printk(INFO_LEAD "SG_CACHEPTR 0x%x, SSTAT2 0x%x, STCNT 0x%x\n", p->host_no,
10379         CTL_OF_SCB(scb),
10380         (p->features & AHC_ULTRA2) ? aic_inb(p, SG_CACHEPTR) : 0,
10381         aic_inb(p, SSTAT2),
10382         aic_inb(p, STCNT + 2) << 16 | aic_inb(p, STCNT + 1) << 8 |
10383         aic_inb(p, STCNT));
10384  }
10385
10386  channel = cmd->device->channel;
10387
10388    /*
10389     * Send a Device Reset Message:
10390     * The target that is holding up the bus may not be the same as
10391     * the one that triggered this timeout (different commands have
10392     * different timeout lengths).  Our strategy here is to queue an
10393     * abort message to the timed out target if it is disconnected.
10394     * Otherwise, if we have an active target we stuff the message buffer
10395     * with an abort message and assert ATN in the hopes that the target
10396     * will let go of the bus and go to the mesgout phase.  If this
10397     * fails, we'll get another timeout a few seconds later which will
10398     * attempt a bus reset.
10399     */
10400  saved_scbptr = aic_inb(p, SCBPTR);
10401  disconnected = FALSE;
10402
10403  if (lastphase != P_BUSFREE)
10404  {
10405    if (aic_inb(p, SCB_TAG) >= p->scb_data->numscbs)
10406    {
10407      printk(WARN_LEAD "Invalid SCB ID %d is active, "
10408             "SCB flags = 0x%x.\n", p->host_no,
10409            CTL_OF_CMD(cmd), scb->hscb->tag, scb->flags);
10410      unpause_sequencer(p, FALSE);
10411      return FAILED;
10412    }
10413    if (scb->hscb->tag == aic_inb(p, SCB_TAG))
10414    { 
10415      if ( (lastphase == P_MESGOUT) || (lastphase == P_MESGIN) )
10416      {
10417        printk(WARN_LEAD "Device reset, Message buffer "
10418                "in use\n", p->host_no, CTL_OF_SCB(scb));
10419        unpause_sequencer(p, FALSE);
10420        return FAILED;
10421      }
10422        
10423      if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
10424        printk(INFO_LEAD "Device reset message in "
10425              "message buffer\n", p->host_no, CTL_OF_SCB(scb));
10426      scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
10427      aic7xxx_error(cmd) = DID_RESET;
10428      aic_dev->flags |= BUS_DEVICE_RESET_PENDING;
10429      /* Send the abort message to the active SCB. */
10430      aic_outb(p, HOST_MSG, MSG_OUT);
10431      aic_outb(p, lastphase | ATNO, SCSISIGO);
10432      unpause_sequencer(p, FALSE);
10433      spin_unlock_irq(p->host->host_lock);
10434      ssleep(1);
10435      spin_lock_irq(p->host->host_lock);
10436      if(aic_dev->flags & BUS_DEVICE_RESET_PENDING)
10437        return FAILED;
10438      else
10439        return SUCCESS;
10440    }
10441  } /* if (last_phase != P_BUSFREE).....indicates we are idle and can work */
10442  /*
10443   * Simply set the MK_MESSAGE flag and the SEQINT handler will do
10444   * the rest on a reconnect/connect.
10445   */
10446  scb->hscb->control |= MK_MESSAGE;
10447  scb->flags |= SCB_RESET | SCB_DEVICE_RESET;
10448  aic_dev->flags |= BUS_DEVICE_RESET_PENDING;
10449  /*
10450   * Check to see if the command is on the qinfifo.  If it is, then we will
10451   * not need to queue the command again since the card should start it soon
10452   */
10453  if (aic7xxx_search_qinfifo(p, cmd->device->channel, cmd->device->id, cmd->device->lun, hscb->tag,
10454                          0, TRUE, NULL) == 0)
10455  {
10456    disconnected = TRUE;
10457    if ((hscb_index = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL)
10458    {
10459      unsigned char scb_control;
10460
10461      aic_outb(p, hscb_index, SCBPTR);
10462      scb_control = aic_inb(p, SCB_CONTROL);
10463      /*
10464       * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are
10465       * actually on the waiting list, not disconnected, and we don't
10466       * need to requeue the command.
10467       */
10468      disconnected = (scb_control & DISCONNECTED);
10469      aic_outb(p, scb_control | MK_MESSAGE, SCB_CONTROL);
10470    }
10471    if (disconnected)
10472    {
10473      /*
10474       * Actually requeue this SCB in case we can select the
10475       * device before it reconnects.  This can result in the command
10476       * being on the qinfifo twice, but we don't care because it will
10477       * all get cleaned up if/when the reset takes place.
10478       */
10479      if (aic7xxx_verbose & VERBOSE_RESET_PROCESS)
10480        printk(INFO_LEAD "Queueing device reset command.\n", p->host_no,
10481                      CTL_OF_SCB(scb));
10482      p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
10483      if (p->features & AHC_QUEUE_REGS)
10484        aic_outb(p, p->qinfifonext, HNSCB_QOFF);
10485      else
10486        aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
10487      scb->flags |= SCB_QUEUED_ABORT;
10488    }
10489  }
10490  aic_outb(p, saved_scbptr, SCBPTR);
10491  unpause_sequencer(p, FALSE);
10492  spin_unlock_irq(p->host->host_lock);
10493  msleep(1000/4);
10494  spin_lock_irq(p->host->host_lock);
10495  if(aic_dev->flags & BUS_DEVICE_RESET_PENDING)
10496    return FAILED;
10497  else
10498    return SUCCESS;
10499}
10500
10501static int aic7xxx_bus_device_reset(struct scsi_cmnd *cmd)
10502{
10503      int rc;
10504
10505      spin_lock_irq(cmd->device->host->host_lock);
10506      rc = __aic7xxx_bus_device_reset(cmd);
10507      spin_unlock_irq(cmd->device->host->host_lock);
10508
10509      return rc;
10510}
10511
10512
10513/*+F*************************************************************************
10514 * Function:
10515 *   aic7xxx_panic_abort
10516 *
10517 * Description:
10518 *   Abort the current SCSI command(s).
10519 *-F*************************************************************************/
10520static void aic7xxx_panic_abort(struct aic7xxx_host *p, struct scsi_cmnd *cmd)
10521{
10522
10523  printk("aic7xxx driver version %s\n", AIC7XXX_C_VERSION);
10524  printk("Controller type:\n    %s\n", board_names[p->board_name_index]);
10525  printk("p->flags=0x%lx, p->chip=0x%x, p->features=0x%x, "
10526         "sequencer %s paused\n",
10527     p->flags, p->chip, p->features,
10528    (aic_inb(p, HCNTRL) & PAUSE) ? "is" : "isn't" );
10529  pause_sequencer(p);
10530  disable_irq(p->irq);
10531  aic7xxx_print_card(p);
10532  aic7xxx_print_scratch_ram(p);
10533  spin_unlock_irq(p->host->host_lock);
10534  for(;;) barrier();
10535}
10536
10537/*+F*************************************************************************
10538 * Function:
10539 *   aic7xxx_abort
10540 *
10541 * Description:
10542 *   Abort the current SCSI command(s).
10543 *-F*************************************************************************/
10544static int __aic7xxx_abort(struct scsi_cmnd *cmd)
10545{
10546  struct aic7xxx_scb  *scb = NULL;
10547  struct aic7xxx_host *p;
10548  int    found=0, disconnected;
10549  unsigned char saved_hscbptr, hscbptr, scb_control;
10550  struct aic_dev_data *aic_dev;
10551
10552  if(cmd == NULL)
10553  {
10554    printk(KERN_ERR "aic7xxx_abort: called with NULL cmd!\n");
10555    return FAILED;
10556  }
10557  p = (struct aic7xxx_host *)cmd->device->host->hostdata;
10558  aic_dev = AIC_DEV(cmd);
10559  if(aic7xxx_position(cmd) < p->scb_data->numscbs)
10560    scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
10561  else
10562    return FAILED;
10563
10564  aic7xxx_isr(p);
10565  aic7xxx_done_cmds_complete(p);
10566  /* If the command was already complete or just completed, then we didn't
10567   * do a reset, return FAILED */
10568  if(!(scb->flags & SCB_ACTIVE))
10569    return FAILED;
10570
10571  pause_sequencer(p);
10572
10573  /*
10574   * I added a new config option to the driver: "panic_on_abort" that will
10575   * cause the driver to panic and the machine to stop on the first abort
10576   * or reset call into the driver.  At that point, it prints out a lot of
10577   * useful information for me which I can then use to try and debug the
10578   * problem.  Simply enable the boot time prompt in order to activate this
10579   * code.
10580   */
10581  if (aic7xxx_panic_on_abort)
10582    aic7xxx_panic_abort(p, cmd);
10583
10584  if (aic7xxx_verbose & VERBOSE_ABORT)
10585  {
10586    printk(INFO_LEAD "Aborting scb %d, flags 0x%x, SEQADDR 0x%x, LASTPHASE "
10587           "0x%x\n",
10588         p->host_no, CTL_OF_SCB(scb), scb->hscb->tag, scb->flags,
10589         aic_inb(p, SEQADDR0) | (aic_inb(p, SEQADDR1) << 8),
10590         aic_inb(p, LASTPHASE));
10591    printk(INFO_LEAD "SG_CACHEPTR 0x%x, SG_COUNT %d, SCSISIGI 0x%x\n",
10592         p->host_no, CTL_OF_SCB(scb), (p->features & AHC_ULTRA2) ?
10593         aic_inb(p, SG_CACHEPTR) : 0, aic_inb(p, SG_COUNT),
10594         aic_inb(p, SCSISIGI));
10595    printk(INFO_LEAD "SSTAT0 0x%x, SSTAT1 0x%x, SSTAT2 0x%x\n",
10596         p->host_no, CTL_OF_SCB(scb), aic_inb(p, SSTAT0),
10597         aic_inb(p, SSTAT1), aic_inb(p, SSTAT2));
10598  }
10599
10600  if (scb->flags & SCB_WAITINGQ)
10601  {
10602    if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS) 
10603      printk(INFO_LEAD "SCB found on waiting list and "
10604          "aborted.\n", p->host_no, CTL_OF_SCB(scb));
10605    scbq_remove(&p->waiting_scbs, scb);
10606    scbq_remove(&aic_dev->delayed_scbs, scb);
10607    aic_dev->active_cmds++;
10608    p->activescbs++;
10609    scb->flags &= ~(SCB_WAITINGQ | SCB_ACTIVE);
10610    scb->flags |= SCB_ABORT | SCB_QUEUED_FOR_DONE;
10611    goto success;
10612  }
10613
10614/*
10615 *  We just checked the waiting_q, now for the QINFIFO
10616 */
10617  if ( ((found = aic7xxx_search_qinfifo(p, cmd->device->id, cmd->device->channel,
10618                     cmd->device->lun, scb->hscb->tag, SCB_ABORT | SCB_QUEUED_FOR_DONE,
10619                     FALSE, NULL)) != 0) &&
10620                    (aic7xxx_verbose & VERBOSE_ABORT_PROCESS))
10621  {
10622    printk(INFO_LEAD "SCB found in QINFIFO and aborted.\n", p->host_no,
10623                    CTL_OF_SCB(scb));
10624    goto success;
10625  }
10626
10627/*
10628 *  QINFIFO, waitingq, completeq done.  Next, check WAITING_SCB list in card
10629 */
10630
10631  saved_hscbptr = aic_inb(p, SCBPTR);
10632  if ((hscbptr = aic7xxx_find_scb(p, scb)) != SCB_LIST_NULL)
10633  {
10634    aic_outb(p, hscbptr, SCBPTR);
10635    scb_control = aic_inb(p, SCB_CONTROL);
10636    disconnected = scb_control & DISCONNECTED;
10637    /*
10638     * If the DISCONNECTED bit is not set in SCB_CONTROL, then we are
10639     * either currently active or on the waiting list.
10640     */
10641    if(!disconnected && aic_inb(p, LASTPHASE) == P_BUSFREE) {
10642      if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
10643        printk(INFO_LEAD "SCB found on hardware waiting"
10644          " list and aborted.\n", p->host_no, CTL_OF_SCB(scb));
10645      /* If we are the only waiting command, stop the selection engine */
10646      if (aic_inb(p, WAITING_SCBH) == hscbptr && aic_inb(p, SCB_NEXT) ==
10647                        SCB_LIST_NULL)
10648      {
10649        aic_outb(p, aic_inb(p, SCSISEQ) & ~ENSELO, SCSISEQ);
10650        aic_outb(p, CLRSELTIMEO, CLRSINT1);
10651        aic_outb(p, SCB_LIST_NULL, WAITING_SCBH);
10652      }
10653      else
10654      {
10655        unsigned char prev, next;
10656        prev = SCB_LIST_NULL;
10657        next = aic_inb(p, WAITING_SCBH);
10658        while(next != SCB_LIST_NULL)
10659        {
10660          aic_outb(p, next, SCBPTR);
10661          if (next == hscbptr)
10662          {
10663            next = aic_inb(p, SCB_NEXT);
10664            if (prev != SCB_LIST_NULL)
10665            {
10666              aic_outb(p, prev, SCBPTR);
10667              aic_outb(p, next, SCB_NEXT);
10668            }
10669            else
10670              aic_outb(p, next, WAITING_SCBH);
10671            aic_outb(p, hscbptr, SCBPTR);
10672            next = SCB_LIST_NULL;
10673          }
10674          else
10675          {
10676            prev = next;
10677            next = aic_inb(p, SCB_NEXT);
10678          }
10679        }
10680      }
10681      aic_outb(p, SCB_LIST_NULL, SCB_TAG);
10682      aic_outb(p, 0, SCB_CONTROL);
10683      aic7xxx_add_curscb_to_free_list(p);
10684      scb->flags = SCB_ABORT | SCB_QUEUED_FOR_DONE;
10685      goto success;
10686    }
10687    else if (!disconnected)
10688    {
10689      /*
10690       * We are the currently active command
10691       */
10692      if((aic_inb(p, LASTPHASE) == P_MESGIN) ||
10693         (aic_inb(p, LASTPHASE) == P_MESGOUT))
10694      {
10695        /*
10696         * Message buffer busy, unable to abort
10697         */
10698        printk(INFO_LEAD "message buffer busy, unable to abort.\n",
10699                          p->host_no, CTL_OF_SCB(scb));
10700        unpause_sequencer(p, FALSE);
10701        return FAILED;
10702      }
10703      /* Fallthrough to below, set ATNO after we set SCB_CONTROL */
10704    } 
10705    aic_outb(p,  scb_control | MK_MESSAGE, SCB_CONTROL);
10706    if(!disconnected)
10707    {
10708      aic_outb(p, HOST_MSG, MSG_OUT);
10709      aic_outb(p, aic_inb(p, SCSISIGI) | ATNO, SCSISIGO);
10710    }
10711    aic_outb(p, saved_hscbptr, SCBPTR);
10712  } 
10713  else
10714  {
10715    /*
10716     * The scb isn't in the card at all and it is active and it isn't in
10717     * any of the queues, so it must be disconnected and paged out.  Fall
10718     * through to the code below.
10719     */
10720    disconnected = 1;
10721  }
10722        
10723  p->flags |= AHC_ABORT_PENDING;
10724  scb->flags |= SCB_QUEUED_ABORT | SCB_ABORT | SCB_RECOVERY_SCB;
10725  scb->hscb->control |= MK_MESSAGE;
10726  if(disconnected)
10727  {
10728    if (aic7xxx_verbose & VERBOSE_ABORT_PROCESS)
10729      printk(INFO_LEAD "SCB disconnected.  Queueing Abort"
10730        " SCB.\n", p->host_no, CTL_OF_SCB(scb));
10731    p->qinfifo[p->qinfifonext++] = scb->hscb->tag;
10732    if (p->features & AHC_QUEUE_REGS)
10733      aic_outb(p, p->qinfifonext, HNSCB_QOFF);
10734    else
10735      aic_outb(p, p->qinfifonext, KERNEL_QINPOS);
10736  }
10737  unpause_sequencer(p, FALSE);
10738  spin_unlock_irq(p->host->host_lock);
10739  msleep(1000/4);
10740  spin_lock_irq(p->host->host_lock);
10741  if (p->flags & AHC_ABORT_PENDING)
10742  {
10743    if (aic7xxx_verbose & VERBOSE_ABORT_RETURN)
10744      printk(INFO_LEAD "Abort never delivered, returning FAILED\n", p->host_no,
10745                    CTL_OF_CMD(cmd));
10746    p->flags &= ~AHC_ABORT_PENDING;
10747    return FAILED;
10748  }
10749  if (aic7xxx_verbose & VERBOSE_ABORT_RETURN)
10750    printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd));
10751  return SUCCESS;
10752
10753success:
10754  if (aic7xxx_verbose & VERBOSE_ABORT_RETURN)
10755    printk(INFO_LEAD "Abort successful.\n", p->host_no, CTL_OF_CMD(cmd));
10756  aic7xxx_run_done_queue(p, TRUE);
10757  unpause_sequencer(p, FALSE);
10758  return SUCCESS;
10759}
10760
10761static int aic7xxx_abort(struct scsi_cmnd *cmd)
10762{
10763        int rc;
10764
10765        spin_lock_irq(cmd->device->host->host_lock);
10766        rc = __aic7xxx_abort(cmd);
10767        spin_unlock_irq(cmd->device->host->host_lock);
10768
10769        return rc;
10770}
10771
10772
10773/*+F*************************************************************************
10774 * Function:
10775 *   aic7xxx_reset
10776 *
10777 * Description:
10778 *   Resetting the bus always succeeds - is has to, otherwise the
10779 *   kernel will panic! Try a surgical technique - sending a BUS
10780 *   DEVICE RESET message - on the offending target before pulling
10781 *   the SCSI bus reset line.
10782 *-F*************************************************************************/
10783static int aic7xxx_reset(struct scsi_cmnd *cmd)
10784{
10785  struct aic7xxx_scb *scb;
10786  struct aic7xxx_host *p;
10787  struct aic_dev_data *aic_dev;
10788
10789  p = (struct aic7xxx_host *) cmd->device->host->hostdata;
10790  spin_lock_irq(p->host->host_lock);
10791
10792  aic_dev = AIC_DEV(cmd);
10793  if(aic7xxx_position(cmd) < p->scb_data->numscbs)
10794  {
10795    scb = (p->scb_data->scb_array[aic7xxx_position(cmd)]);
10796    if (scb->cmd != cmd)
10797      scb = NULL;
10798  }
10799  else
10800  {
10801    scb = NULL;
10802  }
10803
10804  /*
10805   * I added a new config option to the driver: "panic_on_abort" that will
10806   * cause the driver to panic and the machine to stop on the first abort
10807   * or reset call into the driver.  At that point, it prints out a lot of
10808   * useful information for me which I can then use to try and debug the
10809   * problem.  Simply enable the boot time prompt in order to activate this
10810   * code.
10811   */
10812  if (aic7xxx_panic_on_abort)
10813    aic7xxx_panic_abort(p, cmd);
10814
10815  pause_sequencer(p);
10816
10817  while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
10818  {
10819    aic7xxx_isr(p);
10820    pause_sequencer(p);
10821  }
10822  aic7xxx_done_cmds_complete(p);
10823
10824  if(scb && (scb->cmd == NULL))
10825  {
10826    /*
10827     * We just completed the command when we ran the isr stuff, so we no
10828     * longer have it.
10829     */
10830    unpause_sequencer(p, FALSE);
10831    spin_unlock_irq(p->host->host_lock);
10832    return SUCCESS;
10833  }
10834    
10835/*
10836 *  By this point, we want to already know what we are going to do and
10837 *  only have the following code implement our course of action.
10838 */
10839  aic7xxx_reset_channel(p, cmd->device->channel, TRUE);
10840  if (p->features & AHC_TWIN)
10841  {
10842    aic7xxx_reset_channel(p, cmd->device->channel ^ 0x01, TRUE);
10843    restart_sequencer(p);
10844  }
10845  aic_outb(p,  aic_inb(p, SIMODE1) & ~(ENREQINIT|ENBUSFREE), SIMODE1);
10846  aic7xxx_clear_intstat(p);
10847  p->flags &= ~AHC_HANDLING_REQINITS;
10848  p->msg_type = MSG_TYPE_NONE;
10849  p->msg_index = 0;
10850  p->msg_len = 0;
10851  aic7xxx_run_done_queue(p, TRUE);
10852  unpause_sequencer(p, FALSE);
10853  spin_unlock_irq(p->host->host_lock);
10854  ssleep(2);
10855  return SUCCESS;
10856}
10857
10858/*+F*************************************************************************
10859 * Function:
10860 *   aic7xxx_biosparam
10861 *
10862 * Description:
10863 *   Return the disk geometry for the given SCSI device.
10864 *
10865 * Note:
10866 *   This function is broken for today's really large drives and needs
10867 *   fixed.
10868 *-F*************************************************************************/
10869static int
10870aic7xxx_biosparam(struct scsi_device *sdev, struct block_device *bdev,
10871                sector_t capacity, int geom[])
10872{
10873  sector_t heads, sectors, cylinders;
10874  int ret;
10875  struct aic7xxx_host *p;
10876  unsigned char *buf;
10877
10878  p = (struct aic7xxx_host *) sdev->host->hostdata;
10879  buf = scsi_bios_ptable(bdev);
10880
10881  if ( buf )
10882  {
10883    ret = scsi_partsize(buf, capacity, &geom[2], &geom[0], &geom[1]);
10884    kfree(buf);
10885    if ( ret != -1 )
10886      return(ret);
10887  }
10888  
10889  heads = 64;
10890  sectors = 32;
10891  cylinders = capacity >> 11;
10892
10893  if ((p->flags & AHC_EXTEND_TRANS_A) && (cylinders > 1024))
10894  {
10895    heads = 255;
10896    sectors = 63;
10897    cylinders = capacity >> 14;
10898    if(capacity > (65535 * heads * sectors))
10899      cylinders = 65535;
10900    else
10901      cylinders = ((unsigned int)capacity) / (unsigned int)(heads * sectors);
10902  }
10903
10904  geom[0] = (int)heads;
10905  geom[1] = (int)sectors;
10906  geom[2] = (int)cylinders;
10907
10908  return (0);
10909}
10910
10911/*+F*************************************************************************
10912 * Function:
10913 *   aic7xxx_release
10914 *
10915 * Description:
10916 *   Free the passed in Scsi_Host memory structures prior to unloading the
10917 *   module.
10918 *-F*************************************************************************/
10919static int
10920aic7xxx_release(struct Scsi_Host *host)
10921{
10922  struct aic7xxx_host *p = (struct aic7xxx_host *) host->hostdata;
10923  struct aic7xxx_host *next, *prev;
10924
10925  if(p->irq)
10926    free_irq(p->irq, p);
10927#ifdef MMAPIO
10928  if(p->maddr)
10929  {
10930    iounmap(p->maddr);
10931  }
10932#endif /* MMAPIO */
10933  if(!p->pdev)
10934    release_region(p->base, MAXREG - MINREG);
10935#ifdef CONFIG_PCI
10936  else {
10937    pci_release_regions(p->pdev);
10938    pci_dev_put(p->pdev);
10939  }
10940#endif
10941  prev = NULL;
10942  next = first_aic7xxx;
10943  while(next != NULL)
10944  {
10945    if(next == p)
10946    {
10947      if(prev == NULL)
10948        first_aic7xxx = next->next;
10949      else
10950        prev->next = next->next;
10951    }
10952    else
10953    {
10954      prev = next;
10955    }
10956    next = next->next;
10957  }
10958  aic7xxx_free(p);
10959  return(0);
10960}
10961
10962/*+F*************************************************************************
10963 * Function:
10964 *   aic7xxx_print_card
10965 *
10966 * Description:
10967 *   Print out all of the control registers on the card
10968 *
10969 *   NOTE: This function is not yet safe for use on the VLB and EISA
10970 *   controllers, so it isn't used on those controllers at all.
10971 *-F*************************************************************************/
10972static void
10973aic7xxx_print_card(struct aic7xxx_host *p)
10974{
10975  int i, j, k, chip;
10976  static struct register_ranges {
10977    int num_ranges;
10978    int range_val[32];
10979  } cards_ds[] = {
10980    { 0, {0,} }, /* none */
10981    {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1f, 0x1f, 0x60, 0x60, /*7771*/
10982          0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9b, 0x9f} },
10983    { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7850*/
10984          0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
10985    { 9, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7860*/
10986          0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
10987    {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1c, 0x1f, 0x60, 0x60, /*7870*/
10988          0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
10989    {10, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1a, 0x1c, 0x1f, 0x60, 0x60, /*7880*/
10990          0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9f} },
10991    {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7890*/
10992          0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
10993          0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
10994          0xfe, 0xff} },
10995    {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x19, 0x1b, 0x1f, 0x60, 0x60, /*7895*/
10996          0x62, 0x66, 0x80, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a,
10997          0x9f, 0x9f, 0xe0, 0xf1} },
10998    {16, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7896*/
10999          0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9f, 0x9f,
11000          0xe0, 0xf1, 0xf4, 0xf4, 0xf6, 0xf6, 0xf8, 0xf8, 0xfa, 0xfc,
11001          0xfe, 0xff} },
11002    {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7892*/
11003          0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11004          0xe0, 0xf1, 0xf4, 0xfc} },
11005    {12, {0x00, 0x05, 0x08, 0x11, 0x18, 0x1f, 0x60, 0x60, 0x62, 0x66, /*7899*/
11006          0x84, 0x8e, 0x90, 0x95, 0x97, 0x97, 0x9a, 0x9a, 0x9c, 0x9f,
11007          0xe0, 0xf1, 0xf4, 0xfc} },
11008  };
11009  chip = p->chip & AHC_CHIPID_MASK;
11010  printk("%s at ",
11011         board_names[p->board_name_index]);
11012  switch(p->chip & ~AHC_CHIPID_MASK)
11013  {
11014    case AHC_VL:
11015      printk("VLB Slot %d.\n", p->pci_device_fn);
11016      break;
11017    case AHC_EISA:
11018      printk("EISA Slot %d.\n", p->pci_device_fn);
11019      break;
11020    case AHC_PCI:
11021    default:
11022      printk("PCI %d/%d/%d.\n", p->pci_bus, PCI_SLOT(p->pci_device_fn),
11023             PCI_FUNC(p->pci_device_fn));
11024      break;
11025  }
11026
11027  /*
11028   * the registers on the card....
11029   */
11030  printk("Card Dump:\n");
11031  k = 0;
11032  for(i=0; i<cards_ds[chip].num_ranges; i++)
11033  {
11034    for(j  = cards_ds[chip].range_val[ i * 2 ];
11035        j <= cards_ds[chip].range_val[ i * 2 + 1 ] ;
11036        j++)
11037    {
11038      printk("%02x:%02x ", j, aic_inb(p, j));
11039      if(++k == 13)
11040      {
11041        printk("\n");
11042        k=0;
11043      }
11044    }
11045  }
11046  if(k != 0)
11047    printk("\n");
11048
11049  /*
11050   * If this was an Ultra2 controller, then we just hosed the card in terms
11051   * of the QUEUE REGS.  This function is only called at init time or by
11052   * the panic_abort function, so it's safe to assume a generic init time
11053   * setting here
11054   */
11055
11056  if(p->features & AHC_QUEUE_REGS)
11057  {
11058    aic_outb(p, 0, SDSCB_QOFF);
11059    aic_outb(p, 0, SNSCB_QOFF);
11060    aic_outb(p, 0, HNSCB_QOFF);
11061  }
11062
11063}
11064
11065/*+F*************************************************************************
11066 * Function:
11067 *   aic7xxx_print_scratch_ram
11068 *
11069 * Description:
11070 *   Print out the scratch RAM values on the card.
11071 *-F*************************************************************************/
11072static void
11073aic7xxx_print_scratch_ram(struct aic7xxx_host *p)
11074{
11075  int i, k;
11076
11077  k = 0;
11078  printk("Scratch RAM:\n");
11079  for(i = SRAM_BASE; i < SEQCTL; i++)
11080  {
11081    printk("%02x:%02x ", i, aic_inb(p, i));
11082    if(++k == 13)
11083    {
11084      printk("\n");
11085      k=0;
11086    }
11087  }
11088  if (p->features & AHC_MORE_SRAM)
11089  {
11090    for(i = TARG_OFFSET; i < 0x80; i++)
11091    {
11092      printk("%02x:%02x ", i, aic_inb(p, i));
11093      if(++k == 13)
11094      {
11095        printk("\n");
11096        k=0;
11097      }
11098    }
11099  }
11100  printk("\n");
11101}
11102
11103
11104#include "aic7xxx_old/aic7xxx_proc.c"
11105
11106MODULE_LICENSE("Dual BSD/GPL");
11107MODULE_VERSION(AIC7XXX_H_VERSION);
11108
11109
11110static struct scsi_host_template driver_template = {
11111        .proc_info              = aic7xxx_proc_info,
11112        .detect                 = aic7xxx_detect,
11113        .release                = aic7xxx_release,
11114        .info                   = aic7xxx_info, 
11115        .queuecommand           = aic7xxx_queue,
11116        .slave_alloc            = aic7xxx_slave_alloc,
11117        .slave_configure        = aic7xxx_slave_configure,
11118        .slave_destroy          = aic7xxx_slave_destroy,
11119        .bios_param             = aic7xxx_biosparam,
11120        .eh_abort_handler       = aic7xxx_abort,
11121        .eh_device_reset_handler        = aic7xxx_bus_device_reset,
11122        .eh_host_reset_handler  = aic7xxx_reset,
11123        .can_queue              = 255,
11124        .this_id                = -1,
11125        .max_sectors            = 2048,
11126        .cmd_per_lun            = 3,
11127        .use_clustering         = ENABLE_CLUSTERING,
11128};
11129
11130#include "scsi_module.c"
11131
11132/*
11133 * Overrides for Emacs so that we almost follow Linus's tabbing style.
11134 * Emacs will notice this stuff at the end of the file and automatically
11135 * adjust the settings for this buffer only.  This must remain at the end
11136 * of the file.
11137 * ---------------------------------------------------------------------------
11138 * Local variables:
11139 * c-indent-level: 2
11140 * c-brace-imaginary-offset: 0
11141 * c-brace-offset: -2
11142 * c-argdecl-indent: 2
11143 * c-label-offset: -2
11144 * c-continued-statement-offset: 2
11145 * c-continued-brace-offset: 0
11146 * indent-tabs-mode: nil
11147 * tab-width: 8
11148 * End:
11149 */
11150