1#ifndef __MEGARAID_H__
2#define __MEGARAID_H__
3
4#include <linux/spinlock.h>
5#include <linux/mutex.h>
6
7#define MEGARAID_VERSION \
8 "v2.00.4 (Release Date: Thu Feb 9 08:51:30 EST 2006)\n"
9
10
11
12
13
14
15
16
17
18
19
20
21#define MEGA_HAVE_COALESCING 0
22
23
24
25
26
27
28#define MEGA_HAVE_CLUSTERING 1
29
30
31
32
33
34
35
36
37#define MEGA_HAVE_STATS 0
38
39
40
41
42
43
44#define MEGA_HAVE_ENH_PROC 1
45
46#define MAX_DEV_TYPE 32
47
48#ifndef PCI_VENDOR_ID_LSI_LOGIC
49#define PCI_VENDOR_ID_LSI_LOGIC 0x1000
50#endif
51
52#ifndef PCI_VENDOR_ID_AMI
53#define PCI_VENDOR_ID_AMI 0x101E
54#endif
55
56#ifndef PCI_VENDOR_ID_DELL
57#define PCI_VENDOR_ID_DELL 0x1028
58#endif
59
60#ifndef PCI_VENDOR_ID_INTEL
61#define PCI_VENDOR_ID_INTEL 0x8086
62#endif
63
64#ifndef PCI_DEVICE_ID_AMI_MEGARAID
65#define PCI_DEVICE_ID_AMI_MEGARAID 0x9010
66#endif
67
68#ifndef PCI_DEVICE_ID_AMI_MEGARAID2
69#define PCI_DEVICE_ID_AMI_MEGARAID2 0x9060
70#endif
71
72#ifndef PCI_DEVICE_ID_AMI_MEGARAID3
73#define PCI_DEVICE_ID_AMI_MEGARAID3 0x1960
74#endif
75
76#define PCI_DEVICE_ID_DISCOVERY 0x000E
77#define PCI_DEVICE_ID_PERC4_DI 0x000F
78#define PCI_DEVICE_ID_PERC4_QC_VERDE 0x0407
79
80
81#define AMI_SUBSYS_VID 0x101E
82#define DELL_SUBSYS_VID 0x1028
83#define HP_SUBSYS_VID 0x103C
84#define LSI_SUBSYS_VID 0x1000
85#define INTEL_SUBSYS_VID 0x8086
86
87#define HBA_SIGNATURE 0x3344
88#define HBA_SIGNATURE_471 0xCCCC
89#define HBA_SIGNATURE_64BIT 0x0299
90
91#define MBOX_BUSY_WAIT 10
92
93#define DEFAULT_INITIATOR_ID 7
94
95#define MAX_SGLIST 64
96#define MIN_SGLIST 26
97#define MAX_COMMANDS 126
98#define CMDID_INT_CMDS MAX_COMMANDS+1
99
100
101
102#define MAX_CDB_LEN 10
103#define MAX_EXT_CDB_LEN 16
104
105#define DEF_CMD_PER_LUN 63
106#define MAX_CMD_PER_LUN MAX_COMMANDS
107#define MAX_FIRMWARE_STATUS 46
108#define MAX_XFER_PER_CMD (64*1024)
109#define MAX_SECTORS_PER_IO 128
110
111#define MAX_LOGICAL_DRIVES_40LD 40
112#define FC_MAX_PHYSICAL_DEVICES 256
113#define MAX_LOGICAL_DRIVES_8LD 8
114#define MAX_CHANNELS 5
115#define MAX_TARGET 15
116#define MAX_PHYSICAL_DRIVES MAX_CHANNELS*MAX_TARGET
117#define MAX_ROW_SIZE_40LD 32
118#define MAX_ROW_SIZE_8LD 8
119#define MAX_SPAN_DEPTH 8
120
121#define NVIRT_CHAN 4
122
123struct mbox_out {
124 u8 cmd;
125 u8 cmdid;
126 u16 numsectors;
127 u32 lba;
128 u32 xferaddr;
129 u8 logdrv;
130 u8 numsgelements;
131 u8 resvd;
132} __attribute__ ((packed));
133
134struct mbox_in {
135 volatile u8 busy;
136 volatile u8 numstatus;
137 volatile u8 status;
138 volatile u8 completed[MAX_FIRMWARE_STATUS];
139 volatile u8 poll;
140 volatile u8 ack;
141} __attribute__ ((packed));
142
143typedef struct {
144 struct mbox_out m_out;
145 struct mbox_in m_in;
146} __attribute__ ((packed)) mbox_t;
147
148typedef struct {
149 u32 xfer_segment_lo;
150 u32 xfer_segment_hi;
151 mbox_t mbox;
152} __attribute__ ((packed)) mbox64_t;
153
154
155
156
157
158#define MAX_REQ_SENSE_LEN 0x20
159
160typedef struct {
161 u8 timeout:3;
162 u8 ars:1;
163 u8 reserved:3;
164 u8 islogical:1;
165 u8 logdrv;
166 u8 channel;
167 u8 target;
168 u8 queuetag;
169 u8 queueaction;
170 u8 cdb[MAX_CDB_LEN];
171 u8 cdblen;
172 u8 reqsenselen;
173 u8 reqsensearea[MAX_REQ_SENSE_LEN];
174 u8 numsgelements;
175 u8 scsistatus;
176 u32 dataxferaddr;
177 u32 dataxferlen;
178} __attribute__ ((packed)) mega_passthru;
179
180
181
182
183
184typedef struct {
185 u8 timeout:3;
186 u8 ars:1;
187 u8 rsvd1:1;
188 u8 cd_rom:1;
189 u8 rsvd2:1;
190 u8 islogical:1;
191 u8 logdrv;
192 u8 channel;
193 u8 target;
194 u8 queuetag;
195 u8 queueaction;
196 u8 cdblen;
197 u8 rsvd3;
198 u8 cdb[MAX_EXT_CDB_LEN];
199 u8 numsgelements;
200 u8 status;
201 u8 reqsenselen;
202 u8 reqsensearea[MAX_REQ_SENSE_LEN];
203 u8 rsvd4;
204 u32 dataxferaddr;
205 u32 dataxferlen;
206} __attribute__ ((packed)) mega_ext_passthru;
207
208typedef struct {
209 u64 address;
210 u32 length;
211} __attribute__ ((packed)) mega_sgl64;
212
213typedef struct {
214 u32 address;
215 u32 length;
216} __attribute__ ((packed)) mega_sglist;
217
218
219
220typedef struct {
221 int idx;
222 u32 state;
223 struct list_head list;
224 u8 raw_mbox[66];
225 u32 dma_type;
226 u32 dma_direction;
227
228 Scsi_Cmnd *cmd;
229 dma_addr_t dma_h_bulkdata;
230 dma_addr_t dma_h_sgdata;
231
232 mega_sglist *sgl;
233 mega_sgl64 *sgl64;
234 dma_addr_t sgl_dma_addr;
235
236 mega_passthru *pthru;
237 dma_addr_t pthru_dma_addr;
238 mega_ext_passthru *epthru;
239 dma_addr_t epthru_dma_addr;
240} scb_t;
241
242
243
244
245#define SCB_FREE 0x0000
246#define SCB_ACTIVE 0x0001
247#define SCB_PENDQ 0x0002
248#define SCB_ISSUED 0x0004
249#define SCB_ABORT 0x0008
250#define SCB_RESET 0x0010
251
252
253
254
255
256typedef struct {
257 u32 data_size;
258
259 u32 config_signature;
260
261
262
263
264
265 u8 fw_version[16];
266 u8 bios_version[16];
267 u8 product_name[80];
268
269 u8 max_commands;
270 u8 nchannels;
271 u8 fc_loop_present;
272 u8 mem_type;
273
274 u32 signature;
275 u16 dram_size;
276 u16 subsysid;
277
278 u16 subsysvid;
279 u8 notify_counters;
280 u8 pad1k[889];
281} __attribute__ ((packed)) mega_product_info;
282
283struct notify {
284 u32 global_counter;
285
286 u8 param_counter;
287 u8 param_id;
288 u16 param_val;
289
290 u8 write_config_counter;
291 u8 write_config_rsvd[3];
292
293 u8 ldrv_op_counter;
294 u8 ldrv_opid;
295 u8 ldrv_opcmd;
296 u8 ldrv_opstatus;
297
298 u8 ldrv_state_counter;
299 u8 ldrv_state_id;
300 u8 ldrv_state_new;
301 u8 ldrv_state_old;
302
303 u8 pdrv_state_counter;
304 u8 pdrv_state_id;
305 u8 pdrv_state_new;
306 u8 pdrv_state_old;
307
308 u8 pdrv_fmt_counter;
309 u8 pdrv_fmt_id;
310 u8 pdrv_fmt_val;
311 u8 pdrv_fmt_rsvd;
312
313 u8 targ_xfer_counter;
314 u8 targ_xfer_id;
315 u8 targ_xfer_val;
316 u8 targ_xfer_rsvd;
317
318 u8 fcloop_id_chg_counter;
319 u8 fcloopid_pdrvid;
320 u8 fcloop_id0;
321 u8 fcloop_id1;
322
323 u8 fcloop_state_counter;
324 u8 fcloop_state0;
325 u8 fcloop_state1;
326 u8 fcloop_state_rsvd;
327} __attribute__ ((packed));
328
329#define MAX_NOTIFY_SIZE 0x80
330#define CUR_NOTIFY_SIZE sizeof(struct notify)
331
332typedef struct {
333 u32 data_size;
334
335 struct notify notify;
336
337 u8 notify_rsvd[MAX_NOTIFY_SIZE - CUR_NOTIFY_SIZE];
338
339 u8 rebuild_rate;
340 u8 cache_flush_interval;
341 u8 sense_alert;
342 u8 drive_insert_count;
343
344 u8 battery_status;
345 u8 num_ldrv;
346 u8 recon_state[MAX_LOGICAL_DRIVES_40LD / 8];
347
348 u16 ldrv_op_status[MAX_LOGICAL_DRIVES_40LD / 8];
349
350
351 u32 ldrv_size[MAX_LOGICAL_DRIVES_40LD];
352 u8 ldrv_prop[MAX_LOGICAL_DRIVES_40LD];
353 u8 ldrv_state[MAX_LOGICAL_DRIVES_40LD];
354 u8 pdrv_state[FC_MAX_PHYSICAL_DEVICES];
355 u16 pdrv_format[FC_MAX_PHYSICAL_DEVICES / 16];
356
357 u8 targ_xfer[80];
358 u8 pad1k[263];
359} __attribute__ ((packed)) mega_inquiry3;
360
361
362
363typedef struct {
364 u8 max_commands;
365 u8 rebuild_rate;
366 u8 max_targ_per_chan;
367 u8 nchannels;
368 u8 fw_version[4];
369 u16 age_of_flash;
370 u8 chip_set_value;
371 u8 dram_size;
372 u8 cache_flush_interval;
373 u8 bios_version[4];
374 u8 board_type;
375 u8 sense_alert;
376 u8 write_config_count;
377
378 u8 drive_inserted_count;
379
380 u8 inserted_drive;
381 u8 battery_status;
382
383
384
385
386
387
388
389
390
391
392
393
394 u8 dec_fault_bus_info;
395} __attribute__ ((packed)) mega_adp_info;
396
397
398typedef struct {
399 u8 num_ldrv;
400 u8 rsvd[3];
401 u32 ldrv_size[MAX_LOGICAL_DRIVES_8LD];
402 u8 ldrv_prop[MAX_LOGICAL_DRIVES_8LD];
403 u8 ldrv_state[MAX_LOGICAL_DRIVES_8LD];
404} __attribute__ ((packed)) mega_ldrv_info;
405
406typedef struct {
407 u8 pdrv_state[MAX_PHYSICAL_DRIVES];
408 u8 rsvd;
409} __attribute__ ((packed)) mega_pdrv_info;
410
411
412typedef struct {
413 mega_adp_info adapter_info;
414 mega_ldrv_info logdrv_info;
415 mega_pdrv_info pdrv_info;
416} __attribute__ ((packed)) mraid_inquiry;
417
418
419
420typedef struct {
421 mraid_inquiry raid_inq;
422 u16 phys_drv_format[MAX_CHANNELS];
423 u8 stack_attn;
424 u8 modem_status;
425 u8 rsvd[2];
426} __attribute__ ((packed)) mraid_ext_inquiry;
427
428
429typedef struct {
430 u8 channel;
431 u8 target;
432}__attribute__ ((packed)) adp_device;
433
434typedef struct {
435 u32 start_blk;
436 u32 num_blks;
437 adp_device device[MAX_ROW_SIZE_40LD];
438}__attribute__ ((packed)) adp_span_40ld;
439
440typedef struct {
441 u32 start_blk;
442 u32 num_blks;
443 adp_device device[MAX_ROW_SIZE_8LD];
444}__attribute__ ((packed)) adp_span_8ld;
445
446typedef struct {
447 u8 span_depth;
448 u8 level;
449 u8 read_ahead;
450
451 u8 stripe_sz;
452 u8 status;
453 u8 write_mode;
454 u8 direct_io;
455 u8 row_size;
456} __attribute__ ((packed)) logdrv_param;
457
458typedef struct {
459 logdrv_param lparam;
460 adp_span_40ld span[MAX_SPAN_DEPTH];
461}__attribute__ ((packed)) logdrv_40ld;
462
463typedef struct {
464 logdrv_param lparam;
465 adp_span_8ld span[MAX_SPAN_DEPTH];
466}__attribute__ ((packed)) logdrv_8ld;
467
468typedef struct {
469 u8 type;
470 u8 cur_status;
471 u8 tag_depth;
472 u8 sync_neg;
473 u32 size;
474
475}__attribute__ ((packed)) phys_drv;
476
477typedef struct {
478 u8 nlog_drives;
479 u8 resvd[3];
480 logdrv_40ld ldrv[MAX_LOGICAL_DRIVES_40LD];
481 phys_drv pdrv[MAX_PHYSICAL_DRIVES];
482}__attribute__ ((packed)) disk_array_40ld;
483
484typedef struct {
485 u8 nlog_drives;
486 u8 resvd[3];
487 logdrv_8ld ldrv[MAX_LOGICAL_DRIVES_8LD];
488 phys_drv pdrv[MAX_PHYSICAL_DRIVES];
489}__attribute__ ((packed)) disk_array_8ld;
490
491
492
493
494
495
496
497
498
499
500
501#define IOCTL_MAX_DATALEN 4096
502
503struct uioctl_t {
504 u32 inlen;
505 u32 outlen;
506 union {
507 u8 fca[16];
508 struct {
509 u8 opcode;
510 u8 subopcode;
511 u16 adapno;
512#if BITS_PER_LONG == 32
513 u8 *buffer;
514 u8 pad[4];
515#endif
516#if BITS_PER_LONG == 64
517 u8 *buffer;
518#endif
519 u32 length;
520 } __attribute__ ((packed)) fcs;
521 } __attribute__ ((packed)) ui;
522 u8 mbox[18];
523 mega_passthru pthru;
524#if BITS_PER_LONG == 32
525 char __user *data;
526 char pad[4];
527#endif
528#if BITS_PER_LONG == 64
529 char __user *data;
530#endif
531} __attribute__ ((packed));
532
533
534
535
536
537
538
539
540#define MAX_CONTROLLERS 32
541
542struct mcontroller {
543 u64 base;
544 u8 irq;
545 u8 numldrv;
546 u8 pcibus;
547 u16 pcidev;
548 u8 pcifun;
549 u16 pciid;
550 u16 pcivendor;
551 u8 pcislot;
552 u32 uid;
553};
554
555
556
557
558typedef struct {
559 u8 cmd;
560 u8 cmdid;
561 u8 opcode;
562 u8 subopcode;
563 u32 lba;
564 u32 xferaddr;
565 u8 logdrv;
566 u8 rsvd[3];
567 u8 numstatus;
568 u8 status;
569} __attribute__ ((packed)) megacmd_t;
570
571
572
573
574#define MEGAIOC_MAGIC 'm'
575
576#define MEGAIOC_QNADAP 'm'
577#define MEGAIOC_QDRVRVER 'e'
578#define MEGAIOC_QADAPINFO 'g'
579#define MKADAP(adapno) (MEGAIOC_MAGIC << 8 | (adapno) )
580#define GETADAP(mkadap) ( (mkadap) ^ MEGAIOC_MAGIC << 8 )
581
582
583
584
585
586
587
588
589#define VENDOR_SPECIFIC_COMMANDS 0xE0
590#define MEGA_INTERNAL_CMD VENDOR_SPECIFIC_COMMANDS + 0x01
591
592
593
594
595#define USCSICMD VENDOR_SPECIFIC_COMMANDS
596
597
598
599
600#define UIOC_RD 0x00001
601#define UIOC_WR 0x00002
602
603
604
605
606#define MBOX_CMD 0x00000
607#define GET_DRIVER_VER 0x10000
608#define GET_N_ADAP 0x20000
609#define GET_ADAP_INFO 0x30000
610#define GET_CAP 0x40000
611#define GET_STATS 0x50000
612
613
614
615
616
617
618
619typedef struct {
620 char signature[8];
621 u32 opcode;
622 u32 adapno;
623 union {
624 u8 __raw_mbox[18];
625 void __user *__uaddr;
626 }__ua;
627
628#define uioc_rmbox __ua.__raw_mbox
629#define MBOX(uioc) ((megacmd_t *)&((uioc).__ua.__raw_mbox[0]))
630#define MBOX_P(uioc) ((megacmd_t __user *)&((uioc)->__ua.__raw_mbox[0]))
631#define uioc_uaddr __ua.__uaddr
632
633 u32 xferlen;
634
635 u32 flags;
636}nitioctl_t;
637
638
639
640
641
642
643typedef struct {
644 int num_ldrv;
645
646 u32 nreads[MAX_LOGICAL_DRIVES_40LD];
647
648 u32 nreadblocks[MAX_LOGICAL_DRIVES_40LD];
649
650
651 u32 nwrites[MAX_LOGICAL_DRIVES_40LD];
652
653
654 u32 nwriteblocks[MAX_LOGICAL_DRIVES_40LD];
655
656
657 u32 rd_errors[MAX_LOGICAL_DRIVES_40LD];
658
659
660 u32 wr_errors[MAX_LOGICAL_DRIVES_40LD];
661
662
663}megastat_t;
664
665
666struct private_bios_data {
667 u8 geometry:4;
668
669
670
671
672
673
674 u8 unused:4;
675 u8 boot_drv;
676
677
678
679
680 u8 rsvd[12];
681 u16 cksum;
682} __attribute__ ((packed));
683
684
685
686
687
688
689
690
691#define MEGA_MBOXCMD_LREAD 0x01
692#define MEGA_MBOXCMD_LWRITE 0x02
693#define MEGA_MBOXCMD_PASSTHRU 0x03
694#define MEGA_MBOXCMD_ADPEXTINQ 0x04
695#define MEGA_MBOXCMD_ADAPTERINQ 0x05
696#define MEGA_MBOXCMD_LREAD64 0xA7
697#define MEGA_MBOXCMD_LWRITE64 0xA8
698#define MEGA_MBOXCMD_PASSTHRU64 0xC3
699#define MEGA_MBOXCMD_EXTPTHRU 0xE3
700
701#define MAIN_MISC_OPCODE 0xA4
702#define GET_MAX_SG_SUPPORT 0x01
703
704#define FC_NEW_CONFIG 0xA1
705#define NC_SUBOP_PRODUCT_INFO 0x0E
706#define NC_SUBOP_ENQUIRY3 0x0F
707#define ENQ3_GET_SOLICITED_FULL 0x02
708#define OP_DCMD_READ_CONFIG 0x04
709#define NEW_READ_CONFIG_8LD 0x67
710#define READ_CONFIG_8LD 0x07
711#define FLUSH_ADAPTER 0x0A
712#define FLUSH_SYSTEM 0xFE
713
714
715
716
717#define FC_DEL_LOGDRV 0xA4
718#define OP_SUP_DEL_LOGDRV 0x2A
719#define OP_GET_LDID_MAP 0x18
720#define OP_DEL_LOGDRV 0x1C
721
722
723
724
725#define IS_BIOS_ENABLED 0x62
726#define GET_BIOS 0x01
727#define CHNL_CLASS 0xA9
728#define GET_CHNL_CLASS 0x00
729#define SET_CHNL_CLASS 0x01
730#define CH_RAID 0x01
731#define CH_SCSI 0x00
732#define BIOS_PVT_DATA 0x40
733#define GET_BIOS_PVT_DATA 0x00
734
735
736
737
738
739#define MEGA_GET_TARGET_ID 0x7D
740#define MEGA_CLUSTER_OP 0x70
741#define MEGA_GET_CLUSTER_MODE 0x02
742#define MEGA_CLUSTER_CMD 0x6E
743#define MEGA_RESERVE_LD 0x01
744#define MEGA_RELEASE_LD 0x02
745#define MEGA_RESET_RESERVATIONS 0x03
746#define MEGA_RESERVATION_STATUS 0x04
747#define MEGA_RESERVE_PD 0x05
748#define MEGA_RELEASE_PD 0x06
749
750
751
752
753
754#define MEGA_BATT_MODULE_MISSING 0x01
755#define MEGA_BATT_LOW_VOLTAGE 0x02
756#define MEGA_BATT_TEMP_HIGH 0x04
757#define MEGA_BATT_PACK_MISSING 0x08
758#define MEGA_BATT_CHARGE_MASK 0x30
759#define MEGA_BATT_CHARGE_DONE 0x00
760#define MEGA_BATT_CHARGE_INPROG 0x10
761#define MEGA_BATT_CHARGE_FAIL 0x20
762#define MEGA_BATT_CYCLES_EXCEEDED 0x40
763
764
765
766
767#define PDRV_UNCNF 0
768#define PDRV_ONLINE 3
769#define PDRV_FAILED 4
770#define PDRV_RBLD 5
771#define PDRV_HOTSPARE 6
772
773
774
775
776
777#define RDRV_OFFLINE 0
778#define RDRV_DEGRADED 1
779#define RDRV_OPTIMAL 2
780#define RDRV_DELETED 3
781
782
783
784
785#define NO_READ_AHEAD 0
786#define READ_AHEAD 1
787#define ADAP_READ_AHEAD 2
788#define WRMODE_WRITE_THRU 0
789#define WRMODE_WRITE_BACK 1
790#define CACHED_IO 0
791#define DIRECT_IO 1
792
793
794#define SCSI_LIST(scp) ((struct list_head *)(&(scp)->SCp))
795
796
797
798
799typedef struct {
800 int this_id;
801
802 u32 flag;
803
804 unsigned long base;
805 void __iomem *mmio_base;
806
807
808 mbox64_t *una_mbox64;
809 dma_addr_t una_mbox64_dma;
810
811 volatile mbox64_t *mbox64;
812 volatile mbox_t *mbox;
813 dma_addr_t mbox_dma;
814
815 struct pci_dev *dev;
816
817 struct list_head free_list;
818 struct list_head pending_list;
819 struct list_head completed_list;
820
821 struct Scsi_Host *host;
822
823#define MEGA_BUFFER_SIZE (2*1024)
824 u8 *mega_buffer;
825 dma_addr_t buf_dma_handle;
826
827 mega_product_info product_info;
828
829 u8 max_cmds;
830 scb_t *scb_list;
831
832 atomic_t pend_cmds;
833
834
835#if MEGA_HAVE_STATS
836 u32 nreads[MAX_LOGICAL_DRIVES_40LD];
837 u32 nreadblocks[MAX_LOGICAL_DRIVES_40LD];
838 u32 nwrites[MAX_LOGICAL_DRIVES_40LD];
839 u32 nwriteblocks[MAX_LOGICAL_DRIVES_40LD];
840 u32 rd_errors[MAX_LOGICAL_DRIVES_40LD];
841 u32 wr_errors[MAX_LOGICAL_DRIVES_40LD];
842#endif
843
844
845 u8 numldrv;
846 u8 fw_version[7];
847 u8 bios_version[7];
848
849#ifdef CONFIG_PROC_FS
850 struct proc_dir_entry *controller_proc_dir_entry;
851 struct proc_dir_entry *proc_read;
852 struct proc_dir_entry *proc_stat;
853 struct proc_dir_entry *proc_mbox;
854
855#if MEGA_HAVE_ENH_PROC
856 struct proc_dir_entry *proc_rr;
857 struct proc_dir_entry *proc_battery;
858#define MAX_PROC_CHANNELS 4
859 struct proc_dir_entry *proc_pdrvstat[MAX_PROC_CHANNELS];
860 struct proc_dir_entry *proc_rdrvstat[MAX_PROC_CHANNELS];
861#endif
862
863#endif
864
865 int has_64bit_addr;
866 int support_ext_cdb;
867 int boot_ldrv_enabled;
868 int boot_ldrv;
869 int boot_pdrv_enabled;
870 int boot_pdrv_ch;
871 int boot_pdrv_tgt;
872
873
874 int support_random_del;
875
876 int read_ldidmap;
877
878
879 atomic_t quiescent;
880
881
882
883 spinlock_t lock;
884
885 u8 logdrv_chan[MAX_CHANNELS+NVIRT_CHAN];
886
887 int mega_ch_class;
888
889 u8 sglen;
890
891 unsigned char int_cdb[MAX_COMMAND_SIZE];
892 scb_t int_scb;
893 struct mutex int_mtx;
894
895 struct completion int_waitq;
896
897
898 int has_cluster;
899}adapter_t;
900
901
902struct mega_hbas {
903 int is_bios_enabled;
904 adapter_t *hostdata_addr;
905};
906
907
908
909
910
911
912#define IN_ABORT 0x80000000L
913#define IN_RESET 0x40000000L
914#define BOARD_MEMMAP 0x20000000L
915#define BOARD_IOMAP 0x10000000L
916#define BOARD_40LD 0x08000000L
917#define BOARD_64BIT 0x04000000L
918
919#define INTR_VALID 0x40
920
921#define PCI_CONF_AMISIG 0xa0
922#define PCI_CONF_AMISIG64 0xa4
923
924
925#define MEGA_DMA_TYPE_NONE 0xFFFF
926#define MEGA_BULK_DATA 0x0001
927#define MEGA_SGLIST 0x0002
928
929
930
931
932
933
934#define CMD_PORT 0x00
935#define ACK_PORT 0x00
936#define TOGGLE_PORT 0x01
937#define INTR_PORT 0x0a
938
939#define MBOX_BUSY_PORT 0x00
940#define MBOX_PORT0 0x04
941#define MBOX_PORT1 0x05
942#define MBOX_PORT2 0x06
943#define MBOX_PORT3 0x07
944#define ENABLE_MBOX_REGION 0x0B
945
946
947#define ISSUE_BYTE 0x10
948#define ACK_BYTE 0x08
949#define ENABLE_INTR_BYTE 0xc0
950#define DISABLE_INTR_BYTE 0x00
951#define VALID_INTR_BYTE 0x40
952#define MBOX_BUSY_BYTE 0x10
953#define ENABLE_MBOX_BYTE 0x00
954
955
956
957#define issue_command(adapter) \
958 outb_p(ISSUE_BYTE, (adapter)->base + CMD_PORT)
959
960#define irq_state(adapter) inb_p((adapter)->base + INTR_PORT)
961
962#define set_irq_state(adapter, value) \
963 outb_p((value), (adapter)->base + INTR_PORT)
964
965#define irq_ack(adapter) \
966 outb_p(ACK_BYTE, (adapter)->base + ACK_PORT)
967
968#define irq_enable(adapter) \
969 outb_p(ENABLE_INTR_BYTE, (adapter)->base + TOGGLE_PORT)
970
971#define irq_disable(adapter) \
972 outb_p(DISABLE_INTR_BYTE, (adapter)->base + TOGGLE_PORT)
973
974
975
976
977
978
979
980
981
982
983
984const char *megaraid_info (struct Scsi_Host *);
985
986static int mega_query_adapter(adapter_t *);
987static int issue_scb(adapter_t *, scb_t *);
988static int mega_setup_mailbox(adapter_t *);
989
990static int megaraid_queue (struct Scsi_Host *, struct scsi_cmnd *);
991static scb_t * mega_build_cmd(adapter_t *, Scsi_Cmnd *, int *);
992static void __mega_runpendq(adapter_t *);
993static int issue_scb_block(adapter_t *, u_char *);
994
995static irqreturn_t megaraid_isr_memmapped(int, void *);
996static irqreturn_t megaraid_isr_iomapped(int, void *);
997
998static void mega_free_scb(adapter_t *, scb_t *);
999
1000static int megaraid_abort(Scsi_Cmnd *);
1001static int megaraid_reset(Scsi_Cmnd *);
1002static int megaraid_abort_and_reset(adapter_t *, Scsi_Cmnd *, int);
1003static int megaraid_biosparam(struct scsi_device *, struct block_device *,
1004 sector_t, int []);
1005
1006static int mega_build_sglist (adapter_t *adapter, scb_t *scb,
1007 u32 *buffer, u32 *length);
1008static int __mega_busywait_mbox (adapter_t *);
1009static void mega_rundoneq (adapter_t *);
1010static void mega_cmd_done(adapter_t *, u8 [], int, int);
1011static inline void mega_free_sgl (adapter_t *adapter);
1012static void mega_8_to_40ld (mraid_inquiry *inquiry,
1013 mega_inquiry3 *enquiry3, mega_product_info *);
1014
1015static int megadev_open (struct inode *, struct file *);
1016static int megadev_ioctl (struct file *, unsigned int, unsigned long);
1017static int mega_m_to_n(void __user *, nitioctl_t *);
1018static int mega_n_to_m(void __user *, megacmd_t *);
1019
1020static int mega_init_scb (adapter_t *);
1021
1022static int mega_is_bios_enabled (adapter_t *);
1023
1024#ifdef CONFIG_PROC_FS
1025static int mega_print_inquiry(char *, char *);
1026static void mega_create_proc_entry(int, struct proc_dir_entry *);
1027static int proc_read_config(char *, char **, off_t, int, int *, void *);
1028static int proc_read_stat(char *, char **, off_t, int, int *, void *);
1029static int proc_read_mbox(char *, char **, off_t, int, int *, void *);
1030static int proc_rebuild_rate(char *, char **, off_t, int, int *, void *);
1031static int proc_battery(char *, char **, off_t, int, int *, void *);
1032static int proc_pdrv_ch0(char *, char **, off_t, int, int *, void *);
1033static int proc_pdrv_ch1(char *, char **, off_t, int, int *, void *);
1034static int proc_pdrv_ch2(char *, char **, off_t, int, int *, void *);
1035static int proc_pdrv_ch3(char *, char **, off_t, int, int *, void *);
1036static int proc_pdrv(adapter_t *, char *, int);
1037static int proc_rdrv_10(char *, char **, off_t, int, int *, void *);
1038static int proc_rdrv_20(char *, char **, off_t, int, int *, void *);
1039static int proc_rdrv_30(char *, char **, off_t, int, int *, void *);
1040static int proc_rdrv_40(char *, char **, off_t, int, int *, void *);
1041static int proc_rdrv(adapter_t *, char *, int, int);
1042
1043static int mega_adapinq(adapter_t *, dma_addr_t);
1044static int mega_internal_dev_inquiry(adapter_t *, u8, u8, dma_addr_t);
1045#endif
1046
1047static int mega_support_ext_cdb(adapter_t *);
1048static mega_passthru* mega_prepare_passthru(adapter_t *, scb_t *,
1049 Scsi_Cmnd *, int, int);
1050static mega_ext_passthru* mega_prepare_extpassthru(adapter_t *,
1051 scb_t *, Scsi_Cmnd *, int, int);
1052static void mega_enum_raid_scsi(adapter_t *);
1053static void mega_get_boot_drv(adapter_t *);
1054static int mega_support_random_del(adapter_t *);
1055static int mega_del_logdrv(adapter_t *, int);
1056static int mega_do_del_logdrv(adapter_t *, int);
1057static void mega_get_max_sgl(adapter_t *);
1058static int mega_internal_command(adapter_t *, megacmd_t *, mega_passthru *);
1059static void mega_internal_done(Scsi_Cmnd *);
1060static int mega_support_cluster(adapter_t *);
1061#endif
1062
1063
1064