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25#ifndef _MV_SAS_H_
26#define _MV_SAS_H_
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/spinlock.h>
31#include <linux/delay.h>
32#include <linux/types.h>
33#include <linux/ctype.h>
34#include <linux/dma-mapping.h>
35#include <linux/pci.h>
36#include <linux/platform_device.h>
37#include <linux/interrupt.h>
38#include <linux/irq.h>
39#include <linux/slab.h>
40#include <linux/vmalloc.h>
41#include <scsi/libsas.h>
42#include <scsi/scsi.h>
43#include <scsi/scsi_tcq.h>
44#include <scsi/sas_ata.h>
45#include <linux/version.h>
46#include "mv_defs.h"
47
48#define DRV_NAME "mvsas"
49#define DRV_VERSION "0.8.2"
50#define _MV_DUMP 0
51#define MVS_ID_NOT_MAPPED 0x7f
52
53
54#define WIDE_PORT_MAX_PHY 4
55#define MV_DISABLE_NCQ 0
56#define mv_printk(fmt, arg ...) \
57 printk(KERN_DEBUG"%s %d:" fmt, __FILE__, __LINE__, ## arg)
58#ifdef MV_DEBUG
59#define mv_dprintk(format, arg...) \
60 printk(KERN_DEBUG"%s %d:" format, __FILE__, __LINE__, ## arg)
61#else
62#define mv_dprintk(format, arg...)
63#endif
64#define MV_MAX_U32 0xffffffff
65
66extern struct mvs_tgt_initiator mvs_tgt;
67extern struct mvs_info *tgt_mvi;
68extern const struct mvs_dispatch mvs_64xx_dispatch;
69extern const struct mvs_dispatch mvs_94xx_dispatch;
70
71#define DEV_IS_EXPANDER(type) \
72 ((type == EDGE_DEV) || (type == FANOUT_DEV))
73
74#define bit(n) ((u32)1 << n)
75
76#define for_each_phy(__lseq_mask, __mc, __lseq) \
77 for ((__mc) = (__lseq_mask), (__lseq) = 0; \
78 (__mc) != 0 ; \
79 (++__lseq), (__mc) >>= 1)
80
81#define MV_INIT_DELAYED_WORK(w, f, d) INIT_DELAYED_WORK(w, f)
82#define UNASSOC_D2H_FIS(id) \
83 ((void *) mvi->rx_fis + 0x100 * id)
84#define SATA_RECEIVED_FIS_LIST(reg_set) \
85 ((void *) mvi->rx_fis + mvi->chip->fis_offs + 0x100 * reg_set)
86#define SATA_RECEIVED_SDB_FIS(reg_set) \
87 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x58)
88#define SATA_RECEIVED_D2H_FIS(reg_set) \
89 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x40)
90#define SATA_RECEIVED_PIO_FIS(reg_set) \
91 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x20)
92#define SATA_RECEIVED_DMA_FIS(reg_set) \
93 (SATA_RECEIVED_FIS_LIST(reg_set) + 0x00)
94
95enum dev_status {
96 MVS_DEV_NORMAL = 0x0,
97 MVS_DEV_EH = 0x1,
98};
99
100
101struct mvs_info;
102
103struct mvs_dispatch {
104 char *name;
105 int (*chip_init)(struct mvs_info *mvi);
106 int (*spi_init)(struct mvs_info *mvi);
107 int (*chip_ioremap)(struct mvs_info *mvi);
108 void (*chip_iounmap)(struct mvs_info *mvi);
109 irqreturn_t (*isr)(struct mvs_info *mvi, int irq, u32 stat);
110 u32 (*isr_status)(struct mvs_info *mvi, int irq);
111 void (*interrupt_enable)(struct mvs_info *mvi);
112 void (*interrupt_disable)(struct mvs_info *mvi);
113
114 u32 (*read_phy_ctl)(struct mvs_info *mvi, u32 port);
115 void (*write_phy_ctl)(struct mvs_info *mvi, u32 port, u32 val);
116
117 u32 (*read_port_cfg_data)(struct mvs_info *mvi, u32 port);
118 void (*write_port_cfg_data)(struct mvs_info *mvi, u32 port, u32 val);
119 void (*write_port_cfg_addr)(struct mvs_info *mvi, u32 port, u32 addr);
120
121 u32 (*read_port_vsr_data)(struct mvs_info *mvi, u32 port);
122 void (*write_port_vsr_data)(struct mvs_info *mvi, u32 port, u32 val);
123 void (*write_port_vsr_addr)(struct mvs_info *mvi, u32 port, u32 addr);
124
125 u32 (*read_port_irq_stat)(struct mvs_info *mvi, u32 port);
126 void (*write_port_irq_stat)(struct mvs_info *mvi, u32 port, u32 val);
127
128 u32 (*read_port_irq_mask)(struct mvs_info *mvi, u32 port);
129 void (*write_port_irq_mask)(struct mvs_info *mvi, u32 port, u32 val);
130
131 void (*get_sas_addr)(void *buf, u32 buflen);
132 void (*command_active)(struct mvs_info *mvi, u32 slot_idx);
133 void (*clear_srs_irq)(struct mvs_info *mvi, u8 reg_set, u8 clear_all);
134 void (*issue_stop)(struct mvs_info *mvi, enum mvs_port_type type,
135 u32 tfs);
136 void (*start_delivery)(struct mvs_info *mvi, u32 tx);
137 u32 (*rx_update)(struct mvs_info *mvi);
138 void (*int_full)(struct mvs_info *mvi);
139 u8 (*assign_reg_set)(struct mvs_info *mvi, u8 *tfs);
140 void (*free_reg_set)(struct mvs_info *mvi, u8 *tfs);
141 u32 (*prd_size)(void);
142 u32 (*prd_count)(void);
143 void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
144 void (*detect_porttype)(struct mvs_info *mvi, int i);
145 int (*oob_done)(struct mvs_info *mvi, int i);
146 void (*fix_phy_info)(struct mvs_info *mvi, int i,
147 struct sas_identify_frame *id);
148 void (*phy_work_around)(struct mvs_info *mvi, int i);
149 void (*phy_set_link_rate)(struct mvs_info *mvi, u32 phy_id,
150 struct sas_phy_linkrates *rates);
151 u32 (*phy_max_link_rate)(void);
152 void (*phy_disable)(struct mvs_info *mvi, u32 phy_id);
153 void (*phy_enable)(struct mvs_info *mvi, u32 phy_id);
154 void (*phy_reset)(struct mvs_info *mvi, u32 phy_id, int hard);
155 void (*stp_reset)(struct mvs_info *mvi, u32 phy_id);
156 void (*clear_active_cmds)(struct mvs_info *mvi);
157 u32 (*spi_read_data)(struct mvs_info *mvi);
158 void (*spi_write_data)(struct mvs_info *mvi, u32 data);
159 int (*spi_buildcmd)(struct mvs_info *mvi,
160 u32 *dwCmd,
161 u8 cmd,
162 u8 read,
163 u8 length,
164 u32 addr
165 );
166 int (*spi_issuecmd)(struct mvs_info *mvi, u32 cmd);
167 int (*spi_waitdataready)(struct mvs_info *mvi, u32 timeout);
168#ifndef DISABLE_HOTPLUG_DMA_FIX
169 void (*dma_fix)(dma_addr_t buf_dma, int buf_len, int from, void *prd);
170#endif
171
172};
173
174struct mvs_chip_info {
175 u32 n_host;
176 u32 n_phy;
177 u32 fis_offs;
178 u32 fis_count;
179 u32 srs_sz;
180 u32 slot_width;
181 const struct mvs_dispatch *dispatch;
182};
183#define MVS_CHIP_SLOT_SZ (1U << mvi->chip->slot_width)
184#define MVS_RX_FISL_SZ \
185 (mvi->chip->fis_offs + (mvi->chip->fis_count * 0x100))
186#define MVS_CHIP_DISP (mvi->chip->dispatch)
187
188struct mvs_err_info {
189 __le32 flags;
190 __le32 flags2;
191};
192
193struct mvs_cmd_hdr {
194 __le32 flags;
195 __le32 lens;
196 __le32 tags;
197 __le32 data_len;
198 __le64 cmd_tbl;
199 __le64 open_frame;
200 __le64 status_buf;
201 __le64 prd_tbl;
202 __le32 reserved[4];
203};
204
205struct mvs_port {
206 struct asd_sas_port sas_port;
207 u8 port_attached;
208 u8 wide_port_phymap;
209 struct list_head list;
210};
211
212struct mvs_phy {
213 struct mvs_info *mvi;
214 struct mvs_port *port;
215 struct asd_sas_phy sas_phy;
216 struct sas_identify identify;
217 struct scsi_device *sdev;
218 struct timer_list timer;
219 u64 dev_sas_addr;
220 u64 att_dev_sas_addr;
221 u32 att_dev_info;
222 u32 dev_info;
223 u32 phy_type;
224 u32 phy_status;
225 u32 irq_status;
226 u32 frame_rcvd_size;
227 u8 frame_rcvd[32];
228 u8 phy_attached;
229 u8 phy_mode;
230 u8 reserved[2];
231 u32 phy_event;
232 enum sas_linkrate minimum_linkrate;
233 enum sas_linkrate maximum_linkrate;
234};
235
236struct mvs_device {
237 struct list_head dev_entry;
238 enum sas_dev_type dev_type;
239 struct mvs_info *mvi_info;
240 struct domain_device *sas_device;
241 struct timer_list timer;
242 u32 attached_phy;
243 u32 device_id;
244 u32 running_req;
245 u8 taskfileset;
246 u8 dev_status;
247 u16 reserved;
248};
249
250struct mvs_slot_info {
251 struct list_head entry;
252 union {
253 struct sas_task *task;
254 void *tdata;
255 };
256 u32 n_elem;
257 u32 tx;
258 u32 slot_tag;
259
260
261
262
263 void *buf;
264 dma_addr_t buf_dma;
265#if _MV_DUMP
266 u32 cmd_size;
267#endif
268 void *response;
269 struct mvs_port *port;
270 struct mvs_device *device;
271 void *open_frame;
272};
273
274struct mvs_info {
275 unsigned long flags;
276
277
278 spinlock_t lock;
279
280
281 struct pci_dev *pdev;
282 struct device *dev;
283
284
285 void __iomem *regs;
286
287
288 void __iomem *regs_ex;
289 u8 sas_addr[SAS_ADDR_SIZE];
290
291
292 struct sas_ha_struct *sas;
293 struct Scsi_Host *shost;
294
295
296 __le32 *tx;
297 dma_addr_t tx_dma;
298
299
300 u32 tx_prod;
301
302
303 __le32 *rx;
304 dma_addr_t rx_dma;
305
306
307 u32 rx_cons;
308
309
310 __le32 *rx_fis;
311 dma_addr_t rx_fis_dma;
312
313
314 struct mvs_cmd_hdr *slot;
315 dma_addr_t slot_dma;
316
317 u32 chip_id;
318 const struct mvs_chip_info *chip;
319
320 int tags_num;
321 DECLARE_BITMAP(tags, MVS_SLOTS);
322
323 struct mvs_phy phy[MVS_MAX_PHYS];
324 struct mvs_port port[MVS_MAX_PHYS];
325 u32 irq;
326 u32 exp_req;
327 u32 id;
328 u64 sata_reg_set;
329 struct list_head *hba_list;
330 struct list_head soc_entry;
331 struct list_head wq_list;
332 unsigned long instance;
333 u16 flashid;
334 u32 flashsize;
335 u32 flashsectSize;
336
337 void *addon;
338 struct mvs_device devices[MVS_MAX_DEVICES];
339#ifndef DISABLE_HOTPLUG_DMA_FIX
340 void *bulk_buffer;
341 dma_addr_t bulk_buffer_dma;
342#define TRASH_BUCKET_SIZE 0x20000
343#endif
344 struct mvs_slot_info slot_info[0];
345};
346
347struct mvs_prv_info{
348 u8 n_host;
349 u8 n_phy;
350 u16 reserve;
351 struct mvs_info *mvi[2];
352};
353
354struct mvs_wq {
355 struct delayed_work work_q;
356 struct mvs_info *mvi;
357 void *data;
358 int handler;
359 struct list_head entry;
360};
361
362struct mvs_task_exec_info {
363 struct sas_task *task;
364 struct mvs_cmd_hdr *hdr;
365 struct mvs_port *port;
366 u32 tag;
367 int n_elem;
368};
369
370
371
372void mvs_get_sas_addr(void *buf, u32 buflen);
373void mvs_tag_clear(struct mvs_info *mvi, u32 tag);
374void mvs_tag_free(struct mvs_info *mvi, u32 tag);
375void mvs_tag_set(struct mvs_info *mvi, unsigned int tag);
376int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out);
377void mvs_tag_init(struct mvs_info *mvi);
378void mvs_iounmap(void __iomem *regs);
379int mvs_ioremap(struct mvs_info *mvi, int bar, int bar_ex);
380void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard);
381int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
382 void *funcdata);
383void __devinit mvs_set_sas_addr(struct mvs_info *mvi, int port_id,
384 u32 off_lo, u32 off_hi, u64 sas_addr);
385int mvs_slave_alloc(struct scsi_device *scsi_dev);
386int mvs_slave_configure(struct scsi_device *sdev);
387void mvs_scan_start(struct Scsi_Host *shost);
388int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time);
389int mvs_queue_command(struct sas_task *task, const int num,
390 gfp_t gfp_flags);
391int mvs_abort_task(struct sas_task *task);
392int mvs_abort_task_set(struct domain_device *dev, u8 *lun);
393int mvs_clear_aca(struct domain_device *dev, u8 *lun);
394int mvs_clear_task_set(struct domain_device *dev, u8 * lun);
395void mvs_port_formed(struct asd_sas_phy *sas_phy);
396void mvs_port_deformed(struct asd_sas_phy *sas_phy);
397int mvs_dev_found(struct domain_device *dev);
398void mvs_dev_gone(struct domain_device *dev);
399int mvs_lu_reset(struct domain_device *dev, u8 *lun);
400int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags);
401int mvs_I_T_nexus_reset(struct domain_device *dev);
402int mvs_query_task(struct sas_task *task);
403void mvs_release_task(struct mvs_info *mvi,
404 struct domain_device *dev);
405void mvs_do_release_task(struct mvs_info *mvi, int phy_no,
406 struct domain_device *dev);
407void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events);
408void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st);
409int mvs_int_rx(struct mvs_info *mvi, bool self_clear);
410void mvs_hexdump(u32 size, u8 *data, u32 baseaddr);
411#endif
412
413
