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24
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/ioport.h>
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/wait.h>
34#include <linux/spinlock.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37#include <linux/blkdev.h>
38#include <linux/firmware.h>
39#include <linux/module.h>
40#include <linux/moduleparam.h>
41#include <linux/hdreg.h>
42#include <linux/version.h>
43#include <linux/io.h>
44#include <linux/slab.h>
45#include <asm/irq.h>
46#include <asm/processor.h>
47#include <linux/libata.h>
48#include <linux/mutex.h>
49#include <scsi/scsi.h>
50#include <scsi/scsi_host.h>
51#include <scsi/scsi_device.h>
52#include <scsi/scsi_tcq.h>
53#include <scsi/scsi_eh.h>
54#include <scsi/scsi_cmnd.h>
55#include <scsi/scsicam.h>
56
57#include "pmcraid.h"
58
59
60
61
62static unsigned int pmcraid_debug_log;
63static unsigned int pmcraid_disable_aen;
64static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
65static unsigned int pmcraid_enable_msix;
66
67
68
69
70
71static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
72
73
74
75
76
77
78static unsigned int pmcraid_major;
79static struct class *pmcraid_class;
80DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
81
82
83
84
85MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
86MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(PMCRAID_DRIVER_VERSION);
89
90module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
91MODULE_PARM_DESC(log_level,
92 "Enables firmware error code logging, default :1 high-severity"
93 " errors, 2: all errors including high-severity errors,"
94 " 0: disables logging");
95
96module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
97MODULE_PARM_DESC(debug,
98 "Enable driver verbose message logging. Set 1 to enable."
99 "(default: 0)");
100
101module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
102MODULE_PARM_DESC(disable_aen,
103 "Disable driver aen notifications to apps. Set 1 to disable."
104 "(default: 0)");
105
106
107
108
109static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
110 {
111 .ioastatus = 0x0,
112 .ioarrin = 0x00040,
113 .mailbox = 0x7FC30,
114 .global_intr_mask = 0x00034,
115 .ioa_host_intr = 0x0009C,
116 .ioa_host_intr_clr = 0x000A0,
117 .ioa_host_msix_intr = 0x7FC40,
118 .ioa_host_mask = 0x7FC28,
119 .ioa_host_mask_clr = 0x7FC28,
120 .host_ioa_intr = 0x00020,
121 .host_ioa_intr_clr = 0x00020,
122 .transop_timeout = 300
123 }
124};
125
126
127
128
129static struct pci_device_id pmcraid_pci_table[] __devinitdata = {
130 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
131 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
132 },
133 {}
134};
135
136MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
137
138
139
140
141
142
143
144
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146
147
148
149
150
151
152static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
153{
154 struct pmcraid_resource_entry *temp, *res = NULL;
155 struct pmcraid_instance *pinstance;
156 u8 target, bus, lun;
157 unsigned long lock_flags;
158 int rc = -ENXIO;
159 u16 fw_version;
160
161 pinstance = shost_priv(scsi_dev->host);
162
163 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
164
165
166
167
168
169
170 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
171 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
172
173
174 if (RES_IS_VSET(temp->cfg_entry)) {
175 if (fw_version <= PMCRAID_FW_VERSION_1)
176 target = temp->cfg_entry.unique_flags1;
177 else
178 target = temp->cfg_entry.array_id & 0xFF;
179
180 if (target > PMCRAID_MAX_VSET_TARGETS)
181 continue;
182 bus = PMCRAID_VSET_BUS_ID;
183 lun = 0;
184 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
185 target = RES_TARGET(temp->cfg_entry.resource_address);
186 bus = PMCRAID_PHYS_BUS_ID;
187 lun = RES_LUN(temp->cfg_entry.resource_address);
188 } else {
189 continue;
190 }
191
192 if (bus == scsi_dev->channel &&
193 target == scsi_dev->id &&
194 lun == scsi_dev->lun) {
195 res = temp;
196 break;
197 }
198 }
199
200 if (res) {
201 res->scsi_dev = scsi_dev;
202 scsi_dev->hostdata = res;
203 res->change_detected = 0;
204 atomic_set(&res->read_failures, 0);
205 atomic_set(&res->write_failures, 0);
206 rc = 0;
207 }
208 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
209 return rc;
210}
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
226{
227 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
228
229 if (!res)
230 return 0;
231
232
233 if (RES_IS_GSCSI(res->cfg_entry) &&
234 scsi_dev->type != TYPE_ENCLOSURE)
235 return -ENXIO;
236
237 pmcraid_info("configuring %x:%x:%x:%x\n",
238 scsi_dev->host->unique_id,
239 scsi_dev->channel,
240 scsi_dev->id,
241 scsi_dev->lun);
242
243 if (RES_IS_GSCSI(res->cfg_entry)) {
244 scsi_dev->allow_restart = 1;
245 } else if (RES_IS_VSET(res->cfg_entry)) {
246 scsi_dev->allow_restart = 1;
247 blk_queue_rq_timeout(scsi_dev->request_queue,
248 PMCRAID_VSET_IO_TIMEOUT);
249 blk_queue_max_hw_sectors(scsi_dev->request_queue,
250 PMCRAID_VSET_MAX_SECTORS);
251 }
252
253 if (scsi_dev->tagged_supported &&
254 (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
255 scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
256 scsi_adjust_queue_depth(scsi_dev, MSG_SIMPLE_TAG,
257 scsi_dev->host->cmd_per_lun);
258 } else {
259 scsi_adjust_queue_depth(scsi_dev, 0,
260 scsi_dev->host->cmd_per_lun);
261 }
262
263 return 0;
264}
265
266
267
268
269
270
271
272
273
274
275
276
277static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
278{
279 struct pmcraid_resource_entry *res;
280
281 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
282
283 if (res)
284 res->scsi_dev = NULL;
285
286 scsi_dev->hostdata = NULL;
287}
288
289
290
291
292
293
294
295
296
297
298static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth,
299 int reason)
300{
301 if (reason != SCSI_QDEPTH_DEFAULT)
302 return -EOPNOTSUPP;
303
304 if (depth > PMCRAID_MAX_CMD_PER_LUN)
305 depth = PMCRAID_MAX_CMD_PER_LUN;
306
307 scsi_adjust_queue_depth(scsi_dev, scsi_get_tag_type(scsi_dev), depth);
308
309 return scsi_dev->queue_depth;
310}
311
312
313
314
315
316
317
318
319
320static int pmcraid_change_queue_type(struct scsi_device *scsi_dev, int tag)
321{
322 struct pmcraid_resource_entry *res;
323
324 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
325
326 if ((res) && scsi_dev->tagged_supported &&
327 (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry))) {
328 scsi_set_tag_type(scsi_dev, tag);
329
330 if (tag)
331 scsi_activate_tcq(scsi_dev, scsi_dev->queue_depth);
332 else
333 scsi_deactivate_tcq(scsi_dev, scsi_dev->queue_depth);
334 } else
335 tag = 0;
336
337 return tag;
338}
339
340
341
342
343
344
345
346
347
348
349
350void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
351{
352 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
353 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
354
355 if (index >= 0) {
356
357 u32 ioasa_offset =
358 offsetof(struct pmcraid_control_block, ioasa);
359
360 cmd->index = index;
361 ioarcb->response_handle = cpu_to_le32(index << 2);
362 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
363 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
364 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
365 } else {
366
367
368
369 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
370 ioarcb->hrrq_id = 0;
371 ioarcb->request_flags0 = 0;
372 ioarcb->request_flags1 = 0;
373 ioarcb->cmd_timeout = 0;
374 ioarcb->ioarcb_bus_addr &= (~0x1FULL);
375 ioarcb->ioadl_bus_addr = 0;
376 ioarcb->ioadl_length = 0;
377 ioarcb->data_transfer_length = 0;
378 ioarcb->add_cmd_param_length = 0;
379 ioarcb->add_cmd_param_offset = 0;
380 cmd->ioa_cb->ioasa.ioasc = 0;
381 cmd->ioa_cb->ioasa.residual_data_length = 0;
382 cmd->time_left = 0;
383 }
384
385 cmd->cmd_done = NULL;
386 cmd->scsi_cmd = NULL;
387 cmd->release = 0;
388 cmd->completion_req = 0;
389 cmd->sense_buffer = 0;
390 cmd->sense_buffer_dma = 0;
391 cmd->dma_handle = 0;
392 init_timer(&cmd->timer);
393}
394
395
396
397
398
399
400
401
402
403static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
404{
405 pmcraid_init_cmdblk(cmd, -1);
406}
407
408
409
410
411
412
413
414
415static struct pmcraid_cmd *pmcraid_get_free_cmd(
416 struct pmcraid_instance *pinstance
417)
418{
419 struct pmcraid_cmd *cmd = NULL;
420 unsigned long lock_flags;
421
422
423 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
424
425 if (!list_empty(&pinstance->free_cmd_pool)) {
426 cmd = list_entry(pinstance->free_cmd_pool.next,
427 struct pmcraid_cmd, free_list);
428 list_del(&cmd->free_list);
429 }
430 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
431
432
433 if (cmd != NULL)
434 pmcraid_reinit_cmdblk(cmd);
435 return cmd;
436}
437
438
439
440
441
442
443
444
445void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
446{
447 struct pmcraid_instance *pinstance = cmd->drv_inst;
448 unsigned long lock_flags;
449
450 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
451 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
452 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
453}
454
455
456
457
458
459
460
461
462
463static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
464{
465 return (pinstance->interrupt_mode) ?
466 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
467 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
468}
469
470
471
472
473
474
475
476
477
478
479static void pmcraid_disable_interrupts(
480 struct pmcraid_instance *pinstance,
481 u32 intrs
482)
483{
484 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
485 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
486
487 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
488 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
489 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
490
491 if (!pinstance->interrupt_mode) {
492 iowrite32(intrs,
493 pinstance->int_regs.ioa_host_interrupt_mask_reg);
494 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
495 }
496}
497
498
499
500
501
502
503
504
505
506
507static void pmcraid_enable_interrupts(
508 struct pmcraid_instance *pinstance,
509 u32 intrs
510)
511{
512 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
513 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
514
515 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
516
517 if (!pinstance->interrupt_mode) {
518 iowrite32(~intrs,
519 pinstance->int_regs.ioa_host_interrupt_mask_reg);
520 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
521 }
522
523 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
524 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
525 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
526}
527
528
529
530
531
532
533
534
535
536static void pmcraid_clr_trans_op(
537 struct pmcraid_instance *pinstance
538)
539{
540 unsigned long lock_flags;
541
542 if (!pinstance->interrupt_mode) {
543 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
544 pinstance->int_regs.ioa_host_interrupt_mask_reg);
545 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
546 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
547 pinstance->int_regs.ioa_host_interrupt_clr_reg);
548 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
549 }
550
551 if (pinstance->reset_cmd != NULL) {
552 del_timer(&pinstance->reset_cmd->timer);
553 spin_lock_irqsave(
554 pinstance->host->host_lock, lock_flags);
555 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
556 spin_unlock_irqrestore(
557 pinstance->host->host_lock, lock_flags);
558 }
559}
560
561
562
563
564
565
566
567
568
569
570static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
571{
572 u32 mask;
573 u32 intrs;
574 u32 alerts;
575
576 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
577 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
578 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
579
580 if ((mask & INTRS_HRRQ_VALID) == 0 ||
581 (alerts & DOORBELL_IOA_RESET_ALERT) ||
582 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
583 pmcraid_info("IOA requires hard reset\n");
584 pinstance->ioa_hard_reset = 1;
585 }
586
587
588 if (intrs & INTRS_IOA_UNIT_CHECK)
589 pinstance->ioa_unit_check = 1;
590}
591
592
593
594
595
596
597
598
599static void pmcraid_ioa_reset(struct pmcraid_cmd *);
600
601static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
602{
603 struct pmcraid_instance *pinstance = cmd->drv_inst;
604 unsigned long lock_flags;
605 int rc;
606 u16 pci_reg;
607
608 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
609
610
611 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
612 cmd->time_left > 0) {
613 pmcraid_info("BIST not complete, waiting another 2 secs\n");
614 cmd->timer.expires = jiffies + cmd->time_left;
615 cmd->time_left = 0;
616 cmd->timer.data = (unsigned long)cmd;
617 cmd->timer.function =
618 (void (*)(unsigned long))pmcraid_bist_done;
619 add_timer(&cmd->timer);
620 } else {
621 cmd->time_left = 0;
622 pmcraid_info("BIST is complete, proceeding with reset\n");
623 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
624 pmcraid_ioa_reset(cmd);
625 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
626 }
627}
628
629
630
631
632
633
634
635static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
636{
637 struct pmcraid_instance *pinstance = cmd->drv_inst;
638 u32 doorbells, intrs;
639
640
641 iowrite32(DOORBELL_IOA_START_BIST,
642 pinstance->int_regs.host_ioa_interrupt_reg);
643 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
644 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
645 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
646 doorbells, intrs);
647
648 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
649 cmd->timer.data = (unsigned long)cmd;
650 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
651 cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
652 add_timer(&cmd->timer);
653}
654
655
656
657
658
659
660
661static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
662{
663 struct pmcraid_instance *pinstance = cmd->drv_inst;
664 u32 status = ioread32(pinstance->ioa_status);
665 unsigned long lock_flags;
666
667
668
669
670
671 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
672 cmd->time_left <= 0) {
673 pmcraid_info("critical op is reset proceeding with reset\n");
674 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
675 pmcraid_ioa_reset(cmd);
676 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
677 } else {
678 pmcraid_info("critical op is not yet reset waiting again\n");
679
680 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
681 cmd->timer.data = (unsigned long)cmd;
682 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
683 cmd->timer.function =
684 (void (*)(unsigned long))pmcraid_reset_alert_done;
685 add_timer(&cmd->timer);
686 }
687}
688
689
690
691
692
693
694
695
696
697
698static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
699static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
700{
701 struct pmcraid_instance *pinstance = cmd->drv_inst;
702 u32 doorbells;
703 int rc;
704 u16 pci_reg;
705
706
707
708
709
710
711 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
712 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
713
714
715
716
717
718
719 cmd->time_left = PMCRAID_RESET_TIMEOUT;
720 cmd->timer.data = (unsigned long)cmd;
721 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
722 cmd->timer.function =
723 (void (*)(unsigned long))pmcraid_reset_alert_done;
724 add_timer(&cmd->timer);
725
726 iowrite32(DOORBELL_IOA_RESET_ALERT,
727 pinstance->int_regs.host_ioa_interrupt_reg);
728 doorbells =
729 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
730 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
731 } else {
732 pmcraid_info("PCI config is not accessible starting BIST\n");
733 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
734 pmcraid_start_bist(cmd);
735 }
736}
737
738
739
740
741
742
743
744
745
746
747
748static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
749{
750 struct pmcraid_instance *pinstance = cmd->drv_inst;
751 unsigned long lock_flags;
752
753 dev_info(&pinstance->pdev->dev,
754 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
755 cmd->ioa_cb->ioarcb.cdb[0]);
756
757
758
759
760
761
762
763 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
764 if (!pinstance->ioa_reset_in_progress) {
765 pinstance->ioa_reset_attempts = 0;
766 cmd = pmcraid_get_free_cmd(pinstance);
767
768
769
770
771 if (cmd == NULL) {
772 spin_unlock_irqrestore(pinstance->host->host_lock,
773 lock_flags);
774 pmcraid_err("no free cmnd block for timeout handler\n");
775 return;
776 }
777
778 pinstance->reset_cmd = cmd;
779 pinstance->ioa_reset_in_progress = 1;
780 } else {
781 pmcraid_info("reset is already in progress\n");
782
783 if (pinstance->reset_cmd != cmd) {
784
785
786
787
788 pmcraid_err("cmd is pending but reset in progress\n");
789 }
790
791
792
793
794
795
796 if (cmd == pinstance->reset_cmd)
797 cmd->cmd_done = pmcraid_ioa_reset;
798 }
799
800
801 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
802 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
803 pmcraid_notify_ioastate(pinstance,
804 PMC_DEVICE_EVENT_RESET_START);
805
806 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
807 scsi_block_requests(pinstance->host);
808 pmcraid_reset_alert(cmd);
809 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
810}
811
812
813
814
815
816
817
818
819
820static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
821{
822 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
823 cmd->ioa_cb->ioarcb.cdb[0],
824 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
825
826
827
828
829
830
831 if (cmd->completion_req) {
832 cmd->completion_req = 0;
833 complete(&cmd->wait_for_completion);
834 }
835
836
837
838
839
840 if (cmd->release) {
841 cmd->release = 0;
842 pmcraid_return_cmd(cmd);
843 }
844}
845
846
847
848
849
850
851
852
853
854
855
856
857
858static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
859{
860 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
861 cmd->ioa_cb->ioarcb.cdb[0],
862 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
863
864 if (cmd->release) {
865 cmd->release = 0;
866 pmcraid_return_cmd(cmd);
867 }
868 pmcraid_info("scheduling worker for config table reinitialization\n");
869 schedule_work(&cmd->drv_inst->worker_q);
870}
871
872
873
874
875
876
877
878
879
880
881
882static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
883{
884 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
885 struct pmcraid_instance *pinstance = cmd->drv_inst;
886 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
887
888 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
889 scsi_cmd->result |= (DID_ERROR << 16);
890 scmd_printk(KERN_INFO, scsi_cmd,
891 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
892 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
893 }
894
895
896
897
898 if (cmd->sense_buffer != NULL) {
899 memcpy(scsi_cmd->sense_buffer,
900 cmd->sense_buffer,
901 SCSI_SENSE_BUFFERSIZE);
902 pci_free_consistent(pinstance->pdev,
903 SCSI_SENSE_BUFFERSIZE,
904 cmd->sense_buffer, cmd->sense_buffer_dma);
905 cmd->sense_buffer = NULL;
906 cmd->sense_buffer_dma = 0;
907 }
908
909 scsi_dma_unmap(scsi_cmd);
910 pmcraid_return_cmd(cmd);
911 scsi_cmd->scsi_done(scsi_cmd);
912}
913
914
915
916
917
918
919
920
921
922
923
924
925static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
926{
927 struct pmcraid_instance *pinstance = cmd->drv_inst;
928 unsigned long lock_flags;
929
930
931
932
933
934
935 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
936 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
937 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
938 atomic_inc(&pinstance->outstanding_cmds);
939
940
941 mb();
942 iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
943 pinstance->ioarrin);
944}
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960static void pmcraid_send_cmd(
961 struct pmcraid_cmd *cmd,
962 void (*cmd_done) (struct pmcraid_cmd *),
963 unsigned long timeout,
964 void (*timeout_func) (struct pmcraid_cmd *)
965)
966{
967
968 cmd->cmd_done = cmd_done;
969
970 if (timeout_func) {
971
972 cmd->timer.data = (unsigned long)cmd;
973 cmd->timer.expires = jiffies + timeout;
974 cmd->timer.function = (void (*)(unsigned long))timeout_func;
975 add_timer(&cmd->timer);
976 }
977
978
979 _pmcraid_fire_command(cmd);
980}
981
982
983
984
985
986
987
988
989static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
990{
991 struct pmcraid_instance *pinstance = cmd->drv_inst;
992 unsigned long lock_flags;
993
994 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
995 pmcraid_ioa_reset(cmd);
996 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
997}
998
999
1000
1001
1002
1003
1004
1005
1006
1007static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
1008{
1009 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
1010 cmd->ioa_cb->ioarcb.cdb[0],
1011 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1012
1013
1014
1015
1016 pmcraid_reinit_cmdblk(cmd);
1017 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
1018 cmd->ioa_cb->ioarcb.resource_handle =
1019 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1020 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
1021 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
1022
1023
1024 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
1025 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
1026
1027 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
1028
1029 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
1030 PMCRAID_SHUTDOWN_TIMEOUT,
1031 pmcraid_timeout_handler);
1032}
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042static void pmcraid_querycfg(struct pmcraid_cmd *);
1043
1044static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
1045{
1046 struct pmcraid_instance *pinstance = cmd->drv_inst;
1047 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1048 unsigned long lock_flags;
1049
1050
1051
1052
1053
1054 if (ioasc) {
1055 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
1056 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1057 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1058 pmcraid_reset_alert(cmd);
1059 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1060 } else {
1061 pmcraid_querycfg(cmd);
1062 }
1063}
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1074{
1075 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1076 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
1077 struct pmcraid_instance *pinstance = cmd->drv_inst;
1078 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1079
1080 pmcraid_reinit_cmdblk(cmd);
1081 ioarcb->request_type = REQ_TYPE_SCSI;
1082 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1083 ioarcb->cdb[0] = INQUIRY;
1084 ioarcb->cdb[1] = 1;
1085 ioarcb->cdb[2] = 0xD0;
1086 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1087 ioarcb->cdb[4] = data_size & 0xFF;
1088
1089
1090
1091 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1092 offsetof(struct pmcraid_ioarcb,
1093 add_data.u.ioadl[0]));
1094 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1095 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
1096
1097 ioarcb->request_flags0 |= NO_LINK_DESCS;
1098 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1099 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1100 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1101 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1102 ioadl->data_len = cpu_to_le32(data_size);
1103
1104 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1105 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1106}
1107
1108
1109
1110
1111
1112
1113
1114
1115static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1116{
1117 struct pmcraid_instance *pinstance = cmd->drv_inst;
1118 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1119 int index = cmd->hrrq_index;
1120 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
1121 u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
1122 void (*done_function)(struct pmcraid_cmd *);
1123
1124 pmcraid_reinit_cmdblk(cmd);
1125 cmd->hrrq_index = index + 1;
1126
1127 if (cmd->hrrq_index < pinstance->num_hrrq) {
1128 done_function = pmcraid_identify_hrrq;
1129 } else {
1130 cmd->hrrq_index = 0;
1131 done_function = pmcraid_get_fwversion;
1132 }
1133
1134
1135 ioarcb->request_type = REQ_TYPE_IOACMD;
1136 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1137
1138
1139 ioarcb->hrrq_id = index;
1140 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1141 ioarcb->cdb[1] = index;
1142
1143
1144
1145
1146 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1147 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
1148
1149 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1150 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1151
1152
1153
1154
1155
1156 pmcraid_send_cmd(cmd, done_function,
1157 PMCRAID_INTERNAL_TIMEOUT,
1158 pmcraid_timeout_handler);
1159}
1160
1161static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1162static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1173{
1174 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1175 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1176 else
1177 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1178
1179 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1180}
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191static struct pmcraid_cmd *pmcraid_init_hcam
1192(
1193 struct pmcraid_instance *pinstance,
1194 u8 type
1195)
1196{
1197 struct pmcraid_cmd *cmd;
1198 struct pmcraid_ioarcb *ioarcb;
1199 struct pmcraid_ioadl_desc *ioadl;
1200 struct pmcraid_hostrcb *hcam;
1201 void (*cmd_done) (struct pmcraid_cmd *);
1202 dma_addr_t dma;
1203 int rcb_size;
1204
1205 cmd = pmcraid_get_free_cmd(pinstance);
1206
1207 if (!cmd) {
1208 pmcraid_err("no free command blocks for hcam\n");
1209 return cmd;
1210 }
1211
1212 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
1213 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
1214 cmd_done = pmcraid_process_ccn;
1215 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1216 hcam = &pinstance->ccn;
1217 } else {
1218 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1219 cmd_done = pmcraid_process_ldn;
1220 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1221 hcam = &pinstance->ldn;
1222 }
1223
1224
1225 hcam->cmd = cmd;
1226
1227 ioarcb = &cmd->ioa_cb->ioarcb;
1228 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1229 offsetof(struct pmcraid_ioarcb,
1230 add_data.u.ioadl[0]));
1231 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1232 ioadl = ioarcb->add_data.u.ioadl;
1233
1234
1235 ioarcb->request_type = REQ_TYPE_HCAM;
1236 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1237 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1238 ioarcb->cdb[1] = type;
1239 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1240 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1241
1242 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1243
1244 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1245 ioadl[0].data_len = cpu_to_le32(rcb_size);
1246 ioadl[0].address = cpu_to_le32(dma);
1247
1248 cmd->cmd_done = cmd_done;
1249 return cmd;
1250}
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1263{
1264 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1265 pmcraid_send_hcam_cmd(cmd);
1266}
1267
1268
1269
1270
1271
1272
1273
1274
1275static void pmcraid_prepare_cancel_cmd(
1276 struct pmcraid_cmd *cmd,
1277 struct pmcraid_cmd *cmd_to_cancel
1278)
1279{
1280 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1281 __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
1282
1283
1284
1285
1286 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1287 ioarcb->request_type = REQ_TYPE_IOACMD;
1288 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1289 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1290
1291
1292
1293
1294
1295 ioarcb_addr = cpu_to_be64(ioarcb_addr);
1296 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1297}
1298
1299
1300
1301
1302
1303
1304
1305
1306static void pmcraid_cancel_hcam(
1307 struct pmcraid_cmd *cmd,
1308 u8 type,
1309 void (*cmd_done) (struct pmcraid_cmd *)
1310)
1311{
1312 struct pmcraid_instance *pinstance;
1313 struct pmcraid_hostrcb *hcam;
1314
1315 pinstance = cmd->drv_inst;
1316 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1317 &pinstance->ldn : &pinstance->ccn;
1318
1319
1320
1321
1322 if (hcam->cmd == NULL)
1323 return;
1324
1325 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1326
1327
1328
1329
1330 pmcraid_send_cmd(cmd, cmd_done,
1331 PMCRAID_INTERNAL_TIMEOUT,
1332 pmcraid_timeout_handler);
1333}
1334
1335
1336
1337
1338
1339
1340static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1341{
1342 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1343 cmd->ioa_cb->ioarcb.cdb[0],
1344 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1345
1346 pmcraid_reinit_cmdblk(cmd);
1347
1348 pmcraid_cancel_hcam(cmd,
1349 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1350 pmcraid_ioa_shutdown);
1351}
1352
1353
1354
1355
1356
1357
1358static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1359{
1360 pmcraid_cancel_hcam(cmd,
1361 PMCRAID_HCAM_CODE_LOG_DATA,
1362 pmcraid_cancel_ccn);
1363}
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374static int pmcraid_expose_resource(u16 fw_version,
1375 struct pmcraid_config_table_entry *cfgte)
1376{
1377 int retval = 0;
1378
1379 if (cfgte->resource_type == RES_TYPE_VSET) {
1380 if (fw_version <= PMCRAID_FW_VERSION_1)
1381 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1382 else
1383 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1384 (cfgte->unique_flags1 & 0x80) == 0);
1385
1386 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
1387 retval = (RES_BUS(cfgte->resource_address) !=
1388 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1389 return retval;
1390}
1391
1392
1393enum {
1394 PMCRAID_AEN_ATTR_UNSPEC,
1395 PMCRAID_AEN_ATTR_EVENT,
1396 __PMCRAID_AEN_ATTR_MAX,
1397};
1398#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1399
1400
1401enum {
1402 PMCRAID_AEN_CMD_UNSPEC,
1403 PMCRAID_AEN_CMD_EVENT,
1404 __PMCRAID_AEN_CMD_MAX,
1405};
1406#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1407
1408static struct genl_family pmcraid_event_family = {
1409 .id = GENL_ID_GENERATE,
1410 .name = "pmcraid",
1411 .version = 1,
1412 .maxattr = PMCRAID_AEN_ATTR_MAX
1413};
1414
1415
1416
1417
1418
1419
1420
1421
1422static int pmcraid_netlink_init(void)
1423{
1424 int result;
1425
1426 result = genl_register_family(&pmcraid_event_family);
1427
1428 if (result)
1429 return result;
1430
1431 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1432 pmcraid_event_family.id);
1433
1434 return result;
1435}
1436
1437
1438
1439
1440
1441
1442
1443static void pmcraid_netlink_release(void)
1444{
1445 genl_unregister_family(&pmcraid_event_family);
1446}
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456static int pmcraid_notify_aen(
1457 struct pmcraid_instance *pinstance,
1458 struct pmcraid_aen_msg *aen_msg,
1459 u32 data_size
1460)
1461{
1462 struct sk_buff *skb;
1463 void *msg_header;
1464 u32 total_size, nla_genl_hdr_total_size;
1465 int result;
1466
1467 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1468 MINOR(pinstance->cdev.dev));
1469 aen_msg->length = data_size;
1470
1471 data_size += sizeof(*aen_msg);
1472
1473 total_size = nla_total_size(data_size);
1474
1475 nla_genl_hdr_total_size =
1476 (total_size + (GENL_HDRLEN +
1477 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1478 + NLMSG_HDRLEN);
1479 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
1480
1481
1482 if (!skb) {
1483 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1484 total_size);
1485 return -ENOMEM;
1486 }
1487
1488
1489 msg_header = genlmsg_put(skb, 0, 0,
1490 &pmcraid_event_family, 0,
1491 PMCRAID_AEN_CMD_EVENT);
1492 if (!msg_header) {
1493 pmcraid_err("failed to copy command details\n");
1494 nlmsg_free(skb);
1495 return -ENOMEM;
1496 }
1497
1498 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1499
1500 if (result) {
1501 pmcraid_err("failed to copy AEN attribute data\n");
1502 nlmsg_free(skb);
1503 return -EINVAL;
1504 }
1505
1506
1507 result = genlmsg_end(skb, msg_header);
1508
1509 if (result < 0) {
1510 pmcraid_err("genlmsg_end failed\n");
1511 nlmsg_free(skb);
1512 return result;
1513 }
1514
1515 result =
1516 genlmsg_multicast(skb, 0, pmcraid_event_family.id, GFP_ATOMIC);
1517
1518
1519
1520
1521 if (result)
1522 pmcraid_info("error (%x) sending aen event message\n", result);
1523 return result;
1524}
1525
1526
1527
1528
1529
1530
1531
1532
1533static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1534{
1535 return pmcraid_notify_aen(pinstance,
1536 pinstance->ccn.msg,
1537 pinstance->ccn.hcam->data_len +
1538 sizeof(struct pmcraid_hcam_hdr));
1539}
1540
1541
1542
1543
1544
1545
1546
1547
1548static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1549{
1550 return pmcraid_notify_aen(pinstance,
1551 pinstance->ldn.msg,
1552 pinstance->ldn.hcam->data_len +
1553 sizeof(struct pmcraid_hcam_hdr));
1554}
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1565{
1566 pinstance->scn.ioa_state = evt;
1567 pmcraid_notify_aen(pinstance,
1568 &pinstance->scn.msg,
1569 sizeof(u32));
1570}
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1581{
1582 struct pmcraid_config_table_entry *cfg_entry;
1583 struct pmcraid_hcam_ccn *ccn_hcam;
1584 struct pmcraid_cmd *cmd;
1585 struct pmcraid_cmd *cfgcmd;
1586 struct pmcraid_resource_entry *res = NULL;
1587 unsigned long lock_flags;
1588 unsigned long host_lock_flags;
1589 u32 new_entry = 1;
1590 u32 hidden_entry = 0;
1591 u16 fw_version;
1592 int rc;
1593
1594 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1595 cfg_entry = &ccn_hcam->cfg_entry;
1596 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
1597
1598 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1599 res: %x:%x:%x:%x\n",
1600 pinstance->ccn.hcam->ilid,
1601 pinstance->ccn.hcam->op_code,
1602 ((pinstance->ccn.hcam->timestamp1) |
1603 ((pinstance->ccn.hcam->timestamp2 & 0xffffffffLL) << 32)),
1604 pinstance->ccn.hcam->notification_type,
1605 pinstance->ccn.hcam->notification_lost,
1606 pinstance->ccn.hcam->flags,
1607 pinstance->host->unique_id,
1608 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1609 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1610 RES_BUS(cfg_entry->resource_address)),
1611 RES_IS_VSET(*cfg_entry) ?
1612 (fw_version <= PMCRAID_FW_VERSION_1 ?
1613 cfg_entry->unique_flags1 :
1614 cfg_entry->array_id & 0xFF) :
1615 RES_TARGET(cfg_entry->resource_address),
1616 RES_LUN(cfg_entry->resource_address));
1617
1618
1619
1620 if (pinstance->ccn.hcam->notification_lost) {
1621 cfgcmd = pmcraid_get_free_cmd(pinstance);
1622 if (cfgcmd) {
1623 pmcraid_info("lost CCN, reading config table\b");
1624 pinstance->reinit_cfg_table = 1;
1625 pmcraid_querycfg(cfgcmd);
1626 } else {
1627 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1628 }
1629 goto out_notify_apps;
1630 }
1631
1632
1633
1634
1635
1636 if (pinstance->ccn.hcam->notification_type ==
1637 NOTIFICATION_TYPE_ENTRY_CHANGED &&
1638 cfg_entry->resource_type == RES_TYPE_VSET) {
1639
1640 if (fw_version <= PMCRAID_FW_VERSION_1)
1641 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1642 else
1643 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1644
1645 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
1646 goto out_notify_apps;
1647 }
1648
1649 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1650 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1651 rc = memcmp(&res->cfg_entry.resource_address,
1652 &cfg_entry->resource_address,
1653 sizeof(cfg_entry->resource_address));
1654 if (!rc) {
1655 new_entry = 0;
1656 break;
1657 }
1658 }
1659
1660 if (new_entry) {
1661
1662 if (hidden_entry) {
1663 spin_unlock_irqrestore(&pinstance->resource_lock,
1664 lock_flags);
1665 goto out_notify_apps;
1666 }
1667
1668
1669
1670
1671
1672 if (list_empty(&pinstance->free_res_q)) {
1673 spin_unlock_irqrestore(&pinstance->resource_lock,
1674 lock_flags);
1675 pmcraid_err("too many resources attached\n");
1676 spin_lock_irqsave(pinstance->host->host_lock,
1677 host_lock_flags);
1678 pmcraid_send_hcam(pinstance,
1679 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1680 spin_unlock_irqrestore(pinstance->host->host_lock,
1681 host_lock_flags);
1682 return;
1683 }
1684
1685 res = list_entry(pinstance->free_res_q.next,
1686 struct pmcraid_resource_entry, queue);
1687
1688 list_del(&res->queue);
1689 res->scsi_dev = NULL;
1690 res->reset_progress = 0;
1691 list_add_tail(&res->queue, &pinstance->used_res_q);
1692 }
1693
1694 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
1695
1696 if (pinstance->ccn.hcam->notification_type ==
1697 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
1698 if (res->scsi_dev) {
1699 if (fw_version <= PMCRAID_FW_VERSION_1)
1700 res->cfg_entry.unique_flags1 &= 0x7F;
1701 else
1702 res->cfg_entry.array_id &= 0xFF;
1703 res->change_detected = RES_CHANGE_DEL;
1704 res->cfg_entry.resource_handle =
1705 PMCRAID_INVALID_RES_HANDLE;
1706 schedule_work(&pinstance->worker_q);
1707 } else {
1708
1709 list_move_tail(&res->queue, &pinstance->free_res_q);
1710 }
1711 } else if (!res->scsi_dev) {
1712 res->change_detected = RES_CHANGE_ADD;
1713 schedule_work(&pinstance->worker_q);
1714 }
1715 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1716
1717out_notify_apps:
1718
1719
1720 if (!pmcraid_disable_aen)
1721 pmcraid_notify_ccn(pinstance);
1722
1723 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1724 if (cmd)
1725 pmcraid_send_hcam_cmd(cmd);
1726}
1727
1728
1729
1730
1731
1732
1733
1734static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1735{
1736 int i;
1737 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1738 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1739 return &pmcraid_ioasc_error_table[i];
1740 }
1741 return NULL;
1742}
1743
1744
1745
1746
1747
1748
1749void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
1750{
1751 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1752
1753 if (error_info == NULL ||
1754 cmd->drv_inst->current_log_level < error_info->log_level)
1755 return;
1756
1757
1758 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
1759 cmd->ioa_cb->ioarcb.cdb[0],
1760 cmd->ioa_cb->ioarcb.resource_handle,
1761 le32_to_cpu(ioasc), error_info->error_string);
1762}
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1773{
1774 struct pmcraid_hcam_ldn *hcam_ldn;
1775 u32 ioasc;
1776
1777 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1778
1779 pmcraid_info
1780 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1781 pinstance->ldn.hcam->ilid,
1782 pinstance->ldn.hcam->op_code,
1783 pinstance->ldn.hcam->notification_type,
1784 pinstance->ldn.hcam->notification_lost,
1785 pinstance->ldn.hcam->flags,
1786 pinstance->ldn.hcam->overlay_id);
1787
1788
1789 if (pinstance->ldn.hcam->notification_type !=
1790 NOTIFICATION_TYPE_ERROR_LOG)
1791 return;
1792
1793 if (pinstance->ldn.hcam->notification_lost ==
1794 HOSTRCB_NOTIFICATIONS_LOST)
1795 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
1796
1797 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1798
1799 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1800 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
1801 dev_info(&pinstance->pdev->dev,
1802 "UnitAttention due to IOA Bus Reset\n");
1803 scsi_report_bus_reset(
1804 pinstance->host,
1805 RES_BUS(hcam_ldn->error_log.fd_ra));
1806 }
1807
1808 return;
1809}
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1822{
1823 struct pmcraid_instance *pinstance = cmd->drv_inst;
1824 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1825 unsigned long lock_flags;
1826
1827 pinstance->ccn.cmd = NULL;
1828 pmcraid_return_cmd(cmd);
1829
1830
1831
1832
1833
1834 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1835 atomic_read(&pinstance->ccn.ignore) == 1) {
1836 return;
1837 } else if (ioasc) {
1838 dev_info(&pinstance->pdev->dev,
1839 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1840 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1841 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1842 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1843 } else {
1844 pmcraid_handle_config_change(pinstance);
1845 }
1846}
1847
1848
1849
1850
1851
1852
1853
1854
1855static void pmcraid_initiate_reset(struct pmcraid_instance *);
1856static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
1857
1858static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1859{
1860 struct pmcraid_instance *pinstance = cmd->drv_inst;
1861 struct pmcraid_hcam_ldn *ldn_hcam =
1862 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1863 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1864 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1865 unsigned long lock_flags;
1866
1867
1868 pinstance->ldn.cmd = NULL;
1869 pmcraid_return_cmd(cmd);
1870
1871
1872
1873
1874
1875 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1876 atomic_read(&pinstance->ccn.ignore) == 1) {
1877 return;
1878 } else if (!ioasc) {
1879 pmcraid_handle_error_log(pinstance);
1880 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1881 spin_lock_irqsave(pinstance->host->host_lock,
1882 lock_flags);
1883 pmcraid_initiate_reset(pinstance);
1884 spin_unlock_irqrestore(pinstance->host->host_lock,
1885 lock_flags);
1886 return;
1887 }
1888 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1889 pinstance->timestamp_error = 1;
1890 pmcraid_set_timestamp(cmd);
1891 }
1892 } else {
1893 dev_info(&pinstance->pdev->dev,
1894 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1895 }
1896
1897 if (!pmcraid_disable_aen)
1898 pmcraid_notify_ldn(pinstance);
1899
1900 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1901 if (cmd)
1902 pmcraid_send_hcam_cmd(cmd);
1903}
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1914{
1915 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1916 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1917}
1918
1919
1920
1921
1922
1923static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1924{
1925 struct pmcraid_instance *pinstance = cmd->drv_inst;
1926
1927
1928
1929
1930
1931
1932 atomic_set(&pinstance->ccn.ignore, 1);
1933 atomic_set(&pinstance->ldn.ignore, 1);
1934
1935
1936
1937
1938
1939 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1940 pinstance->ioa_unit_check) {
1941 pinstance->force_ioa_reset = 0;
1942 pinstance->ioa_unit_check = 0;
1943 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1944 pmcraid_reset_alert(cmd);
1945 return;
1946 }
1947
1948
1949
1950
1951
1952 pmcraid_cancel_ldn(cmd);
1953}
1954
1955
1956
1957
1958
1959
1960
1961static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1962
1963static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1964{
1965 u32 intrs;
1966
1967 pmcraid_reinit_buffers(pinstance);
1968 intrs = pmcraid_read_interrupts(pinstance);
1969
1970 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1971
1972 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
1973 if (!pinstance->interrupt_mode) {
1974 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1975 pinstance->int_regs.
1976 ioa_host_interrupt_mask_reg);
1977 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1978 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1979 }
1980 return 1;
1981 } else {
1982 return 0;
1983 }
1984}
1985
1986
1987
1988
1989
1990
1991
1992
1993static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1994{
1995 struct pmcraid_instance *pinstance = cmd->drv_inst;
1996 u32 int_reg;
1997 u32 doorbell;
1998
1999
2000
2001
2002
2003 cmd->cmd_done = pmcraid_ioa_reset;
2004 cmd->timer.data = (unsigned long)cmd;
2005 cmd->timer.expires = jiffies +
2006 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
2007 cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
2008
2009 if (!timer_pending(&cmd->timer))
2010 add_timer(&cmd->timer);
2011
2012
2013
2014
2015 doorbell = DOORBELL_RUNTIME_RESET |
2016 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
2017
2018
2019
2020
2021 if (pinstance->interrupt_mode) {
2022 iowrite32(DOORBELL_INTR_MODE_MSIX,
2023 pinstance->int_regs.host_ioa_interrupt_reg);
2024 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
2025 }
2026
2027 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
2028 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
2029 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
2030
2031 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
2032 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
2033 int_reg);
2034}
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
2045{
2046 pmcraid_info("%s is not yet implemented\n", __func__);
2047}
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
2062{
2063 struct pmcraid_cmd *cmd, *temp;
2064 unsigned long lock_flags;
2065
2066
2067
2068
2069 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2070 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
2071 free_list) {
2072 list_del(&cmd->free_list);
2073 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2074 lock_flags);
2075 cmd->ioa_cb->ioasa.ioasc =
2076 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2077 cmd->ioa_cb->ioasa.ilid =
2078 cpu_to_be32(PMCRAID_DRIVER_ILID);
2079
2080
2081 del_timer(&cmd->timer);
2082
2083
2084
2085
2086
2087
2088 if (cmd->scsi_cmd) {
2089
2090 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2091 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2092
2093 scsi_cmd->result |= DID_ERROR << 16;
2094
2095 scsi_dma_unmap(scsi_cmd);
2096 pmcraid_return_cmd(cmd);
2097
2098 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2099 le32_to_cpu(resp) >> 2,
2100 cmd->ioa_cb->ioarcb.cdb[0],
2101 scsi_cmd->result);
2102 scsi_cmd->scsi_done(scsi_cmd);
2103 } else if (cmd->cmd_done == pmcraid_internal_done ||
2104 cmd->cmd_done == pmcraid_erp_done) {
2105 cmd->cmd_done(cmd);
2106 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2107 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
2108 pmcraid_return_cmd(cmd);
2109 }
2110
2111 atomic_dec(&pinstance->outstanding_cmds);
2112 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2113 }
2114
2115 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2116}
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2134{
2135 struct pmcraid_instance *pinstance = cmd->drv_inst;
2136 u8 reset_complete = 0;
2137
2138 pinstance->ioa_reset_in_progress = 1;
2139
2140 if (pinstance->reset_cmd != cmd) {
2141 pmcraid_err("reset is called with different command block\n");
2142 pinstance->reset_cmd = cmd;
2143 }
2144
2145 pmcraid_info("reset_engine: state = %d, command = %p\n",
2146 pinstance->ioa_state, cmd);
2147
2148 switch (pinstance->ioa_state) {
2149
2150 case IOA_STATE_DEAD:
2151
2152
2153
2154
2155 pmcraid_err("IOA is offline no reset is possible\n");
2156 reset_complete = 1;
2157 break;
2158
2159 case IOA_STATE_IN_BRINGDOWN:
2160
2161
2162
2163
2164 pmcraid_disable_interrupts(pinstance, ~0);
2165 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2166 pmcraid_reset_alert(cmd);
2167 break;
2168
2169 case IOA_STATE_UNKNOWN:
2170
2171
2172
2173 scsi_block_requests(pinstance->host);
2174
2175
2176
2177
2178
2179 if (pinstance->ioa_hard_reset == 0) {
2180 if (ioread32(pinstance->ioa_status) &
2181 INTRS_TRANSITION_TO_OPERATIONAL) {
2182 pmcraid_info("sticky bit set, bring-up\n");
2183 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2184 pmcraid_reinit_cmdblk(cmd);
2185 pmcraid_identify_hrrq(cmd);
2186 } else {
2187 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2188 pmcraid_soft_reset(cmd);
2189 }
2190 } else {
2191
2192
2193
2194 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2195 pmcraid_reset_alert(cmd);
2196 }
2197 break;
2198
2199 case IOA_STATE_IN_RESET_ALERT:
2200
2201
2202
2203
2204
2205 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2206 pmcraid_start_bist(cmd);
2207 break;
2208
2209 case IOA_STATE_IN_HARD_RESET:
2210 pinstance->ioa_reset_attempts++;
2211
2212
2213 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2214 pinstance->ioa_reset_attempts = 0;
2215 pmcraid_err("IOA didn't respond marking it as dead\n");
2216 pinstance->ioa_state = IOA_STATE_DEAD;
2217
2218 if (pinstance->ioa_bringdown)
2219 pmcraid_notify_ioastate(pinstance,
2220 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2221 else
2222 pmcraid_notify_ioastate(pinstance,
2223 PMC_DEVICE_EVENT_RESET_FAILED);
2224 reset_complete = 1;
2225 break;
2226 }
2227
2228
2229
2230
2231 pci_restore_state(pinstance->pdev);
2232
2233
2234 pmcraid_fail_outstanding_cmds(pinstance);
2235
2236
2237 if (pinstance->ioa_unit_check) {
2238 pmcraid_info("unit check is active\n");
2239 pinstance->ioa_unit_check = 0;
2240 pmcraid_get_dump(pinstance);
2241 pinstance->ioa_reset_attempts--;
2242 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2243 pmcraid_reset_alert(cmd);
2244 break;
2245 }
2246
2247
2248
2249
2250
2251 if (pinstance->ioa_bringdown) {
2252 pmcraid_info("bringing down the adapter\n");
2253 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2254 pinstance->ioa_bringdown = 0;
2255 pinstance->ioa_state = IOA_STATE_UNKNOWN;
2256 pmcraid_notify_ioastate(pinstance,
2257 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
2258 reset_complete = 1;
2259 } else {
2260
2261
2262
2263
2264 if (pmcraid_reset_enable_ioa(pinstance)) {
2265 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2266 pmcraid_info("bringing up the adapter\n");
2267 pmcraid_reinit_cmdblk(cmd);
2268 pmcraid_identify_hrrq(cmd);
2269 } else {
2270 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2271 pmcraid_soft_reset(cmd);
2272 }
2273 }
2274 break;
2275
2276 case IOA_STATE_IN_SOFT_RESET:
2277
2278
2279
2280 pmcraid_info("In softreset proceeding with bring-up\n");
2281 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2282
2283
2284
2285
2286
2287 pmcraid_identify_hrrq(cmd);
2288 break;
2289
2290 case IOA_STATE_IN_BRINGUP:
2291
2292
2293
2294 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2295 reset_complete = 1;
2296 break;
2297
2298 case IOA_STATE_OPERATIONAL:
2299 default:
2300
2301
2302
2303
2304
2305 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2306 pinstance->force_ioa_reset == 0) {
2307 pmcraid_notify_ioastate(pinstance,
2308 PMC_DEVICE_EVENT_RESET_SUCCESS);
2309 reset_complete = 1;
2310 } else {
2311 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2312 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2313 pmcraid_reinit_cmdblk(cmd);
2314 pmcraid_unregister_hcams(cmd);
2315 }
2316 break;
2317 }
2318
2319
2320
2321
2322
2323
2324 if (reset_complete) {
2325 pinstance->ioa_reset_in_progress = 0;
2326 pinstance->ioa_reset_attempts = 0;
2327 pinstance->reset_cmd = NULL;
2328 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2329 pinstance->ioa_bringdown = 0;
2330 pmcraid_return_cmd(cmd);
2331
2332
2333
2334
2335 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2336 pmcraid_register_hcams(pinstance);
2337
2338 wake_up_all(&pinstance->reset_wait_q);
2339 }
2340
2341 return;
2342}
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2356{
2357 struct pmcraid_cmd *cmd;
2358
2359
2360
2361
2362 if (!pinstance->ioa_reset_in_progress) {
2363 scsi_block_requests(pinstance->host);
2364 cmd = pmcraid_get_free_cmd(pinstance);
2365
2366 if (cmd == NULL) {
2367 pmcraid_err("no cmnd blocks for initiate_reset\n");
2368 return;
2369 }
2370
2371 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2372 pinstance->reset_cmd = cmd;
2373 pinstance->force_ioa_reset = 1;
2374 pmcraid_notify_ioastate(pinstance,
2375 PMC_DEVICE_EVENT_RESET_START);
2376 pmcraid_ioa_reset(cmd);
2377 }
2378}
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394static int pmcraid_reset_reload(
2395 struct pmcraid_instance *pinstance,
2396 u8 shutdown_type,
2397 u8 target_state
2398)
2399{
2400 struct pmcraid_cmd *reset_cmd = NULL;
2401 unsigned long lock_flags;
2402 int reset = 1;
2403
2404 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2405
2406 if (pinstance->ioa_reset_in_progress) {
2407 pmcraid_info("reset_reload: reset is already in progress\n");
2408
2409 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2410
2411 wait_event(pinstance->reset_wait_q,
2412 !pinstance->ioa_reset_in_progress);
2413
2414 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2415
2416 if (pinstance->ioa_state == IOA_STATE_DEAD) {
2417 spin_unlock_irqrestore(pinstance->host->host_lock,
2418 lock_flags);
2419 pmcraid_info("reset_reload: IOA is dead\n");
2420 return reset;
2421 } else if (pinstance->ioa_state == target_state) {
2422 reset = 0;
2423 }
2424 }
2425
2426 if (reset) {
2427 pmcraid_info("reset_reload: proceeding with reset\n");
2428 scsi_block_requests(pinstance->host);
2429 reset_cmd = pmcraid_get_free_cmd(pinstance);
2430
2431 if (reset_cmd == NULL) {
2432 pmcraid_err("no free cmnd for reset_reload\n");
2433 spin_unlock_irqrestore(pinstance->host->host_lock,
2434 lock_flags);
2435 return reset;
2436 }
2437
2438 if (shutdown_type == SHUTDOWN_NORMAL)
2439 pinstance->ioa_bringdown = 1;
2440
2441 pinstance->ioa_shutdown_type = shutdown_type;
2442 pinstance->reset_cmd = reset_cmd;
2443 pinstance->force_ioa_reset = reset;
2444 pmcraid_info("reset_reload: initiating reset\n");
2445 pmcraid_ioa_reset(reset_cmd);
2446 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2447 pmcraid_info("reset_reload: waiting for reset to complete\n");
2448 wait_event(pinstance->reset_wait_q,
2449 !pinstance->ioa_reset_in_progress);
2450
2451 pmcraid_info("reset_reload: reset is complete !!\n");
2452 scsi_unblock_requests(pinstance->host);
2453 if (pinstance->ioa_state == target_state)
2454 reset = 0;
2455 }
2456
2457 return reset;
2458}
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2469{
2470 return pmcraid_reset_reload(pinstance,
2471 SHUTDOWN_NORMAL,
2472 IOA_STATE_UNKNOWN);
2473}
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2484{
2485 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2486
2487 return pmcraid_reset_reload(pinstance,
2488 SHUTDOWN_NONE,
2489 IOA_STATE_OPERATIONAL);
2490}
2491
2492
2493
2494
2495
2496
2497
2498
2499static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2500{
2501 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2502 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2503
2504
2505 cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
2506 SCSI_SENSE_BUFFERSIZE,
2507 &cmd->sense_buffer_dma);
2508
2509 if (cmd->sense_buffer == NULL) {
2510 pmcraid_err
2511 ("couldn't allocate sense buffer for request sense\n");
2512 pmcraid_erp_done(cmd);
2513 return;
2514 }
2515
2516
2517 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2518 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2519 ioarcb->request_flags0 = (SYNC_COMPLETE |
2520 NO_LINK_DESCS |
2521 INHIBIT_UL_CHECK);
2522 ioarcb->request_type = REQ_TYPE_SCSI;
2523 ioarcb->cdb[0] = REQUEST_SENSE;
2524 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2525
2526 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2527 offsetof(struct pmcraid_ioarcb,
2528 add_data.u.ioadl[0]));
2529 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2530
2531 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2532
2533 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2534 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2535 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2536
2537
2538
2539
2540
2541
2542 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2543 PMCRAID_REQUEST_SENSE_TIMEOUT,
2544 pmcraid_timeout_handler);
2545}
2546
2547
2548
2549
2550
2551
2552
2553
2554static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
2555{
2556 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2557 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2558 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2559 void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
2560 : pmcraid_request_sense;
2561
2562 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2563 ioarcb->request_flags0 = SYNC_OVERRIDE;
2564 ioarcb->request_type = REQ_TYPE_IOACMD;
2565 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2566
2567 if (RES_IS_GSCSI(res->cfg_entry))
2568 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2569
2570 ioarcb->ioadl_bus_addr = 0;
2571 ioarcb->ioadl_length = 0;
2572 ioarcb->data_transfer_length = 0;
2573 ioarcb->ioarcb_bus_addr &= (~0x1FULL);
2574
2575
2576
2577
2578 pmcraid_send_cmd(cmd, cmd_done,
2579 PMCRAID_REQUEST_SENSE_TIMEOUT,
2580 pmcraid_timeout_handler);
2581}
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2592{
2593 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2594 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2595 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2596 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2597 u32 failing_lba = 0;
2598
2599 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2600 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2601
2602 if (RES_IS_VSET(res->cfg_entry) &&
2603 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2604 ioasa->u.vset.failing_lba_hi != 0) {
2605
2606 sense_buf[0] = 0x72;
2607 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2608 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2609 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2610
2611 sense_buf[7] = 12;
2612 sense_buf[8] = 0;
2613 sense_buf[9] = 0x0A;
2614 sense_buf[10] = 0x80;
2615
2616 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2617
2618 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2619 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2620 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2621 sense_buf[15] = failing_lba & 0x000000ff;
2622
2623 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2624
2625 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2626 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2627 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2628 sense_buf[19] = failing_lba & 0x000000ff;
2629 } else {
2630 sense_buf[0] = 0x70;
2631 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2632 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2633 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2634
2635 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2636 if (RES_IS_VSET(res->cfg_entry))
2637 failing_lba =
2638 le32_to_cpu(ioasa->u.
2639 vset.failing_lba_lo);
2640 sense_buf[0] |= 0x80;
2641 sense_buf[3] = (failing_lba >> 24) & 0xff;
2642 sense_buf[4] = (failing_lba >> 16) & 0xff;
2643 sense_buf[5] = (failing_lba >> 8) & 0xff;
2644 sense_buf[6] = failing_lba & 0xff;
2645 }
2646
2647 sense_buf[7] = 6;
2648 }
2649}
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2664{
2665 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2666 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2667 struct pmcraid_instance *pinstance = cmd->drv_inst;
2668 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2669 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2670 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2671 u32 sense_copied = 0;
2672
2673 if (!res) {
2674 pmcraid_info("resource pointer is NULL\n");
2675 return 0;
2676 }
2677
2678
2679 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2680 atomic_inc(&res->read_failures);
2681 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2682 atomic_inc(&res->write_failures);
2683
2684 if (!RES_IS_GSCSI(res->cfg_entry) &&
2685 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2686 pmcraid_frame_auto_sense(cmd);
2687 }
2688
2689
2690 pmcraid_ioasc_logger(ioasc, cmd);
2691
2692 switch (masked_ioasc) {
2693
2694 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2695 scsi_cmd->result |= (DID_ABORT << 16);
2696 break;
2697
2698 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2699 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2700 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2701 break;
2702
2703 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2704 res->sync_reqd = 1;
2705 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2706 break;
2707
2708 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2709 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2710 break;
2711
2712 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2713 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2714 if (!res->reset_progress)
2715 scsi_report_bus_reset(pinstance->host,
2716 scsi_cmd->device->channel);
2717 scsi_cmd->result |= (DID_ERROR << 16);
2718 break;
2719
2720 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2721 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2722 res->sync_reqd = 1;
2723
2724
2725
2726
2727 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2728 SAM_STAT_CHECK_CONDITION &&
2729 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2730 return 0;
2731
2732
2733
2734
2735 if (ioasa->auto_sense_length != 0) {
2736 short sense_len = ioasa->auto_sense_length;
2737 int data_size = min_t(u16, le16_to_cpu(sense_len),
2738 SCSI_SENSE_BUFFERSIZE);
2739
2740 memcpy(scsi_cmd->sense_buffer,
2741 ioasa->sense_data,
2742 data_size);
2743 sense_copied = 1;
2744 }
2745
2746 if (RES_IS_GSCSI(res->cfg_entry))
2747 pmcraid_cancel_all(cmd, sense_copied);
2748 else if (sense_copied)
2749 pmcraid_erp_done(cmd);
2750 else
2751 pmcraid_request_sense(cmd);
2752
2753 return 1;
2754
2755 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2756 break;
2757
2758 default:
2759 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2760 scsi_cmd->result |= (DID_ERROR << 16);
2761 break;
2762 }
2763 return 0;
2764}
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779static int pmcraid_reset_device(
2780 struct scsi_cmnd *scsi_cmd,
2781 unsigned long timeout,
2782 u8 modifier
2783)
2784{
2785 struct pmcraid_cmd *cmd;
2786 struct pmcraid_instance *pinstance;
2787 struct pmcraid_resource_entry *res;
2788 struct pmcraid_ioarcb *ioarcb;
2789 unsigned long lock_flags;
2790 u32 ioasc;
2791
2792 pinstance =
2793 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2794 res = scsi_cmd->device->hostdata;
2795
2796 if (!res) {
2797 sdev_printk(KERN_ERR, scsi_cmd->device,
2798 "reset_device: NULL resource pointer\n");
2799 return FAILED;
2800 }
2801
2802
2803
2804
2805
2806 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2807 if (pinstance->ioa_reset_in_progress ||
2808 pinstance->ioa_state == IOA_STATE_DEAD) {
2809 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2810 return FAILED;
2811 }
2812
2813 res->reset_progress = 1;
2814 pmcraid_info("Resetting %s resource with addr %x\n",
2815 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2816 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2817 le32_to_cpu(res->cfg_entry.resource_address));
2818
2819
2820 cmd = pmcraid_get_free_cmd(pinstance);
2821
2822 if (cmd == NULL) {
2823 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2824 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2825 return FAILED;
2826 }
2827
2828 ioarcb = &cmd->ioa_cb->ioarcb;
2829 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2830 ioarcb->request_type = REQ_TYPE_IOACMD;
2831 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2832
2833
2834 if (modifier)
2835 modifier = ENABLE_RESET_MODIFIER | modifier;
2836
2837 ioarcb->cdb[1] = modifier;
2838
2839 init_completion(&cmd->wait_for_completion);
2840 cmd->completion_req = 1;
2841
2842 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2843 cmd->ioa_cb->ioarcb.cdb[0],
2844 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2845 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2846
2847 pmcraid_send_cmd(cmd,
2848 pmcraid_internal_done,
2849 timeout,
2850 pmcraid_timeout_handler);
2851
2852 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2853
2854
2855
2856
2857
2858 wait_for_completion(&cmd->wait_for_completion);
2859
2860
2861
2862
2863 pmcraid_return_cmd(cmd);
2864 res->reset_progress = 0;
2865 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2866
2867
2868 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2869}
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2888{
2889 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2890 int rc = 0;
2891
2892 scsi_set_resid(scsi_cmd, reslen);
2893
2894 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2895 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2896 cmd->ioa_cb->ioarcb.cdb[0],
2897 ioasc, scsi_cmd->result);
2898
2899 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2900 rc = pmcraid_error_handler(cmd);
2901
2902 if (rc == 0) {
2903 scsi_dma_unmap(scsi_cmd);
2904 scsi_cmd->scsi_done(scsi_cmd);
2905 }
2906
2907 return rc;
2908}
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2923{
2924 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2925 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2926
2927 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2928 pmcraid_return_cmd(cmd);
2929}
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2940{
2941 struct pmcraid_cmd *cancel_cmd;
2942 struct pmcraid_instance *pinstance;
2943 struct pmcraid_resource_entry *res;
2944
2945 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2946 res = cmd->scsi_cmd->device->hostdata;
2947
2948 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2949
2950 if (cancel_cmd == NULL) {
2951 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2952 return NULL;
2953 }
2954
2955 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2956
2957 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2958 cmd->ioa_cb->ioarcb.cdb[0],
2959 cmd->ioa_cb->ioarcb.response_handle >> 2);
2960
2961 init_completion(&cancel_cmd->wait_for_completion);
2962 cancel_cmd->completion_req = 1;
2963
2964 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2965 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
2966 cancel_cmd->ioa_cb->ioarcb.cdb[0],
2967 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2968
2969 pmcraid_send_cmd(cancel_cmd,
2970 pmcraid_internal_done,
2971 PMCRAID_INTERNAL_TIMEOUT,
2972 pmcraid_timeout_handler);
2973 return cancel_cmd;
2974}
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2986{
2987 struct pmcraid_resource_entry *res;
2988 u32 ioasc;
2989
2990 wait_for_completion(&cancel_cmd->wait_for_completion);
2991 res = cancel_cmd->res;
2992 cancel_cmd->res = NULL;
2993 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2994
2995
2996
2997
2998
2999
3000 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
3001 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
3002 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
3003 res->sync_reqd = 1;
3004 ioasc = 0;
3005 }
3006
3007
3008 pmcraid_return_cmd(cancel_cmd);
3009 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
3010}
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
3023{
3024 struct pmcraid_instance *pinstance;
3025 struct pmcraid_cmd *cmd;
3026 struct pmcraid_resource_entry *res;
3027 unsigned long host_lock_flags;
3028 unsigned long pending_lock_flags;
3029 struct pmcraid_cmd *cancel_cmd = NULL;
3030 int cmd_found = 0;
3031 int rc = FAILED;
3032
3033 pinstance =
3034 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
3035
3036 scmd_printk(KERN_INFO, scsi_cmd,
3037 "I/O command timed out, aborting it.\n");
3038
3039 res = scsi_cmd->device->hostdata;
3040
3041 if (res == NULL)
3042 return rc;
3043
3044
3045
3046
3047
3048
3049 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
3050
3051 if (pinstance->ioa_reset_in_progress ||
3052 pinstance->ioa_state == IOA_STATE_DEAD) {
3053 spin_unlock_irqrestore(pinstance->host->host_lock,
3054 host_lock_flags);
3055 return rc;
3056 }
3057
3058
3059
3060
3061
3062
3063 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
3064 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
3065
3066 if (cmd->scsi_cmd == scsi_cmd) {
3067 cmd_found = 1;
3068 break;
3069 }
3070 }
3071
3072 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
3073 pending_lock_flags);
3074
3075
3076
3077
3078 if (cmd_found)
3079 cancel_cmd = pmcraid_abort_cmd(cmd);
3080
3081 spin_unlock_irqrestore(pinstance->host->host_lock,
3082 host_lock_flags);
3083
3084 if (cancel_cmd) {
3085 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
3086 rc = pmcraid_abort_complete(cancel_cmd);
3087 }
3088
3089 return cmd_found ? rc : SUCCESS;
3090}
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3107{
3108 scmd_printk(KERN_INFO, scmd,
3109 "resetting device due to an I/O command timeout.\n");
3110 return pmcraid_reset_device(scmd,
3111 PMCRAID_INTERNAL_TIMEOUT,
3112 RESET_DEVICE_LUN);
3113}
3114
3115static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3116{
3117 scmd_printk(KERN_INFO, scmd,
3118 "Doing bus reset due to an I/O command timeout.\n");
3119 return pmcraid_reset_device(scmd,
3120 PMCRAID_RESET_BUS_TIMEOUT,
3121 RESET_DEVICE_BUS);
3122}
3123
3124static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3125{
3126 scmd_printk(KERN_INFO, scmd,
3127 "Doing target reset due to an I/O command timeout.\n");
3128 return pmcraid_reset_device(scmd,
3129 PMCRAID_INTERNAL_TIMEOUT,
3130 RESET_DEVICE_TARGET);
3131}
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3144{
3145 unsigned long interval = 10000;
3146 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3147 struct pmcraid_instance *pinstance =
3148 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3149
3150
3151
3152
3153
3154
3155 while (waits--) {
3156 if (atomic_read(&pinstance->outstanding_cmds) <=
3157 PMCRAID_MAX_HCAM_CMD)
3158 return SUCCESS;
3159 msleep(interval);
3160 }
3161
3162 dev_err(&pinstance->pdev->dev,
3163 "Adapter being reset due to an I/O command timeout.\n");
3164 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3165}
3166
3167
3168
3169
3170
3171
3172
3173
3174static u8 pmcraid_task_attributes(struct scsi_cmnd *scsi_cmd)
3175{
3176 char tag[2];
3177 u8 rc = 0;
3178
3179 if (scsi_populate_tag_msg(scsi_cmd, tag)) {
3180 switch (tag[0]) {
3181 case MSG_SIMPLE_TAG:
3182 rc = TASK_TAG_SIMPLE;
3183 break;
3184 case MSG_HEAD_TAG:
3185 rc = TASK_TAG_QUEUE_HEAD;
3186 break;
3187 case MSG_ORDERED_TAG:
3188 rc = TASK_TAG_ORDERED;
3189 break;
3190 };
3191 }
3192
3193 return rc;
3194}
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206struct pmcraid_ioadl_desc *
3207pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3208{
3209 struct pmcraid_ioadl_desc *ioadl;
3210 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3211 int ioadl_count = 0;
3212
3213 if (ioarcb->add_cmd_param_length)
3214 ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
3215 ioarcb->ioadl_length =
3216 sizeof(struct pmcraid_ioadl_desc) * sgcount;
3217
3218 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3219
3220
3221
3222
3223
3224 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
3225 ioarcb->ioadl_bus_addr =
3226 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3227 offsetof(struct pmcraid_ioarcb,
3228 add_data.u.ioadl[3]));
3229 ioadl = &ioarcb->add_data.u.ioadl[3];
3230 } else {
3231 ioarcb->ioadl_bus_addr =
3232 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3233 offsetof(struct pmcraid_ioarcb,
3234 add_data.u.ioadl[ioadl_count]));
3235
3236 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3237 ioarcb->ioarcb_bus_addr |=
3238 DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
3239 }
3240
3241 return ioadl;
3242}
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255static int pmcraid_build_ioadl(
3256 struct pmcraid_instance *pinstance,
3257 struct pmcraid_cmd *cmd
3258)
3259{
3260 int i, nseg;
3261 struct scatterlist *sglist;
3262
3263 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3264 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3265 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
3266
3267 u32 length = scsi_bufflen(scsi_cmd);
3268
3269 if (!length)
3270 return 0;
3271
3272 nseg = scsi_dma_map(scsi_cmd);
3273
3274 if (nseg < 0) {
3275 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
3276 return -1;
3277 } else if (nseg > PMCRAID_MAX_IOADLS) {
3278 scsi_dma_unmap(scsi_cmd);
3279 scmd_printk(KERN_ERR, scsi_cmd,
3280 "sg count is (%d) more than allowed!\n", nseg);
3281 return -1;
3282 }
3283
3284
3285 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3286 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3287
3288 ioarcb->request_flags0 |= NO_LINK_DESCS;
3289 ioarcb->data_transfer_length = cpu_to_le32(length);
3290 ioadl = pmcraid_init_ioadls(cmd, nseg);
3291
3292
3293 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3294 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3295 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3296 ioadl[i].flags = 0;
3297 }
3298
3299 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3300
3301 return 0;
3302}
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3314{
3315 int i;
3316
3317 for (i = 0; i < sglist->num_sg; i++)
3318 __free_pages(sg_page(&(sglist->scatterlist[i])),
3319 sglist->order);
3320
3321 kfree(sglist);
3322}
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3335{
3336 struct pmcraid_sglist *sglist;
3337 struct scatterlist *scatterlist;
3338 struct page *page;
3339 int num_elem, i, j;
3340 int sg_size;
3341 int order;
3342 int bsize_elem;
3343
3344 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3345 order = (sg_size > 0) ? get_order(sg_size) : 0;
3346 bsize_elem = PAGE_SIZE * (1 << order);
3347
3348
3349 if (buflen % bsize_elem)
3350 num_elem = (buflen / bsize_elem) + 1;
3351 else
3352 num_elem = buflen / bsize_elem;
3353
3354
3355 sglist = kzalloc(sizeof(struct pmcraid_sglist) +
3356 (sizeof(struct scatterlist) * (num_elem - 1)),
3357 GFP_KERNEL);
3358
3359 if (sglist == NULL)
3360 return NULL;
3361
3362 scatterlist = sglist->scatterlist;
3363 sg_init_table(scatterlist, num_elem);
3364 sglist->order = order;
3365 sglist->num_sg = num_elem;
3366 sg_size = buflen;
3367
3368 for (i = 0; i < num_elem; i++) {
3369 page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
3370 if (!page) {
3371 for (j = i - 1; j >= 0; j--)
3372 __free_pages(sg_page(&scatterlist[j]), order);
3373 kfree(sglist);
3374 return NULL;
3375 }
3376
3377 sg_set_page(&scatterlist[i], page,
3378 sg_size < bsize_elem ? sg_size : bsize_elem, 0);
3379 sg_size -= bsize_elem;
3380 }
3381
3382 return sglist;
3383}
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397static int pmcraid_copy_sglist(
3398 struct pmcraid_sglist *sglist,
3399 unsigned long buffer,
3400 u32 len,
3401 int direction
3402)
3403{
3404 struct scatterlist *scatterlist;
3405 void *kaddr;
3406 int bsize_elem;
3407 int i;
3408 int rc = 0;
3409
3410
3411 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3412
3413 scatterlist = sglist->scatterlist;
3414
3415 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
3416 struct page *page = sg_page(&scatterlist[i]);
3417
3418 kaddr = kmap(page);
3419 if (direction == DMA_TO_DEVICE)
3420 rc = __copy_from_user(kaddr,
3421 (void *)buffer,
3422 bsize_elem);
3423 else
3424 rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
3425
3426 kunmap(page);
3427
3428 if (rc) {
3429 pmcraid_err("failed to copy user data into sg list\n");
3430 return -EFAULT;
3431 }
3432
3433 scatterlist[i].length = bsize_elem;
3434 }
3435
3436 if (len % bsize_elem) {
3437 struct page *page = sg_page(&scatterlist[i]);
3438
3439 kaddr = kmap(page);
3440
3441 if (direction == DMA_TO_DEVICE)
3442 rc = __copy_from_user(kaddr,
3443 (void *)buffer,
3444 len % bsize_elem);
3445 else
3446 rc = __copy_to_user((void *)buffer,
3447 kaddr,
3448 len % bsize_elem);
3449
3450 kunmap(page);
3451
3452 scatterlist[i].length = len % bsize_elem;
3453 }
3454
3455 if (rc) {
3456 pmcraid_err("failed to copy user data into sg list\n");
3457 rc = -EFAULT;
3458 }
3459
3460 return rc;
3461}
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477static int pmcraid_queuecommand_lck(
3478 struct scsi_cmnd *scsi_cmd,
3479 void (*done) (struct scsi_cmnd *)
3480)
3481{
3482 struct pmcraid_instance *pinstance;
3483 struct pmcraid_resource_entry *res;
3484 struct pmcraid_ioarcb *ioarcb;
3485 struct pmcraid_cmd *cmd;
3486 u32 fw_version;
3487 int rc = 0;
3488
3489 pinstance =
3490 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
3491 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
3492 scsi_cmd->scsi_done = done;
3493 res = scsi_cmd->device->hostdata;
3494 scsi_cmd->result = (DID_OK << 16);
3495
3496
3497
3498
3499 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3500 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3501 scsi_cmd->result = (DID_NO_CONNECT << 16);
3502 scsi_cmd->scsi_done(scsi_cmd);
3503 return 0;
3504 }
3505
3506
3507 if (pinstance->ioa_reset_in_progress)
3508 return SCSI_MLQUEUE_HOST_BUSY;
3509
3510
3511
3512
3513 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3514 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3515 scsi_cmd->scsi_done(scsi_cmd);
3516 return 0;
3517 }
3518
3519
3520 cmd = pmcraid_get_free_cmd(pinstance);
3521
3522 if (cmd == NULL) {
3523 pmcraid_err("free command block is not available\n");
3524 return SCSI_MLQUEUE_HOST_BUSY;
3525 }
3526
3527 cmd->scsi_cmd = scsi_cmd;
3528 ioarcb = &(cmd->ioa_cb->ioarcb);
3529 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3530 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3531 ioarcb->request_type = REQ_TYPE_SCSI;
3532
3533
3534
3535
3536
3537
3538 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3539 pinstance->num_hrrq;
3540 cmd->cmd_done = pmcraid_io_done;
3541
3542 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3543 if (scsi_cmd->underflow == 0)
3544 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3545
3546 if (res->sync_reqd) {
3547 ioarcb->request_flags0 |= SYNC_COMPLETE;
3548 res->sync_reqd = 0;
3549 }
3550
3551 ioarcb->request_flags0 |= NO_LINK_DESCS;
3552 ioarcb->request_flags1 |= pmcraid_task_attributes(scsi_cmd);
3553
3554 if (RES_IS_GSCSI(res->cfg_entry))
3555 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3556 }
3557
3558 rc = pmcraid_build_ioadl(pinstance, cmd);
3559
3560 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3561 le32_to_cpu(ioarcb->response_handle) >> 2,
3562 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3563 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3564 PMCRAID_PHYS_BUS_ID,
3565 RES_IS_VSET(res->cfg_entry) ?
3566 (fw_version <= PMCRAID_FW_VERSION_1 ?
3567 res->cfg_entry.unique_flags1 :
3568 res->cfg_entry.array_id & 0xFF) :
3569 RES_TARGET(res->cfg_entry.resource_address),
3570 RES_LUN(res->cfg_entry.resource_address));
3571
3572 if (likely(rc == 0)) {
3573 _pmcraid_fire_command(cmd);
3574 } else {
3575 pmcraid_err("queuecommand could not build ioadl\n");
3576 pmcraid_return_cmd(cmd);
3577 rc = SCSI_MLQUEUE_HOST_BUSY;
3578 }
3579
3580 return rc;
3581}
3582
3583static DEF_SCSI_QCMD(pmcraid_queuecommand)
3584
3585
3586
3587
3588static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3589{
3590 struct pmcraid_instance *pinstance;
3591
3592 if (!capable(CAP_SYS_ADMIN))
3593 return -EACCES;
3594
3595
3596 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3597 filep->private_data = pinstance;
3598
3599 return 0;
3600}
3601
3602
3603
3604
3605static int pmcraid_chr_release(struct inode *inode, struct file *filep)
3606{
3607 struct pmcraid_instance *pinstance = filep->private_data;
3608
3609 filep->private_data = NULL;
3610 fasync_helper(-1, filep, 0, &pinstance->aen_queue);
3611
3612 return 0;
3613}
3614
3615
3616
3617
3618
3619
3620
3621static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3622{
3623 struct pmcraid_instance *pinstance;
3624 int rc;
3625
3626 pinstance = filep->private_data;
3627 mutex_lock(&pinstance->aen_queue_lock);
3628 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3629 mutex_unlock(&pinstance->aen_queue_lock);
3630
3631 return rc;
3632}
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646static int pmcraid_build_passthrough_ioadls(
3647 struct pmcraid_cmd *cmd,
3648 int buflen,
3649 int direction
3650)
3651{
3652 struct pmcraid_sglist *sglist = NULL;
3653 struct scatterlist *sg = NULL;
3654 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3655 struct pmcraid_ioadl_desc *ioadl;
3656 int i;
3657
3658 sglist = pmcraid_alloc_sglist(buflen);
3659
3660 if (!sglist) {
3661 pmcraid_err("can't allocate memory for passthrough SGls\n");
3662 return -ENOMEM;
3663 }
3664
3665 sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
3666 sglist->scatterlist,
3667 sglist->num_sg, direction);
3668
3669 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3670 dev_err(&cmd->drv_inst->pdev->dev,
3671 "Failed to map passthrough buffer!\n");
3672 pmcraid_free_sglist(sglist);
3673 return -EIO;
3674 }
3675
3676 cmd->sglist = sglist;
3677 ioarcb->request_flags0 |= NO_LINK_DESCS;
3678
3679 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3680
3681
3682 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3683 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3684 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3685 ioadl[i].flags = 0;
3686 }
3687
3688
3689 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3690
3691 return 0;
3692}
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705static void pmcraid_release_passthrough_ioadls(
3706 struct pmcraid_cmd *cmd,
3707 int buflen,
3708 int direction
3709)
3710{
3711 struct pmcraid_sglist *sglist = cmd->sglist;
3712
3713 if (buflen > 0) {
3714 pci_unmap_sg(cmd->drv_inst->pdev,
3715 sglist->scatterlist,
3716 sglist->num_sg,
3717 direction);
3718 pmcraid_free_sglist(sglist);
3719 cmd->sglist = NULL;
3720 }
3721}
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733static long pmcraid_ioctl_passthrough(
3734 struct pmcraid_instance *pinstance,
3735 unsigned int ioctl_cmd,
3736 unsigned int buflen,
3737 unsigned long arg
3738)
3739{
3740 struct pmcraid_passthrough_ioctl_buffer *buffer;
3741 struct pmcraid_ioarcb *ioarcb;
3742 struct pmcraid_cmd *cmd;
3743 struct pmcraid_cmd *cancel_cmd;
3744 unsigned long request_buffer;
3745 unsigned long request_offset;
3746 unsigned long lock_flags;
3747 void *ioasa;
3748 u32 ioasc;
3749 int request_size;
3750 int buffer_size;
3751 u8 access, direction;
3752 int rc = 0;
3753
3754
3755 if (pinstance->ioa_reset_in_progress) {
3756 rc = wait_event_interruptible_timeout(
3757 pinstance->reset_wait_q,
3758 !pinstance->ioa_reset_in_progress,
3759 msecs_to_jiffies(10000));
3760
3761 if (!rc)
3762 return -ETIMEDOUT;
3763 else if (rc < 0)
3764 return -ERESTARTSYS;
3765 }
3766
3767
3768 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3769 pmcraid_err("IOA is not operational\n");
3770 return -ENOTTY;
3771 }
3772
3773 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3774 buffer = kmalloc(buffer_size, GFP_KERNEL);
3775
3776 if (!buffer) {
3777 pmcraid_err("no memory for passthrough buffer\n");
3778 return -ENOMEM;
3779 }
3780
3781 request_offset =
3782 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3783
3784 request_buffer = arg + request_offset;
3785
3786 rc = __copy_from_user(buffer,
3787 (struct pmcraid_passthrough_ioctl_buffer *) arg,
3788 sizeof(struct pmcraid_passthrough_ioctl_buffer));
3789
3790 ioasa =
3791 (void *)(arg +
3792 offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
3793
3794 if (rc) {
3795 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3796 rc = -EFAULT;
3797 goto out_free_buffer;
3798 }
3799
3800 request_size = buffer->ioarcb.data_transfer_length;
3801
3802 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3803 access = VERIFY_READ;
3804 direction = DMA_TO_DEVICE;
3805 } else {
3806 access = VERIFY_WRITE;
3807 direction = DMA_FROM_DEVICE;
3808 }
3809
3810 if (request_size > 0) {
3811 rc = access_ok(access, arg, request_offset + request_size);
3812
3813 if (!rc) {
3814 rc = -EFAULT;
3815 goto out_free_buffer;
3816 }
3817 }
3818
3819
3820 if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
3821 rc = -EINVAL;
3822 goto out_free_buffer;
3823 }
3824
3825 cmd = pmcraid_get_free_cmd(pinstance);
3826
3827 if (!cmd) {
3828 pmcraid_err("free command block is not available\n");
3829 rc = -ENOMEM;
3830 goto out_free_buffer;
3831 }
3832
3833 cmd->scsi_cmd = NULL;
3834 ioarcb = &(cmd->ioa_cb->ioarcb);
3835
3836
3837 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3838 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3839 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3840 ioarcb->request_type = buffer->ioarcb.request_type;
3841 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3842 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3843 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3844
3845 if (buffer->ioarcb.add_cmd_param_length) {
3846 ioarcb->add_cmd_param_length =
3847 buffer->ioarcb.add_cmd_param_length;
3848 ioarcb->add_cmd_param_offset =
3849 buffer->ioarcb.add_cmd_param_offset;
3850 memcpy(ioarcb->add_data.u.add_cmd_params,
3851 buffer->ioarcb.add_data.u.add_cmd_params,
3852 buffer->ioarcb.add_cmd_param_length);
3853 }
3854
3855
3856
3857
3858
3859
3860 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3861 pinstance->num_hrrq;
3862
3863 if (request_size) {
3864 rc = pmcraid_build_passthrough_ioadls(cmd,
3865 request_size,
3866 direction);
3867 if (rc) {
3868 pmcraid_err("couldn't build passthrough ioadls\n");
3869 goto out_free_buffer;
3870 }
3871 }
3872
3873
3874
3875
3876 if (direction == DMA_TO_DEVICE && request_size > 0) {
3877 rc = pmcraid_copy_sglist(cmd->sglist,
3878 request_buffer,
3879 request_size,
3880 direction);
3881 if (rc) {
3882 pmcraid_err("failed to copy user buffer\n");
3883 goto out_free_sglist;
3884 }
3885 }
3886
3887
3888
3889
3890 cmd->cmd_done = pmcraid_internal_done;
3891 init_completion(&cmd->wait_for_completion);
3892 cmd->completion_req = 1;
3893
3894 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3895 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3896 cmd->ioa_cb->ioarcb.cdb[0],
3897 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3898
3899 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3900 _pmcraid_fire_command(cmd);
3901 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3902
3903
3904
3905
3906
3907
3908
3909 buffer->ioarcb.cmd_timeout = 0;
3910
3911
3912
3913
3914
3915 if (buffer->ioarcb.cmd_timeout == 0) {
3916 wait_for_completion(&cmd->wait_for_completion);
3917 } else if (!wait_for_completion_timeout(
3918 &cmd->wait_for_completion,
3919 msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
3920
3921 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
3922 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
3923 cmd->ioa_cb->ioarcb.cdb[0]);
3924
3925 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3926 cancel_cmd = pmcraid_abort_cmd(cmd);
3927 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3928
3929 if (cancel_cmd) {
3930 wait_for_completion(&cancel_cmd->wait_for_completion);
3931 ioasc = cancel_cmd->ioa_cb->ioasa.ioasc;
3932 pmcraid_return_cmd(cancel_cmd);
3933
3934
3935
3936
3937
3938
3939
3940 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3941 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3942 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3943 rc = -ETIMEDOUT;
3944 goto out_handle_response;
3945 }
3946 }
3947
3948
3949
3950
3951
3952 if (!wait_for_completion_timeout(
3953 &cmd->wait_for_completion,
3954 msecs_to_jiffies(150 * 1000))) {
3955 pmcraid_reset_bringup(cmd->drv_inst);
3956 rc = -ETIMEDOUT;
3957 }
3958 }
3959
3960out_handle_response:
3961
3962
3963
3964
3965 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3966 sizeof(struct pmcraid_ioasa))) {
3967 pmcraid_err("failed to copy ioasa buffer to user\n");
3968 rc = -EFAULT;
3969 }
3970
3971
3972
3973
3974 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3975 rc = pmcraid_copy_sglist(cmd->sglist,
3976 request_buffer,
3977 request_size,
3978 direction);
3979 if (rc) {
3980 pmcraid_err("failed to copy user buffer\n");
3981 rc = -EFAULT;
3982 }
3983 }
3984
3985out_free_sglist:
3986 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
3987 pmcraid_return_cmd(cmd);
3988
3989out_free_buffer:
3990 kfree(buffer);
3991
3992 return rc;
3993}
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009static long pmcraid_ioctl_driver(
4010 struct pmcraid_instance *pinstance,
4011 unsigned int cmd,
4012 unsigned int buflen,
4013 void __user *user_buffer
4014)
4015{
4016 int rc = -ENOSYS;
4017
4018 if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
4019 pmcraid_err("ioctl_driver: access fault in request buffer\n");
4020 return -EFAULT;
4021 }
4022
4023 switch (cmd) {
4024 case PMCRAID_IOCTL_RESET_ADAPTER:
4025 pmcraid_reset_bringup(pinstance);
4026 rc = 0;
4027 break;
4028
4029 default:
4030 break;
4031 }
4032
4033 return rc;
4034}
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048static int pmcraid_check_ioctl_buffer(
4049 int cmd,
4050 void __user *arg,
4051 struct pmcraid_ioctl_header *hdr
4052)
4053{
4054 int rc = 0;
4055 int access = VERIFY_READ;
4056
4057 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
4058 pmcraid_err("couldn't copy ioctl header from user buffer\n");
4059 return -EFAULT;
4060 }
4061
4062
4063 rc = memcmp(hdr->signature,
4064 PMCRAID_IOCTL_SIGNATURE,
4065 sizeof(hdr->signature));
4066 if (rc) {
4067 pmcraid_err("signature verification failed\n");
4068 return -EINVAL;
4069 }
4070
4071
4072 if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
4073 access = VERIFY_WRITE;
4074
4075 rc = access_ok(access,
4076 (arg + sizeof(struct pmcraid_ioctl_header)),
4077 hdr->buffer_length);
4078 if (!rc) {
4079 pmcraid_err("access failed for user buffer of size %d\n",
4080 hdr->buffer_length);
4081 return -EFAULT;
4082 }
4083
4084 return 0;
4085}
4086
4087
4088
4089
4090static long pmcraid_chr_ioctl(
4091 struct file *filep,
4092 unsigned int cmd,
4093 unsigned long arg
4094)
4095{
4096 struct pmcraid_instance *pinstance = NULL;
4097 struct pmcraid_ioctl_header *hdr = NULL;
4098 int retval = -ENOTTY;
4099
4100 hdr = kmalloc(GFP_KERNEL, sizeof(struct pmcraid_ioctl_header));
4101
4102 if (!hdr) {
4103 pmcraid_err("faile to allocate memory for ioctl header\n");
4104 return -ENOMEM;
4105 }
4106
4107 retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
4108
4109 if (retval) {
4110 pmcraid_info("chr_ioctl: header check failed\n");
4111 kfree(hdr);
4112 return retval;
4113 }
4114
4115 pinstance = filep->private_data;
4116
4117 if (!pinstance) {
4118 pmcraid_info("adapter instance is not found\n");
4119 kfree(hdr);
4120 return -ENOTTY;
4121 }
4122
4123 switch (_IOC_TYPE(cmd)) {
4124
4125 case PMCRAID_PASSTHROUGH_IOCTL:
4126
4127
4128
4129 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4130 scsi_block_requests(pinstance->host);
4131
4132 retval = pmcraid_ioctl_passthrough(pinstance,
4133 cmd,
4134 hdr->buffer_length,
4135 arg);
4136
4137 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4138 scsi_unblock_requests(pinstance->host);
4139 break;
4140
4141 case PMCRAID_DRIVER_IOCTL:
4142 arg += sizeof(struct pmcraid_ioctl_header);
4143 retval = pmcraid_ioctl_driver(pinstance,
4144 cmd,
4145 hdr->buffer_length,
4146 (void __user *)arg);
4147 break;
4148
4149 default:
4150 retval = -ENOTTY;
4151 break;
4152 }
4153
4154 kfree(hdr);
4155
4156 return retval;
4157}
4158
4159
4160
4161
4162static const struct file_operations pmcraid_fops = {
4163 .owner = THIS_MODULE,
4164 .open = pmcraid_chr_open,
4165 .release = pmcraid_chr_release,
4166 .fasync = pmcraid_chr_fasync,
4167 .unlocked_ioctl = pmcraid_chr_ioctl,
4168#ifdef CONFIG_COMPAT
4169 .compat_ioctl = pmcraid_chr_ioctl,
4170#endif
4171 .llseek = noop_llseek,
4172};
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185static ssize_t pmcraid_show_log_level(
4186 struct device *dev,
4187 struct device_attribute *attr,
4188 char *buf)
4189{
4190 struct Scsi_Host *shost = class_to_shost(dev);
4191 struct pmcraid_instance *pinstance =
4192 (struct pmcraid_instance *)shost->hostdata;
4193 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4194}
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205static ssize_t pmcraid_store_log_level(
4206 struct device *dev,
4207 struct device_attribute *attr,
4208 const char *buf,
4209 size_t count
4210)
4211{
4212 struct Scsi_Host *shost;
4213 struct pmcraid_instance *pinstance;
4214 unsigned long val;
4215
4216 if (strict_strtoul(buf, 10, &val))
4217 return -EINVAL;
4218
4219 if (val > 2)
4220 return -EINVAL;
4221
4222 shost = class_to_shost(dev);
4223 pinstance = (struct pmcraid_instance *)shost->hostdata;
4224 pinstance->current_log_level = val;
4225
4226 return strlen(buf);
4227}
4228
4229static struct device_attribute pmcraid_log_level_attr = {
4230 .attr = {
4231 .name = "log_level",
4232 .mode = S_IRUGO | S_IWUSR,
4233 },
4234 .show = pmcraid_show_log_level,
4235 .store = pmcraid_store_log_level,
4236};
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246static ssize_t pmcraid_show_drv_version(
4247 struct device *dev,
4248 struct device_attribute *attr,
4249 char *buf
4250)
4251{
4252 return snprintf(buf, PAGE_SIZE, "version: %s, build date: %s\n",
4253 PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
4254}
4255
4256static struct device_attribute pmcraid_driver_version_attr = {
4257 .attr = {
4258 .name = "drv_version",
4259 .mode = S_IRUGO,
4260 },
4261 .show = pmcraid_show_drv_version,
4262};
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272static ssize_t pmcraid_show_adapter_id(
4273 struct device *dev,
4274 struct device_attribute *attr,
4275 char *buf
4276)
4277{
4278 struct Scsi_Host *shost = class_to_shost(dev);
4279 struct pmcraid_instance *pinstance =
4280 (struct pmcraid_instance *)shost->hostdata;
4281 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4282 pinstance->pdev->devfn;
4283 u32 aen_group = pmcraid_event_family.id;
4284
4285 return snprintf(buf, PAGE_SIZE,
4286 "adapter id: %d\nminor: %d\naen group: %d\n",
4287 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4288}
4289
4290static struct device_attribute pmcraid_adapter_id_attr = {
4291 .attr = {
4292 .name = "adapter_id",
4293 .mode = S_IRUGO | S_IWUSR,
4294 },
4295 .show = pmcraid_show_adapter_id,
4296};
4297
4298static struct device_attribute *pmcraid_host_attrs[] = {
4299 &pmcraid_log_level_attr,
4300 &pmcraid_driver_version_attr,
4301 &pmcraid_adapter_id_attr,
4302 NULL,
4303};
4304
4305
4306
4307static struct scsi_host_template pmcraid_host_template = {
4308 .module = THIS_MODULE,
4309 .name = PMCRAID_DRIVER_NAME,
4310 .queuecommand = pmcraid_queuecommand,
4311 .eh_abort_handler = pmcraid_eh_abort_handler,
4312 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4313 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4314 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4315 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4316
4317 .slave_alloc = pmcraid_slave_alloc,
4318 .slave_configure = pmcraid_slave_configure,
4319 .slave_destroy = pmcraid_slave_destroy,
4320 .change_queue_depth = pmcraid_change_queue_depth,
4321 .change_queue_type = pmcraid_change_queue_type,
4322 .can_queue = PMCRAID_MAX_IO_CMD,
4323 .this_id = -1,
4324 .sg_tablesize = PMCRAID_MAX_IOADLS,
4325 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
4326 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4327 .use_clustering = ENABLE_CLUSTERING,
4328 .shost_attrs = pmcraid_host_attrs,
4329 .proc_name = PMCRAID_DRIVER_NAME
4330};
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
4342{
4343 struct pmcraid_isr_param *hrrq_vector;
4344 struct pmcraid_instance *pinstance;
4345 unsigned long lock_flags;
4346 u32 intrs_val;
4347 int hrrq_id;
4348
4349 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4350 hrrq_id = hrrq_vector->hrrq_id;
4351 pinstance = hrrq_vector->drv_inst;
4352
4353 if (!hrrq_id) {
4354
4355 intrs_val = pmcraid_read_interrupts(pinstance);
4356 if (intrs_val &&
4357 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4358 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4359
4360
4361
4362
4363
4364 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4365 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4366 pinstance->ioa_unit_check = 1;
4367
4368 pmcraid_err("ISR: error interrupts: %x \
4369 initiating reset\n", intrs_val);
4370 spin_lock_irqsave(pinstance->host->host_lock,
4371 lock_flags);
4372 pmcraid_initiate_reset(pinstance);
4373 spin_unlock_irqrestore(
4374 pinstance->host->host_lock,
4375 lock_flags);
4376 }
4377
4378
4379
4380
4381 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4382 pmcraid_clr_trans_op(pinstance);
4383
4384
4385
4386
4387
4388 iowrite32(DOORBELL_INTR_MSIX_CLR,
4389 pinstance->int_regs.host_ioa_interrupt_reg);
4390 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4391
4392
4393 }
4394 }
4395
4396 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4397
4398 return IRQ_HANDLED;
4399}
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4411{
4412 struct pmcraid_isr_param *hrrq_vector;
4413 struct pmcraid_instance *pinstance;
4414 u32 intrs;
4415 unsigned long lock_flags;
4416 int hrrq_id = 0;
4417
4418
4419
4420
4421 if (!dev_id) {
4422 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4423 return IRQ_NONE;
4424 }
4425 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4426 pinstance = hrrq_vector->drv_inst;
4427
4428 intrs = pmcraid_read_interrupts(pinstance);
4429
4430 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
4431 return IRQ_NONE;
4432
4433
4434
4435
4436
4437 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4438
4439 if (intrs & INTRS_IOA_UNIT_CHECK)
4440 pinstance->ioa_unit_check = 1;
4441
4442 iowrite32(intrs,
4443 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4444 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4445 intrs);
4446 intrs = ioread32(
4447 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4448 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
4449 pmcraid_initiate_reset(pinstance);
4450 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
4451 } else {
4452
4453
4454
4455
4456 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4457 pmcraid_clr_trans_op(pinstance);
4458 } else {
4459 iowrite32(intrs,
4460 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4461 ioread32(
4462 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4463
4464 tasklet_schedule(
4465 &(pinstance->isr_tasklet[hrrq_id]));
4466 }
4467 }
4468
4469 return IRQ_HANDLED;
4470}
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482static void pmcraid_worker_function(struct work_struct *workp)
4483{
4484 struct pmcraid_instance *pinstance;
4485 struct pmcraid_resource_entry *res;
4486 struct pmcraid_resource_entry *temp;
4487 struct scsi_device *sdev;
4488 unsigned long lock_flags;
4489 unsigned long host_lock_flags;
4490 u16 fw_version;
4491 u8 bus, target, lun;
4492
4493 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4494
4495 if (!atomic_read(&pinstance->expose_resources))
4496 return;
4497
4498 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4499
4500 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4501 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4502
4503 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4504 sdev = res->scsi_dev;
4505
4506
4507
4508
4509 spin_lock_irqsave(pinstance->host->host_lock,
4510 host_lock_flags);
4511 if (!scsi_device_get(sdev)) {
4512 spin_unlock_irqrestore(
4513 pinstance->host->host_lock,
4514 host_lock_flags);
4515 pmcraid_info("deleting %x from midlayer\n",
4516 res->cfg_entry.resource_address);
4517 list_move_tail(&res->queue,
4518 &pinstance->free_res_q);
4519 spin_unlock_irqrestore(
4520 &pinstance->resource_lock,
4521 lock_flags);
4522 scsi_remove_device(sdev);
4523 scsi_device_put(sdev);
4524 spin_lock_irqsave(&pinstance->resource_lock,
4525 lock_flags);
4526 res->change_detected = 0;
4527 } else {
4528 spin_unlock_irqrestore(
4529 pinstance->host->host_lock,
4530 host_lock_flags);
4531 }
4532 }
4533 }
4534
4535 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4536
4537 if (res->change_detected == RES_CHANGE_ADD) {
4538
4539 if (!pmcraid_expose_resource(fw_version,
4540 &res->cfg_entry))
4541 continue;
4542
4543 if (RES_IS_VSET(res->cfg_entry)) {
4544 bus = PMCRAID_VSET_BUS_ID;
4545 if (fw_version <= PMCRAID_FW_VERSION_1)
4546 target = res->cfg_entry.unique_flags1;
4547 else
4548 target = res->cfg_entry.array_id & 0xFF;
4549 lun = PMCRAID_VSET_LUN_ID;
4550 } else {
4551 bus = PMCRAID_PHYS_BUS_ID;
4552 target =
4553 RES_TARGET(
4554 res->cfg_entry.resource_address);
4555 lun = RES_LUN(res->cfg_entry.resource_address);
4556 }
4557
4558 res->change_detected = 0;
4559 spin_unlock_irqrestore(&pinstance->resource_lock,
4560 lock_flags);
4561 scsi_add_device(pinstance->host, bus, target, lun);
4562 spin_lock_irqsave(&pinstance->resource_lock,
4563 lock_flags);
4564 }
4565 }
4566
4567 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4568}
4569
4570
4571
4572
4573
4574
4575
4576
4577
4578static void pmcraid_tasklet_function(unsigned long instance)
4579{
4580 struct pmcraid_isr_param *hrrq_vector;
4581 struct pmcraid_instance *pinstance;
4582 unsigned long hrrq_lock_flags;
4583 unsigned long pending_lock_flags;
4584 unsigned long host_lock_flags;
4585 spinlock_t *lockp;
4586 int id;
4587 __le32 resp;
4588
4589 hrrq_vector = (struct pmcraid_isr_param *)instance;
4590 pinstance = hrrq_vector->drv_inst;
4591 id = hrrq_vector->hrrq_id;
4592 lockp = &(pinstance->hrrq_lock[id]);
4593
4594
4595
4596
4597
4598
4599
4600 spin_lock_irqsave(lockp, hrrq_lock_flags);
4601
4602 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4603
4604 while ((resp & HRRQ_TOGGLE_BIT) ==
4605 pinstance->host_toggle_bit[id]) {
4606
4607 int cmd_index = resp >> 2;
4608 struct pmcraid_cmd *cmd = NULL;
4609
4610 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4611 pinstance->hrrq_curr[id]++;
4612 } else {
4613 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4614 pinstance->host_toggle_bit[id] ^= 1u;
4615 }
4616
4617 if (cmd_index >= PMCRAID_MAX_CMD) {
4618
4619 pmcraid_err("Invalid response handle %d\n", cmd_index);
4620 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4621 continue;
4622 }
4623
4624 cmd = pinstance->cmd_list[cmd_index];
4625 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4626
4627 spin_lock_irqsave(&pinstance->pending_pool_lock,
4628 pending_lock_flags);
4629 list_del(&cmd->free_list);
4630 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4631 pending_lock_flags);
4632 del_timer(&cmd->timer);
4633 atomic_dec(&pinstance->outstanding_cmds);
4634
4635 if (cmd->cmd_done == pmcraid_ioa_reset) {
4636 spin_lock_irqsave(pinstance->host->host_lock,
4637 host_lock_flags);
4638 cmd->cmd_done(cmd);
4639 spin_unlock_irqrestore(pinstance->host->host_lock,
4640 host_lock_flags);
4641 } else if (cmd->cmd_done != NULL) {
4642 cmd->cmd_done(cmd);
4643 }
4644
4645 spin_lock_irqsave(lockp, hrrq_lock_flags);
4646 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4647 }
4648
4649 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4650}
4651
4652
4653
4654
4655
4656
4657
4658
4659
4660
4661
4662static
4663void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4664{
4665 int i;
4666
4667 for (i = 0; i < pinstance->num_hrrq; i++)
4668 free_irq(pinstance->hrrq_vector[i].vector,
4669 &(pinstance->hrrq_vector[i]));
4670
4671 if (pinstance->interrupt_mode) {
4672 pci_disable_msix(pinstance->pdev);
4673 pinstance->interrupt_mode = 0;
4674 }
4675}
4676
4677
4678
4679
4680
4681
4682
4683
4684static int
4685pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4686{
4687 int rc;
4688 struct pci_dev *pdev = pinstance->pdev;
4689
4690 if ((pmcraid_enable_msix) &&
4691 (pci_find_capability(pdev, PCI_CAP_ID_MSIX))) {
4692 int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
4693 struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
4694 int i;
4695 for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
4696 entries[i].entry = i;
4697
4698 rc = pci_enable_msix(pdev, entries, num_hrrq);
4699 if (rc < 0)
4700 goto pmcraid_isr_legacy;
4701
4702
4703
4704
4705 if (rc > 0) {
4706 num_hrrq = rc;
4707 if (pci_enable_msix(pdev, entries, num_hrrq))
4708 goto pmcraid_isr_legacy;
4709 }
4710
4711 for (i = 0; i < num_hrrq; i++) {
4712 pinstance->hrrq_vector[i].hrrq_id = i;
4713 pinstance->hrrq_vector[i].drv_inst = pinstance;
4714 pinstance->hrrq_vector[i].vector = entries[i].vector;
4715 rc = request_irq(pinstance->hrrq_vector[i].vector,
4716 pmcraid_isr_msix, 0,
4717 PMCRAID_DRIVER_NAME,
4718 &(pinstance->hrrq_vector[i]));
4719
4720 if (rc) {
4721 int j;
4722 for (j = 0; j < i; j++)
4723 free_irq(entries[j].vector,
4724 &(pinstance->hrrq_vector[j]));
4725 pci_disable_msix(pdev);
4726 goto pmcraid_isr_legacy;
4727 }
4728 }
4729
4730 pinstance->num_hrrq = num_hrrq;
4731 pinstance->interrupt_mode = 1;
4732 iowrite32(DOORBELL_INTR_MODE_MSIX,
4733 pinstance->int_regs.host_ioa_interrupt_reg);
4734 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4735 goto pmcraid_isr_out;
4736 }
4737
4738pmcraid_isr_legacy:
4739
4740
4741
4742 pinstance->hrrq_vector[0].hrrq_id = 0;
4743 pinstance->hrrq_vector[0].drv_inst = pinstance;
4744 pinstance->hrrq_vector[0].vector = pdev->irq;
4745 pinstance->num_hrrq = 1;
4746 rc = 0;
4747
4748 rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
4749 PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
4750pmcraid_isr_out:
4751 return rc;
4752}
4753
4754
4755
4756
4757
4758
4759
4760
4761
4762static void
4763pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4764{
4765 int i;
4766 for (i = 0; i < max_index; i++) {
4767 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4768 pinstance->cmd_list[i] = NULL;
4769 }
4770 kmem_cache_destroy(pinstance->cmd_cachep);
4771 pinstance->cmd_cachep = NULL;
4772}
4773
4774
4775
4776
4777
4778
4779
4780
4781
4782
4783
4784
4785static void
4786pmcraid_release_control_blocks(
4787 struct pmcraid_instance *pinstance,
4788 int max_index
4789)
4790{
4791 int i;
4792
4793 if (pinstance->control_pool == NULL)
4794 return;
4795
4796 for (i = 0; i < max_index; i++) {
4797 pci_pool_free(pinstance->control_pool,
4798 pinstance->cmd_list[i]->ioa_cb,
4799 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4800 pinstance->cmd_list[i]->ioa_cb = NULL;
4801 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4802 }
4803 pci_pool_destroy(pinstance->control_pool);
4804 pinstance->control_pool = NULL;
4805}
4806
4807
4808
4809
4810
4811
4812
4813
4814
4815
4816static int __devinit
4817pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
4818{
4819 int i;
4820
4821 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4822 pinstance->host->unique_id);
4823
4824
4825 pinstance->cmd_cachep = kmem_cache_create(
4826 pinstance->cmd_pool_name,
4827 sizeof(struct pmcraid_cmd), 0,
4828 SLAB_HWCACHE_ALIGN, NULL);
4829 if (!pinstance->cmd_cachep)
4830 return -ENOMEM;
4831
4832 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4833 pinstance->cmd_list[i] =
4834 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4835 if (!pinstance->cmd_list[i]) {
4836 pmcraid_release_cmd_blocks(pinstance, i);
4837 return -ENOMEM;
4838 }
4839 }
4840 return 0;
4841}
4842
4843
4844
4845
4846
4847
4848
4849
4850
4851
4852
4853static int __devinit
4854pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
4855{
4856 int i;
4857
4858 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4859 pinstance->host->unique_id);
4860
4861 pinstance->control_pool =
4862 pci_pool_create(pinstance->ctl_pool_name,
4863 pinstance->pdev,
4864 sizeof(struct pmcraid_control_block),
4865 PMCRAID_IOARCB_ALIGNMENT, 0);
4866
4867 if (!pinstance->control_pool)
4868 return -ENOMEM;
4869
4870 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4871 pinstance->cmd_list[i]->ioa_cb =
4872 pci_pool_alloc(
4873 pinstance->control_pool,
4874 GFP_KERNEL,
4875 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4876
4877 if (!pinstance->cmd_list[i]->ioa_cb) {
4878 pmcraid_release_control_blocks(pinstance, i);
4879 return -ENOMEM;
4880 }
4881 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4882 sizeof(struct pmcraid_control_block));
4883 }
4884 return 0;
4885}
4886
4887
4888
4889
4890
4891
4892
4893
4894
4895static void
4896pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4897{
4898 int i;
4899 for (i = 0; i < maxindex; i++) {
4900
4901 pci_free_consistent(pinstance->pdev,
4902 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4903 pinstance->hrrq_start[i],
4904 pinstance->hrrq_start_bus_addr[i]);
4905
4906
4907 pinstance->hrrq_start[i] = NULL;
4908 pinstance->hrrq_start_bus_addr[i] = 0;
4909 pinstance->host_toggle_bit[i] = 0;
4910 }
4911}
4912
4913
4914
4915
4916
4917
4918
4919
4920static int __devinit
4921pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
4922{
4923 int i, buffer_size;
4924
4925 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
4926
4927 for (i = 0; i < pinstance->num_hrrq; i++) {
4928 pinstance->hrrq_start[i] =
4929 pci_alloc_consistent(
4930 pinstance->pdev,
4931 buffer_size,
4932 &(pinstance->hrrq_start_bus_addr[i]));
4933
4934 if (pinstance->hrrq_start[i] == 0) {
4935 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4936 i);
4937 pmcraid_release_host_rrqs(pinstance, i);
4938 return -ENOMEM;
4939 }
4940
4941 memset(pinstance->hrrq_start[i], 0, buffer_size);
4942 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4943 pinstance->hrrq_end[i] =
4944 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
4945 pinstance->host_toggle_bit[i] = 1;
4946 spin_lock_init(&pinstance->hrrq_lock[i]);
4947 }
4948 return 0;
4949}
4950
4951
4952
4953
4954
4955
4956
4957
4958
4959static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4960{
4961 if (pinstance->ccn.msg != NULL) {
4962 pci_free_consistent(pinstance->pdev,
4963 PMCRAID_AEN_HDR_SIZE +
4964 sizeof(struct pmcraid_hcam_ccn_ext),
4965 pinstance->ccn.msg,
4966 pinstance->ccn.baddr);
4967
4968 pinstance->ccn.msg = NULL;
4969 pinstance->ccn.hcam = NULL;
4970 pinstance->ccn.baddr = 0;
4971 }
4972
4973 if (pinstance->ldn.msg != NULL) {
4974 pci_free_consistent(pinstance->pdev,
4975 PMCRAID_AEN_HDR_SIZE +
4976 sizeof(struct pmcraid_hcam_ldn),
4977 pinstance->ldn.msg,
4978 pinstance->ldn.baddr);
4979
4980 pinstance->ldn.msg = NULL;
4981 pinstance->ldn.hcam = NULL;
4982 pinstance->ldn.baddr = 0;
4983 }
4984}
4985
4986
4987
4988
4989
4990
4991
4992
4993static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4994{
4995 pinstance->ccn.msg = pci_alloc_consistent(
4996 pinstance->pdev,
4997 PMCRAID_AEN_HDR_SIZE +
4998 sizeof(struct pmcraid_hcam_ccn_ext),
4999 &(pinstance->ccn.baddr));
5000
5001 pinstance->ldn.msg = pci_alloc_consistent(
5002 pinstance->pdev,
5003 PMCRAID_AEN_HDR_SIZE +
5004 sizeof(struct pmcraid_hcam_ldn),
5005 &(pinstance->ldn.baddr));
5006
5007 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
5008 pmcraid_release_hcams(pinstance);
5009 } else {
5010 pinstance->ccn.hcam =
5011 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
5012 pinstance->ldn.hcam =
5013 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
5014
5015 atomic_set(&pinstance->ccn.ignore, 0);
5016 atomic_set(&pinstance->ldn.ignore, 0);
5017 }
5018
5019 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
5020}
5021
5022
5023
5024
5025
5026
5027
5028
5029static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
5030{
5031 if (pinstance->cfg_table != NULL &&
5032 pinstance->cfg_table_bus_addr != 0) {
5033 pci_free_consistent(pinstance->pdev,
5034 sizeof(struct pmcraid_config_table),
5035 pinstance->cfg_table,
5036 pinstance->cfg_table_bus_addr);
5037 pinstance->cfg_table = NULL;
5038 pinstance->cfg_table_bus_addr = 0;
5039 }
5040
5041 if (pinstance->res_entries != NULL) {
5042 int i;
5043
5044 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
5045 list_del(&pinstance->res_entries[i].queue);
5046 kfree(pinstance->res_entries);
5047 pinstance->res_entries = NULL;
5048 }
5049
5050 pmcraid_release_hcams(pinstance);
5051}
5052
5053
5054
5055
5056
5057
5058
5059
5060static int __devinit
5061pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
5062{
5063 int i;
5064
5065 pinstance->res_entries =
5066 kzalloc(sizeof(struct pmcraid_resource_entry) *
5067 PMCRAID_MAX_RESOURCES, GFP_KERNEL);
5068
5069 if (NULL == pinstance->res_entries) {
5070 pmcraid_err("failed to allocate memory for resource table\n");
5071 return -ENOMEM;
5072 }
5073
5074 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
5075 list_add_tail(&pinstance->res_entries[i].queue,
5076 &pinstance->free_res_q);
5077
5078 pinstance->cfg_table =
5079 pci_alloc_consistent(pinstance->pdev,
5080 sizeof(struct pmcraid_config_table),
5081 &pinstance->cfg_table_bus_addr);
5082
5083 if (NULL == pinstance->cfg_table) {
5084 pmcraid_err("couldn't alloc DMA memory for config table\n");
5085 pmcraid_release_config_buffers(pinstance);
5086 return -ENOMEM;
5087 }
5088
5089 if (pmcraid_allocate_hcams(pinstance)) {
5090 pmcraid_err("could not alloc DMA memory for HCAMS\n");
5091 pmcraid_release_config_buffers(pinstance);
5092 return -ENOMEM;
5093 }
5094
5095 return 0;
5096}
5097
5098
5099
5100
5101
5102
5103
5104
5105
5106static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
5107{
5108 int i;
5109 for (i = 0; i < pinstance->num_hrrq; i++)
5110 tasklet_init(&pinstance->isr_tasklet[i],
5111 pmcraid_tasklet_function,
5112 (unsigned long)&pinstance->hrrq_vector[i]);
5113}
5114
5115
5116
5117
5118
5119
5120
5121
5122
5123static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
5124{
5125 int i;
5126 for (i = 0; i < pinstance->num_hrrq; i++)
5127 tasklet_kill(&pinstance->isr_tasklet[i]);
5128}
5129
5130
5131
5132
5133
5134
5135
5136
5137
5138static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
5139{
5140 pmcraid_release_config_buffers(pinstance);
5141 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
5142 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5143 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5144
5145 if (pinstance->inq_data != NULL) {
5146 pci_free_consistent(pinstance->pdev,
5147 sizeof(struct pmcraid_inquiry_data),
5148 pinstance->inq_data,
5149 pinstance->inq_data_baddr);
5150
5151 pinstance->inq_data = NULL;
5152 pinstance->inq_data_baddr = 0;
5153 }
5154
5155 if (pinstance->timestamp_data != NULL) {
5156 pci_free_consistent(pinstance->pdev,
5157 sizeof(struct pmcraid_timestamp_data),
5158 pinstance->timestamp_data,
5159 pinstance->timestamp_data_baddr);
5160
5161 pinstance->timestamp_data = NULL;
5162 pinstance->timestamp_data_baddr = 0;
5163 }
5164}
5165
5166
5167
5168
5169
5170
5171
5172
5173
5174
5175
5176
5177
5178
5179static int __devinit pmcraid_init_buffers(struct pmcraid_instance *pinstance)
5180{
5181 int i;
5182
5183 if (pmcraid_allocate_host_rrqs(pinstance)) {
5184 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
5185 pinstance->num_hrrq);
5186 return -ENOMEM;
5187 }
5188
5189 if (pmcraid_allocate_config_buffers(pinstance)) {
5190 pmcraid_err("couldn't allocate memory for config buffers\n");
5191 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5192 return -ENOMEM;
5193 }
5194
5195 if (pmcraid_allocate_cmd_blocks(pinstance)) {
5196 pmcraid_err("couldn't allocate memory for cmd blocks\n");
5197 pmcraid_release_config_buffers(pinstance);
5198 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5199 return -ENOMEM;
5200 }
5201
5202 if (pmcraid_allocate_control_blocks(pinstance)) {
5203 pmcraid_err("couldn't allocate memory control blocks\n");
5204 pmcraid_release_config_buffers(pinstance);
5205 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5206 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5207 return -ENOMEM;
5208 }
5209
5210
5211 pinstance->inq_data = pci_alloc_consistent(
5212 pinstance->pdev,
5213 sizeof(struct pmcraid_inquiry_data),
5214 &pinstance->inq_data_baddr);
5215
5216 if (pinstance->inq_data == NULL) {
5217 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
5218 pmcraid_release_buffers(pinstance);
5219 return -ENOMEM;
5220 }
5221
5222
5223 pinstance->timestamp_data = pci_alloc_consistent(
5224 pinstance->pdev,
5225 sizeof(struct pmcraid_timestamp_data),
5226 &pinstance->timestamp_data_baddr);
5227
5228 if (pinstance->timestamp_data == NULL) {
5229 pmcraid_err("couldn't allocate DMA memory for \
5230 set time_stamp \n");
5231 pmcraid_release_buffers(pinstance);
5232 return -ENOMEM;
5233 }
5234
5235
5236
5237
5238
5239
5240 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5241 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5242 pmcraid_init_cmdblk(cmdp, i);
5243 cmdp->drv_inst = pinstance;
5244 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5245 }
5246
5247 return 0;
5248}
5249
5250
5251
5252
5253
5254
5255
5256static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5257{
5258 int i;
5259 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5260
5261 for (i = 0; i < pinstance->num_hrrq; i++) {
5262 memset(pinstance->hrrq_start[i], 0, buffer_size);
5263 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5264 pinstance->hrrq_end[i] =
5265 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5266 pinstance->host_toggle_bit[i] = 1;
5267 }
5268}
5269
5270
5271
5272
5273
5274
5275
5276
5277
5278
5279static int __devinit pmcraid_init_instance(
5280 struct pci_dev *pdev,
5281 struct Scsi_Host *host,
5282 void __iomem *mapped_pci_addr
5283)
5284{
5285 struct pmcraid_instance *pinstance =
5286 (struct pmcraid_instance *)host->hostdata;
5287
5288 pinstance->host = host;
5289 pinstance->pdev = pdev;
5290
5291
5292 pinstance->mapped_dma_addr = mapped_pci_addr;
5293
5294
5295 {
5296 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5297 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5298
5299 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5300
5301 pint_regs->ioa_host_interrupt_reg =
5302 mapped_pci_addr + chip_cfg->ioa_host_intr;
5303 pint_regs->ioa_host_interrupt_clr_reg =
5304 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
5305 pint_regs->ioa_host_msix_interrupt_reg =
5306 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
5307 pint_regs->host_ioa_interrupt_reg =
5308 mapped_pci_addr + chip_cfg->host_ioa_intr;
5309 pint_regs->host_ioa_interrupt_clr_reg =
5310 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5311
5312
5313
5314
5315 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5316 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5317 pint_regs->ioa_host_interrupt_mask_reg =
5318 mapped_pci_addr + chip_cfg->ioa_host_mask;
5319 pint_regs->ioa_host_interrupt_mask_clr_reg =
5320 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5321 pint_regs->global_interrupt_mask_reg =
5322 mapped_pci_addr + chip_cfg->global_intr_mask;
5323 };
5324
5325 pinstance->ioa_reset_attempts = 0;
5326 init_waitqueue_head(&pinstance->reset_wait_q);
5327
5328 atomic_set(&pinstance->outstanding_cmds, 0);
5329 atomic_set(&pinstance->last_message_id, 0);
5330 atomic_set(&pinstance->expose_resources, 0);
5331
5332 INIT_LIST_HEAD(&pinstance->free_res_q);
5333 INIT_LIST_HEAD(&pinstance->used_res_q);
5334 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5335 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5336
5337 spin_lock_init(&pinstance->free_pool_lock);
5338 spin_lock_init(&pinstance->pending_pool_lock);
5339 spin_lock_init(&pinstance->resource_lock);
5340 mutex_init(&pinstance->aen_queue_lock);
5341
5342
5343 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5344
5345
5346 pinstance->current_log_level = pmcraid_log_level;
5347
5348
5349 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5350 pinstance->reset_cmd = NULL;
5351 return 0;
5352}
5353
5354
5355
5356
5357
5358
5359
5360
5361
5362
5363static void pmcraid_shutdown(struct pci_dev *pdev)
5364{
5365 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5366 pmcraid_reset_bringdown(pinstance);
5367}
5368
5369
5370
5371
5372
5373static unsigned short pmcraid_get_minor(void)
5374{
5375 int minor;
5376
5377 minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
5378 __set_bit(minor, pmcraid_minor);
5379 return minor;
5380}
5381
5382
5383
5384
5385static void pmcraid_release_minor(unsigned short minor)
5386{
5387 __clear_bit(minor, pmcraid_minor);
5388}
5389
5390
5391
5392
5393
5394
5395
5396
5397
5398static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5399{
5400 int minor;
5401 int error;
5402
5403 minor = pmcraid_get_minor();
5404 cdev_init(&pinstance->cdev, &pmcraid_fops);
5405 pinstance->cdev.owner = THIS_MODULE;
5406
5407 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5408
5409 if (error)
5410 pmcraid_release_minor(minor);
5411 else
5412 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
5413 NULL, "%s%u", PMCRAID_DEVFILE, minor);
5414 return error;
5415}
5416
5417
5418
5419
5420
5421
5422
5423
5424
5425static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5426{
5427 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5428 device_destroy(pmcraid_class,
5429 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5430 cdev_del(&pinstance->cdev);
5431}
5432
5433
5434
5435
5436
5437
5438
5439
5440static void __devexit pmcraid_remove(struct pci_dev *pdev)
5441{
5442 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5443
5444
5445 pmcraid_release_chrdev(pinstance);
5446
5447
5448 scsi_remove_host(pinstance->host);
5449
5450
5451 scsi_block_requests(pinstance->host);
5452
5453
5454 pmcraid_shutdown(pdev);
5455
5456 pmcraid_disable_interrupts(pinstance, ~0);
5457 flush_scheduled_work();
5458
5459 pmcraid_kill_tasklets(pinstance);
5460 pmcraid_unregister_interrupt_handler(pinstance);
5461 pmcraid_release_buffers(pinstance);
5462 iounmap(pinstance->mapped_dma_addr);
5463 pci_release_regions(pdev);
5464 scsi_host_put(pinstance->host);
5465 pci_disable_device(pdev);
5466
5467 return;
5468}
5469
5470#ifdef CONFIG_PM
5471
5472
5473
5474
5475
5476
5477
5478static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5479{
5480 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5481
5482 pmcraid_shutdown(pdev);
5483 pmcraid_disable_interrupts(pinstance, ~0);
5484 pmcraid_kill_tasklets(pinstance);
5485 pci_set_drvdata(pinstance->pdev, pinstance);
5486 pmcraid_unregister_interrupt_handler(pinstance);
5487 pci_save_state(pdev);
5488 pci_disable_device(pdev);
5489 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5490
5491 return 0;
5492}
5493
5494
5495
5496
5497
5498
5499
5500static int pmcraid_resume(struct pci_dev *pdev)
5501{
5502 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5503 struct Scsi_Host *host = pinstance->host;
5504 int rc;
5505
5506 pci_set_power_state(pdev, PCI_D0);
5507 pci_enable_wake(pdev, PCI_D0, 0);
5508 pci_restore_state(pdev);
5509
5510 rc = pci_enable_device(pdev);
5511
5512 if (rc) {
5513 dev_err(&pdev->dev, "resume: Enable device failed\n");
5514 return rc;
5515 }
5516
5517 pci_set_master(pdev);
5518
5519 if ((sizeof(dma_addr_t) == 4) ||
5520 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5521 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5522
5523 if (rc == 0)
5524 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5525
5526 if (rc != 0) {
5527 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
5528 goto disable_device;
5529 }
5530
5531 pmcraid_disable_interrupts(pinstance, ~0);
5532 atomic_set(&pinstance->outstanding_cmds, 0);
5533 rc = pmcraid_register_interrupt_handler(pinstance);
5534
5535 if (rc) {
5536 dev_err(&pdev->dev,
5537 "resume: couldn't register interrupt handlers\n");
5538 rc = -ENODEV;
5539 goto release_host;
5540 }
5541
5542 pmcraid_init_tasklets(pinstance);
5543 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5544
5545
5546
5547
5548 pinstance->ioa_hard_reset = 1;
5549
5550
5551
5552
5553 if (pmcraid_reset_bringup(pinstance)) {
5554 dev_err(&pdev->dev, "couldn't initialize IOA\n");
5555 rc = -ENODEV;
5556 goto release_tasklets;
5557 }
5558
5559 return 0;
5560
5561release_tasklets:
5562 pmcraid_disable_interrupts(pinstance, ~0);
5563 pmcraid_kill_tasklets(pinstance);
5564 pmcraid_unregister_interrupt_handler(pinstance);
5565
5566release_host:
5567 scsi_host_put(host);
5568
5569disable_device:
5570 pci_disable_device(pdev);
5571
5572 return rc;
5573}
5574
5575#else
5576
5577#define pmcraid_suspend NULL
5578#define pmcraid_resume NULL
5579
5580#endif
5581
5582
5583
5584
5585
5586
5587static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5588{
5589 struct pmcraid_instance *pinstance = cmd->drv_inst;
5590 unsigned long flags;
5591
5592 spin_lock_irqsave(pinstance->host->host_lock, flags);
5593 pmcraid_ioa_reset(cmd);
5594 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5595 scsi_unblock_requests(pinstance->host);
5596 schedule_work(&pinstance->worker_q);
5597}
5598
5599
5600
5601
5602
5603
5604
5605
5606
5607static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5608{
5609 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5610 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5611
5612 pmcraid_reinit_cmdblk(cmd);
5613
5614 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5615 ioarcb->request_type = REQ_TYPE_IOACMD;
5616 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5617 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5618
5619
5620
5621
5622
5623 if (cmd->drv_inst->reinit_cfg_table) {
5624 cmd->drv_inst->reinit_cfg_table = 0;
5625 cmd->release = 1;
5626 cmd_done = pmcraid_reinit_cfgtable_done;
5627 }
5628
5629
5630
5631
5632
5633 pmcraid_send_cmd(cmd,
5634 cmd_done,
5635 PMCRAID_SET_SUP_DEV_TIMEOUT,
5636 pmcraid_timeout_handler);
5637 return;
5638}
5639
5640
5641
5642
5643
5644
5645
5646
5647
5648static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5649{
5650 struct pmcraid_instance *pinstance = cmd->drv_inst;
5651 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5652 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5653 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
5654
5655 struct timeval tv;
5656 __le64 timestamp;
5657
5658 do_gettimeofday(&tv);
5659 timestamp = tv.tv_sec * 1000;
5660
5661 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5662 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5663 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5664 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5665 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5666 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5667
5668 pmcraid_reinit_cmdblk(cmd);
5669 ioarcb->request_type = REQ_TYPE_SCSI;
5670 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5671 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5672 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5673 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5674
5675 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5676 offsetof(struct pmcraid_ioarcb,
5677 add_data.u.ioadl[0]));
5678 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5679 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
5680
5681 ioarcb->request_flags0 |= NO_LINK_DESCS;
5682 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5683 ioarcb->data_transfer_length =
5684 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5685 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5686 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5687 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5688 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5689
5690 if (!pinstance->timestamp_error) {
5691 pinstance->timestamp_error = 0;
5692 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5693 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5694 } else {
5695 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5696 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5697 return;
5698 }
5699}
5700
5701
5702
5703
5704
5705
5706
5707
5708
5709
5710
5711
5712
5713
5714static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5715{
5716 struct pmcraid_instance *pinstance = cmd->drv_inst;
5717 struct pmcraid_resource_entry *res, *temp;
5718 struct pmcraid_config_table_entry *cfgte;
5719 unsigned long lock_flags;
5720 int found, rc, i;
5721 u16 fw_version;
5722 LIST_HEAD(old_res);
5723
5724 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
5725 pmcraid_err("IOA requires microcode download\n");
5726
5727 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5728
5729
5730
5731
5732
5733 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5734
5735 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5736 list_move_tail(&res->queue, &old_res);
5737
5738 for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
5739 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5740 PMCRAID_FW_VERSION_1)
5741 cfgte = &pinstance->cfg_table->entries[i];
5742 else
5743 cfgte = (struct pmcraid_config_table_entry *)
5744 &pinstance->cfg_table->entries_ext[i];
5745
5746 if (!pmcraid_expose_resource(fw_version, cfgte))
5747 continue;
5748
5749 found = 0;
5750
5751
5752 list_for_each_entry_safe(res, temp, &old_res, queue) {
5753
5754 rc = memcmp(&res->cfg_entry.resource_address,
5755 &cfgte->resource_address,
5756 sizeof(cfgte->resource_address));
5757 if (!rc) {
5758 list_move_tail(&res->queue,
5759 &pinstance->used_res_q);
5760 found = 1;
5761 break;
5762 }
5763 }
5764
5765
5766 if (!found) {
5767
5768 if (list_empty(&pinstance->free_res_q)) {
5769 pmcraid_err("Too many devices attached\n");
5770 break;
5771 }
5772
5773 found = 1;
5774 res = list_entry(pinstance->free_res_q.next,
5775 struct pmcraid_resource_entry, queue);
5776
5777 res->scsi_dev = NULL;
5778 res->change_detected = RES_CHANGE_ADD;
5779 res->reset_progress = 0;
5780 list_move_tail(&res->queue, &pinstance->used_res_q);
5781 }
5782
5783
5784
5785
5786 if (found) {
5787 memcpy(&res->cfg_entry, cfgte,
5788 pinstance->config_table_entry_size);
5789 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5790 res->cfg_entry.resource_type,
5791 (fw_version <= PMCRAID_FW_VERSION_1 ?
5792 res->cfg_entry.unique_flags1 :
5793 res->cfg_entry.array_id & 0xFF),
5794 le32_to_cpu(res->cfg_entry.resource_address));
5795 }
5796 }
5797
5798
5799 list_for_each_entry_safe(res, temp, &old_res, queue) {
5800
5801 if (res->scsi_dev) {
5802 res->change_detected = RES_CHANGE_DEL;
5803 res->cfg_entry.resource_handle =
5804 PMCRAID_INVALID_RES_HANDLE;
5805 list_move_tail(&res->queue, &pinstance->used_res_q);
5806 } else {
5807 list_move_tail(&res->queue, &pinstance->free_res_q);
5808 }
5809 }
5810
5811
5812 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
5813 pmcraid_set_timestamp(cmd);
5814}
5815
5816
5817
5818
5819
5820
5821
5822
5823
5824
5825
5826static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5827{
5828 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5829 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
5830 struct pmcraid_instance *pinstance = cmd->drv_inst;
5831 int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
5832
5833 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5834 PMCRAID_FW_VERSION_1)
5835 pinstance->config_table_entry_size =
5836 sizeof(struct pmcraid_config_table_entry);
5837 else
5838 pinstance->config_table_entry_size =
5839 sizeof(struct pmcraid_config_table_entry_ext);
5840
5841 ioarcb->request_type = REQ_TYPE_IOACMD;
5842 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5843
5844 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5845
5846
5847 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5848
5849
5850
5851
5852 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5853 offsetof(struct pmcraid_ioarcb,
5854 add_data.u.ioadl[0]));
5855 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5856 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
5857
5858 ioarcb->request_flags0 |= NO_LINK_DESCS;
5859 ioarcb->data_transfer_length =
5860 cpu_to_le32(sizeof(struct pmcraid_config_table));
5861
5862 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5863 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5864 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5865 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5866
5867 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5868 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5869}
5870
5871
5872
5873
5874
5875
5876
5877
5878
5879
5880
5881static int __devinit pmcraid_probe(
5882 struct pci_dev *pdev,
5883 const struct pci_device_id *dev_id
5884)
5885{
5886 struct pmcraid_instance *pinstance;
5887 struct Scsi_Host *host;
5888 void __iomem *mapped_pci_addr;
5889 int rc = PCIBIOS_SUCCESSFUL;
5890
5891 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5892 pmcraid_err
5893 ("maximum number(%d) of supported adapters reached\n",
5894 atomic_read(&pmcraid_adapter_count));
5895 return -ENOMEM;
5896 }
5897
5898 atomic_inc(&pmcraid_adapter_count);
5899 rc = pci_enable_device(pdev);
5900
5901 if (rc) {
5902 dev_err(&pdev->dev, "Cannot enable adapter\n");
5903 atomic_dec(&pmcraid_adapter_count);
5904 return rc;
5905 }
5906
5907 dev_info(&pdev->dev,
5908 "Found new IOA(%x:%x), Total IOA count: %d\n",
5909 pdev->vendor, pdev->device,
5910 atomic_read(&pmcraid_adapter_count));
5911
5912 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5913
5914 if (rc < 0) {
5915 dev_err(&pdev->dev,
5916 "Couldn't register memory range of registers\n");
5917 goto out_disable_device;
5918 }
5919
5920 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5921
5922 if (!mapped_pci_addr) {
5923 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5924 rc = -ENOMEM;
5925 goto out_release_regions;
5926 }
5927
5928 pci_set_master(pdev);
5929
5930
5931
5932
5933
5934
5935
5936
5937 if ((sizeof(dma_addr_t) == 4) ||
5938 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5939 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5940
5941
5942
5943
5944 if (rc == 0)
5945 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5946
5947 if (rc != 0) {
5948 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5949 goto cleanup_nomem;
5950 }
5951
5952 host = scsi_host_alloc(&pmcraid_host_template,
5953 sizeof(struct pmcraid_instance));
5954
5955 if (!host) {
5956 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5957 rc = -ENOMEM;
5958 goto cleanup_nomem;
5959 }
5960
5961 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5962 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5963 host->unique_id = host->host_no;
5964 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5965 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5966
5967
5968 pinstance = (struct pmcraid_instance *)host->hostdata;
5969 memset(pinstance, 0, sizeof(*pinstance));
5970
5971 pinstance->chip_cfg =
5972 (struct pmcraid_chip_details *)(dev_id->driver_data);
5973
5974 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5975
5976 if (rc < 0) {
5977 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5978 goto out_scsi_host_put;
5979 }
5980
5981 pci_set_drvdata(pdev, pinstance);
5982
5983
5984 rc = pci_save_state(pinstance->pdev);
5985
5986 if (rc != 0) {
5987 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5988 goto out_scsi_host_put;
5989 }
5990
5991 pmcraid_disable_interrupts(pinstance, ~0);
5992
5993 rc = pmcraid_register_interrupt_handler(pinstance);
5994
5995 if (rc) {
5996 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
5997 goto out_scsi_host_put;
5998 }
5999
6000 pmcraid_init_tasklets(pinstance);
6001
6002
6003 rc = pmcraid_init_buffers(pinstance);
6004
6005 if (rc) {
6006 pmcraid_err("couldn't allocate memory blocks\n");
6007 goto out_unregister_isr;
6008 }
6009
6010
6011 pmcraid_reset_type(pinstance);
6012
6013 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
6014
6015
6016
6017
6018 pmcraid_info("starting IOA initialization sequence\n");
6019 if (pmcraid_reset_bringup(pinstance)) {
6020 dev_err(&pdev->dev, "couldn't initialize IOA\n");
6021 rc = 1;
6022 goto out_release_bufs;
6023 }
6024
6025
6026 rc = scsi_add_host(pinstance->host, &pdev->dev);
6027 if (rc != 0) {
6028 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
6029 goto out_release_bufs;
6030 }
6031
6032 scsi_scan_host(pinstance->host);
6033
6034 rc = pmcraid_setup_chrdev(pinstance);
6035
6036 if (rc != 0) {
6037 pmcraid_err("couldn't create mgmt interface, error: %x\n",
6038 rc);
6039 goto out_remove_host;
6040 }
6041
6042
6043
6044
6045 atomic_set(&pinstance->expose_resources, 1);
6046 schedule_work(&pinstance->worker_q);
6047 return rc;
6048
6049out_remove_host:
6050 scsi_remove_host(host);
6051
6052out_release_bufs:
6053 pmcraid_release_buffers(pinstance);
6054
6055out_unregister_isr:
6056 pmcraid_kill_tasklets(pinstance);
6057 pmcraid_unregister_interrupt_handler(pinstance);
6058
6059out_scsi_host_put:
6060 scsi_host_put(host);
6061
6062cleanup_nomem:
6063 iounmap(mapped_pci_addr);
6064
6065out_release_regions:
6066 pci_release_regions(pdev);
6067
6068out_disable_device:
6069 atomic_dec(&pmcraid_adapter_count);
6070 pci_set_drvdata(pdev, NULL);
6071 pci_disable_device(pdev);
6072 return -ENODEV;
6073}
6074
6075
6076
6077
6078static struct pci_driver pmcraid_driver = {
6079 .name = PMCRAID_DRIVER_NAME,
6080 .id_table = pmcraid_pci_table,
6081 .probe = pmcraid_probe,
6082 .remove = pmcraid_remove,
6083 .suspend = pmcraid_suspend,
6084 .resume = pmcraid_resume,
6085 .shutdown = pmcraid_shutdown
6086};
6087
6088
6089
6090
6091static int __init pmcraid_init(void)
6092{
6093 dev_t dev;
6094 int error;
6095
6096 pmcraid_info("%s Device Driver version: %s %s\n",
6097 PMCRAID_DRIVER_NAME,
6098 PMCRAID_DRIVER_VERSION, PMCRAID_DRIVER_DATE);
6099
6100 error = alloc_chrdev_region(&dev, 0,
6101 PMCRAID_MAX_ADAPTERS,
6102 PMCRAID_DEVFILE);
6103
6104 if (error) {
6105 pmcraid_err("failed to get a major number for adapters\n");
6106 goto out_init;
6107 }
6108
6109 pmcraid_major = MAJOR(dev);
6110 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
6111
6112 if (IS_ERR(pmcraid_class)) {
6113 error = PTR_ERR(pmcraid_class);
6114 pmcraid_err("failed to register with with sysfs, error = %x\n",
6115 error);
6116 goto out_unreg_chrdev;
6117 }
6118
6119 error = pmcraid_netlink_init();
6120
6121 if (error)
6122 goto out_unreg_chrdev;
6123
6124 error = pci_register_driver(&pmcraid_driver);
6125
6126 if (error == 0)
6127 goto out_init;
6128
6129 pmcraid_err("failed to register pmcraid driver, error = %x\n",
6130 error);
6131 class_destroy(pmcraid_class);
6132 pmcraid_netlink_release();
6133
6134out_unreg_chrdev:
6135 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
6136
6137out_init:
6138 return error;
6139}
6140
6141
6142
6143
6144static void __exit pmcraid_exit(void)
6145{
6146 pmcraid_netlink_release();
6147 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
6148 PMCRAID_MAX_ADAPTERS);
6149 pci_unregister_driver(&pmcraid_driver);
6150 class_destroy(pmcraid_class);
6151}
6152
6153module_init(pmcraid_init);
6154module_exit(pmcraid_exit);
6155