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6
7#include "qla_def.h"
8
9#include <linux/moduleparam.h>
10#include <linux/vmalloc.h>
11#include <linux/delay.h>
12#include <linux/kthread.h>
13#include <linux/mutex.h>
14#include <linux/kobject.h>
15#include <linux/slab.h>
16
17#include <scsi/scsi_tcq.h>
18#include <scsi/scsicam.h>
19#include <scsi/scsi_transport.h>
20#include <scsi/scsi_transport_fc.h>
21
22
23
24
25char qla2x00_version_str[40];
26
27static int apidev_major;
28
29
30
31
32static struct kmem_cache *srb_cachep;
33
34
35
36
37static struct kmem_cache *ctx_cachep;
38
39int ql2xlogintimeout = 20;
40module_param(ql2xlogintimeout, int, S_IRUGO);
41MODULE_PARM_DESC(ql2xlogintimeout,
42 "Login timeout value in seconds.");
43
44int qlport_down_retry;
45module_param(qlport_down_retry, int, S_IRUGO);
46MODULE_PARM_DESC(qlport_down_retry,
47 "Maximum number of command retries to a port that returns "
48 "a PORT-DOWN status.");
49
50int ql2xplogiabsentdevice;
51module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
52MODULE_PARM_DESC(ql2xplogiabsentdevice,
53 "Option to enable PLOGI to devices that are not present after "
54 "a Fabric scan. This is needed for several broken switches. "
55 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
56
57int ql2xloginretrycount = 0;
58module_param(ql2xloginretrycount, int, S_IRUGO);
59MODULE_PARM_DESC(ql2xloginretrycount,
60 "Specify an alternate value for the NVRAM login retry count.");
61
62int ql2xallocfwdump = 1;
63module_param(ql2xallocfwdump, int, S_IRUGO);
64MODULE_PARM_DESC(ql2xallocfwdump,
65 "Option to enable allocation of memory for a firmware dump "
66 "during HBA initialization. Memory allocation requirements "
67 "vary by ISP type. Default is 1 - allocate memory.");
68
69int ql2xextended_error_logging;
70module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(ql2xextended_error_logging,
72 "Option to enable extended error logging, "
73 "Default is 0 - no logging. 1 - log errors.");
74
75int ql2xshiftctondsd = 6;
76module_param(ql2xshiftctondsd, int, S_IRUGO);
77MODULE_PARM_DESC(ql2xshiftctondsd,
78 "Set to control shifting of command type processing "
79 "based on total number of SG elements.");
80
81static void qla2x00_free_device(scsi_qla_host_t *);
82
83int ql2xfdmienable=1;
84module_param(ql2xfdmienable, int, S_IRUGO);
85MODULE_PARM_DESC(ql2xfdmienable,
86 "Enables FDMI registrations. "
87 "0 - no FDMI. Default is 1 - perform FDMI.");
88
89#define MAX_Q_DEPTH 32
90static int ql2xmaxqdepth = MAX_Q_DEPTH;
91module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
92MODULE_PARM_DESC(ql2xmaxqdepth,
93 "Maximum queue depth to report for target devices.");
94
95
96int ql2xenabledif = 1;
97module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
98MODULE_PARM_DESC(ql2xenabledif,
99 " Enable T10-CRC-DIF "
100 " Default is 0 - No DIF Support. 1 - Enable it");
101
102int ql2xenablehba_err_chk;
103module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
104MODULE_PARM_DESC(ql2xenablehba_err_chk,
105 " Enable T10-CRC-DIF Error isolation by HBA"
106 " Default is 0 - Error isolation disabled, 1 - Enable it");
107
108int ql2xiidmaenable=1;
109module_param(ql2xiidmaenable, int, S_IRUGO);
110MODULE_PARM_DESC(ql2xiidmaenable,
111 "Enables iIDMA settings "
112 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
113
114int ql2xmaxqueues = 1;
115module_param(ql2xmaxqueues, int, S_IRUGO);
116MODULE_PARM_DESC(ql2xmaxqueues,
117 "Enables MQ settings "
118 "Default is 1 for single queue. Set it to number "
119 "of queues in MQ mode.");
120
121int ql2xmultique_tag;
122module_param(ql2xmultique_tag, int, S_IRUGO);
123MODULE_PARM_DESC(ql2xmultique_tag,
124 "Enables CPU affinity settings for the driver "
125 "Default is 0 for no affinity of request and response IO. "
126 "Set it to 1 to turn on the cpu affinity.");
127
128int ql2xfwloadbin;
129module_param(ql2xfwloadbin, int, S_IRUGO);
130MODULE_PARM_DESC(ql2xfwloadbin,
131 "Option to specify location from which to load ISP firmware:\n"
132 " 2 -- load firmware via the request_firmware() (hotplug)\n"
133 " interface.\n"
134 " 1 -- load firmware from flash.\n"
135 " 0 -- use default semantics.\n");
136
137int ql2xetsenable;
138module_param(ql2xetsenable, int, S_IRUGO);
139MODULE_PARM_DESC(ql2xetsenable,
140 "Enables firmware ETS burst."
141 "Default is 0 - skip ETS enablement.");
142
143int ql2xdbwr = 1;
144module_param(ql2xdbwr, int, S_IRUGO);
145MODULE_PARM_DESC(ql2xdbwr,
146 "Option to specify scheme for request queue posting\n"
147 " 0 -- Regular doorbell.\n"
148 " 1 -- CAMRAM doorbell (faster).\n");
149
150int ql2xtargetreset = 1;
151module_param(ql2xtargetreset, int, S_IRUGO);
152MODULE_PARM_DESC(ql2xtargetreset,
153 "Enable target reset."
154 "Default is 1 - use hw defaults.");
155
156int ql2xgffidenable;
157module_param(ql2xgffidenable, int, S_IRUGO);
158MODULE_PARM_DESC(ql2xgffidenable,
159 "Enables GFF_ID checks of port type. "
160 "Default is 0 - Do not use GFF_ID information.");
161
162int ql2xasynctmfenable;
163module_param(ql2xasynctmfenable, int, S_IRUGO);
164MODULE_PARM_DESC(ql2xasynctmfenable,
165 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
166 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
167
168
169
170static int qla2xxx_slave_configure(struct scsi_device * device);
171static int qla2xxx_slave_alloc(struct scsi_device *);
172static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
173static void qla2xxx_scan_start(struct Scsi_Host *);
174static void qla2xxx_slave_destroy(struct scsi_device *);
175static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
176static int qla2xxx_eh_abort(struct scsi_cmnd *);
177static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
178static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
179static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
180static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
181
182static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
183static int qla2x00_change_queue_type(struct scsi_device *, int);
184
185struct scsi_host_template qla2xxx_driver_template = {
186 .module = THIS_MODULE,
187 .name = QLA2XXX_DRIVER_NAME,
188 .queuecommand = qla2xxx_queuecommand,
189
190 .eh_abort_handler = qla2xxx_eh_abort,
191 .eh_device_reset_handler = qla2xxx_eh_device_reset,
192 .eh_target_reset_handler = qla2xxx_eh_target_reset,
193 .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
194 .eh_host_reset_handler = qla2xxx_eh_host_reset,
195
196 .slave_configure = qla2xxx_slave_configure,
197
198 .slave_alloc = qla2xxx_slave_alloc,
199 .slave_destroy = qla2xxx_slave_destroy,
200 .scan_finished = qla2xxx_scan_finished,
201 .scan_start = qla2xxx_scan_start,
202 .change_queue_depth = qla2x00_change_queue_depth,
203 .change_queue_type = qla2x00_change_queue_type,
204 .this_id = -1,
205 .cmd_per_lun = 3,
206 .use_clustering = ENABLE_CLUSTERING,
207 .sg_tablesize = SG_ALL,
208
209 .max_sectors = 0xFFFF,
210 .shost_attrs = qla2x00_host_attrs,
211};
212
213static struct scsi_transport_template *qla2xxx_transport_template = NULL;
214struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
215
216
217
218
219
220
221__inline__ void
222qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
223{
224 init_timer(&vha->timer);
225 vha->timer.expires = jiffies + interval * HZ;
226 vha->timer.data = (unsigned long)vha;
227 vha->timer.function = (void (*)(unsigned long))func;
228 add_timer(&vha->timer);
229 vha->timer_active = 1;
230}
231
232static inline void
233qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
234{
235
236 if (vha->device_flags & DFLG_DEV_FAILED)
237 return;
238
239 mod_timer(&vha->timer, jiffies + interval * HZ);
240}
241
242static __inline__ void
243qla2x00_stop_timer(scsi_qla_host_t *vha)
244{
245 del_timer_sync(&vha->timer);
246 vha->timer_active = 0;
247}
248
249static int qla2x00_do_dpc(void *data);
250
251static void qla2x00_rst_aen(scsi_qla_host_t *);
252
253static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
254 struct req_que **, struct rsp_que **);
255static void qla2x00_free_fw_dump(struct qla_hw_data *);
256static void qla2x00_mem_free(struct qla_hw_data *);
257static void qla2x00_sp_free_dma(srb_t *);
258
259
260static int qla2x00_alloc_queues(struct qla_hw_data *ha)
261{
262 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
263 GFP_KERNEL);
264 if (!ha->req_q_map) {
265 qla_printk(KERN_WARNING, ha,
266 "Unable to allocate memory for request queue ptrs\n");
267 goto fail_req_map;
268 }
269
270 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
271 GFP_KERNEL);
272 if (!ha->rsp_q_map) {
273 qla_printk(KERN_WARNING, ha,
274 "Unable to allocate memory for response queue ptrs\n");
275 goto fail_rsp_map;
276 }
277 set_bit(0, ha->rsp_qid_map);
278 set_bit(0, ha->req_qid_map);
279 return 1;
280
281fail_rsp_map:
282 kfree(ha->req_q_map);
283 ha->req_q_map = NULL;
284fail_req_map:
285 return -ENOMEM;
286}
287
288static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
289{
290 if (req && req->ring)
291 dma_free_coherent(&ha->pdev->dev,
292 (req->length + 1) * sizeof(request_t),
293 req->ring, req->dma);
294
295 kfree(req);
296 req = NULL;
297}
298
299static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
300{
301 if (rsp && rsp->ring)
302 dma_free_coherent(&ha->pdev->dev,
303 (rsp->length + 1) * sizeof(response_t),
304 rsp->ring, rsp->dma);
305
306 kfree(rsp);
307 rsp = NULL;
308}
309
310static void qla2x00_free_queues(struct qla_hw_data *ha)
311{
312 struct req_que *req;
313 struct rsp_que *rsp;
314 int cnt;
315
316 for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
317 req = ha->req_q_map[cnt];
318 qla2x00_free_req_que(ha, req);
319 }
320 kfree(ha->req_q_map);
321 ha->req_q_map = NULL;
322
323 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
324 rsp = ha->rsp_q_map[cnt];
325 qla2x00_free_rsp_que(ha, rsp);
326 }
327 kfree(ha->rsp_q_map);
328 ha->rsp_q_map = NULL;
329}
330
331static int qla25xx_setup_mode(struct scsi_qla_host *vha)
332{
333 uint16_t options = 0;
334 int ques, req, ret;
335 struct qla_hw_data *ha = vha->hw;
336
337 if (!(ha->fw_attributes & BIT_6)) {
338 qla_printk(KERN_INFO, ha,
339 "Firmware is not multi-queue capable\n");
340 goto fail;
341 }
342 if (ql2xmultique_tag) {
343
344 options |= BIT_7;
345 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
346 QLA_DEFAULT_QUE_QOS);
347 if (!req) {
348 qla_printk(KERN_WARNING, ha,
349 "Can't create request queue\n");
350 goto fail;
351 }
352 ha->wq = create_workqueue("qla2xxx_wq");
353 vha->req = ha->req_q_map[req];
354 options |= BIT_1;
355 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
356 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
357 if (!ret) {
358 qla_printk(KERN_WARNING, ha,
359 "Response Queue create failed\n");
360 goto fail2;
361 }
362 }
363 ha->flags.cpu_affinity_enabled = 1;
364
365 DEBUG2(qla_printk(KERN_INFO, ha,
366 "CPU affinity mode enabled, no. of response"
367 " queues:%d, no. of request queues:%d\n",
368 ha->max_rsp_queues, ha->max_req_queues));
369 }
370 return 0;
371fail2:
372 qla25xx_delete_queues(vha);
373 destroy_workqueue(ha->wq);
374 ha->wq = NULL;
375fail:
376 ha->mqenable = 0;
377 kfree(ha->req_q_map);
378 kfree(ha->rsp_q_map);
379 ha->max_req_queues = ha->max_rsp_queues = 1;
380 return 1;
381}
382
383static char *
384qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
385{
386 struct qla_hw_data *ha = vha->hw;
387 static char *pci_bus_modes[] = {
388 "33", "66", "100", "133",
389 };
390 uint16_t pci_bus;
391
392 strcpy(str, "PCI");
393 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
394 if (pci_bus) {
395 strcat(str, "-X (");
396 strcat(str, pci_bus_modes[pci_bus]);
397 } else {
398 pci_bus = (ha->pci_attr & BIT_8) >> 8;
399 strcat(str, " (");
400 strcat(str, pci_bus_modes[pci_bus]);
401 }
402 strcat(str, " MHz)");
403
404 return (str);
405}
406
407static char *
408qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
409{
410 static char *pci_bus_modes[] = { "33", "66", "100", "133", };
411 struct qla_hw_data *ha = vha->hw;
412 uint32_t pci_bus;
413 int pcie_reg;
414
415 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
416 if (pcie_reg) {
417 char lwstr[6];
418 uint16_t pcie_lstat, lspeed, lwidth;
419
420 pcie_reg += 0x12;
421 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
422 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
423 lwidth = (pcie_lstat &
424 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
425
426 strcpy(str, "PCIe (");
427 if (lspeed == 1)
428 strcat(str, "2.5GT/s ");
429 else if (lspeed == 2)
430 strcat(str, "5.0GT/s ");
431 else
432 strcat(str, "<unknown> ");
433 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
434 strcat(str, lwstr);
435
436 return str;
437 }
438
439 strcpy(str, "PCI");
440 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
441 if (pci_bus == 0 || pci_bus == 8) {
442 strcat(str, " (");
443 strcat(str, pci_bus_modes[pci_bus >> 3]);
444 } else {
445 strcat(str, "-X ");
446 if (pci_bus & BIT_2)
447 strcat(str, "Mode 2");
448 else
449 strcat(str, "Mode 1");
450 strcat(str, " (");
451 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
452 }
453 strcat(str, " MHz)");
454
455 return str;
456}
457
458static char *
459qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
460{
461 char un_str[10];
462 struct qla_hw_data *ha = vha->hw;
463
464 sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
465 ha->fw_minor_version,
466 ha->fw_subminor_version);
467
468 if (ha->fw_attributes & BIT_9) {
469 strcat(str, "FLX");
470 return (str);
471 }
472
473 switch (ha->fw_attributes & 0xFF) {
474 case 0x7:
475 strcat(str, "EF");
476 break;
477 case 0x17:
478 strcat(str, "TP");
479 break;
480 case 0x37:
481 strcat(str, "IP");
482 break;
483 case 0x77:
484 strcat(str, "VI");
485 break;
486 default:
487 sprintf(un_str, "(%x)", ha->fw_attributes);
488 strcat(str, un_str);
489 break;
490 }
491 if (ha->fw_attributes & 0x100)
492 strcat(str, "X");
493
494 return (str);
495}
496
497static char *
498qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
499{
500 struct qla_hw_data *ha = vha->hw;
501
502 sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
503 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
504 return str;
505}
506
507static inline srb_t *
508qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
509 struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
510{
511 srb_t *sp;
512 struct qla_hw_data *ha = vha->hw;
513
514 sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
515 if (!sp)
516 return sp;
517
518 atomic_set(&sp->ref_count, 1);
519 sp->fcport = fcport;
520 sp->cmd = cmd;
521 sp->flags = 0;
522 CMD_SP(cmd) = (void *)sp;
523 cmd->scsi_done = done;
524 sp->ctx = NULL;
525
526 return sp;
527}
528
529static int
530qla2xxx_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
531{
532 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
533 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
534 struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
535 struct qla_hw_data *ha = vha->hw;
536 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
537 srb_t *sp;
538 int rval;
539
540 spin_unlock_irq(vha->host->host_lock);
541 if (ha->flags.eeh_busy) {
542 if (ha->flags.pci_channel_io_perm_failure)
543 cmd->result = DID_NO_CONNECT << 16;
544 else
545 cmd->result = DID_REQUEUE << 16;
546 goto qc24_fail_command;
547 }
548
549 rval = fc_remote_port_chkready(rport);
550 if (rval) {
551 cmd->result = rval;
552 goto qc24_fail_command;
553 }
554
555 if (!vha->flags.difdix_supported &&
556 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
557 DEBUG2(qla_printk(KERN_ERR, ha,
558 "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
559 cmd->cmnd[0]));
560 cmd->result = DID_NO_CONNECT << 16;
561 goto qc24_fail_command;
562 }
563 if (atomic_read(&fcport->state) != FCS_ONLINE) {
564 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
565 atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
566 cmd->result = DID_NO_CONNECT << 16;
567 goto qc24_fail_command;
568 }
569 goto qc24_target_busy;
570 }
571
572 sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
573 if (!sp)
574 goto qc24_host_busy_lock;
575
576 rval = ha->isp_ops->start_scsi(sp);
577 if (rval != QLA_SUCCESS)
578 goto qc24_host_busy_free_sp;
579
580 spin_lock_irq(vha->host->host_lock);
581
582 return 0;
583
584qc24_host_busy_free_sp:
585 qla2x00_sp_free_dma(sp);
586 mempool_free(sp, ha->srb_mempool);
587
588qc24_host_busy_lock:
589 spin_lock_irq(vha->host->host_lock);
590 return SCSI_MLQUEUE_HOST_BUSY;
591
592qc24_target_busy:
593 spin_lock_irq(vha->host->host_lock);
594 return SCSI_MLQUEUE_TARGET_BUSY;
595
596qc24_fail_command:
597 spin_lock_irq(vha->host->host_lock);
598 done(cmd);
599
600 return 0;
601}
602
603static DEF_SCSI_QCMD(qla2xxx_queuecommand)
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618static int
619qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
620{
621#define ABORT_POLLING_PERIOD 1000
622#define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
623 unsigned long wait_iter = ABORT_WAIT_ITER;
624 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
625 struct qla_hw_data *ha = vha->hw;
626 int ret = QLA_SUCCESS;
627
628 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
629 DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
630 return ret;
631 }
632
633 while (CMD_SP(cmd) && wait_iter--) {
634 msleep(ABORT_POLLING_PERIOD);
635 }
636 if (CMD_SP(cmd))
637 ret = QLA_FUNCTION_FAILED;
638
639 return ret;
640}
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659int
660qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
661{
662 int return_status;
663 unsigned long wait_online;
664 struct qla_hw_data *ha = vha->hw;
665 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
666
667 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
668 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
669 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
670 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
671 ha->dpc_active) && time_before(jiffies, wait_online)) {
672
673 msleep(1000);
674 }
675 if (base_vha->flags.online)
676 return_status = QLA_SUCCESS;
677 else
678 return_status = QLA_FUNCTION_FAILED;
679
680 return (return_status);
681}
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701static int
702qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
703{
704 int return_status;
705 unsigned long wait_online;
706 struct qla_hw_data *ha = vha->hw;
707 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
708
709 wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
710 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
711 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
712 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
713 ha->optrom_state != QLA_SWAITING ||
714 ha->dpc_active) && time_before(jiffies, wait_online))
715 msleep(1000);
716
717 if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
718 return_status = QLA_SUCCESS;
719 else
720 return_status = QLA_FUNCTION_FAILED;
721
722 DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
723
724 return return_status;
725}
726
727int
728qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
729{
730 int return_status;
731 unsigned long wait_reset;
732 struct qla_hw_data *ha = vha->hw;
733 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
734
735 wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
736 while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
737 test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
738 test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
739 ha->dpc_active) && time_before(jiffies, wait_reset)) {
740
741 msleep(1000);
742
743 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
744 ha->flags.chip_reset_done)
745 break;
746 }
747 if (ha->flags.chip_reset_done)
748 return_status = QLA_SUCCESS;
749 else
750 return_status = QLA_FUNCTION_FAILED;
751
752 return return_status;
753}
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771static inline int
772qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
773{
774 int return_status = QLA_SUCCESS;
775 unsigned long loop_timeout ;
776 struct qla_hw_data *ha = vha->hw;
777 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
778
779
780 loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
781
782 while ((!atomic_read(&base_vha->loop_down_timer) &&
783 atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
784 atomic_read(&base_vha->loop_state) != LOOP_READY) {
785 if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
786 return_status = QLA_FUNCTION_FAILED;
787 break;
788 }
789 msleep(1000);
790 if (time_after_eq(jiffies, loop_timeout)) {
791 return_status = QLA_FUNCTION_FAILED;
792 break;
793 }
794 }
795 return (return_status);
796}
797
798static void
799sp_get(struct srb *sp)
800{
801 atomic_inc(&sp->ref_count);
802}
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819static int
820qla2xxx_eh_abort(struct scsi_cmnd *cmd)
821{
822 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
823 srb_t *sp;
824 int ret = SUCCESS;
825 unsigned int id, lun;
826 unsigned long flags;
827 int wait = 0;
828 struct qla_hw_data *ha = vha->hw;
829
830 fc_block_scsi_eh(cmd);
831
832 if (!CMD_SP(cmd))
833 return SUCCESS;
834
835 id = cmd->device->id;
836 lun = cmd->device->lun;
837
838 spin_lock_irqsave(&ha->hardware_lock, flags);
839 sp = (srb_t *) CMD_SP(cmd);
840 if (!sp) {
841 spin_unlock_irqrestore(&ha->hardware_lock, flags);
842 return SUCCESS;
843 }
844
845 DEBUG2(printk("%s(%ld): aborting sp %p from RISC.",
846 __func__, vha->host_no, sp));
847
848
849 sp_get(sp);
850
851 spin_unlock_irqrestore(&ha->hardware_lock, flags);
852 if (ha->isp_ops->abort_command(sp)) {
853 DEBUG2(printk("%s(%ld): abort_command "
854 "mbx failed.\n", __func__, vha->host_no));
855 ret = FAILED;
856 } else {
857 DEBUG3(printk("%s(%ld): abort_command "
858 "mbx success.\n", __func__, vha->host_no));
859 wait = 1;
860 }
861 qla2x00_sp_compl(ha, sp);
862
863
864 if (wait) {
865 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
866 qla_printk(KERN_ERR, ha,
867 "scsi(%ld:%d:%d): Abort handler timed out -- %x.\n",
868 vha->host_no, id, lun, ret);
869 ret = FAILED;
870 }
871 }
872
873 qla_printk(KERN_INFO, ha,
874 "scsi(%ld:%d:%d): Abort command issued -- %d %x.\n",
875 vha->host_no, id, lun, wait, ret);
876
877 return ret;
878}
879
880int
881qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
882 unsigned int l, enum nexus_wait_type type)
883{
884 int cnt, match, status;
885 unsigned long flags;
886 struct qla_hw_data *ha = vha->hw;
887 struct req_que *req;
888 srb_t *sp;
889
890 status = QLA_SUCCESS;
891
892 spin_lock_irqsave(&ha->hardware_lock, flags);
893 req = vha->req;
894 for (cnt = 1; status == QLA_SUCCESS &&
895 cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
896 sp = req->outstanding_cmds[cnt];
897 if (!sp)
898 continue;
899 if ((sp->ctx) && !IS_PROT_IO(sp))
900 continue;
901 if (vha->vp_idx != sp->fcport->vha->vp_idx)
902 continue;
903 match = 0;
904 switch (type) {
905 case WAIT_HOST:
906 match = 1;
907 break;
908 case WAIT_TARGET:
909 match = sp->cmd->device->id == t;
910 break;
911 case WAIT_LUN:
912 match = (sp->cmd->device->id == t &&
913 sp->cmd->device->lun == l);
914 break;
915 }
916 if (!match)
917 continue;
918
919 spin_unlock_irqrestore(&ha->hardware_lock, flags);
920 status = qla2x00_eh_wait_on_command(sp->cmd);
921 spin_lock_irqsave(&ha->hardware_lock, flags);
922 }
923 spin_unlock_irqrestore(&ha->hardware_lock, flags);
924
925 return status;
926}
927
928static char *reset_errors[] = {
929 "HBA not online",
930 "HBA not ready",
931 "Task management failed",
932 "Waiting for command completions",
933};
934
935static int
936__qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
937 struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
938{
939 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
940 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
941 int err;
942
943 fc_block_scsi_eh(cmd);
944
945 if (!fcport)
946 return FAILED;
947
948 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
949 vha->host_no, cmd->device->id, cmd->device->lun, name);
950
951 err = 0;
952 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
953 goto eh_reset_failed;
954 err = 1;
955 if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
956 goto eh_reset_failed;
957 err = 2;
958 if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
959 != QLA_SUCCESS)
960 goto eh_reset_failed;
961 err = 3;
962 if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
963 cmd->device->lun, type) != QLA_SUCCESS)
964 goto eh_reset_failed;
965
966 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
967 vha->host_no, cmd->device->id, cmd->device->lun, name);
968
969 return SUCCESS;
970
971eh_reset_failed:
972 qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
973 , vha->host_no, cmd->device->id, cmd->device->lun, name,
974 reset_errors[err]);
975 return FAILED;
976}
977
978static int
979qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
980{
981 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
982 struct qla_hw_data *ha = vha->hw;
983
984 return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
985 ha->isp_ops->lun_reset);
986}
987
988static int
989qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
990{
991 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
992 struct qla_hw_data *ha = vha->hw;
993
994 return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
995 ha->isp_ops->target_reset);
996}
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013static int
1014qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1015{
1016 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1017 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1018 int ret = FAILED;
1019 unsigned int id, lun;
1020
1021 fc_block_scsi_eh(cmd);
1022
1023 id = cmd->device->id;
1024 lun = cmd->device->lun;
1025
1026 if (!fcport)
1027 return ret;
1028
1029 qla_printk(KERN_INFO, vha->hw,
1030 "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
1031
1032 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1033 DEBUG2(printk("%s failed:board disabled\n",__func__));
1034 goto eh_bus_reset_done;
1035 }
1036
1037 if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
1038 if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1039 ret = SUCCESS;
1040 }
1041 if (ret == FAILED)
1042 goto eh_bus_reset_done;
1043
1044
1045 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1046 QLA_SUCCESS)
1047 ret = FAILED;
1048
1049eh_bus_reset_done:
1050 qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
1051 (ret == FAILED) ? "failed" : "succeded");
1052
1053 return ret;
1054}
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071static int
1072qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1073{
1074 scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1075 fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1076 struct qla_hw_data *ha = vha->hw;
1077 int ret = FAILED;
1078 unsigned int id, lun;
1079 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1080
1081 fc_block_scsi_eh(cmd);
1082
1083 id = cmd->device->id;
1084 lun = cmd->device->lun;
1085
1086 if (!fcport)
1087 return ret;
1088
1089 qla_printk(KERN_INFO, ha,
1090 "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
1091
1092 if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1093 goto eh_host_reset_lock;
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103 qla2x00_wait_for_loop_ready(vha);
1104 if (vha != base_vha) {
1105 if (qla2x00_vp_abort_isp(vha))
1106 goto eh_host_reset_lock;
1107 } else {
1108 if (IS_QLA82XX(vha->hw)) {
1109 if (!qla82xx_fcoe_ctx_reset(vha)) {
1110
1111 ret = SUCCESS;
1112 goto eh_host_reset_lock;
1113 }
1114
1115 }
1116 if (ha->wq)
1117 flush_workqueue(ha->wq);
1118
1119 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1120 if (ha->isp_ops->abort_isp(base_vha)) {
1121 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1122
1123 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1124
1125 if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
1126 goto eh_host_reset_lock;
1127 }
1128 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1129 }
1130
1131
1132 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1133 QLA_SUCCESS)
1134 ret = SUCCESS;
1135
1136eh_host_reset_lock:
1137 qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
1138 (ret == FAILED) ? "failed" : "succeded");
1139
1140 return ret;
1141}
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153int
1154qla2x00_loop_reset(scsi_qla_host_t *vha)
1155{
1156 int ret;
1157 struct fc_port *fcport;
1158 struct qla_hw_data *ha = vha->hw;
1159
1160 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1161 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1162 if (fcport->port_type != FCT_TARGET)
1163 continue;
1164
1165 ret = ha->isp_ops->target_reset(fcport, 0, 0);
1166 if (ret != QLA_SUCCESS) {
1167 DEBUG2_3(printk("%s(%ld): bus_reset failed: "
1168 "target_reset=%d d_id=%x.\n", __func__,
1169 vha->host_no, ret, fcport->d_id.b24));
1170 }
1171 }
1172 }
1173
1174 if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
1175 ret = qla2x00_full_login_lip(vha);
1176 if (ret != QLA_SUCCESS) {
1177 DEBUG2_3(printk("%s(%ld): failed: "
1178 "full_login_lip=%d.\n", __func__, vha->host_no,
1179 ret));
1180 }
1181 atomic_set(&vha->loop_state, LOOP_DOWN);
1182 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1183 qla2x00_mark_all_devices_lost(vha, 0);
1184 qla2x00_wait_for_loop_ready(vha);
1185 }
1186
1187 if (ha->flags.enable_lip_reset) {
1188 ret = qla2x00_lip_reset(vha);
1189 if (ret != QLA_SUCCESS) {
1190 DEBUG2_3(printk("%s(%ld): failed: "
1191 "lip_reset=%d.\n", __func__, vha->host_no, ret));
1192 } else
1193 qla2x00_wait_for_loop_ready(vha);
1194 }
1195
1196
1197 vha->marker_needed = 1;
1198
1199 return QLA_SUCCESS;
1200}
1201
1202void
1203qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1204{
1205 int que, cnt;
1206 unsigned long flags;
1207 srb_t *sp;
1208 struct srb_ctx *ctx;
1209 struct qla_hw_data *ha = vha->hw;
1210 struct req_que *req;
1211
1212 spin_lock_irqsave(&ha->hardware_lock, flags);
1213 for (que = 0; que < ha->max_req_queues; que++) {
1214 req = ha->req_q_map[que];
1215 if (!req)
1216 continue;
1217 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
1218 sp = req->outstanding_cmds[cnt];
1219 if (sp) {
1220 req->outstanding_cmds[cnt] = NULL;
1221 if (!sp->ctx ||
1222 (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
1223 IS_PROT_IO(sp)) {
1224 sp->cmd->result = res;
1225 qla2x00_sp_compl(ha, sp);
1226 } else {
1227 ctx = sp->ctx;
1228 if (ctx->type == SRB_LOGIN_CMD ||
1229 ctx->type == SRB_LOGOUT_CMD) {
1230 ctx->u.iocb_cmd->free(sp);
1231 } else {
1232 struct fc_bsg_job *bsg_job =
1233 ctx->u.bsg_job;
1234 if (bsg_job->request->msgcode
1235 == FC_BSG_HST_CT)
1236 kfree(sp->fcport);
1237 bsg_job->req->errors = 0;
1238 bsg_job->reply->result = res;
1239 bsg_job->job_done(bsg_job);
1240 kfree(sp->ctx);
1241 mempool_free(sp,
1242 ha->srb_mempool);
1243 }
1244 }
1245 }
1246 }
1247 }
1248 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1249}
1250
1251static int
1252qla2xxx_slave_alloc(struct scsi_device *sdev)
1253{
1254 struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1255
1256 if (!rport || fc_remote_port_chkready(rport))
1257 return -ENXIO;
1258
1259 sdev->hostdata = *(fc_port_t **)rport->dd_data;
1260
1261 return 0;
1262}
1263
1264static int
1265qla2xxx_slave_configure(struct scsi_device *sdev)
1266{
1267 scsi_qla_host_t *vha = shost_priv(sdev->host);
1268 struct req_que *req = vha->req;
1269
1270 if (sdev->tagged_supported)
1271 scsi_activate_tcq(sdev, req->max_q_depth);
1272 else
1273 scsi_deactivate_tcq(sdev, req->max_q_depth);
1274 return 0;
1275}
1276
1277static void
1278qla2xxx_slave_destroy(struct scsi_device *sdev)
1279{
1280 sdev->hostdata = NULL;
1281}
1282
1283static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1284{
1285 fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1286
1287 if (!scsi_track_queue_full(sdev, qdepth))
1288 return;
1289
1290 DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
1291 "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
1292 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1293 sdev->queue_depth));
1294}
1295
1296static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1297{
1298 fc_port_t *fcport = sdev->hostdata;
1299 struct scsi_qla_host *vha = fcport->vha;
1300 struct qla_hw_data *ha = vha->hw;
1301 struct req_que *req = NULL;
1302
1303 req = vha->req;
1304 if (!req)
1305 return;
1306
1307 if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1308 return;
1309
1310 if (sdev->ordered_tags)
1311 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1312 else
1313 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1314
1315 DEBUG2(qla_printk(KERN_INFO, ha,
1316 "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
1317 fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
1318 sdev->queue_depth));
1319}
1320
1321static int
1322qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1323{
1324 switch (reason) {
1325 case SCSI_QDEPTH_DEFAULT:
1326 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1327 break;
1328 case SCSI_QDEPTH_QFULL:
1329 qla2x00_handle_queue_full(sdev, qdepth);
1330 break;
1331 case SCSI_QDEPTH_RAMP_UP:
1332 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1333 break;
1334 default:
1335 return -EOPNOTSUPP;
1336 }
1337
1338 return sdev->queue_depth;
1339}
1340
1341static int
1342qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1343{
1344 if (sdev->tagged_supported) {
1345 scsi_set_tag_type(sdev, tag_type);
1346 if (tag_type)
1347 scsi_activate_tcq(sdev, sdev->queue_depth);
1348 else
1349 scsi_deactivate_tcq(sdev, sdev->queue_depth);
1350 } else
1351 tag_type = 0;
1352
1353 return tag_type;
1354}
1355
1356
1357
1358
1359
1360
1361
1362
1363static void
1364qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1365{
1366
1367 ha->flags.enable_64bit_addressing = 0;
1368
1369 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1370
1371 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1372 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1373
1374 ha->flags.enable_64bit_addressing = 1;
1375 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1376 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1377 return;
1378 }
1379 }
1380
1381 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1382 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1383}
1384
1385static void
1386qla2x00_enable_intrs(struct qla_hw_data *ha)
1387{
1388 unsigned long flags = 0;
1389 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1390
1391 spin_lock_irqsave(&ha->hardware_lock, flags);
1392 ha->interrupts_on = 1;
1393
1394 WRT_REG_WORD(®->ictrl, ICR_EN_INT | ICR_EN_RISC);
1395 RD_REG_WORD(®->ictrl);
1396 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1397
1398}
1399
1400static void
1401qla2x00_disable_intrs(struct qla_hw_data *ha)
1402{
1403 unsigned long flags = 0;
1404 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1405
1406 spin_lock_irqsave(&ha->hardware_lock, flags);
1407 ha->interrupts_on = 0;
1408
1409 WRT_REG_WORD(®->ictrl, 0);
1410 RD_REG_WORD(®->ictrl);
1411 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1412}
1413
1414static void
1415qla24xx_enable_intrs(struct qla_hw_data *ha)
1416{
1417 unsigned long flags = 0;
1418 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1419
1420 spin_lock_irqsave(&ha->hardware_lock, flags);
1421 ha->interrupts_on = 1;
1422 WRT_REG_DWORD(®->ictrl, ICRX_EN_RISC_INT);
1423 RD_REG_DWORD(®->ictrl);
1424 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1425}
1426
1427static void
1428qla24xx_disable_intrs(struct qla_hw_data *ha)
1429{
1430 unsigned long flags = 0;
1431 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1432
1433 if (IS_NOPOLLING_TYPE(ha))
1434 return;
1435 spin_lock_irqsave(&ha->hardware_lock, flags);
1436 ha->interrupts_on = 0;
1437 WRT_REG_DWORD(®->ictrl, 0);
1438 RD_REG_DWORD(®->ictrl);
1439 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1440}
1441
1442static struct isp_operations qla2100_isp_ops = {
1443 .pci_config = qla2100_pci_config,
1444 .reset_chip = qla2x00_reset_chip,
1445 .chip_diag = qla2x00_chip_diag,
1446 .config_rings = qla2x00_config_rings,
1447 .reset_adapter = qla2x00_reset_adapter,
1448 .nvram_config = qla2x00_nvram_config,
1449 .update_fw_options = qla2x00_update_fw_options,
1450 .load_risc = qla2x00_load_risc,
1451 .pci_info_str = qla2x00_pci_info_str,
1452 .fw_version_str = qla2x00_fw_version_str,
1453 .intr_handler = qla2100_intr_handler,
1454 .enable_intrs = qla2x00_enable_intrs,
1455 .disable_intrs = qla2x00_disable_intrs,
1456 .abort_command = qla2x00_abort_command,
1457 .target_reset = qla2x00_abort_target,
1458 .lun_reset = qla2x00_lun_reset,
1459 .fabric_login = qla2x00_login_fabric,
1460 .fabric_logout = qla2x00_fabric_logout,
1461 .calc_req_entries = qla2x00_calc_iocbs_32,
1462 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1463 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1464 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1465 .read_nvram = qla2x00_read_nvram_data,
1466 .write_nvram = qla2x00_write_nvram_data,
1467 .fw_dump = qla2100_fw_dump,
1468 .beacon_on = NULL,
1469 .beacon_off = NULL,
1470 .beacon_blink = NULL,
1471 .read_optrom = qla2x00_read_optrom_data,
1472 .write_optrom = qla2x00_write_optrom_data,
1473 .get_flash_version = qla2x00_get_flash_version,
1474 .start_scsi = qla2x00_start_scsi,
1475 .abort_isp = qla2x00_abort_isp,
1476};
1477
1478static struct isp_operations qla2300_isp_ops = {
1479 .pci_config = qla2300_pci_config,
1480 .reset_chip = qla2x00_reset_chip,
1481 .chip_diag = qla2x00_chip_diag,
1482 .config_rings = qla2x00_config_rings,
1483 .reset_adapter = qla2x00_reset_adapter,
1484 .nvram_config = qla2x00_nvram_config,
1485 .update_fw_options = qla2x00_update_fw_options,
1486 .load_risc = qla2x00_load_risc,
1487 .pci_info_str = qla2x00_pci_info_str,
1488 .fw_version_str = qla2x00_fw_version_str,
1489 .intr_handler = qla2300_intr_handler,
1490 .enable_intrs = qla2x00_enable_intrs,
1491 .disable_intrs = qla2x00_disable_intrs,
1492 .abort_command = qla2x00_abort_command,
1493 .target_reset = qla2x00_abort_target,
1494 .lun_reset = qla2x00_lun_reset,
1495 .fabric_login = qla2x00_login_fabric,
1496 .fabric_logout = qla2x00_fabric_logout,
1497 .calc_req_entries = qla2x00_calc_iocbs_32,
1498 .build_iocbs = qla2x00_build_scsi_iocbs_32,
1499 .prep_ms_iocb = qla2x00_prep_ms_iocb,
1500 .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
1501 .read_nvram = qla2x00_read_nvram_data,
1502 .write_nvram = qla2x00_write_nvram_data,
1503 .fw_dump = qla2300_fw_dump,
1504 .beacon_on = qla2x00_beacon_on,
1505 .beacon_off = qla2x00_beacon_off,
1506 .beacon_blink = qla2x00_beacon_blink,
1507 .read_optrom = qla2x00_read_optrom_data,
1508 .write_optrom = qla2x00_write_optrom_data,
1509 .get_flash_version = qla2x00_get_flash_version,
1510 .start_scsi = qla2x00_start_scsi,
1511 .abort_isp = qla2x00_abort_isp,
1512};
1513
1514static struct isp_operations qla24xx_isp_ops = {
1515 .pci_config = qla24xx_pci_config,
1516 .reset_chip = qla24xx_reset_chip,
1517 .chip_diag = qla24xx_chip_diag,
1518 .config_rings = qla24xx_config_rings,
1519 .reset_adapter = qla24xx_reset_adapter,
1520 .nvram_config = qla24xx_nvram_config,
1521 .update_fw_options = qla24xx_update_fw_options,
1522 .load_risc = qla24xx_load_risc,
1523 .pci_info_str = qla24xx_pci_info_str,
1524 .fw_version_str = qla24xx_fw_version_str,
1525 .intr_handler = qla24xx_intr_handler,
1526 .enable_intrs = qla24xx_enable_intrs,
1527 .disable_intrs = qla24xx_disable_intrs,
1528 .abort_command = qla24xx_abort_command,
1529 .target_reset = qla24xx_abort_target,
1530 .lun_reset = qla24xx_lun_reset,
1531 .fabric_login = qla24xx_login_fabric,
1532 .fabric_logout = qla24xx_fabric_logout,
1533 .calc_req_entries = NULL,
1534 .build_iocbs = NULL,
1535 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1536 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1537 .read_nvram = qla24xx_read_nvram_data,
1538 .write_nvram = qla24xx_write_nvram_data,
1539 .fw_dump = qla24xx_fw_dump,
1540 .beacon_on = qla24xx_beacon_on,
1541 .beacon_off = qla24xx_beacon_off,
1542 .beacon_blink = qla24xx_beacon_blink,
1543 .read_optrom = qla24xx_read_optrom_data,
1544 .write_optrom = qla24xx_write_optrom_data,
1545 .get_flash_version = qla24xx_get_flash_version,
1546 .start_scsi = qla24xx_start_scsi,
1547 .abort_isp = qla2x00_abort_isp,
1548};
1549
1550static struct isp_operations qla25xx_isp_ops = {
1551 .pci_config = qla25xx_pci_config,
1552 .reset_chip = qla24xx_reset_chip,
1553 .chip_diag = qla24xx_chip_diag,
1554 .config_rings = qla24xx_config_rings,
1555 .reset_adapter = qla24xx_reset_adapter,
1556 .nvram_config = qla24xx_nvram_config,
1557 .update_fw_options = qla24xx_update_fw_options,
1558 .load_risc = qla24xx_load_risc,
1559 .pci_info_str = qla24xx_pci_info_str,
1560 .fw_version_str = qla24xx_fw_version_str,
1561 .intr_handler = qla24xx_intr_handler,
1562 .enable_intrs = qla24xx_enable_intrs,
1563 .disable_intrs = qla24xx_disable_intrs,
1564 .abort_command = qla24xx_abort_command,
1565 .target_reset = qla24xx_abort_target,
1566 .lun_reset = qla24xx_lun_reset,
1567 .fabric_login = qla24xx_login_fabric,
1568 .fabric_logout = qla24xx_fabric_logout,
1569 .calc_req_entries = NULL,
1570 .build_iocbs = NULL,
1571 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1572 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1573 .read_nvram = qla25xx_read_nvram_data,
1574 .write_nvram = qla25xx_write_nvram_data,
1575 .fw_dump = qla25xx_fw_dump,
1576 .beacon_on = qla24xx_beacon_on,
1577 .beacon_off = qla24xx_beacon_off,
1578 .beacon_blink = qla24xx_beacon_blink,
1579 .read_optrom = qla25xx_read_optrom_data,
1580 .write_optrom = qla24xx_write_optrom_data,
1581 .get_flash_version = qla24xx_get_flash_version,
1582 .start_scsi = qla24xx_dif_start_scsi,
1583 .abort_isp = qla2x00_abort_isp,
1584};
1585
1586static struct isp_operations qla81xx_isp_ops = {
1587 .pci_config = qla25xx_pci_config,
1588 .reset_chip = qla24xx_reset_chip,
1589 .chip_diag = qla24xx_chip_diag,
1590 .config_rings = qla24xx_config_rings,
1591 .reset_adapter = qla24xx_reset_adapter,
1592 .nvram_config = qla81xx_nvram_config,
1593 .update_fw_options = qla81xx_update_fw_options,
1594 .load_risc = qla81xx_load_risc,
1595 .pci_info_str = qla24xx_pci_info_str,
1596 .fw_version_str = qla24xx_fw_version_str,
1597 .intr_handler = qla24xx_intr_handler,
1598 .enable_intrs = qla24xx_enable_intrs,
1599 .disable_intrs = qla24xx_disable_intrs,
1600 .abort_command = qla24xx_abort_command,
1601 .target_reset = qla24xx_abort_target,
1602 .lun_reset = qla24xx_lun_reset,
1603 .fabric_login = qla24xx_login_fabric,
1604 .fabric_logout = qla24xx_fabric_logout,
1605 .calc_req_entries = NULL,
1606 .build_iocbs = NULL,
1607 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1608 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1609 .read_nvram = NULL,
1610 .write_nvram = NULL,
1611 .fw_dump = qla81xx_fw_dump,
1612 .beacon_on = qla24xx_beacon_on,
1613 .beacon_off = qla24xx_beacon_off,
1614 .beacon_blink = qla24xx_beacon_blink,
1615 .read_optrom = qla25xx_read_optrom_data,
1616 .write_optrom = qla24xx_write_optrom_data,
1617 .get_flash_version = qla24xx_get_flash_version,
1618 .start_scsi = qla24xx_dif_start_scsi,
1619 .abort_isp = qla2x00_abort_isp,
1620};
1621
1622static struct isp_operations qla82xx_isp_ops = {
1623 .pci_config = qla82xx_pci_config,
1624 .reset_chip = qla82xx_reset_chip,
1625 .chip_diag = qla24xx_chip_diag,
1626 .config_rings = qla82xx_config_rings,
1627 .reset_adapter = qla24xx_reset_adapter,
1628 .nvram_config = qla81xx_nvram_config,
1629 .update_fw_options = qla24xx_update_fw_options,
1630 .load_risc = qla82xx_load_risc,
1631 .pci_info_str = qla82xx_pci_info_str,
1632 .fw_version_str = qla24xx_fw_version_str,
1633 .intr_handler = qla82xx_intr_handler,
1634 .enable_intrs = qla82xx_enable_intrs,
1635 .disable_intrs = qla82xx_disable_intrs,
1636 .abort_command = qla24xx_abort_command,
1637 .target_reset = qla24xx_abort_target,
1638 .lun_reset = qla24xx_lun_reset,
1639 .fabric_login = qla24xx_login_fabric,
1640 .fabric_logout = qla24xx_fabric_logout,
1641 .calc_req_entries = NULL,
1642 .build_iocbs = NULL,
1643 .prep_ms_iocb = qla24xx_prep_ms_iocb,
1644 .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
1645 .read_nvram = qla24xx_read_nvram_data,
1646 .write_nvram = qla24xx_write_nvram_data,
1647 .fw_dump = qla24xx_fw_dump,
1648 .beacon_on = qla24xx_beacon_on,
1649 .beacon_off = qla24xx_beacon_off,
1650 .beacon_blink = qla24xx_beacon_blink,
1651 .read_optrom = qla82xx_read_optrom_data,
1652 .write_optrom = qla82xx_write_optrom_data,
1653 .get_flash_version = qla24xx_get_flash_version,
1654 .start_scsi = qla82xx_start_scsi,
1655 .abort_isp = qla82xx_abort_isp,
1656};
1657
1658static inline void
1659qla2x00_set_isp_flags(struct qla_hw_data *ha)
1660{
1661 ha->device_type = DT_EXTENDED_IDS;
1662 switch (ha->pdev->device) {
1663 case PCI_DEVICE_ID_QLOGIC_ISP2100:
1664 ha->device_type |= DT_ISP2100;
1665 ha->device_type &= ~DT_EXTENDED_IDS;
1666 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1667 break;
1668 case PCI_DEVICE_ID_QLOGIC_ISP2200:
1669 ha->device_type |= DT_ISP2200;
1670 ha->device_type &= ~DT_EXTENDED_IDS;
1671 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
1672 break;
1673 case PCI_DEVICE_ID_QLOGIC_ISP2300:
1674 ha->device_type |= DT_ISP2300;
1675 ha->device_type |= DT_ZIO_SUPPORTED;
1676 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1677 break;
1678 case PCI_DEVICE_ID_QLOGIC_ISP2312:
1679 ha->device_type |= DT_ISP2312;
1680 ha->device_type |= DT_ZIO_SUPPORTED;
1681 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1682 break;
1683 case PCI_DEVICE_ID_QLOGIC_ISP2322:
1684 ha->device_type |= DT_ISP2322;
1685 ha->device_type |= DT_ZIO_SUPPORTED;
1686 if (ha->pdev->subsystem_vendor == 0x1028 &&
1687 ha->pdev->subsystem_device == 0x0170)
1688 ha->device_type |= DT_OEM_001;
1689 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1690 break;
1691 case PCI_DEVICE_ID_QLOGIC_ISP6312:
1692 ha->device_type |= DT_ISP6312;
1693 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1694 break;
1695 case PCI_DEVICE_ID_QLOGIC_ISP6322:
1696 ha->device_type |= DT_ISP6322;
1697 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
1698 break;
1699 case PCI_DEVICE_ID_QLOGIC_ISP2422:
1700 ha->device_type |= DT_ISP2422;
1701 ha->device_type |= DT_ZIO_SUPPORTED;
1702 ha->device_type |= DT_FWI2;
1703 ha->device_type |= DT_IIDMA;
1704 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1705 break;
1706 case PCI_DEVICE_ID_QLOGIC_ISP2432:
1707 ha->device_type |= DT_ISP2432;
1708 ha->device_type |= DT_ZIO_SUPPORTED;
1709 ha->device_type |= DT_FWI2;
1710 ha->device_type |= DT_IIDMA;
1711 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1712 break;
1713 case PCI_DEVICE_ID_QLOGIC_ISP8432:
1714 ha->device_type |= DT_ISP8432;
1715 ha->device_type |= DT_ZIO_SUPPORTED;
1716 ha->device_type |= DT_FWI2;
1717 ha->device_type |= DT_IIDMA;
1718 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1719 break;
1720 case PCI_DEVICE_ID_QLOGIC_ISP5422:
1721 ha->device_type |= DT_ISP5422;
1722 ha->device_type |= DT_FWI2;
1723 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1724 break;
1725 case PCI_DEVICE_ID_QLOGIC_ISP5432:
1726 ha->device_type |= DT_ISP5432;
1727 ha->device_type |= DT_FWI2;
1728 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1729 break;
1730 case PCI_DEVICE_ID_QLOGIC_ISP2532:
1731 ha->device_type |= DT_ISP2532;
1732 ha->device_type |= DT_ZIO_SUPPORTED;
1733 ha->device_type |= DT_FWI2;
1734 ha->device_type |= DT_IIDMA;
1735 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1736 break;
1737 case PCI_DEVICE_ID_QLOGIC_ISP8001:
1738 ha->device_type |= DT_ISP8001;
1739 ha->device_type |= DT_ZIO_SUPPORTED;
1740 ha->device_type |= DT_FWI2;
1741 ha->device_type |= DT_IIDMA;
1742 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1743 break;
1744 case PCI_DEVICE_ID_QLOGIC_ISP8021:
1745 ha->device_type |= DT_ISP8021;
1746 ha->device_type |= DT_ZIO_SUPPORTED;
1747 ha->device_type |= DT_FWI2;
1748 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
1749
1750 qla82xx_init_flags(ha);
1751 break;
1752 }
1753
1754 if (IS_QLA82XX(ha))
1755 ha->port_no = !(ha->portnum & 1);
1756 else
1757
1758 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
1759
1760 if (ha->port_no & 1)
1761 ha->flags.port0 = 1;
1762 else
1763 ha->flags.port0 = 0;
1764}
1765
1766static int
1767qla2x00_iospace_config(struct qla_hw_data *ha)
1768{
1769 resource_size_t pio;
1770 uint16_t msix;
1771 int cpus;
1772
1773 if (IS_QLA82XX(ha))
1774 return qla82xx_iospace_config(ha);
1775
1776 if (pci_request_selected_regions(ha->pdev, ha->bars,
1777 QLA2XXX_DRIVER_NAME)) {
1778 qla_printk(KERN_WARNING, ha,
1779 "Failed to reserve PIO/MMIO regions (%s)\n",
1780 pci_name(ha->pdev));
1781
1782 goto iospace_error_exit;
1783 }
1784 if (!(ha->bars & 1))
1785 goto skip_pio;
1786
1787
1788 pio = pci_resource_start(ha->pdev, 0);
1789 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1790 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1791 qla_printk(KERN_WARNING, ha,
1792 "Invalid PCI I/O region size (%s)...\n",
1793 pci_name(ha->pdev));
1794 pio = 0;
1795 }
1796 } else {
1797 qla_printk(KERN_WARNING, ha,
1798 "region #0 not a PIO resource (%s)...\n",
1799 pci_name(ha->pdev));
1800 pio = 0;
1801 }
1802 ha->pio_address = pio;
1803
1804skip_pio:
1805
1806 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1807 qla_printk(KERN_ERR, ha,
1808 "region #1 not an MMIO resource (%s), aborting\n",
1809 pci_name(ha->pdev));
1810 goto iospace_error_exit;
1811 }
1812 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1813 qla_printk(KERN_ERR, ha,
1814 "Invalid PCI mem region size (%s), aborting\n",
1815 pci_name(ha->pdev));
1816 goto iospace_error_exit;
1817 }
1818
1819 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1820 if (!ha->iobase) {
1821 qla_printk(KERN_ERR, ha,
1822 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
1823
1824 goto iospace_error_exit;
1825 }
1826
1827
1828 ha->max_req_queues = ha->max_rsp_queues = 1;
1829 if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1830 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1831 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1832 goto mqiobase_exit;
1833
1834 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1835 pci_resource_len(ha->pdev, 3));
1836 if (ha->mqiobase) {
1837
1838 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1839 ha->msix_count = msix;
1840
1841
1842 if (ql2xmultique_tag) {
1843 cpus = num_online_cpus();
1844 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1845 (cpus + 1) : (ha->msix_count - 1);
1846 ha->max_req_queues = 2;
1847 } else if (ql2xmaxqueues > 1) {
1848 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1849 QLA_MQ_SIZE : ql2xmaxqueues;
1850 DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
1851 " of request queues:%d\n", ha->max_req_queues));
1852 }
1853 qla_printk(KERN_INFO, ha,
1854 "MSI-X vector count: %d\n", msix);
1855 } else
1856 qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
1857
1858mqiobase_exit:
1859 ha->msix_count = ha->max_rsp_queues + 1;
1860 return (0);
1861
1862iospace_error_exit:
1863 return (-ENOMEM);
1864}
1865
1866static void
1867qla2xxx_scan_start(struct Scsi_Host *shost)
1868{
1869 scsi_qla_host_t *vha = shost_priv(shost);
1870
1871 if (vha->hw->flags.running_gold_fw)
1872 return;
1873
1874 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1875 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1876 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1877 set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
1878}
1879
1880static int
1881qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
1882{
1883 scsi_qla_host_t *vha = shost_priv(shost);
1884
1885 if (!vha->host)
1886 return 1;
1887 if (time > vha->hw->loop_reset_delay * HZ)
1888 return 1;
1889
1890 return atomic_read(&vha->loop_state) == LOOP_READY;
1891}
1892
1893
1894
1895
1896static int __devinit
1897qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
1898{
1899 int ret = -ENODEV;
1900 struct Scsi_Host *host;
1901 scsi_qla_host_t *base_vha = NULL;
1902 struct qla_hw_data *ha;
1903 char pci_info[30];
1904 char fw_str[30];
1905 struct scsi_host_template *sht;
1906 int bars, max_id, mem_only = 0;
1907 uint16_t req_length = 0, rsp_length = 0;
1908 struct req_que *req = NULL;
1909 struct rsp_que *rsp = NULL;
1910
1911 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1912 sht = &qla2xxx_driver_template;
1913 if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
1914 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
1915 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
1916 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
1917 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
1918 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
1919 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
1920 pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
1921 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1922 mem_only = 1;
1923 }
1924
1925 if (mem_only) {
1926 if (pci_enable_device_mem(pdev))
1927 goto probe_out;
1928 } else {
1929 if (pci_enable_device(pdev))
1930 goto probe_out;
1931 }
1932
1933
1934 pci_enable_pcie_error_reporting(pdev);
1935
1936 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
1937 if (!ha) {
1938 DEBUG(printk("Unable to allocate memory for ha\n"));
1939 goto probe_out;
1940 }
1941 ha->pdev = pdev;
1942
1943
1944 ha->bars = bars;
1945 ha->mem_only = mem_only;
1946 spin_lock_init(&ha->hardware_lock);
1947 spin_lock_init(&ha->vport_slock);
1948
1949
1950 qla2x00_set_isp_flags(ha);
1951
1952
1953 if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
1954 pdev->needs_freset = 1;
1955 }
1956
1957
1958 ret = qla2x00_iospace_config(ha);
1959 if (ret)
1960 goto probe_hw_failed;
1961
1962 qla_printk(KERN_INFO, ha,
1963 "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
1964 ha->iobase);
1965
1966 ha->prev_topology = 0;
1967 ha->init_cb_size = sizeof(init_cb_t);
1968 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1969 ha->optrom_size = OPTROM_SIZE_2300;
1970
1971
1972 max_id = MAX_TARGETS_2200;
1973 if (IS_QLA2100(ha)) {
1974 max_id = MAX_TARGETS_2100;
1975 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
1976 req_length = REQUEST_ENTRY_CNT_2100;
1977 rsp_length = RESPONSE_ENTRY_CNT_2100;
1978 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
1979 ha->gid_list_info_size = 4;
1980 ha->flash_conf_off = ~0;
1981 ha->flash_data_off = ~0;
1982 ha->nvram_conf_off = ~0;
1983 ha->nvram_data_off = ~0;
1984 ha->isp_ops = &qla2100_isp_ops;
1985 } else if (IS_QLA2200(ha)) {
1986 ha->mbx_count = MAILBOX_REGISTER_COUNT;
1987 req_length = REQUEST_ENTRY_CNT_2200;
1988 rsp_length = RESPONSE_ENTRY_CNT_2100;
1989 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
1990 ha->gid_list_info_size = 4;
1991 ha->flash_conf_off = ~0;
1992 ha->flash_data_off = ~0;
1993 ha->nvram_conf_off = ~0;
1994 ha->nvram_data_off = ~0;
1995 ha->isp_ops = &qla2100_isp_ops;
1996 } else if (IS_QLA23XX(ha)) {
1997 ha->mbx_count = MAILBOX_REGISTER_COUNT;
1998 req_length = REQUEST_ENTRY_CNT_2200;
1999 rsp_length = RESPONSE_ENTRY_CNT_2300;
2000 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2001 ha->gid_list_info_size = 6;
2002 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2003 ha->optrom_size = OPTROM_SIZE_2322;
2004 ha->flash_conf_off = ~0;
2005 ha->flash_data_off = ~0;
2006 ha->nvram_conf_off = ~0;
2007 ha->nvram_data_off = ~0;
2008 ha->isp_ops = &qla2300_isp_ops;
2009 } else if (IS_QLA24XX_TYPE(ha)) {
2010 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2011 req_length = REQUEST_ENTRY_CNT_24XX;
2012 rsp_length = RESPONSE_ENTRY_CNT_2300;
2013 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2014 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2015 ha->gid_list_info_size = 8;
2016 ha->optrom_size = OPTROM_SIZE_24XX;
2017 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2018 ha->isp_ops = &qla24xx_isp_ops;
2019 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2020 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2021 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2022 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2023 } else if (IS_QLA25XX(ha)) {
2024 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2025 req_length = REQUEST_ENTRY_CNT_24XX;
2026 rsp_length = RESPONSE_ENTRY_CNT_2300;
2027 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2028 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2029 ha->gid_list_info_size = 8;
2030 ha->optrom_size = OPTROM_SIZE_25XX;
2031 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2032 ha->isp_ops = &qla25xx_isp_ops;
2033 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2034 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2035 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2036 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2037 } else if (IS_QLA81XX(ha)) {
2038 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2039 req_length = REQUEST_ENTRY_CNT_24XX;
2040 rsp_length = RESPONSE_ENTRY_CNT_2300;
2041 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2042 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2043 ha->gid_list_info_size = 8;
2044 ha->optrom_size = OPTROM_SIZE_81XX;
2045 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2046 ha->isp_ops = &qla81xx_isp_ops;
2047 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2048 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2049 ha->nvram_conf_off = ~0;
2050 ha->nvram_data_off = ~0;
2051 } else if (IS_QLA82XX(ha)) {
2052 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2053 req_length = REQUEST_ENTRY_CNT_82XX;
2054 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2055 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2056 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2057 ha->gid_list_info_size = 8;
2058 ha->optrom_size = OPTROM_SIZE_82XX;
2059 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2060 ha->isp_ops = &qla82xx_isp_ops;
2061 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2062 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2063 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2064 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2065 }
2066
2067 mutex_init(&ha->vport_lock);
2068 init_completion(&ha->mbx_cmd_comp);
2069 complete(&ha->mbx_cmd_comp);
2070 init_completion(&ha->mbx_intr_comp);
2071 init_completion(&ha->dcbx_comp);
2072
2073 set_bit(0, (unsigned long *) ha->vp_idx_map);
2074
2075 qla2x00_config_dma_addressing(ha);
2076 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2077 if (!ret) {
2078 qla_printk(KERN_WARNING, ha,
2079 "[ERROR] Failed to allocate memory for adapter\n");
2080
2081 goto probe_hw_failed;
2082 }
2083
2084 req->max_q_depth = MAX_Q_DEPTH;
2085 if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2086 req->max_q_depth = ql2xmaxqdepth;
2087
2088
2089 base_vha = qla2x00_create_host(sht, ha);
2090 if (!base_vha) {
2091 qla_printk(KERN_WARNING, ha,
2092 "[ERROR] Failed to allocate memory for scsi_host\n");
2093
2094 ret = -ENOMEM;
2095 qla2x00_mem_free(ha);
2096 qla2x00_free_req_que(ha, req);
2097 qla2x00_free_rsp_que(ha, rsp);
2098 goto probe_hw_failed;
2099 }
2100
2101 pci_set_drvdata(pdev, base_vha);
2102
2103 host = base_vha->host;
2104 base_vha->req = req;
2105 host->can_queue = req->length + 128;
2106 if (IS_QLA2XXX_MIDTYPE(ha))
2107 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2108 else
2109 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2110 base_vha->vp_idx;
2111
2112
2113 if (!IS_FWI2_CAPABLE(ha)) {
2114 if (IS_QLA2100(ha))
2115 host->sg_tablesize = 32;
2116 } else {
2117 if (!IS_QLA82XX(ha))
2118 host->sg_tablesize = QLA_SG_ALL;
2119 }
2120
2121 host->max_id = max_id;
2122 host->this_id = 255;
2123 host->cmd_per_lun = 3;
2124 host->unique_id = host->host_no;
2125 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif)
2126 host->max_cmd_len = 32;
2127 else
2128 host->max_cmd_len = MAX_CMDSZ;
2129 host->max_channel = MAX_BUSES - 1;
2130 host->max_lun = MAX_LUNS;
2131 host->transportt = qla2xxx_transport_template;
2132 sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2133
2134
2135 ret = qla2x00_request_irqs(ha, rsp);
2136 if (ret)
2137 goto probe_init_failed;
2138
2139 pci_save_state(pdev);
2140
2141
2142que_init:
2143 if (!qla2x00_alloc_queues(ha)) {
2144 qla_printk(KERN_WARNING, ha,
2145 "[ERROR] Failed to allocate memory for queue"
2146 " pointers\n");
2147 goto probe_init_failed;
2148 }
2149
2150 ha->rsp_q_map[0] = rsp;
2151 ha->req_q_map[0] = req;
2152 rsp->req = req;
2153 req->rsp = rsp;
2154 set_bit(0, ha->req_qid_map);
2155 set_bit(0, ha->rsp_qid_map);
2156
2157 req->req_q_in = &ha->iobase->isp24.req_q_in;
2158 req->req_q_out = &ha->iobase->isp24.req_q_out;
2159 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2160 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2161 if (ha->mqenable) {
2162 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2163 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2164 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2165 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
2166 }
2167
2168 if (IS_QLA82XX(ha)) {
2169 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2170 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2171 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2172 }
2173
2174 if (qla2x00_initialize_adapter(base_vha)) {
2175 qla_printk(KERN_WARNING, ha,
2176 "Failed to initialize adapter\n");
2177
2178 DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
2179 "Adapter flags %x.\n",
2180 base_vha->host_no, base_vha->device_flags));
2181
2182 if (IS_QLA82XX(ha)) {
2183 qla82xx_idc_lock(ha);
2184 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2185 QLA82XX_DEV_FAILED);
2186 qla82xx_idc_unlock(ha);
2187 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
2188 }
2189
2190 ret = -ENODEV;
2191 goto probe_failed;
2192 }
2193
2194 if (ha->mqenable) {
2195 if (qla25xx_setup_mode(base_vha)) {
2196 qla_printk(KERN_WARNING, ha,
2197 "Can't create queues, falling back to single"
2198 " queue mode\n");
2199 goto que_init;
2200 }
2201 }
2202
2203 if (ha->flags.running_gold_fw)
2204 goto skip_dpc;
2205
2206
2207
2208
2209 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2210 "%s_dpc", base_vha->host_str);
2211 if (IS_ERR(ha->dpc_thread)) {
2212 qla_printk(KERN_WARNING, ha,
2213 "Unable to start DPC thread!\n");
2214 ret = PTR_ERR(ha->dpc_thread);
2215 goto probe_failed;
2216 }
2217
2218skip_dpc:
2219 list_add_tail(&base_vha->list, &ha->vp_list);
2220 base_vha->host->irq = ha->pdev->irq;
2221
2222
2223 qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2224
2225 DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
2226 base_vha->host_no, ha));
2227
2228 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && ql2xenabledif) {
2229 if (ha->fw_attributes & BIT_4) {
2230 base_vha->flags.difdix_supported = 1;
2231 DEBUG18(qla_printk(KERN_INFO, ha,
2232 "Registering for DIF/DIX type 1 and 3"
2233 " protection.\n"));
2234 scsi_host_set_prot(host,
2235 SHOST_DIF_TYPE1_PROTECTION
2236 | SHOST_DIF_TYPE2_PROTECTION
2237 | SHOST_DIF_TYPE3_PROTECTION
2238 | SHOST_DIX_TYPE1_PROTECTION
2239 | SHOST_DIX_TYPE2_PROTECTION
2240 | SHOST_DIX_TYPE3_PROTECTION);
2241 scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
2242 } else
2243 base_vha->flags.difdix_supported = 0;
2244 }
2245
2246 ha->isp_ops->enable_intrs(ha);
2247
2248 ret = scsi_add_host(host, &pdev->dev);
2249 if (ret)
2250 goto probe_failed;
2251
2252 base_vha->flags.init_done = 1;
2253 base_vha->flags.online = 1;
2254
2255 scsi_scan_host(host);
2256
2257 qla2x00_alloc_sysfs_attr(base_vha);
2258
2259 qla2x00_init_host_attr(base_vha);
2260
2261 qla2x00_dfs_setup(base_vha);
2262
2263 qla_printk(KERN_INFO, ha, "\n"
2264 " QLogic Fibre Channel HBA Driver: %s\n"
2265 " QLogic %s - %s\n"
2266 " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
2267 qla2x00_version_str, ha->model_number,
2268 ha->model_desc ? ha->model_desc : "", pdev->device,
2269 ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
2270 ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
2271 ha->isp_ops->fw_version_str(base_vha, fw_str));
2272
2273 return 0;
2274
2275probe_init_failed:
2276 qla2x00_free_req_que(ha, req);
2277 qla2x00_free_rsp_que(ha, rsp);
2278 ha->max_req_queues = ha->max_rsp_queues = 0;
2279
2280probe_failed:
2281 if (base_vha->timer_active)
2282 qla2x00_stop_timer(base_vha);
2283 base_vha->flags.online = 0;
2284 if (ha->dpc_thread) {
2285 struct task_struct *t = ha->dpc_thread;
2286
2287 ha->dpc_thread = NULL;
2288 kthread_stop(t);
2289 }
2290
2291 qla2x00_free_device(base_vha);
2292
2293 scsi_host_put(base_vha->host);
2294
2295probe_hw_failed:
2296 if (IS_QLA82XX(ha)) {
2297 qla82xx_idc_lock(ha);
2298 qla82xx_clear_drv_active(ha);
2299 qla82xx_idc_unlock(ha);
2300 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2301 if (!ql2xdbwr)
2302 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2303 } else {
2304 if (ha->iobase)
2305 iounmap(ha->iobase);
2306 }
2307 pci_release_selected_regions(ha->pdev, ha->bars);
2308 kfree(ha);
2309 ha = NULL;
2310
2311probe_out:
2312 pci_disable_device(pdev);
2313 return ret;
2314}
2315
2316static void
2317qla2x00_shutdown(struct pci_dev *pdev)
2318{
2319 scsi_qla_host_t *vha;
2320 struct qla_hw_data *ha;
2321
2322 vha = pci_get_drvdata(pdev);
2323 ha = vha->hw;
2324
2325
2326 if (ha->flags.fce_enabled) {
2327 qla2x00_disable_fce_trace(vha, NULL, NULL);
2328 ha->flags.fce_enabled = 0;
2329 }
2330
2331
2332 if (ha->eft)
2333 qla2x00_disable_eft_trace(vha);
2334
2335
2336 qla2x00_try_to_stop_firmware(vha);
2337
2338
2339 vha->flags.online = 0;
2340
2341
2342 if (ha->interrupts_on) {
2343 vha->flags.init_done = 0;
2344 ha->isp_ops->disable_intrs(ha);
2345 }
2346
2347 qla2x00_free_irqs(vha);
2348
2349 qla2x00_free_fw_dump(ha);
2350}
2351
2352static void
2353qla2x00_remove_one(struct pci_dev *pdev)
2354{
2355 scsi_qla_host_t *base_vha, *vha;
2356 struct qla_hw_data *ha;
2357 unsigned long flags;
2358
2359 base_vha = pci_get_drvdata(pdev);
2360 ha = base_vha->hw;
2361
2362 spin_lock_irqsave(&ha->vport_slock, flags);
2363 list_for_each_entry(vha, &ha->vp_list, list) {
2364 atomic_inc(&vha->vref_count);
2365
2366 if (vha->fc_vport) {
2367 spin_unlock_irqrestore(&ha->vport_slock, flags);
2368
2369 fc_vport_terminate(vha->fc_vport);
2370
2371 spin_lock_irqsave(&ha->vport_slock, flags);
2372 }
2373
2374 atomic_dec(&vha->vref_count);
2375 }
2376 spin_unlock_irqrestore(&ha->vport_slock, flags);
2377
2378 set_bit(UNLOADING, &base_vha->dpc_flags);
2379
2380 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2381
2382 qla2x00_dfs_remove(base_vha);
2383
2384 qla84xx_put_chip(base_vha);
2385
2386
2387 if (base_vha->timer_active)
2388 qla2x00_stop_timer(base_vha);
2389
2390 base_vha->flags.online = 0;
2391
2392
2393 if (ha->wq) {
2394 flush_workqueue(ha->wq);
2395 destroy_workqueue(ha->wq);
2396 ha->wq = NULL;
2397 }
2398
2399
2400 if (ha->dpc_thread) {
2401 struct task_struct *t = ha->dpc_thread;
2402
2403
2404
2405
2406
2407 ha->dpc_thread = NULL;
2408 kthread_stop(t);
2409 }
2410
2411 qla2x00_free_sysfs_attr(base_vha);
2412
2413 fc_remove_host(base_vha->host);
2414
2415 scsi_remove_host(base_vha->host);
2416
2417 qla2x00_free_device(base_vha);
2418
2419 scsi_host_put(base_vha->host);
2420
2421 if (IS_QLA82XX(ha)) {
2422 qla82xx_idc_lock(ha);
2423 qla82xx_clear_drv_active(ha);
2424 qla82xx_idc_unlock(ha);
2425
2426 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2427 if (!ql2xdbwr)
2428 iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2429 } else {
2430 if (ha->iobase)
2431 iounmap(ha->iobase);
2432
2433 if (ha->mqiobase)
2434 iounmap(ha->mqiobase);
2435 }
2436
2437 pci_release_selected_regions(ha->pdev, ha->bars);
2438 kfree(ha);
2439 ha = NULL;
2440
2441 pci_disable_pcie_error_reporting(pdev);
2442
2443 pci_disable_device(pdev);
2444 pci_set_drvdata(pdev, NULL);
2445}
2446
2447static void
2448qla2x00_free_device(scsi_qla_host_t *vha)
2449{
2450 struct qla_hw_data *ha = vha->hw;
2451
2452 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2453
2454
2455 if (vha->timer_active)
2456 qla2x00_stop_timer(vha);
2457
2458
2459 if (ha->dpc_thread) {
2460 struct task_struct *t = ha->dpc_thread;
2461
2462
2463
2464
2465
2466 ha->dpc_thread = NULL;
2467 kthread_stop(t);
2468 }
2469
2470 qla25xx_delete_queues(vha);
2471
2472 if (ha->flags.fce_enabled)
2473 qla2x00_disable_fce_trace(vha, NULL, NULL);
2474
2475 if (ha->eft)
2476 qla2x00_disable_eft_trace(vha);
2477
2478
2479 qla2x00_try_to_stop_firmware(vha);
2480
2481 vha->flags.online = 0;
2482
2483
2484 if (ha->interrupts_on) {
2485 vha->flags.init_done = 0;
2486 ha->isp_ops->disable_intrs(ha);
2487 }
2488
2489 qla2x00_free_irqs(vha);
2490
2491 qla2x00_free_fcports(vha);
2492
2493 qla2x00_mem_free(ha);
2494
2495 qla2x00_free_queues(ha);
2496}
2497
2498void qla2x00_free_fcports(struct scsi_qla_host *vha)
2499{
2500 fc_port_t *fcport, *tfcport;
2501
2502 list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
2503 list_del(&fcport->list);
2504 kfree(fcport);
2505 fcport = NULL;
2506 }
2507}
2508
2509static inline void
2510qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
2511 int defer)
2512{
2513 struct fc_rport *rport;
2514 scsi_qla_host_t *base_vha;
2515 unsigned long flags;
2516
2517 if (!fcport->rport)
2518 return;
2519
2520 rport = fcport->rport;
2521 if (defer) {
2522 base_vha = pci_get_drvdata(vha->hw->pdev);
2523 spin_lock_irqsave(vha->host->host_lock, flags);
2524 fcport->drport = rport;
2525 spin_unlock_irqrestore(vha->host->host_lock, flags);
2526 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
2527 qla2xxx_wake_dpc(base_vha);
2528 } else
2529 fc_remote_port_delete(rport);
2530}
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
2542 int do_login, int defer)
2543{
2544 if (atomic_read(&fcport->state) == FCS_ONLINE &&
2545 vha->vp_idx == fcport->vp_idx) {
2546 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2547 qla2x00_schedule_rport_del(vha, fcport, defer);
2548 }
2549
2550
2551
2552
2553 if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
2554 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2555
2556 if (!do_login)
2557 return;
2558
2559 if (fcport->login_retry == 0) {
2560 fcport->login_retry = vha->hw->login_retry_count;
2561 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2562
2563 DEBUG(printk("scsi(%ld): Port login retry: "
2564 "%02x%02x%02x%02x%02x%02x%02x%02x, "
2565 "id = 0x%04x retry cnt=%d\n",
2566 vha->host_no,
2567 fcport->port_name[0],
2568 fcport->port_name[1],
2569 fcport->port_name[2],
2570 fcport->port_name[3],
2571 fcport->port_name[4],
2572 fcport->port_name[5],
2573 fcport->port_name[6],
2574 fcport->port_name[7],
2575 fcport->loop_id,
2576 fcport->login_retry));
2577 }
2578}
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593void
2594qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
2595{
2596 fc_port_t *fcport;
2597
2598 list_for_each_entry(fcport, &vha->vp_fcports, list) {
2599 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
2600 continue;
2601
2602
2603
2604
2605
2606 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
2607 continue;
2608 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2609 atomic_set(&fcport->state, FCS_DEVICE_LOST);
2610 if (defer)
2611 qla2x00_schedule_rport_del(vha, fcport, defer);
2612 else if (vha->vp_idx == fcport->vp_idx)
2613 qla2x00_schedule_rport_del(vha, fcport, defer);
2614 }
2615 }
2616}
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626static int
2627qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
2628 struct req_que **req, struct rsp_que **rsp)
2629{
2630 char name[16];
2631
2632 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
2633 &ha->init_cb_dma, GFP_KERNEL);
2634 if (!ha->init_cb)
2635 goto fail;
2636
2637 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
2638 &ha->gid_list_dma, GFP_KERNEL);
2639 if (!ha->gid_list)
2640 goto fail_free_init_cb;
2641
2642 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
2643 if (!ha->srb_mempool)
2644 goto fail_free_gid_list;
2645
2646 if (IS_QLA82XX(ha)) {
2647
2648 if (!ctx_cachep) {
2649 ctx_cachep = kmem_cache_create("qla2xxx_ctx",
2650 sizeof(struct ct6_dsd), 0,
2651 SLAB_HWCACHE_ALIGN, NULL);
2652 if (!ctx_cachep)
2653 goto fail_free_gid_list;
2654 }
2655 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
2656 ctx_cachep);
2657 if (!ha->ctx_mempool)
2658 goto fail_free_srb_mempool;
2659 }
2660
2661
2662 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
2663 if (!ha->nvram)
2664 goto fail_free_ctx_mempool;
2665
2666 snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
2667 ha->pdev->device);
2668 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2669 DMA_POOL_SIZE, 8, 0);
2670 if (!ha->s_dma_pool)
2671 goto fail_free_nvram;
2672
2673 if (IS_QLA82XX(ha) || ql2xenabledif) {
2674 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2675 DSD_LIST_DMA_POOL_SIZE, 8, 0);
2676 if (!ha->dl_dma_pool) {
2677 qla_printk(KERN_WARNING, ha,
2678 "Memory Allocation failed - dl_dma_pool\n");
2679 goto fail_s_dma_pool;
2680 }
2681
2682 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
2683 FCP_CMND_DMA_POOL_SIZE, 8, 0);
2684 if (!ha->fcp_cmnd_dma_pool) {
2685 qla_printk(KERN_WARNING, ha,
2686 "Memory Allocation failed - fcp_cmnd_dma_pool\n");
2687 goto fail_dl_dma_pool;
2688 }
2689 }
2690
2691
2692 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
2693
2694 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
2695 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
2696 if (!ha->sns_cmd)
2697 goto fail_dma_pool;
2698 } else {
2699
2700 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2701 &ha->ms_iocb_dma);
2702 if (!ha->ms_iocb)
2703 goto fail_dma_pool;
2704
2705 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
2706 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
2707 if (!ha->ct_sns)
2708 goto fail_free_ms_iocb;
2709 }
2710
2711
2712 *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
2713 if (!*req) {
2714 DEBUG(printk("Unable to allocate memory for req\n"));
2715 goto fail_req;
2716 }
2717 (*req)->length = req_len;
2718 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
2719 ((*req)->length + 1) * sizeof(request_t),
2720 &(*req)->dma, GFP_KERNEL);
2721 if (!(*req)->ring) {
2722 DEBUG(printk("Unable to allocate memory for req_ring\n"));
2723 goto fail_req_ring;
2724 }
2725
2726 *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
2727 if (!*rsp) {
2728 qla_printk(KERN_WARNING, ha,
2729 "Unable to allocate memory for rsp\n");
2730 goto fail_rsp;
2731 }
2732 (*rsp)->hw = ha;
2733 (*rsp)->length = rsp_len;
2734 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
2735 ((*rsp)->length + 1) * sizeof(response_t),
2736 &(*rsp)->dma, GFP_KERNEL);
2737 if (!(*rsp)->ring) {
2738 qla_printk(KERN_WARNING, ha,
2739 "Unable to allocate memory for rsp_ring\n");
2740 goto fail_rsp_ring;
2741 }
2742 (*req)->rsp = *rsp;
2743 (*rsp)->req = *req;
2744
2745 if (ha->nvram_npiv_size) {
2746 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
2747 ha->nvram_npiv_size, GFP_KERNEL);
2748 if (!ha->npiv_info) {
2749 qla_printk(KERN_WARNING, ha,
2750 "Unable to allocate memory for npiv info\n");
2751 goto fail_npiv_info;
2752 }
2753 } else
2754 ha->npiv_info = NULL;
2755
2756
2757 if (IS_QLA8XXX_TYPE(ha)) {
2758 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2759 &ha->ex_init_cb_dma);
2760 if (!ha->ex_init_cb)
2761 goto fail_ex_init_cb;
2762 }
2763
2764 INIT_LIST_HEAD(&ha->gbl_dsd_list);
2765
2766
2767 if (!IS_FWI2_CAPABLE(ha)) {
2768 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
2769 &ha->async_pd_dma);
2770 if (!ha->async_pd)
2771 goto fail_async_pd;
2772 }
2773
2774 INIT_LIST_HEAD(&ha->vp_list);
2775 return 1;
2776
2777fail_async_pd:
2778 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
2779fail_ex_init_cb:
2780 kfree(ha->npiv_info);
2781fail_npiv_info:
2782 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
2783 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
2784 (*rsp)->ring = NULL;
2785 (*rsp)->dma = 0;
2786fail_rsp_ring:
2787 kfree(*rsp);
2788fail_rsp:
2789 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
2790 sizeof(request_t), (*req)->ring, (*req)->dma);
2791 (*req)->ring = NULL;
2792 (*req)->dma = 0;
2793fail_req_ring:
2794 kfree(*req);
2795fail_req:
2796 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2797 ha->ct_sns, ha->ct_sns_dma);
2798 ha->ct_sns = NULL;
2799 ha->ct_sns_dma = 0;
2800fail_free_ms_iocb:
2801 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2802 ha->ms_iocb = NULL;
2803 ha->ms_iocb_dma = 0;
2804fail_dma_pool:
2805 if (IS_QLA82XX(ha) || ql2xenabledif) {
2806 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2807 ha->fcp_cmnd_dma_pool = NULL;
2808 }
2809fail_dl_dma_pool:
2810 if (IS_QLA82XX(ha) || ql2xenabledif) {
2811 dma_pool_destroy(ha->dl_dma_pool);
2812 ha->dl_dma_pool = NULL;
2813 }
2814fail_s_dma_pool:
2815 dma_pool_destroy(ha->s_dma_pool);
2816 ha->s_dma_pool = NULL;
2817fail_free_nvram:
2818 kfree(ha->nvram);
2819 ha->nvram = NULL;
2820fail_free_ctx_mempool:
2821 mempool_destroy(ha->ctx_mempool);
2822 ha->ctx_mempool = NULL;
2823fail_free_srb_mempool:
2824 mempool_destroy(ha->srb_mempool);
2825 ha->srb_mempool = NULL;
2826fail_free_gid_list:
2827 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
2828 ha->gid_list_dma);
2829 ha->gid_list = NULL;
2830 ha->gid_list_dma = 0;
2831fail_free_init_cb:
2832 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
2833 ha->init_cb_dma);
2834 ha->init_cb = NULL;
2835 ha->init_cb_dma = 0;
2836fail:
2837 DEBUG(printk("%s: Memory allocation failure\n", __func__));
2838 return -ENOMEM;
2839}
2840
2841
2842
2843
2844
2845
2846
2847
2848static void
2849qla2x00_free_fw_dump(struct qla_hw_data *ha)
2850{
2851 if (ha->fce)
2852 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
2853 ha->fce_dma);
2854
2855 if (ha->fw_dump) {
2856 if (ha->eft)
2857 dma_free_coherent(&ha->pdev->dev,
2858 ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
2859 vfree(ha->fw_dump);
2860 }
2861 ha->fce = NULL;
2862 ha->fce_dma = 0;
2863 ha->eft = NULL;
2864 ha->eft_dma = 0;
2865 ha->fw_dump = NULL;
2866 ha->fw_dumped = 0;
2867 ha->fw_dump_reading = 0;
2868}
2869
2870
2871
2872
2873
2874
2875
2876
2877static void
2878qla2x00_mem_free(struct qla_hw_data *ha)
2879{
2880 qla2x00_free_fw_dump(ha);
2881
2882 if (ha->srb_mempool)
2883 mempool_destroy(ha->srb_mempool);
2884
2885 if (ha->dcbx_tlv)
2886 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
2887 ha->dcbx_tlv, ha->dcbx_tlv_dma);
2888
2889 if (ha->xgmac_data)
2890 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
2891 ha->xgmac_data, ha->xgmac_data_dma);
2892
2893 if (ha->sns_cmd)
2894 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
2895 ha->sns_cmd, ha->sns_cmd_dma);
2896
2897 if (ha->ct_sns)
2898 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
2899 ha->ct_sns, ha->ct_sns_dma);
2900
2901 if (ha->sfp_data)
2902 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
2903
2904 if (ha->edc_data)
2905 dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
2906
2907 if (ha->ms_iocb)
2908 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
2909
2910 if (ha->ex_init_cb)
2911 dma_pool_free(ha->s_dma_pool,
2912 ha->ex_init_cb, ha->ex_init_cb_dma);
2913
2914 if (ha->async_pd)
2915 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
2916
2917 if (ha->s_dma_pool)
2918 dma_pool_destroy(ha->s_dma_pool);
2919
2920 if (ha->gid_list)
2921 dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
2922 ha->gid_list_dma);
2923
2924 if (IS_QLA82XX(ha)) {
2925 if (!list_empty(&ha->gbl_dsd_list)) {
2926 struct dsd_dma *dsd_ptr, *tdsd_ptr;
2927
2928
2929 list_for_each_entry_safe(dsd_ptr,
2930 tdsd_ptr, &ha->gbl_dsd_list, list) {
2931 dma_pool_free(ha->dl_dma_pool,
2932 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
2933 list_del(&dsd_ptr->list);
2934 kfree(dsd_ptr);
2935 }
2936 }
2937 }
2938
2939 if (ha->dl_dma_pool)
2940 dma_pool_destroy(ha->dl_dma_pool);
2941
2942 if (ha->fcp_cmnd_dma_pool)
2943 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
2944
2945 if (ha->ctx_mempool)
2946 mempool_destroy(ha->ctx_mempool);
2947
2948 if (ha->init_cb)
2949 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
2950 ha->init_cb, ha->init_cb_dma);
2951 vfree(ha->optrom_buffer);
2952 kfree(ha->nvram);
2953 kfree(ha->npiv_info);
2954
2955 ha->srb_mempool = NULL;
2956 ha->ctx_mempool = NULL;
2957 ha->sns_cmd = NULL;
2958 ha->sns_cmd_dma = 0;
2959 ha->ct_sns = NULL;
2960 ha->ct_sns_dma = 0;
2961 ha->ms_iocb = NULL;
2962 ha->ms_iocb_dma = 0;
2963 ha->init_cb = NULL;
2964 ha->init_cb_dma = 0;
2965 ha->ex_init_cb = NULL;
2966 ha->ex_init_cb_dma = 0;
2967 ha->async_pd = NULL;
2968 ha->async_pd_dma = 0;
2969
2970 ha->s_dma_pool = NULL;
2971 ha->dl_dma_pool = NULL;
2972 ha->fcp_cmnd_dma_pool = NULL;
2973
2974 ha->gid_list = NULL;
2975 ha->gid_list_dma = 0;
2976}
2977
2978struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
2979 struct qla_hw_data *ha)
2980{
2981 struct Scsi_Host *host;
2982 struct scsi_qla_host *vha = NULL;
2983
2984 host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
2985 if (host == NULL) {
2986 printk(KERN_WARNING
2987 "qla2xxx: Couldn't allocate host from scsi layer!\n");
2988 goto fail;
2989 }
2990
2991
2992 vha = shost_priv(host);
2993 memset(vha, 0, sizeof(scsi_qla_host_t));
2994
2995 vha->host = host;
2996 vha->host_no = host->host_no;
2997 vha->hw = ha;
2998
2999 INIT_LIST_HEAD(&vha->vp_fcports);
3000 INIT_LIST_HEAD(&vha->work_list);
3001 INIT_LIST_HEAD(&vha->list);
3002
3003 spin_lock_init(&vha->work_lock);
3004
3005 sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3006 return vha;
3007
3008fail:
3009 return vha;
3010}
3011
3012static struct qla_work_evt *
3013qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3014{
3015 struct qla_work_evt *e;
3016 uint8_t bail;
3017
3018 QLA_VHA_MARK_BUSY(vha, bail);
3019 if (bail)
3020 return NULL;
3021
3022 e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3023 if (!e) {
3024 QLA_VHA_MARK_NOT_BUSY(vha);
3025 return NULL;
3026 }
3027
3028 INIT_LIST_HEAD(&e->list);
3029 e->type = type;
3030 e->flags = QLA_EVT_FLAG_FREE;
3031 return e;
3032}
3033
3034static int
3035qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3036{
3037 unsigned long flags;
3038
3039 spin_lock_irqsave(&vha->work_lock, flags);
3040 list_add_tail(&e->list, &vha->work_list);
3041 spin_unlock_irqrestore(&vha->work_lock, flags);
3042 qla2xxx_wake_dpc(vha);
3043
3044 return QLA_SUCCESS;
3045}
3046
3047int
3048qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3049 u32 data)
3050{
3051 struct qla_work_evt *e;
3052
3053 e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3054 if (!e)
3055 return QLA_FUNCTION_FAILED;
3056
3057 e->u.aen.code = code;
3058 e->u.aen.data = data;
3059 return qla2x00_post_work(vha, e);
3060}
3061
3062int
3063qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3064{
3065 struct qla_work_evt *e;
3066
3067 e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3068 if (!e)
3069 return QLA_FUNCTION_FAILED;
3070
3071 memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3072 return qla2x00_post_work(vha, e);
3073}
3074
3075#define qla2x00_post_async_work(name, type) \
3076int qla2x00_post_async_##name##_work( \
3077 struct scsi_qla_host *vha, \
3078 fc_port_t *fcport, uint16_t *data) \
3079{ \
3080 struct qla_work_evt *e; \
3081 \
3082 e = qla2x00_alloc_work(vha, type); \
3083 if (!e) \
3084 return QLA_FUNCTION_FAILED; \
3085 \
3086 e->u.logio.fcport = fcport; \
3087 if (data) { \
3088 e->u.logio.data[0] = data[0]; \
3089 e->u.logio.data[1] = data[1]; \
3090 } \
3091 return qla2x00_post_work(vha, e); \
3092}
3093
3094qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3095qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3096qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3097qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3098qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3099qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3100
3101int
3102qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3103{
3104 struct qla_work_evt *e;
3105
3106 e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3107 if (!e)
3108 return QLA_FUNCTION_FAILED;
3109
3110 e->u.uevent.code = code;
3111 return qla2x00_post_work(vha, e);
3112}
3113
3114static void
3115qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3116{
3117 char event_string[40];
3118 char *envp[] = { event_string, NULL };
3119
3120 switch (code) {
3121 case QLA_UEVENT_CODE_FW_DUMP:
3122 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3123 vha->host_no);
3124 break;
3125 default:
3126
3127 break;
3128 }
3129 kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3130}
3131
3132void
3133qla2x00_do_work(struct scsi_qla_host *vha)
3134{
3135 struct qla_work_evt *e, *tmp;
3136 unsigned long flags;
3137 LIST_HEAD(work);
3138
3139 spin_lock_irqsave(&vha->work_lock, flags);
3140 list_splice_init(&vha->work_list, &work);
3141 spin_unlock_irqrestore(&vha->work_lock, flags);
3142
3143 list_for_each_entry_safe(e, tmp, &work, list) {
3144 list_del_init(&e->list);
3145
3146 switch (e->type) {
3147 case QLA_EVT_AEN:
3148 fc_host_post_event(vha->host, fc_get_event_number(),
3149 e->u.aen.code, e->u.aen.data);
3150 break;
3151 case QLA_EVT_IDC_ACK:
3152 qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3153 break;
3154 case QLA_EVT_ASYNC_LOGIN:
3155 qla2x00_async_login(vha, e->u.logio.fcport,
3156 e->u.logio.data);
3157 break;
3158 case QLA_EVT_ASYNC_LOGIN_DONE:
3159 qla2x00_async_login_done(vha, e->u.logio.fcport,
3160 e->u.logio.data);
3161 break;
3162 case QLA_EVT_ASYNC_LOGOUT:
3163 qla2x00_async_logout(vha, e->u.logio.fcport);
3164 break;
3165 case QLA_EVT_ASYNC_LOGOUT_DONE:
3166 qla2x00_async_logout_done(vha, e->u.logio.fcport,
3167 e->u.logio.data);
3168 break;
3169 case QLA_EVT_ASYNC_ADISC:
3170 qla2x00_async_adisc(vha, e->u.logio.fcport,
3171 e->u.logio.data);
3172 break;
3173 case QLA_EVT_ASYNC_ADISC_DONE:
3174 qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3175 e->u.logio.data);
3176 break;
3177 case QLA_EVT_UEVENT:
3178 qla2x00_uevent_emit(vha, e->u.uevent.code);
3179 break;
3180 }
3181 if (e->flags & QLA_EVT_FLAG_FREE)
3182 kfree(e);
3183
3184
3185 QLA_VHA_MARK_NOT_BUSY(vha);
3186 }
3187}
3188
3189
3190
3191
3192void qla2x00_relogin(struct scsi_qla_host *vha)
3193{
3194 fc_port_t *fcport;
3195 int status;
3196 uint16_t next_loopid = 0;
3197 struct qla_hw_data *ha = vha->hw;
3198 uint16_t data[2];
3199
3200 list_for_each_entry(fcport, &vha->vp_fcports, list) {
3201
3202
3203
3204
3205 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3206 fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3207 fcport->login_retry--;
3208 if (fcport->flags & FCF_FABRIC_DEVICE) {
3209 if (fcport->flags & FCF_FCP2_DEVICE)
3210 ha->isp_ops->fabric_logout(vha,
3211 fcport->loop_id,
3212 fcport->d_id.b.domain,
3213 fcport->d_id.b.area,
3214 fcport->d_id.b.al_pa);
3215
3216 if (IS_ALOGIO_CAPABLE(ha)) {
3217 fcport->flags |= FCF_ASYNC_SENT;
3218 data[0] = 0;
3219 data[1] = QLA_LOGIO_LOGIN_RETRIED;
3220 status = qla2x00_post_async_login_work(
3221 vha, fcport, data);
3222 if (status == QLA_SUCCESS)
3223 continue;
3224
3225 status = 1;
3226 } else
3227 status = qla2x00_fabric_login(vha,
3228 fcport, &next_loopid);
3229 } else
3230 status = qla2x00_local_device_login(vha,
3231 fcport);
3232
3233 if (status == QLA_SUCCESS) {
3234 fcport->old_loop_id = fcport->loop_id;
3235
3236 DEBUG(printk("scsi(%ld): port login OK: logged "
3237 "in ID 0x%x\n", vha->host_no, fcport->loop_id));
3238
3239 qla2x00_update_fcport(vha, fcport);
3240
3241 } else if (status == 1) {
3242 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3243
3244 DEBUG(printk("scsi(%ld): Retrying"
3245 " %d login again loop_id 0x%x\n",
3246 vha->host_no, fcport->login_retry,
3247 fcport->loop_id));
3248 } else {
3249 fcport->login_retry = 0;
3250 }
3251
3252 if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3253 fcport->loop_id = FC_NO_LOOP_ID;
3254 }
3255 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3256 break;
3257 }
3258}
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273static int
3274qla2x00_do_dpc(void *data)
3275{
3276 int rval;
3277 scsi_qla_host_t *base_vha;
3278 struct qla_hw_data *ha;
3279
3280 ha = (struct qla_hw_data *)data;
3281 base_vha = pci_get_drvdata(ha->pdev);
3282
3283 set_user_nice(current, -20);
3284
3285 set_current_state(TASK_INTERRUPTIBLE);
3286 while (!kthread_should_stop()) {
3287 DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
3288
3289 schedule();
3290 __set_current_state(TASK_RUNNING);
3291
3292 DEBUG3(printk("qla2x00: DPC handler waking up\n"));
3293
3294
3295 if (!base_vha->flags.init_done)
3296 continue;
3297
3298 if (ha->flags.eeh_busy) {
3299 DEBUG17(qla_printk(KERN_WARNING, ha,
3300 "qla2x00_do_dpc: dpc_flags: %lx\n",
3301 base_vha->dpc_flags));
3302 continue;
3303 }
3304
3305 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
3306
3307 ha->dpc_active = 1;
3308
3309 if (ha->flags.mbox_busy) {
3310 ha->dpc_active = 0;
3311 continue;
3312 }
3313
3314 qla2x00_do_work(base_vha);
3315
3316 if (IS_QLA82XX(ha)) {
3317 if (test_and_clear_bit(ISP_UNRECOVERABLE,
3318 &base_vha->dpc_flags)) {
3319 qla82xx_idc_lock(ha);
3320 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3321 QLA82XX_DEV_FAILED);
3322 qla82xx_idc_unlock(ha);
3323 qla_printk(KERN_INFO, ha,
3324 "HW State: FAILED\n");
3325 qla82xx_device_state_handler(base_vha);
3326 continue;
3327 }
3328
3329 if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
3330 &base_vha->dpc_flags)) {
3331
3332 DEBUG(printk(KERN_INFO
3333 "scsi(%ld): dpc: sched "
3334 "qla82xx_fcoe_ctx_reset ha = %p\n",
3335 base_vha->host_no, ha));
3336 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3337 &base_vha->dpc_flags))) {
3338 if (qla82xx_fcoe_ctx_reset(base_vha)) {
3339
3340
3341
3342 set_bit(ISP_ABORT_NEEDED,
3343 &base_vha->dpc_flags);
3344 }
3345 clear_bit(ABORT_ISP_ACTIVE,
3346 &base_vha->dpc_flags);
3347 }
3348
3349 DEBUG(printk("scsi(%ld): dpc:"
3350 " qla82xx_fcoe_ctx_reset end\n",
3351 base_vha->host_no));
3352 }
3353 }
3354
3355 if (test_and_clear_bit(ISP_ABORT_NEEDED,
3356 &base_vha->dpc_flags)) {
3357
3358 DEBUG(printk("scsi(%ld): dpc: sched "
3359 "qla2x00_abort_isp ha = %p\n",
3360 base_vha->host_no, ha));
3361 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
3362 &base_vha->dpc_flags))) {
3363
3364 if (ha->isp_ops->abort_isp(base_vha)) {
3365
3366 set_bit(ISP_ABORT_NEEDED,
3367 &base_vha->dpc_flags);
3368 }
3369 clear_bit(ABORT_ISP_ACTIVE,
3370 &base_vha->dpc_flags);
3371 }
3372
3373 DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
3374 base_vha->host_no));
3375 }
3376
3377 if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
3378 qla2x00_update_fcports(base_vha);
3379 clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3380 }
3381
3382 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
3383 DEBUG(printk(KERN_INFO "scsi(%ld): dpc: sched "
3384 "qla2x00_quiesce_needed ha = %p\n",
3385 base_vha->host_no, ha));
3386 qla82xx_device_state_handler(base_vha);
3387 clear_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags);
3388 if (!ha->flags.quiesce_owner) {
3389 qla2x00_perform_loop_resync(base_vha);
3390
3391 qla82xx_idc_lock(ha);
3392 qla82xx_clear_qsnt_ready(base_vha);
3393 qla82xx_idc_unlock(ha);
3394 }
3395 }
3396
3397 if (test_and_clear_bit(RESET_MARKER_NEEDED,
3398 &base_vha->dpc_flags) &&
3399 (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
3400
3401 DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
3402 base_vha->host_no));
3403
3404 qla2x00_rst_aen(base_vha);
3405 clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
3406 }
3407
3408
3409 if ((test_and_clear_bit(RELOGIN_NEEDED,
3410 &base_vha->dpc_flags)) &&
3411 !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
3412 atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
3413
3414 DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
3415 base_vha->host_no));
3416 qla2x00_relogin(base_vha);
3417
3418 DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
3419 base_vha->host_no));
3420 }
3421
3422 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
3423 &base_vha->dpc_flags)) {
3424
3425 DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
3426 base_vha->host_no));
3427
3428 if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
3429 &base_vha->dpc_flags))) {
3430
3431 rval = qla2x00_loop_resync(base_vha);
3432
3433 clear_bit(LOOP_RESYNC_ACTIVE,
3434 &base_vha->dpc_flags);
3435 }
3436
3437 DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
3438 base_vha->host_no));
3439 }
3440
3441 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
3442 atomic_read(&base_vha->loop_state) == LOOP_READY) {
3443 clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
3444 qla2xxx_flash_npiv_conf(base_vha);
3445 }
3446
3447 if (!ha->interrupts_on)
3448 ha->isp_ops->enable_intrs(ha);
3449
3450 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
3451 &base_vha->dpc_flags))
3452 ha->isp_ops->beacon_blink(base_vha);
3453
3454 qla2x00_do_dpc_all_vps(base_vha);
3455
3456 ha->dpc_active = 0;
3457 set_current_state(TASK_INTERRUPTIBLE);
3458 }
3459 __set_current_state(TASK_RUNNING);
3460
3461 DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
3462
3463
3464
3465
3466 ha->dpc_active = 0;
3467
3468
3469 qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3470
3471 return 0;
3472}
3473
3474void
3475qla2xxx_wake_dpc(struct scsi_qla_host *vha)
3476{
3477 struct qla_hw_data *ha = vha->hw;
3478 struct task_struct *t = ha->dpc_thread;
3479
3480 if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
3481 wake_up_process(t);
3482}
3483
3484
3485
3486
3487
3488
3489
3490
3491static void
3492qla2x00_rst_aen(scsi_qla_host_t *vha)
3493{
3494 if (vha->flags.online && !vha->flags.reset_active &&
3495 !atomic_read(&vha->loop_down_timer) &&
3496 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
3497 do {
3498 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
3499
3500
3501
3502
3503
3504 vha->marker_needed = 1;
3505 } while (!atomic_read(&vha->loop_down_timer) &&
3506 (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
3507 }
3508}
3509
3510static void
3511qla2x00_sp_free_dma(srb_t *sp)
3512{
3513 struct scsi_cmnd *cmd = sp->cmd;
3514 struct qla_hw_data *ha = sp->fcport->vha->hw;
3515
3516 if (sp->flags & SRB_DMA_VALID) {
3517 scsi_dma_unmap(cmd);
3518 sp->flags &= ~SRB_DMA_VALID;
3519 }
3520
3521 if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
3522 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
3523 scsi_prot_sg_count(cmd), cmd->sc_data_direction);
3524 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
3525 }
3526
3527 if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
3528
3529 qla2x00_clean_dsd_pool(ha, sp);
3530 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
3531 }
3532
3533 if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
3534 dma_pool_free(ha->dl_dma_pool, sp->ctx,
3535 ((struct crc_context *)sp->ctx)->crc_ctx_dma);
3536 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
3537 }
3538
3539 CMD_SP(cmd) = NULL;
3540}
3541
3542static void
3543qla2x00_sp_final_compl(struct qla_hw_data *ha, srb_t *sp)
3544{
3545 struct scsi_cmnd *cmd = sp->cmd;
3546
3547 qla2x00_sp_free_dma(sp);
3548
3549 if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
3550 struct ct6_dsd *ctx = sp->ctx;
3551 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
3552 ctx->fcp_cmnd_dma);
3553 list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
3554 ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
3555 ha->gbl_dsd_avail += ctx->dsd_use_cnt;
3556 mempool_free(sp->ctx, ha->ctx_mempool);
3557 sp->ctx = NULL;
3558 }
3559
3560 mempool_free(sp, ha->srb_mempool);
3561 cmd->scsi_done(cmd);
3562}
3563
3564void
3565qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
3566{
3567 if (atomic_read(&sp->ref_count) == 0) {
3568 DEBUG2(qla_printk(KERN_WARNING, ha,
3569 "SP reference-count to ZERO -- sp=%p\n", sp));
3570 DEBUG2(BUG());
3571 return;
3572 }
3573 if (!atomic_dec_and_test(&sp->ref_count))
3574 return;
3575 qla2x00_sp_final_compl(ha, sp);
3576}
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586void
3587qla2x00_timer(scsi_qla_host_t *vha)
3588{
3589 unsigned long cpu_flags = 0;
3590 int start_dpc = 0;
3591 int index;
3592 srb_t *sp;
3593 uint16_t w;
3594 struct qla_hw_data *ha = vha->hw;
3595 struct req_que *req;
3596
3597 if (ha->flags.eeh_busy) {
3598 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3599 return;
3600 }
3601
3602
3603 if (!pci_channel_offline(ha->pdev))
3604 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
3605
3606 if (IS_QLA82XX(ha)) {
3607 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
3608 start_dpc++;
3609 qla82xx_watchdog(vha);
3610 }
3611
3612
3613 if (atomic_read(&vha->loop_down_timer) > 0 &&
3614 !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
3615 && vha->flags.online) {
3616
3617 if (atomic_read(&vha->loop_down_timer) ==
3618 vha->loop_down_abort_time) {
3619
3620 DEBUG(printk("scsi(%ld): Loop Down - aborting the "
3621 "queues before time expire\n",
3622 vha->host_no));
3623
3624 if (!IS_QLA2100(ha) && vha->link_down_timeout)
3625 atomic_set(&vha->loop_state, LOOP_DEAD);
3626
3627
3628
3629
3630
3631
3632 if (!vha->vp_idx) {
3633 spin_lock_irqsave(&ha->hardware_lock,
3634 cpu_flags);
3635 req = ha->req_q_map[0];
3636 for (index = 1;
3637 index < MAX_OUTSTANDING_COMMANDS;
3638 index++) {
3639 fc_port_t *sfcp;
3640
3641 sp = req->outstanding_cmds[index];
3642 if (!sp)
3643 continue;
3644 if (sp->ctx && !IS_PROT_IO(sp))
3645 continue;
3646 sfcp = sp->fcport;
3647 if (!(sfcp->flags & FCF_FCP2_DEVICE))
3648 continue;
3649
3650 set_bit(ISP_ABORT_NEEDED,
3651 &vha->dpc_flags);
3652 break;
3653 }
3654 spin_unlock_irqrestore(&ha->hardware_lock,
3655 cpu_flags);
3656 }
3657 start_dpc++;
3658 }
3659
3660
3661 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
3662 if (!(vha->device_flags & DFLG_NO_CABLE)) {
3663 DEBUG(printk("scsi(%ld): Loop down - "
3664 "aborting ISP.\n",
3665 vha->host_no));
3666 qla_printk(KERN_WARNING, ha,
3667 "Loop down - aborting ISP.\n");
3668
3669 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3670 }
3671 }
3672 DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
3673 vha->host_no,
3674 atomic_read(&vha->loop_down_timer)));
3675 }
3676
3677
3678 if (ha->beacon_blink_led == 1) {
3679 set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
3680 start_dpc++;
3681 }
3682
3683
3684 if (!list_empty(&vha->work_list))
3685 start_dpc++;
3686
3687
3688 if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
3689 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
3690 test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
3691 start_dpc ||
3692 test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
3693 test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
3694 test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
3695 test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
3696 test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
3697 test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
3698 qla2xxx_wake_dpc(vha);
3699
3700 qla2x00_restart_timer(vha, WATCH_INTERVAL);
3701}
3702
3703
3704
3705#define FW_BLOBS 8
3706#define FW_ISP21XX 0
3707#define FW_ISP22XX 1
3708#define FW_ISP2300 2
3709#define FW_ISP2322 3
3710#define FW_ISP24XX 4
3711#define FW_ISP25XX 5
3712#define FW_ISP81XX 6
3713#define FW_ISP82XX 7
3714
3715#define FW_FILE_ISP21XX "ql2100_fw.bin"
3716#define FW_FILE_ISP22XX "ql2200_fw.bin"
3717#define FW_FILE_ISP2300 "ql2300_fw.bin"
3718#define FW_FILE_ISP2322 "ql2322_fw.bin"
3719#define FW_FILE_ISP24XX "ql2400_fw.bin"
3720#define FW_FILE_ISP25XX "ql2500_fw.bin"
3721#define FW_FILE_ISP81XX "ql8100_fw.bin"
3722#define FW_FILE_ISP82XX "ql8200_fw.bin"
3723
3724static DEFINE_MUTEX(qla_fw_lock);
3725
3726static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
3727 { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
3728 { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
3729 { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
3730 { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
3731 { .name = FW_FILE_ISP24XX, },
3732 { .name = FW_FILE_ISP25XX, },
3733 { .name = FW_FILE_ISP81XX, },
3734 { .name = FW_FILE_ISP82XX, },
3735};
3736
3737struct fw_blob *
3738qla2x00_request_firmware(scsi_qla_host_t *vha)
3739{
3740 struct qla_hw_data *ha = vha->hw;
3741 struct fw_blob *blob;
3742
3743 blob = NULL;
3744 if (IS_QLA2100(ha)) {
3745 blob = &qla_fw_blobs[FW_ISP21XX];
3746 } else if (IS_QLA2200(ha)) {
3747 blob = &qla_fw_blobs[FW_ISP22XX];
3748 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3749 blob = &qla_fw_blobs[FW_ISP2300];
3750 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
3751 blob = &qla_fw_blobs[FW_ISP2322];
3752 } else if (IS_QLA24XX_TYPE(ha)) {
3753 blob = &qla_fw_blobs[FW_ISP24XX];
3754 } else if (IS_QLA25XX(ha)) {
3755 blob = &qla_fw_blobs[FW_ISP25XX];
3756 } else if (IS_QLA81XX(ha)) {
3757 blob = &qla_fw_blobs[FW_ISP81XX];
3758 } else if (IS_QLA82XX(ha)) {
3759 blob = &qla_fw_blobs[FW_ISP82XX];
3760 }
3761
3762 mutex_lock(&qla_fw_lock);
3763 if (blob->fw)
3764 goto out;
3765
3766 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
3767 DEBUG2(printk("scsi(%ld): Failed to load firmware image "
3768 "(%s).\n", vha->host_no, blob->name));
3769 blob->fw = NULL;
3770 blob = NULL;
3771 goto out;
3772 }
3773
3774out:
3775 mutex_unlock(&qla_fw_lock);
3776 return blob;
3777}
3778
3779static void
3780qla2x00_release_firmware(void)
3781{
3782 int idx;
3783
3784 mutex_lock(&qla_fw_lock);
3785 for (idx = 0; idx < FW_BLOBS; idx++)
3786 if (qla_fw_blobs[idx].fw)
3787 release_firmware(qla_fw_blobs[idx].fw);
3788 mutex_unlock(&qla_fw_lock);
3789}
3790
3791static pci_ers_result_t
3792qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
3793{
3794 scsi_qla_host_t *vha = pci_get_drvdata(pdev);
3795 struct qla_hw_data *ha = vha->hw;
3796
3797 DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
3798 state));
3799
3800 switch (state) {
3801 case pci_channel_io_normal:
3802 ha->flags.eeh_busy = 0;
3803 return PCI_ERS_RESULT_CAN_RECOVER;
3804 case pci_channel_io_frozen:
3805 ha->flags.eeh_busy = 1;
3806
3807 if (IS_QLA82XX(ha)) {
3808 ha->flags.fw_hung = 1;
3809 if (ha->flags.mbox_busy) {
3810 ha->flags.mbox_int = 1;
3811 DEBUG2(qla_printk(KERN_ERR, ha,
3812 "Due to pci channel io frozen, doing premature "
3813 "completion of mbx command\n"));
3814 complete(&ha->mbx_intr_comp);
3815 }
3816 }
3817 qla2x00_free_irqs(vha);
3818 pci_disable_device(pdev);
3819
3820 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
3821 return PCI_ERS_RESULT_NEED_RESET;
3822 case pci_channel_io_perm_failure:
3823 ha->flags.pci_channel_io_perm_failure = 1;
3824 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3825 return PCI_ERS_RESULT_DISCONNECT;
3826 }
3827 return PCI_ERS_RESULT_NEED_RESET;
3828}
3829
3830static pci_ers_result_t
3831qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
3832{
3833 int risc_paused = 0;
3834 uint32_t stat;
3835 unsigned long flags;
3836 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3837 struct qla_hw_data *ha = base_vha->hw;
3838 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3839 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
3840
3841 if (IS_QLA82XX(ha))
3842 return PCI_ERS_RESULT_RECOVERED;
3843
3844 spin_lock_irqsave(&ha->hardware_lock, flags);
3845 if (IS_QLA2100(ha) || IS_QLA2200(ha)){
3846 stat = RD_REG_DWORD(®->hccr);
3847 if (stat & HCCR_RISC_PAUSE)
3848 risc_paused = 1;
3849 } else if (IS_QLA23XX(ha)) {
3850 stat = RD_REG_DWORD(®->u.isp2300.host_status);
3851 if (stat & HSR_RISC_PAUSED)
3852 risc_paused = 1;
3853 } else if (IS_FWI2_CAPABLE(ha)) {
3854 stat = RD_REG_DWORD(®24->host_status);
3855 if (stat & HSRX_RISC_PAUSED)
3856 risc_paused = 1;
3857 }
3858 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3859
3860 if (risc_paused) {
3861 qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
3862 "Dumping firmware!\n");
3863 ha->isp_ops->fw_dump(base_vha, 0);
3864
3865 return PCI_ERS_RESULT_NEED_RESET;
3866 } else
3867 return PCI_ERS_RESULT_RECOVERED;
3868}
3869
3870uint32_t qla82xx_error_recovery(scsi_qla_host_t *base_vha)
3871{
3872 uint32_t rval = QLA_FUNCTION_FAILED;
3873 uint32_t drv_active = 0;
3874 struct qla_hw_data *ha = base_vha->hw;
3875 int fn;
3876 struct pci_dev *other_pdev = NULL;
3877
3878 DEBUG17(qla_printk(KERN_INFO, ha,
3879 "scsi(%ld): In qla82xx_error_recovery\n", base_vha->host_no));
3880
3881 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3882
3883 if (base_vha->flags.online) {
3884
3885
3886 qla2x00_abort_isp_cleanup(base_vha);
3887 }
3888
3889
3890 fn = PCI_FUNC(ha->pdev->devfn);
3891 while (fn > 0) {
3892 fn--;
3893 DEBUG17(qla_printk(KERN_INFO, ha,
3894 "Finding pci device at function = 0x%x\n", fn));
3895 other_pdev =
3896 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
3897 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
3898 fn));
3899
3900 if (!other_pdev)
3901 continue;
3902 if (atomic_read(&other_pdev->enable_cnt)) {
3903 DEBUG17(qla_printk(KERN_INFO, ha,
3904 "Found PCI func availabe and enabled at 0x%x\n",
3905 fn));
3906 pci_dev_put(other_pdev);
3907 break;
3908 }
3909 pci_dev_put(other_pdev);
3910 }
3911
3912 if (!fn) {
3913
3914 DEBUG17(qla_printk(KERN_INFO, ha,
3915 "This devfn is reset owner = 0x%x\n", ha->pdev->devfn));
3916 qla82xx_idc_lock(ha);
3917
3918 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3919 QLA82XX_DEV_INITIALIZING);
3920
3921 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
3922 QLA82XX_IDC_VERSION);
3923
3924 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
3925 DEBUG17(qla_printk(KERN_INFO, ha,
3926 "drv_active = 0x%x\n", drv_active));
3927
3928 qla82xx_idc_unlock(ha);
3929
3930
3931
3932 if (drv_active)
3933 rval = qla82xx_start_firmware(base_vha);
3934 else
3935 rval = QLA_SUCCESS;
3936 qla82xx_idc_lock(ha);
3937
3938 if (rval != QLA_SUCCESS) {
3939 qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
3940 qla82xx_clear_drv_active(ha);
3941 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3942 QLA82XX_DEV_FAILED);
3943 } else {
3944 qla_printk(KERN_INFO, ha, "HW State: READY\n");
3945 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3946 QLA82XX_DEV_READY);
3947 qla82xx_idc_unlock(ha);
3948 ha->flags.fw_hung = 0;
3949 rval = qla82xx_restart_isp(base_vha);
3950 qla82xx_idc_lock(ha);
3951
3952 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
3953 qla82xx_set_drv_active(base_vha);
3954 }
3955 qla82xx_idc_unlock(ha);
3956 } else {
3957 DEBUG17(qla_printk(KERN_INFO, ha,
3958 "This devfn is not reset owner = 0x%x\n", ha->pdev->devfn));
3959 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
3960 QLA82XX_DEV_READY)) {
3961 ha->flags.fw_hung = 0;
3962 rval = qla82xx_restart_isp(base_vha);
3963 qla82xx_idc_lock(ha);
3964 qla82xx_set_drv_active(base_vha);
3965 qla82xx_idc_unlock(ha);
3966 }
3967 }
3968 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
3969
3970 return rval;
3971}
3972
3973static pci_ers_result_t
3974qla2xxx_pci_slot_reset(struct pci_dev *pdev)
3975{
3976 pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
3977 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
3978 struct qla_hw_data *ha = base_vha->hw;
3979 struct rsp_que *rsp;
3980 int rc, retries = 10;
3981
3982 DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
3983
3984
3985
3986
3987
3988 pdev->error_state = pci_channel_io_normal;
3989
3990 pci_restore_state(pdev);
3991
3992
3993
3994
3995 pci_save_state(pdev);
3996
3997 if (ha->mem_only)
3998 rc = pci_enable_device_mem(pdev);
3999 else
4000 rc = pci_enable_device(pdev);
4001
4002 if (rc) {
4003 qla_printk(KERN_WARNING, ha,
4004 "Can't re-enable PCI device after reset.\n");
4005 goto exit_slot_reset;
4006 }
4007
4008 rsp = ha->rsp_q_map[0];
4009 if (qla2x00_request_irqs(ha, rsp))
4010 goto exit_slot_reset;
4011
4012 if (ha->isp_ops->pci_config(base_vha))
4013 goto exit_slot_reset;
4014
4015 if (IS_QLA82XX(ha)) {
4016 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
4017 ret = PCI_ERS_RESULT_RECOVERED;
4018 goto exit_slot_reset;
4019 } else
4020 goto exit_slot_reset;
4021 }
4022
4023 while (ha->flags.mbox_busy && retries--)
4024 msleep(1000);
4025
4026 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4027 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
4028 ret = PCI_ERS_RESULT_RECOVERED;
4029 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
4030
4031
4032exit_slot_reset:
4033 DEBUG17(qla_printk(KERN_WARNING, ha,
4034 "slot_reset-return:ret=%x\n", ret));
4035
4036 return ret;
4037}
4038
4039static void
4040qla2xxx_pci_resume(struct pci_dev *pdev)
4041{
4042 scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
4043 struct qla_hw_data *ha = base_vha->hw;
4044 int ret;
4045
4046 DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
4047
4048 ret = qla2x00_wait_for_hba_online(base_vha);
4049 if (ret != QLA_SUCCESS) {
4050 qla_printk(KERN_ERR, ha,
4051 "the device failed to resume I/O "
4052 "from slot/link_reset");
4053 }
4054
4055 pci_cleanup_aer_uncorrect_error_status(pdev);
4056
4057 ha->flags.eeh_busy = 0;
4058}
4059
4060static struct pci_error_handlers qla2xxx_err_handler = {
4061 .error_detected = qla2xxx_pci_error_detected,
4062 .mmio_enabled = qla2xxx_pci_mmio_enabled,
4063 .slot_reset = qla2xxx_pci_slot_reset,
4064 .resume = qla2xxx_pci_resume,
4065};
4066
4067static struct pci_device_id qla2xxx_pci_tbl[] = {
4068 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
4069 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
4070 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
4071 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
4072 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
4073 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
4074 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
4075 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
4076 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
4077 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
4078 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
4079 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
4080 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
4081 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
4082 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
4083 { 0 },
4084};
4085MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
4086
4087static struct pci_driver qla2xxx_pci_driver = {
4088 .name = QLA2XXX_DRIVER_NAME,
4089 .driver = {
4090 .owner = THIS_MODULE,
4091 },
4092 .id_table = qla2xxx_pci_tbl,
4093 .probe = qla2x00_probe_one,
4094 .remove = qla2x00_remove_one,
4095 .shutdown = qla2x00_shutdown,
4096 .err_handler = &qla2xxx_err_handler,
4097};
4098
4099static struct file_operations apidev_fops = {
4100 .owner = THIS_MODULE,
4101 .llseek = noop_llseek,
4102};
4103
4104
4105
4106
4107static int __init
4108qla2x00_module_init(void)
4109{
4110 int ret = 0;
4111
4112
4113 srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
4114 SLAB_HWCACHE_ALIGN, NULL);
4115 if (srb_cachep == NULL) {
4116 printk(KERN_ERR
4117 "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
4118 return -ENOMEM;
4119 }
4120
4121
4122 strcpy(qla2x00_version_str, QLA2XXX_VERSION);
4123 if (ql2xextended_error_logging)
4124 strcat(qla2x00_version_str, "-debug");
4125
4126 qla2xxx_transport_template =
4127 fc_attach_transport(&qla2xxx_transport_functions);
4128 if (!qla2xxx_transport_template) {
4129 kmem_cache_destroy(srb_cachep);
4130 return -ENODEV;
4131 }
4132
4133 apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
4134 if (apidev_major < 0) {
4135 printk(KERN_WARNING "qla2xxx: Unable to register char device "
4136 "%s\n", QLA2XXX_APIDEV);
4137 }
4138
4139 qla2xxx_transport_vport_template =
4140 fc_attach_transport(&qla2xxx_transport_vport_functions);
4141 if (!qla2xxx_transport_vport_template) {
4142 kmem_cache_destroy(srb_cachep);
4143 fc_release_transport(qla2xxx_transport_template);
4144 return -ENODEV;
4145 }
4146
4147 printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
4148 qla2x00_version_str);
4149 ret = pci_register_driver(&qla2xxx_pci_driver);
4150 if (ret) {
4151 kmem_cache_destroy(srb_cachep);
4152 fc_release_transport(qla2xxx_transport_template);
4153 fc_release_transport(qla2xxx_transport_vport_template);
4154 }
4155 return ret;
4156}
4157
4158
4159
4160
4161static void __exit
4162qla2x00_module_exit(void)
4163{
4164 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
4165 pci_unregister_driver(&qla2xxx_pci_driver);
4166 qla2x00_release_firmware();
4167 kmem_cache_destroy(srb_cachep);
4168 if (ctx_cachep)
4169 kmem_cache_destroy(ctx_cachep);
4170 fc_release_transport(qla2xxx_transport_template);
4171 fc_release_transport(qla2xxx_transport_vport_template);
4172}
4173
4174module_init(qla2x00_module_init);
4175module_exit(qla2x00_module_exit);
4176
4177MODULE_AUTHOR("QLogic Corporation");
4178MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
4179MODULE_LICENSE("GPL");
4180MODULE_VERSION(QLA2XXX_VERSION);
4181MODULE_FIRMWARE(FW_FILE_ISP21XX);
4182MODULE_FIRMWARE(FW_FILE_ISP22XX);
4183MODULE_FIRMWARE(FW_FILE_ISP2300);
4184MODULE_FIRMWARE(FW_FILE_ISP2322);
4185MODULE_FIRMWARE(FW_FILE_ISP24XX);
4186MODULE_FIRMWARE(FW_FILE_ISP25XX);
4187
