1/* 2 * Copyright (c) 2010 Broadcom Corporation 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#define NPHY_TBL_ID_GAIN1 0 18#define NPHY_TBL_ID_GAIN2 1 19#define NPHY_TBL_ID_GAINBITS1 2 20#define NPHY_TBL_ID_GAINBITS2 3 21#define NPHY_TBL_ID_GAINLIMIT 4 22#define NPHY_TBL_ID_WRSSIGainLimit 5 23#define NPHY_TBL_ID_RFSEQ 7 24#define NPHY_TBL_ID_AFECTRL 8 25#define NPHY_TBL_ID_ANTSWCTRLLUT 9 26#define NPHY_TBL_ID_IQLOCAL 15 27#define NPHY_TBL_ID_NOISEVAR 16 28#define NPHY_TBL_ID_SAMPLEPLAY 17 29#define NPHY_TBL_ID_CORE1TXPWRCTL 26 30#define NPHY_TBL_ID_CORE2TXPWRCTL 27 31#define NPHY_TBL_ID_CMPMETRICDATAWEIGHTTBL 30 32 33#define NPHY_TBL_ID_EPSILONTBL0 31 34#define NPHY_TBL_ID_SCALARTBL0 32 35#define NPHY_TBL_ID_EPSILONTBL1 33 36#define NPHY_TBL_ID_SCALARTBL1 34 37 38#define NPHY_TO_BPHY_OFF 0xc00 39 40#define NPHY_BandControl_currentBand 0x0001 41#define RFCC_CHIP0_PU 0x0400 42#define RFCC_POR_FORCE 0x0040 43#define RFCC_OE_POR_FORCE 0x0080 44#define NPHY_RfctrlIntc_override_OFF 0 45#define NPHY_RfctrlIntc_override_TRSW 1 46#define NPHY_RfctrlIntc_override_PA 2 47#define NPHY_RfctrlIntc_override_EXT_LNA_PU 3 48#define NPHY_RfctrlIntc_override_EXT_LNA_GAIN 4 49#define RIFS_ENABLE 0x80 50#define BPHY_BAND_SEL_UP20 0x10 51#define NPHY_MLenable 0x02 52 53#define NPHY_RfseqMode_CoreActv_override 0x0001 54#define NPHY_RfseqMode_Trigger_override 0x0002 55#define NPHY_RfseqCoreActv_TxRxChain0 (0x11) 56#define NPHY_RfseqCoreActv_TxRxChain1 (0x22) 57 58#define NPHY_RfseqTrigger_rx2tx 0x0001 59#define NPHY_RfseqTrigger_tx2rx 0x0002 60#define NPHY_RfseqTrigger_updategainh 0x0004 61#define NPHY_RfseqTrigger_updategainl 0x0008 62#define NPHY_RfseqTrigger_updategainu 0x0010 63#define NPHY_RfseqTrigger_reset2rx 0x0020 64#define NPHY_RfseqStatus_rx2tx 0x0001 65#define NPHY_RfseqStatus_tx2rx 0x0002 66#define NPHY_RfseqStatus_updategainh 0x0004 67#define NPHY_RfseqStatus_updategainl 0x0008 68#define NPHY_RfseqStatus_updategainu 0x0010 69#define NPHY_RfseqStatus_reset2rx 0x0020 70#define NPHY_ClassifierCtrl_cck_en 0x1 71#define NPHY_ClassifierCtrl_ofdm_en 0x2 72#define NPHY_ClassifierCtrl_waited_en 0x4 73#define NPHY_IQFlip_ADC1 0x0001 74#define NPHY_IQFlip_ADC2 0x0010 75#define NPHY_sampleCmd_STOP 0x0002 76 77#define RX_GF_OR_MM 0x0004 78#define RX_GF_MM_AUTO 0x0100 79 80#define NPHY_iqloCalCmdGctl_IQLO_CAL_EN 0x8000 81 82#define NPHY_IqestCmd_iqstart 0x1 83#define NPHY_IqestCmd_iqMode 0x2 84 85#define NPHY_TxPwrCtrlCmd_pwrIndex_init 0x40 86#define NPHY_TxPwrCtrlCmd_pwrIndex_init_rev7 0x19 87 88#define PRIM_SEL_UP20 0x8000 89 90#define NPHY_RFSEQ_RX2TX 0x0 91#define NPHY_RFSEQ_TX2RX 0x1 92#define NPHY_RFSEQ_RESET2RX 0x2 93#define NPHY_RFSEQ_UPDATEGAINH 0x3 94#define NPHY_RFSEQ_UPDATEGAINL 0x4 95#define NPHY_RFSEQ_UPDATEGAINU 0x5 96 97#define NPHY_RFSEQ_CMD_NOP 0x0 98#define NPHY_RFSEQ_CMD_RXG_FBW 0x1 99#define NPHY_RFSEQ_CMD_TR_SWITCH 0x2 100#define NPHY_RFSEQ_CMD_EXT_PA 0x3 101#define NPHY_RFSEQ_CMD_RXPD_TXPD 0x4 102#define NPHY_RFSEQ_CMD_TX_GAIN 0x5 103#define NPHY_RFSEQ_CMD_RX_GAIN 0x6 104#define NPHY_RFSEQ_CMD_SET_HPF_BW 0x7 105#define NPHY_RFSEQ_CMD_CLR_HIQ_DIS 0x8 106#define NPHY_RFSEQ_CMD_END 0xf 107 108#define NPHY_REV3_RFSEQ_CMD_NOP 0x0 109#define NPHY_REV3_RFSEQ_CMD_RXG_FBW 0x1 110#define NPHY_REV3_RFSEQ_CMD_TR_SWITCH 0x2 111#define NPHY_REV3_RFSEQ_CMD_INT_PA_PU 0x3 112#define NPHY_REV3_RFSEQ_CMD_EXT_PA 0x4 113#define NPHY_REV3_RFSEQ_CMD_RXPD_TXPD 0x5 114#define NPHY_REV3_RFSEQ_CMD_TX_GAIN 0x6 115#define NPHY_REV3_RFSEQ_CMD_RX_GAIN 0x7 116#define NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS 0x8 117#define NPHY_REV3_RFSEQ_CMD_SET_HPF_H_HPC 0x9 118#define NPHY_REV3_RFSEQ_CMD_SET_LPF_H_HPC 0xa 119#define NPHY_REV3_RFSEQ_CMD_SET_HPF_M_HPC 0xb 120#define NPHY_REV3_RFSEQ_CMD_SET_LPF_M_HPC 0xc 121#define NPHY_REV3_RFSEQ_CMD_SET_HPF_L_HPC 0xd 122#define NPHY_REV3_RFSEQ_CMD_SET_LPF_L_HPC 0xe 123#define NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS 0xf 124#define NPHY_REV3_RFSEQ_CMD_END 0x1f 125 126#define NPHY_RSSI_SEL_W1 0x0 127#define NPHY_RSSI_SEL_W2 0x1 128#define NPHY_RSSI_SEL_NB 0x2 129#define NPHY_RSSI_SEL_IQ 0x3 130#define NPHY_RSSI_SEL_TSSI_2G 0x4 131#define NPHY_RSSI_SEL_TSSI_5G 0x5 132#define NPHY_RSSI_SEL_TBD 0x6 133 134#define NPHY_RAIL_I 0x0 135#define NPHY_RAIL_Q 0x1 136 137#define NPHY_FORCESIG_DECODEGATEDCLKS 0x8 138 139#define NPHY_REV7_RfctrlOverride_cmd_rxrf_pu 0x0 140#define NPHY_REV7_RfctrlOverride_cmd_rx_pu 0x1 141#define NPHY_REV7_RfctrlOverride_cmd_tx_pu 0x2 142#define NPHY_REV7_RfctrlOverride_cmd_rxgain 0x3 143#define NPHY_REV7_RfctrlOverride_cmd_txgain 0x4 144 145#define NPHY_REV7_RXGAINCODE_RFMXGAIN_MASK 0x000ff 146#define NPHY_REV7_RXGAINCODE_LPFGAIN_MASK 0x0ff00 147#define NPHY_REV7_RXGAINCODE_DVGAGAIN_MASK 0xf0000 148 149#define NPHY_REV7_TXGAINCODE_TGAIN_MASK 0x7fff 150#define NPHY_REV7_TXGAINCODE_LPFGAIN_MASK 0x8000 151#define NPHY_REV7_TXGAINCODE_BIQ0GAIN_SHIFT 14 152 153#define NPHY_REV7_RFCTRLOVERRIDE_ID0 0x0 154#define NPHY_REV7_RFCTRLOVERRIDE_ID1 0x1 155#define NPHY_REV7_RFCTRLOVERRIDE_ID2 0x2 156 157#define NPHY_IqestIqAccLo(core) ((core == 0) ? 0x12c : 0x134) 158 159#define NPHY_IqestIqAccHi(core) ((core == 0) ? 0x12d : 0x135) 160 161#define NPHY_IqestipwrAccLo(core) ((core == 0) ? 0x12e : 0x136) 162 163#define NPHY_IqestipwrAccHi(core) ((core == 0) ? 0x12f : 0x137) 164 165#define NPHY_IqestqpwrAccLo(core) ((core == 0) ? 0x130 : 0x138) 166 167#define NPHY_IqestqpwrAccHi(core) ((core == 0) ? 0x131 : 0x139) 168