1/* 2 * sca3000.c -- support VTI sca3000 series accelerometers 3 * via SPI 4 * 5 * Copyright (c) 2007 Jonathan Cameron <jic23@cam.ac.uk> 6 * 7 * Partly based upon tle62x0.c 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * Initial mode is direct measurement. 14 * 15 * Untested things 16 * 17 * Temperature reading (the e05 I'm testing with doesn't have a sensor) 18 * 19 * Free fall detection mode - supported but untested as I'm not droping my 20 * dubious wire rig far enough to test it. 21 * 22 * Unsupported as yet 23 * 24 * Time stamping of data from ring. Various ideas on how to do this but none 25 * are remotely simple. Suggestions welcome. 26 * 27 * Individual enabling disabling of channels going into ring buffer 28 * 29 * Overflow handling (this is signaled for all but 8 bit ring buffer mode.) 30 * 31 * Motion detector using AND combinations of signals. 32 * 33 * Note: Be very careful about not touching an register bytes marked 34 * as reserved on the data sheet. They really mean it as changing convents of 35 * some will cause the device to lock up. 36 * 37 * Known issues - on rare occasions the interrupts lock up. Not sure why as yet. 38 * Can probably alleviate this by reading the interrupt register on start, but 39 * that is really just brushing the problem under the carpet. 40 */ 41#define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02) 42#define SCA3000_READ_REG(a) ((a) << 2) 43 44#define SCA3000_REG_ADDR_REVID 0x00 45#define SCA3000_REVID_MAJOR_MASK 0xf0 46#define SCA3000_REVID_MINOR_MASK 0x0f 47 48#define SCA3000_REG_ADDR_STATUS 0x02 49#define SCA3000_LOCKED 0x20 50#define SCA3000_EEPROM_CS_ERROR 0x02 51#define SCA3000_SPI_FRAME_ERROR 0x01 52 53/* All reads done using register decrement so no need to directly access LSBs */ 54#define SCA3000_REG_ADDR_X_MSB 0x05 55#define SCA3000_REG_ADDR_Y_MSB 0x07 56#define SCA3000_REG_ADDR_Z_MSB 0x09 57 58#define SCA3000_REG_ADDR_RING_OUT 0x0f 59 60/* Temp read untested - the e05 doesn't have the sensor */ 61#define SCA3000_REG_ADDR_TEMP_MSB 0x13 62 63#define SCA3000_REG_ADDR_MODE 0x14 64#define SCA3000_MODE_PROT_MASK 0x28 65 66#define SCA3000_RING_BUF_ENABLE 0x80 67#define SCA3000_RING_BUF_8BIT 0x40 68/* Free fall detection triggers an interrupt if the acceleration 69 * is below a threshold for equivalent of 25cm drop 70 */ 71#define SCA3000_FREE_FALL_DETECT 0x10 72#define SCA3000_MEAS_MODE_NORMAL 0x00 73#define SCA3000_MEAS_MODE_OP_1 0x01 74#define SCA3000_MEAS_MODE_OP_2 0x02 75 76/* In motion detection mode the accelerations are band pass filtered 77 * (aprox 1 - 25Hz) and then a programmable threshold used to trigger 78 * and interrupt. 79 */ 80#define SCA3000_MEAS_MODE_MOT_DET 0x03 81 82#define SCA3000_REG_ADDR_BUF_COUNT 0x15 83 84#define SCA3000_REG_ADDR_INT_STATUS 0x16 85 86#define SCA3000_INT_STATUS_THREE_QUARTERS 0x80 87#define SCA3000_INT_STATUS_HALF 0x40 88 89#define SCA3000_INT_STATUS_FREE_FALL 0x08 90#define SCA3000_INT_STATUS_Y_TRIGGER 0x04 91#define SCA3000_INT_STATUS_X_TRIGGER 0x02 92#define SCA3000_INT_STATUS_Z_TRIGGER 0x01 93 94/* Used to allow access to multiplexed registers */ 95#define SCA3000_REG_ADDR_CTRL_SEL 0x18 96/* Only available for SCA3000-D03 and SCA3000-D01 */ 97#define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01 98#define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02 99#define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03 100#define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04 101#define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05 102/* BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device 103 will not function */ 104#define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B 105#define SCA3000_OUT_CTRL_PROT_MASK 0xE0 106#define SCA3000_OUT_CTRL_BUF_X_EN 0x10 107#define SCA3000_OUT_CTRL_BUF_Y_EN 0x08 108#define SCA3000_OUT_CTRL_BUF_Z_EN 0x04 109#define SCA3000_OUT_CTRL_BUF_DIV_4 0x02 110#define SCA3000_OUT_CTRL_BUF_DIV_2 0x01 111 112/* Control which motion detector interrupts are on. 113 * For now only OR combinations are supported.x 114 */ 115#define SCA3000_MD_CTRL_PROT_MASK 0xC0 116#define SCA3000_MD_CTRL_OR_Y 0x01 117#define SCA3000_MD_CTRL_OR_X 0x02 118#define SCA3000_MD_CTRL_OR_Z 0x04 119/* Currently unsupported */ 120#define SCA3000_MD_CTRL_AND_Y 0x08 121#define SCA3000_MD_CTRL_AND_X 0x10 122#define SAC3000_MD_CTRL_AND_Z 0x20 123 124/* Some control registers of complex access methods requiring this register to 125 * be used to remove a lock. 126 */ 127#define SCA3000_REG_ADDR_UNLOCK 0x1e 128 129#define SCA3000_REG_ADDR_INT_MASK 0x21 130#define SCA3000_INT_MASK_PROT_MASK 0x1C 131 132#define SCA3000_INT_MASK_RING_THREE_QUARTER 0x80 133#define SCA3000_INT_MASK_RING_HALF 0x40 134 135#define SCA3000_INT_MASK_ALL_INTS 0x02 136#define SCA3000_INT_MASK_ACTIVE_HIGH 0x01 137#define SCA3000_INT_MASK_ACTIVE_LOW 0x00 138 139/* Values of mulipexed registers (write to ctrl_data after select) */ 140#define SCA3000_REG_ADDR_CTRL_DATA 0x22 141 142/* Measurement modes available on some sca3000 series chips. Code assumes others 143 * may become available in the future. 144 * 145 * Bypass - Bypass the low-pass filter in the signal channel so as to increase 146 * signal bandwidth. 147 * 148 * Narrow - Narrow low-pass filtering of the signal channel and half output 149 * data rate by decimation. 150 * 151 * Wide - Widen low-pass filtering of signal channel to increase bandwidth 152 */ 153#define SCA3000_OP_MODE_BYPASS 0x01 154#define SCA3000_OP_MODE_NARROW 0x02 155#define SCA3000_OP_MODE_WIDE 0x04 156#define SCA3000_MAX_TX 6 157#define SCA3000_MAX_RX 2 158 159/** 160 * struct sca3000_state - device instance state information 161 * @us: the associated spi device 162 * @info: chip variant information 163 * @indio_dev: device information used by the IIO core 164 * @interrupt_handler_ws: event interrupt handler for all events 165 * @last_timestamp: the timestamp of the last event 166 * @mo_det_use_count: reference counter for the motion detection unit 167 * @lock: lock used to protect elements of sca3000_state 168 * and the underlying device state. 169 * @bpse: number of bits per scan element 170 * @tx: dma-able transmit buffer 171 * @rx: dma-able receive buffer 172 **/ 173struct sca3000_state { 174 struct spi_device *us; 175 const struct sca3000_chip_info *info; 176 struct iio_dev *indio_dev; 177 struct work_struct interrupt_handler_ws; 178 s64 last_timestamp; 179 int mo_det_use_count; 180 struct mutex lock; 181 int bpse; 182 u8 *tx; 183 /* not used during a ring buffer read */ 184 u8 *rx; 185}; 186 187/** 188 * struct sca3000_chip_info - model dependant parameters 189 * @name: model identification 190 * @scale: string containing floating point scale factor 191 * @temp_output: some devices have temperature sensors. 192 * @measurement_mode_freq: normal mode sampling frequency 193 * @option_mode_1: first optional mode. Not all models have one 194 * @option_mode_1_freq: option mode 1 sampling frequency 195 * @option_mode_2: second optional mode. Not all chips have one 196 * @option_mode_2_freq: option mode 2 sampling frequency 197 * 198 * This structure is used to hold information about the functionality of a given 199 * sca3000 variant. 200 **/ 201struct sca3000_chip_info { 202 const char *name; 203 const char *scale; 204 bool temp_output; 205 int measurement_mode_freq; 206 int option_mode_1; 207 int option_mode_1_freq; 208 int option_mode_2; 209 int option_mode_2_freq; 210}; 211 212/** 213 * sca3000_read_data() read a series of values from the device 214 * @dev: device 215 * @reg_address_high: start address (decremented read) 216 * @rx: pointer where recieved data is placed. Callee 217 * responsible for freeing this. 218 * @len: number of bytes to read 219 * 220 * The main lock must be held. 221 **/ 222int sca3000_read_data(struct sca3000_state *st, 223 u8 reg_address_high, 224 u8 **rx_p, 225 int len); 226 227/** 228 * sca3000_write_reg() write a single register 229 * @address: address of register on chip 230 * @val: value to be written to register 231 * 232 * The main lock must be held. 233 **/ 234int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val); 235 236/* Conversion function for use with the ring buffer when in 11bit mode */ 237static inline int sca3000_11bit_convert(uint8_t msb, uint8_t lsb) 238{ 239 int16_t val; 240 241 val = ((lsb >> 3) & 0x1C) | (msb << 5); 242 val |= (val & (1 << 12)) ? 0xE000 : 0; 243 244 return val; 245} 246 247static inline int sca3000_13bit_convert(uint8_t msb, uint8_t lsb) 248{ 249 s16 val; 250 251 val = ((lsb >> 3) & 0x1F) | (msb << 5); 252 /* sign fill */ 253 val |= (val & (1 << 12)) ? 0xE000 : 0; 254 255 return val; 256} 257 258 259#ifdef CONFIG_IIO_RING_BUFFER 260/** 261 * sca3000_register_ring_funcs() setup the ring state change functions 262 **/ 263void sca3000_register_ring_funcs(struct iio_dev *indio_dev); 264 265/** 266 * sca3000_configure_ring() - allocate and configure ring buffer 267 * @indio_dev: iio-core device whose ring is to be configured 268 * 269 * The hardware ring buffer needs far fewer ring buffer functions than 270 * a software one as a lot of things are handled automatically. 271 * This function also tells the iio core that our device supports a 272 * hardware ring buffer mode. 273 **/ 274int sca3000_configure_ring(struct iio_dev *indio_dev); 275 276/** 277 * sca3000_unconfigure_ring() - deallocate the ring buffer 278 * @indio_dev: iio-core device whose ring we are freeing 279 **/ 280void sca3000_unconfigure_ring(struct iio_dev *indio_dev); 281 282/** 283 * sca3000_ring_int_process() handles ring related event pushing and escalation 284 * @val: the event code 285 **/ 286void sca3000_ring_int_process(u8 val, struct iio_ring_buffer *ring); 287 288#else 289static inline void sca3000_register_ring_funcs(struct iio_dev *indio_dev) 290{ 291} 292 293static inline 294int sca3000_register_ring_access_and_init(struct iio_dev *indio_dev) 295{ 296 return 0; 297} 298 299static inline void sca3000_ring_int_process(u8 val, void *ring) 300{ 301} 302 303#endif 304 305