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9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/gpio.h>
12#include <linux/delay.h>
13#include <linux/mutex.h>
14#include <linux/device.h>
15#include <linux/kernel.h>
16#include <linux/spi/spi.h>
17#include <linux/slab.h>
18#include <linux/sysfs.h>
19#include <linux/list.h>
20
21#include "../iio.h"
22#include "../sysfs.h"
23#include "meter.h"
24#include "ade7754.h"
25
26static int ade7754_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29{
30 int ret;
31 struct iio_dev *indio_dev = dev_get_drvdata(dev);
32 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7754_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42}
43
44static int ade7754_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47{
48 int ret;
49 struct spi_message msg;
50 struct iio_dev *indio_dev = dev_get_drvdata(dev);
51 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
52 struct spi_transfer xfers[] = {
53 {
54 .tx_buf = st->tx,
55 .bits_per_word = 8,
56 .len = 3,
57 }
58 };
59
60 mutex_lock(&st->buf_lock);
61 st->tx[0] = ADE7754_WRITE_REG(reg_address);
62 st->tx[1] = (value >> 8) & 0xFF;
63 st->tx[2] = value & 0xFF;
64
65 spi_message_init(&msg);
66 spi_message_add_tail(xfers, &msg);
67 ret = spi_sync(st->us, &msg);
68 mutex_unlock(&st->buf_lock);
69
70 return ret;
71}
72
73static int ade7754_spi_read_reg_8(struct device *dev,
74 u8 reg_address,
75 u8 *val)
76{
77 struct spi_message msg;
78 struct iio_dev *indio_dev = dev_get_drvdata(dev);
79 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
80 int ret;
81 struct spi_transfer xfers[] = {
82 {
83 .tx_buf = st->tx,
84 .rx_buf = st->rx,
85 .bits_per_word = 8,
86 .len = 2,
87 },
88 };
89
90 mutex_lock(&st->buf_lock);
91 st->tx[0] = ADE7754_READ_REG(reg_address);
92 st->tx[1] = 0;
93
94 spi_message_init(&msg);
95 spi_message_add_tail(xfers, &msg);
96 ret = spi_sync(st->us, &msg);
97 if (ret) {
98 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
99 reg_address);
100 goto error_ret;
101 }
102 *val = st->rx[1];
103
104error_ret:
105 mutex_unlock(&st->buf_lock);
106 return ret;
107}
108
109static int ade7754_spi_read_reg_16(struct device *dev,
110 u8 reg_address,
111 u16 *val)
112{
113 struct spi_message msg;
114 struct iio_dev *indio_dev = dev_get_drvdata(dev);
115 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
116 int ret;
117 struct spi_transfer xfers[] = {
118 {
119 .tx_buf = st->tx,
120 .rx_buf = st->rx,
121 .bits_per_word = 8,
122 .len = 3,
123 },
124 };
125
126 mutex_lock(&st->buf_lock);
127 st->tx[0] = ADE7754_READ_REG(reg_address);
128 st->tx[1] = 0;
129 st->tx[2] = 0;
130
131 spi_message_init(&msg);
132 spi_message_add_tail(xfers, &msg);
133 ret = spi_sync(st->us, &msg);
134 if (ret) {
135 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
136 reg_address);
137 goto error_ret;
138 }
139 *val = (st->rx[1] << 8) | st->rx[2];
140
141error_ret:
142 mutex_unlock(&st->buf_lock);
143 return ret;
144}
145
146static int ade7754_spi_read_reg_24(struct device *dev,
147 u8 reg_address,
148 u32 *val)
149{
150 struct spi_message msg;
151 struct iio_dev *indio_dev = dev_get_drvdata(dev);
152 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
153 int ret;
154 struct spi_transfer xfers[] = {
155 {
156 .tx_buf = st->tx,
157 .rx_buf = st->rx,
158 .bits_per_word = 8,
159 .len = 4,
160 },
161 };
162
163 mutex_lock(&st->buf_lock);
164 st->tx[0] = ADE7754_READ_REG(reg_address);
165 st->tx[1] = 0;
166 st->tx[2] = 0;
167 st->tx[3] = 0;
168
169 spi_message_init(&msg);
170 spi_message_add_tail(xfers, &msg);
171 ret = spi_sync(st->us, &msg);
172 if (ret) {
173 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
174 reg_address);
175 goto error_ret;
176 }
177 *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
178
179error_ret:
180 mutex_unlock(&st->buf_lock);
181 return ret;
182}
183
184static ssize_t ade7754_read_8bit(struct device *dev,
185 struct device_attribute *attr,
186 char *buf)
187{
188 int ret;
189 u8 val = 0;
190 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
191
192 ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
193 if (ret)
194 return ret;
195
196 return sprintf(buf, "%u\n", val);
197}
198
199static ssize_t ade7754_read_16bit(struct device *dev,
200 struct device_attribute *attr,
201 char *buf)
202{
203 int ret;
204 u16 val = 0;
205 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
206
207 ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
208 if (ret)
209 return ret;
210
211 return sprintf(buf, "%u\n", val);
212}
213
214static ssize_t ade7754_read_24bit(struct device *dev,
215 struct device_attribute *attr,
216 char *buf)
217{
218 int ret;
219 u32 val = 0;
220 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
221
222 ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
223 if (ret)
224 return ret;
225
226 return sprintf(buf, "%u\n", val & 0xFFFFFF);
227}
228
229static ssize_t ade7754_write_8bit(struct device *dev,
230 struct device_attribute *attr,
231 const char *buf,
232 size_t len)
233{
234 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
235 int ret;
236 long val;
237
238 ret = strict_strtol(buf, 10, &val);
239 if (ret)
240 goto error_ret;
241 ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
242
243error_ret:
244 return ret ? ret : len;
245}
246
247static ssize_t ade7754_write_16bit(struct device *dev,
248 struct device_attribute *attr,
249 const char *buf,
250 size_t len)
251{
252 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
253 int ret;
254 long val;
255
256 ret = strict_strtol(buf, 10, &val);
257 if (ret)
258 goto error_ret;
259 ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
260
261error_ret:
262 return ret ? ret : len;
263}
264
265static int ade7754_reset(struct device *dev)
266{
267 int ret;
268 u8 val;
269 ade7754_spi_read_reg_8(dev,
270 ADE7754_OPMODE,
271 &val);
272 val |= 1 << 6;
273 ret = ade7754_spi_write_reg_8(dev,
274 ADE7754_OPMODE,
275 val);
276
277 return ret;
278}
279
280
281static ssize_t ade7754_write_reset(struct device *dev,
282 struct device_attribute *attr,
283 const char *buf, size_t len)
284{
285 if (len < 1)
286 return -1;
287 switch (buf[0]) {
288 case '1':
289 case 'y':
290 case 'Y':
291 return ade7754_reset(dev);
292 }
293 return -1;
294}
295
296static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
297static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
298static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
299static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
300static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
301 ade7754_read_8bit,
302 ade7754_write_8bit,
303 ADE7754_VPEAK);
304static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
305 ade7754_read_8bit,
306 ade7754_write_8bit,
307 ADE7754_VPEAK);
308static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
309 ade7754_read_8bit,
310 ade7754_write_8bit,
311 ADE7754_APHCAL);
312static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
313 ade7754_read_8bit,
314 ade7754_write_8bit,
315 ADE7754_BPHCAL);
316static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
317 ade7754_read_8bit,
318 ade7754_write_8bit,
319 ADE7754_CPHCAL);
320static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
321 ade7754_read_16bit,
322 ade7754_write_16bit,
323 ADE7754_AAPOS);
324static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
325 ade7754_read_16bit,
326 ade7754_write_16bit,
327 ADE7754_BAPOS);
328static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
329 ade7754_read_16bit,
330 ade7754_write_16bit,
331 ADE7754_CAPOS);
332static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
333 ade7754_read_8bit,
334 ade7754_write_8bit,
335 ADE7754_WDIV);
336static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
337 ade7754_read_8bit,
338 ade7754_write_8bit,
339 ADE7754_VADIV);
340static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
341 ade7754_read_16bit,
342 ade7754_write_16bit,
343 ADE7754_CFNUM);
344static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
345 ade7754_read_16bit,
346 ade7754_write_16bit,
347 ADE7754_CFDEN);
348static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
349 ade7754_read_16bit,
350 ade7754_write_16bit,
351 ADE7754_AAPGAIN);
352static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
353 ade7754_read_16bit,
354 ade7754_write_16bit,
355 ADE7754_BAPGAIN);
356static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
357 ade7754_read_16bit,
358 ade7754_write_16bit,
359 ADE7754_CAPGAIN);
360static IIO_DEV_ATTR_AIRMS(S_IRUGO,
361 ade7754_read_24bit,
362 NULL,
363 ADE7754_AIRMS);
364static IIO_DEV_ATTR_BIRMS(S_IRUGO,
365 ade7754_read_24bit,
366 NULL,
367 ADE7754_BIRMS);
368static IIO_DEV_ATTR_CIRMS(S_IRUGO,
369 ade7754_read_24bit,
370 NULL,
371 ADE7754_CIRMS);
372static IIO_DEV_ATTR_AVRMS(S_IRUGO,
373 ade7754_read_24bit,
374 NULL,
375 ADE7754_AVRMS);
376static IIO_DEV_ATTR_BVRMS(S_IRUGO,
377 ade7754_read_24bit,
378 NULL,
379 ADE7754_BVRMS);
380static IIO_DEV_ATTR_CVRMS(S_IRUGO,
381 ade7754_read_24bit,
382 NULL,
383 ADE7754_CVRMS);
384static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
385 ade7754_read_16bit,
386 ade7754_write_16bit,
387 ADE7754_AIRMSOS);
388static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
389 ade7754_read_16bit,
390 ade7754_write_16bit,
391 ADE7754_BIRMSOS);
392static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
393 ade7754_read_16bit,
394 ade7754_write_16bit,
395 ADE7754_CIRMSOS);
396static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
397 ade7754_read_16bit,
398 ade7754_write_16bit,
399 ADE7754_AVRMSOS);
400static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
401 ade7754_read_16bit,
402 ade7754_write_16bit,
403 ADE7754_BVRMSOS);
404static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
405 ade7754_read_16bit,
406 ade7754_write_16bit,
407 ADE7754_CVRMSOS);
408
409static int ade7754_set_irq(struct device *dev, bool enable)
410{
411 int ret;
412 u16 irqen;
413 ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
414 if (ret)
415 goto error_ret;
416
417 if (enable)
418 irqen |= 1 << 14;
419
420 else
421 irqen &= ~(1 << 14);
422
423 ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
424 if (ret)
425 goto error_ret;
426
427error_ret:
428 return ret;
429}
430
431
432static int ade7754_stop_device(struct device *dev)
433{
434 int ret;
435 u8 val;
436 ade7754_spi_read_reg_8(dev,
437 ADE7754_OPMODE,
438 &val);
439 val |= 7 << 3;
440 ret = ade7754_spi_write_reg_8(dev,
441 ADE7754_OPMODE,
442 val);
443
444 return ret;
445}
446
447static int ade7754_initial_setup(struct ade7754_state *st)
448{
449 int ret;
450 struct device *dev = &st->indio_dev->dev;
451
452
453 st->us->mode = SPI_MODE_3;
454 spi_setup(st->us);
455
456
457 ret = ade7754_set_irq(dev, false);
458 if (ret) {
459 dev_err(dev, "disable irq failed");
460 goto err_ret;
461 }
462
463 ade7754_reset(dev);
464 msleep(ADE7754_STARTUP_DELAY);
465
466err_ret:
467 return ret;
468}
469
470static ssize_t ade7754_read_frequency(struct device *dev,
471 struct device_attribute *attr,
472 char *buf)
473{
474 int ret, len = 0;
475 u8 t;
476 int sps;
477 ret = ade7754_spi_read_reg_8(dev,
478 ADE7754_WAVMODE,
479 &t);
480 if (ret)
481 return ret;
482
483 t = (t >> 3) & 0x3;
484 sps = 26000 / (1 + t);
485
486 len = sprintf(buf, "%d SPS\n", sps);
487 return len;
488}
489
490static ssize_t ade7754_write_frequency(struct device *dev,
491 struct device_attribute *attr,
492 const char *buf,
493 size_t len)
494{
495 struct iio_dev *indio_dev = dev_get_drvdata(dev);
496 struct ade7754_state *st = iio_dev_get_devdata(indio_dev);
497 unsigned long val;
498 int ret;
499 u8 reg, t;
500
501 ret = strict_strtol(buf, 10, &val);
502 if (ret)
503 return ret;
504
505 mutex_lock(&indio_dev->mlock);
506
507 t = (26000 / val);
508 if (t > 0)
509 t--;
510
511 if (t > 1)
512 st->us->max_speed_hz = ADE7754_SPI_SLOW;
513 else
514 st->us->max_speed_hz = ADE7754_SPI_FAST;
515
516 ret = ade7754_spi_read_reg_8(dev,
517 ADE7754_WAVMODE,
518 ®);
519 if (ret)
520 goto out;
521
522 reg &= ~(3 << 3);
523 reg |= t << 3;
524
525 ret = ade7754_spi_write_reg_8(dev,
526 ADE7754_WAVMODE,
527 reg);
528
529out:
530 mutex_unlock(&indio_dev->mlock);
531
532 return ret ? ret : len;
533}
534static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
535static IIO_CONST_ATTR(temp_offset, "129 C");
536static IIO_CONST_ATTR(temp_scale, "4 C");
537
538static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
539 ade7754_read_frequency,
540 ade7754_write_frequency);
541
542static IIO_DEV_ATTR_RESET(ade7754_write_reset);
543
544static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
545
546static IIO_CONST_ATTR(name, "ade7754");
547
548static struct attribute *ade7754_event_attributes[] = {
549 NULL
550};
551
552static struct attribute_group ade7754_event_attribute_group = {
553 .attrs = ade7754_event_attributes,
554};
555
556static struct attribute *ade7754_attributes[] = {
557 &iio_dev_attr_temp_raw.dev_attr.attr,
558 &iio_const_attr_temp_offset.dev_attr.attr,
559 &iio_const_attr_temp_scale.dev_attr.attr,
560 &iio_dev_attr_sampling_frequency.dev_attr.attr,
561 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
562 &iio_dev_attr_reset.dev_attr.attr,
563 &iio_const_attr_name.dev_attr.attr,
564 &iio_dev_attr_aenergy.dev_attr.attr,
565 &iio_dev_attr_laenergy.dev_attr.attr,
566 &iio_dev_attr_vaenergy.dev_attr.attr,
567 &iio_dev_attr_lvaenergy.dev_attr.attr,
568 &iio_dev_attr_vpeak.dev_attr.attr,
569 &iio_dev_attr_ipeak.dev_attr.attr,
570 &iio_dev_attr_aphcal.dev_attr.attr,
571 &iio_dev_attr_bphcal.dev_attr.attr,
572 &iio_dev_attr_cphcal.dev_attr.attr,
573 &iio_dev_attr_aapos.dev_attr.attr,
574 &iio_dev_attr_bapos.dev_attr.attr,
575 &iio_dev_attr_capos.dev_attr.attr,
576 &iio_dev_attr_wdiv.dev_attr.attr,
577 &iio_dev_attr_vadiv.dev_attr.attr,
578 &iio_dev_attr_cfnum.dev_attr.attr,
579 &iio_dev_attr_cfden.dev_attr.attr,
580 &iio_dev_attr_active_power_a_gain.dev_attr.attr,
581 &iio_dev_attr_active_power_b_gain.dev_attr.attr,
582 &iio_dev_attr_active_power_c_gain.dev_attr.attr,
583 &iio_dev_attr_airms.dev_attr.attr,
584 &iio_dev_attr_birms.dev_attr.attr,
585 &iio_dev_attr_cirms.dev_attr.attr,
586 &iio_dev_attr_avrms.dev_attr.attr,
587 &iio_dev_attr_bvrms.dev_attr.attr,
588 &iio_dev_attr_cvrms.dev_attr.attr,
589 &iio_dev_attr_airmsos.dev_attr.attr,
590 &iio_dev_attr_birmsos.dev_attr.attr,
591 &iio_dev_attr_cirmsos.dev_attr.attr,
592 &iio_dev_attr_avrmsos.dev_attr.attr,
593 &iio_dev_attr_bvrmsos.dev_attr.attr,
594 &iio_dev_attr_cvrmsos.dev_attr.attr,
595 NULL,
596};
597
598static const struct attribute_group ade7754_attribute_group = {
599 .attrs = ade7754_attributes,
600};
601
602
603
604static int __devinit ade7754_probe(struct spi_device *spi)
605{
606 int ret, regdone = 0;
607 struct ade7754_state *st = kzalloc(sizeof *st, GFP_KERNEL);
608 if (!st) {
609 ret = -ENOMEM;
610 goto error_ret;
611 }
612
613 spi_set_drvdata(spi, st);
614
615
616 st->rx = kzalloc(sizeof(*st->rx)*ADE7754_MAX_RX, GFP_KERNEL);
617 if (st->rx == NULL) {
618 ret = -ENOMEM;
619 goto error_free_st;
620 }
621 st->tx = kzalloc(sizeof(*st->tx)*ADE7754_MAX_TX, GFP_KERNEL);
622 if (st->tx == NULL) {
623 ret = -ENOMEM;
624 goto error_free_rx;
625 }
626 st->us = spi;
627 mutex_init(&st->buf_lock);
628
629 st->indio_dev = iio_allocate_device();
630 if (st->indio_dev == NULL) {
631 ret = -ENOMEM;
632 goto error_free_tx;
633 }
634
635 st->indio_dev->dev.parent = &spi->dev;
636 st->indio_dev->num_interrupt_lines = 1;
637 st->indio_dev->event_attrs = &ade7754_event_attribute_group;
638 st->indio_dev->attrs = &ade7754_attribute_group;
639 st->indio_dev->dev_data = (void *)(st);
640 st->indio_dev->driver_module = THIS_MODULE;
641 st->indio_dev->modes = INDIO_DIRECT_MODE;
642
643 ret = ade7754_configure_ring(st->indio_dev);
644 if (ret)
645 goto error_free_dev;
646
647 ret = iio_device_register(st->indio_dev);
648 if (ret)
649 goto error_unreg_ring_funcs;
650 regdone = 1;
651
652 ret = ade7754_initialize_ring(st->indio_dev->ring);
653 if (ret) {
654 printk(KERN_ERR "failed to initialize the ring\n");
655 goto error_unreg_ring_funcs;
656 }
657
658 if (spi->irq) {
659 ret = iio_register_interrupt_line(spi->irq,
660 st->indio_dev,
661 0,
662 IRQF_TRIGGER_FALLING,
663 "ade7754");
664 if (ret)
665 goto error_uninitialize_ring;
666
667 ret = ade7754_probe_trigger(st->indio_dev);
668 if (ret)
669 goto error_unregister_line;
670 }
671
672
673 ret = ade7754_initial_setup(st);
674 if (ret)
675 goto error_remove_trigger;
676 return 0;
677
678error_remove_trigger:
679 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
680 ade7754_remove_trigger(st->indio_dev);
681error_unregister_line:
682 if (st->indio_dev->modes & INDIO_RING_TRIGGERED)
683 iio_unregister_interrupt_line(st->indio_dev, 0);
684error_uninitialize_ring:
685 ade7754_uninitialize_ring(st->indio_dev->ring);
686error_unreg_ring_funcs:
687 ade7754_unconfigure_ring(st->indio_dev);
688error_free_dev:
689 if (regdone)
690 iio_device_unregister(st->indio_dev);
691 else
692 iio_free_device(st->indio_dev);
693error_free_tx:
694 kfree(st->tx);
695error_free_rx:
696 kfree(st->rx);
697error_free_st:
698 kfree(st);
699error_ret:
700 return ret;
701}
702
703
704static int ade7754_remove(struct spi_device *spi)
705{
706 int ret;
707 struct ade7754_state *st = spi_get_drvdata(spi);
708 struct iio_dev *indio_dev = st->indio_dev;
709
710 ret = ade7754_stop_device(&(indio_dev->dev));
711 if (ret)
712 goto err_ret;
713
714 flush_scheduled_work();
715
716 ade7754_remove_trigger(indio_dev);
717 if (spi->irq)
718 iio_unregister_interrupt_line(indio_dev, 0);
719
720 ade7754_uninitialize_ring(indio_dev->ring);
721 ade7754_unconfigure_ring(indio_dev);
722 iio_device_unregister(indio_dev);
723 kfree(st->tx);
724 kfree(st->rx);
725 kfree(st);
726
727 return 0;
728
729err_ret:
730 return ret;
731}
732
733static struct spi_driver ade7754_driver = {
734 .driver = {
735 .name = "ade7754",
736 .owner = THIS_MODULE,
737 },
738 .probe = ade7754_probe,
739 .remove = __devexit_p(ade7754_remove),
740};
741
742static __init int ade7754_init(void)
743{
744 return spi_register_driver(&ade7754_driver);
745}
746module_init(ade7754_init);
747
748static __exit void ade7754_exit(void)
749{
750 spi_unregister_driver(&ade7754_driver);
751}
752module_exit(ade7754_exit);
753
754MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
755MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
756MODULE_LICENSE("GPL v2");
757
