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14#include <linux/errno.h>
15#include <linux/tty.h>
16#include <linux/serial.h>
17#include <linux/circ_buf.h>
18#include <linux/serial_reg.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/serial_core.h>
22#include <linux/ioc3.h>
23#include <linux/slab.h>
24
25
26
27
28
29#define LOGICAL_PORTS 2
30#define PORTS_PER_CARD 2
31#define LOGICAL_PORTS_PER_CARD (PORTS_PER_CARD * LOGICAL_PORTS)
32#define MAX_CARDS 8
33#define MAX_LOGICAL_PORTS (LOGICAL_PORTS_PER_CARD * MAX_CARDS)
34
35
36#define GET_PORT_FROM_SIO_IR(_x) (_x & SIO_IR_SA) ? 0 : 1
37
38
39
40
41
42
43#define GET_PHYSICAL_PORT(_x) ((_x) >> 1)
44#define GET_LOGICAL_PORT(_x) ((_x) & 1)
45#define IS_PHYSICAL_PORT(_x) !((_x) & 1)
46#define IS_RS232(_x) !((_x) & 1)
47
48static unsigned int Num_of_ioc3_cards;
49static unsigned int Submodule_slot;
50
51
52
53#define DPRINT_CONFIG(_x...) ;
54
55#define NOT_PROGRESS() ;
56
57
58
59#define MAX_CHARS 256
60#define FIFO_SIZE (MAX_CHARS-1)
61
62
63#define DEVICE_NAME "ttySIOC"
64#define DEVICE_MAJOR 204
65#define DEVICE_MINOR 116
66
67
68#define NCS_BREAK 0x1
69#define NCS_PARITY 0x2
70#define NCS_FRAMING 0x4
71#define NCS_OVERRUN 0x8
72
73
74#define MIN_BAUD_SUPPORTED 1200
75#define MAX_BAUD_SUPPORTED 115200
76
77
78#define PROTO_RS232 0
79#define PROTO_RS422 1
80
81
82#define N_DATA_READY 0x01
83#define N_OUTPUT_LOWAT 0x02
84#define N_BREAK 0x04
85#define N_PARITY_ERROR 0x08
86#define N_FRAMING_ERROR 0x10
87#define N_OVERRUN_ERROR 0x20
88#define N_DDCD 0x40
89#define N_DCTS 0x80
90
91#define N_ALL_INPUT (N_DATA_READY | N_BREAK \
92 | N_PARITY_ERROR | N_FRAMING_ERROR \
93 | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
94
95#define N_ALL_OUTPUT N_OUTPUT_LOWAT
96
97#define N_ALL_ERRORS (N_PARITY_ERROR | N_FRAMING_ERROR \
98 | N_OVERRUN_ERROR)
99
100#define N_ALL (N_DATA_READY | N_OUTPUT_LOWAT | N_BREAK \
101 | N_PARITY_ERROR | N_FRAMING_ERROR \
102 | N_OVERRUN_ERROR | N_DDCD | N_DCTS)
103
104#define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv)
105#define SER_DIVISOR(x, clk) (((clk) + (x) * 8) / ((x) * 16))
106#define DIVISOR_TO_BAUD(div, clk) ((clk) / 16 / (div))
107
108
109#define LCR_MASK_BITS_CHAR (UART_LCR_WLEN5 | UART_LCR_WLEN6 \
110 | UART_LCR_WLEN7 | UART_LCR_WLEN8)
111#define LCR_MASK_STOP_BITS (UART_LCR_STOP)
112
113#define PENDING(_a, _p) (readl(&(_p)->vma->sio_ir) & (_a)->ic_enable)
114
115#define RING_BUF_SIZE 4096
116#define BUF_SIZE_BIT SBBR_L_SIZE
117#define PROD_CONS_MASK PROD_CONS_PTR_4K
118
119#define TOTAL_RING_BUF_SIZE (RING_BUF_SIZE * 4)
120
121
122struct ioc3_card {
123 struct {
124
125 struct uart_port icp_uart_port[LOGICAL_PORTS];
126
127 struct ioc3_port *icp_port;
128 } ic_port[PORTS_PER_CARD];
129
130 uint32_t ic_enable;
131};
132
133
134struct ioc3_port {
135
136 struct uart_port *ip_port;
137 struct ioc3_card *ip_card;
138 struct ioc3_driver_data *ip_idd;
139 struct ioc3_submodule *ip_is;
140
141
142 struct ioc3_serialregs __iomem *ip_serial_regs;
143 struct ioc3_uartregs __iomem *ip_uart_regs;
144
145
146 dma_addr_t ip_dma_ringbuf;
147
148 struct ring_buffer *ip_cpu_ringbuf;
149
150
151 struct ring *ip_inring;
152 struct ring *ip_outring;
153
154
155 struct port_hooks *ip_hooks;
156
157 spinlock_t ip_lock;
158
159
160 int ip_baud;
161 int ip_tx_lowat;
162 int ip_rx_timeout;
163
164
165 int ip_notify;
166
167
168
169
170 uint32_t ip_sscr;
171 uint32_t ip_tx_prod;
172 uint32_t ip_rx_cons;
173 unsigned char ip_flags;
174};
175
176
177
178
179
180
181#define TX_LOWAT_LATENCY 1000
182#define TX_LOWAT_HZ (1000000 / TX_LOWAT_LATENCY)
183#define TX_LOWAT_CHARS(baud) (baud / 10 / TX_LOWAT_HZ)
184
185
186#define INPUT_HIGH 0x01
187
188
189
190
191#define DCD_ON 0x02
192
193#define LOWAT_WRITTEN 0x04
194#define READ_ABORTED 0x08
195
196
197
198#define INPUT_ENABLE 0x10
199
200
201
202
203
204struct port_hooks {
205 uint32_t intr_delta_dcd;
206 uint32_t intr_delta_cts;
207 uint32_t intr_tx_mt;
208 uint32_t intr_rx_timer;
209 uint32_t intr_rx_high;
210 uint32_t intr_tx_explicit;
211 uint32_t intr_clear;
212 uint32_t intr_all;
213 char rs422_select_pin;
214};
215
216static struct port_hooks hooks_array[PORTS_PER_CARD] = {
217
218 {
219 .intr_delta_dcd = SIO_IR_SA_DELTA_DCD,
220 .intr_delta_cts = SIO_IR_SA_DELTA_CTS,
221 .intr_tx_mt = SIO_IR_SA_TX_MT,
222 .intr_rx_timer = SIO_IR_SA_RX_TIMER,
223 .intr_rx_high = SIO_IR_SA_RX_HIGH,
224 .intr_tx_explicit = SIO_IR_SA_TX_EXPLICIT,
225 .intr_clear = (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL
226 | SIO_IR_SA_RX_HIGH
227 | SIO_IR_SA_RX_TIMER
228 | SIO_IR_SA_DELTA_DCD
229 | SIO_IR_SA_DELTA_CTS
230 | SIO_IR_SA_INT
231 | SIO_IR_SA_TX_EXPLICIT
232 | SIO_IR_SA_MEMERR),
233 .intr_all = SIO_IR_SA,
234 .rs422_select_pin = GPPR_UARTA_MODESEL_PIN,
235 },
236
237
238 {
239 .intr_delta_dcd = SIO_IR_SB_DELTA_DCD,
240 .intr_delta_cts = SIO_IR_SB_DELTA_CTS,
241 .intr_tx_mt = SIO_IR_SB_TX_MT,
242 .intr_rx_timer = SIO_IR_SB_RX_TIMER,
243 .intr_rx_high = SIO_IR_SB_RX_HIGH,
244 .intr_tx_explicit = SIO_IR_SB_TX_EXPLICIT,
245 .intr_clear = (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL
246 | SIO_IR_SB_RX_HIGH
247 | SIO_IR_SB_RX_TIMER
248 | SIO_IR_SB_DELTA_DCD
249 | SIO_IR_SB_DELTA_CTS
250 | SIO_IR_SB_INT
251 | SIO_IR_SB_TX_EXPLICIT
252 | SIO_IR_SB_MEMERR),
253 .intr_all = SIO_IR_SB,
254 .rs422_select_pin = GPPR_UARTB_MODESEL_PIN,
255 }
256};
257
258struct ring_entry {
259 union {
260 struct {
261 uint32_t alldata;
262 uint32_t allsc;
263 } all;
264 struct {
265 char data[4];
266 char sc[4];
267 } s;
268 } u;
269};
270
271
272#define RING_ANY_VALID \
273 ((uint32_t)(RXSB_MODEM_VALID | RXSB_DATA_VALID) * 0x01010101)
274
275#define ring_sc u.s.sc
276#define ring_data u.s.data
277#define ring_allsc u.all.allsc
278
279
280#define ENTRIES_PER_RING (RING_BUF_SIZE / (int) sizeof(struct ring_entry))
281
282
283struct ring {
284 struct ring_entry entries[ENTRIES_PER_RING];
285};
286
287
288struct ring_buffer {
289 struct ring TX_A;
290 struct ring RX_A;
291 struct ring TX_B;
292 struct ring RX_B;
293};
294
295
296#define RING(_p, _wh) &(((struct ring_buffer *)((_p)->ip_cpu_ringbuf))->_wh)
297
298
299#define MAXITER 10000000
300
301
302
303
304
305
306
307static int set_baud(struct ioc3_port *port, int baud)
308{
309 int divisor;
310 int actual_baud;
311 int diff;
312 int lcr, prediv;
313 struct ioc3_uartregs __iomem *uart;
314
315 for (prediv = 6; prediv < 64; prediv++) {
316 divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv));
317 if (!divisor)
318 continue;
319 actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv));
320
321 diff = actual_baud - baud;
322 if (diff < 0)
323 diff = -diff;
324
325
326 if (diff * 100 <= actual_baud)
327 break;
328 }
329
330
331
332
333 if (prediv == 64) {
334 NOT_PROGRESS();
335 return 1;
336 }
337
338 uart = port->ip_uart_regs;
339 lcr = readb(&uart->iu_lcr);
340
341 writeb(lcr | UART_LCR_DLAB, &uart->iu_lcr);
342 writeb((unsigned char)divisor, &uart->iu_dll);
343 writeb((unsigned char)(divisor >> 8), &uart->iu_dlm);
344 writeb((unsigned char)prediv, &uart->iu_scr);
345 writeb((unsigned char)lcr, &uart->iu_lcr);
346
347 return 0;
348}
349
350
351
352
353
354static struct ioc3_port *get_ioc3_port(struct uart_port *the_port)
355{
356 struct ioc3_driver_data *idd = dev_get_drvdata(the_port->dev);
357 struct ioc3_card *card_ptr = idd->data[Submodule_slot];
358 int ii, jj;
359
360 if (!card_ptr) {
361 NOT_PROGRESS();
362 return NULL;
363 }
364 for (ii = 0; ii < PORTS_PER_CARD; ii++) {
365 for (jj = 0; jj < LOGICAL_PORTS; jj++) {
366 if (the_port == &card_ptr->ic_port[ii].icp_uart_port[jj])
367 return card_ptr->ic_port[ii].icp_port;
368 }
369 }
370 NOT_PROGRESS();
371 return NULL;
372}
373
374
375
376
377
378
379static int inline port_init(struct ioc3_port *port)
380{
381 uint32_t sio_cr;
382 struct port_hooks *hooks = port->ip_hooks;
383 struct ioc3_uartregs __iomem *uart;
384 int reset_loop_counter = 0xfffff;
385 struct ioc3_driver_data *idd = port->ip_idd;
386
387
388 writel(SSCR_RESET, &port->ip_serial_regs->sscr);
389
390
391 do {
392 sio_cr = readl(&idd->vma->sio_cr);
393 if (reset_loop_counter-- <= 0) {
394 printk(KERN_WARNING
395 "IOC3 unable to come out of reset"
396 " scr 0x%x\n", sio_cr);
397 return -1;
398 }
399 } while (!(sio_cr & SIO_CR_ARB_DIAG_IDLE) &&
400 (((sio_cr &= SIO_CR_ARB_DIAG) == SIO_CR_ARB_DIAG_TXA)
401 || sio_cr == SIO_CR_ARB_DIAG_TXB
402 || sio_cr == SIO_CR_ARB_DIAG_RXA
403 || sio_cr == SIO_CR_ARB_DIAG_RXB));
404
405
406 writel(0, &port->ip_serial_regs->sscr);
407
408
409
410
411 port->ip_tx_prod = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
412 writel(port->ip_tx_prod, &port->ip_serial_regs->stpir);
413 port->ip_rx_cons = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
414 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
415
416
417 uart = port->ip_uart_regs;
418 writeb(0, &uart->iu_lcr);
419 writeb(0, &uart->iu_ier);
420
421
422 set_baud(port, port->ip_baud);
423
424
425 writeb(UART_LCR_WLEN8 | 0, &uart->iu_lcr);
426
427
428
429 writeb(UART_FCR_ENABLE_FIFO, &uart->iu_fcr);
430
431 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
432 &uart->iu_fcr);
433
434
435 writeb(0, &uart->iu_mcr);
436
437
438 writel(0, &port->ip_serial_regs->shadow);
439
440
441 if (port->ip_hooks == &hooks_array[0]) {
442 unsigned long ring_pci_addr;
443 uint32_t __iomem *sbbr_l, *sbbr_h;
444
445 sbbr_l = &idd->vma->sbbr_l;
446 sbbr_h = &idd->vma->sbbr_h;
447 ring_pci_addr = (unsigned long __iomem)port->ip_dma_ringbuf;
448 DPRINT_CONFIG(("%s: ring_pci_addr 0x%p\n",
449 __func__, (void *)ring_pci_addr));
450
451 writel((unsigned int)((uint64_t) ring_pci_addr >> 32), sbbr_h);
452 writel((unsigned int)ring_pci_addr | BUF_SIZE_BIT, sbbr_l);
453 }
454
455
456 writel(SRTR_HZ / 100, &port->ip_serial_regs->srtr);
457
458
459
460 port->ip_sscr = (ENTRIES_PER_RING * 3 / 4);
461
462
463
464
465
466
467 port->ip_sscr |= SSCR_HIGH_SPD;
468
469 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
470
471
472 port->ip_card->ic_enable &= ~hooks->intr_clear;
473 ioc3_disable(port->ip_is, idd, hooks->intr_clear);
474 ioc3_ack(port->ip_is, idd, hooks->intr_clear);
475 return 0;
476}
477
478
479
480
481
482
483static void enable_intrs(struct ioc3_port *port, uint32_t mask)
484{
485 if ((port->ip_card->ic_enable & mask) != mask) {
486 port->ip_card->ic_enable |= mask;
487 ioc3_enable(port->ip_is, port->ip_idd, mask);
488 }
489}
490
491
492
493
494
495static inline int local_open(struct ioc3_port *port)
496{
497 int spiniter = 0;
498
499 port->ip_flags = INPUT_ENABLE;
500
501
502 if (port->ip_sscr & SSCR_DMA_EN) {
503 writel(port->ip_sscr | SSCR_DMA_PAUSE,
504 &port->ip_serial_regs->sscr);
505 while ((readl(&port->ip_serial_regs->sscr)
506 & SSCR_PAUSE_STATE) == 0) {
507 spiniter++;
508 if (spiniter > MAXITER) {
509 NOT_PROGRESS();
510 return -1;
511 }
512 }
513 }
514
515
516
517
518
519
520 writeb(UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR,
521 &port->ip_uart_regs->iu_fcr);
522
523 writeb(UART_LCR_WLEN8, &port->ip_uart_regs->iu_lcr);
524
525
526
527
528
529 port->ip_sscr &= ~SSCR_RX_THRESHOLD;
530 port->ip_sscr |= 1;
531
532
533
534
535 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
536 port->ip_tx_lowat = 1;
537 return 0;
538}
539
540
541
542
543
544
545static inline int set_rx_timeout(struct ioc3_port *port, int timeout)
546{
547 int threshold;
548
549 port->ip_rx_timeout = timeout;
550
551
552
553
554
555
556
557
558 threshold = timeout * port->ip_baud / 4000;
559 if (threshold == 0)
560 threshold = 1;
561
562 if ((unsigned)threshold > (unsigned)SSCR_RX_THRESHOLD)
563 return 1;
564
565 port->ip_sscr &= ~SSCR_RX_THRESHOLD;
566 port->ip_sscr |= threshold;
567 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
568
569
570
571
572 timeout = timeout * SRTR_HZ / 100;
573 if (timeout > SRTR_CNT)
574 timeout = SRTR_CNT;
575 writel(timeout, &port->ip_serial_regs->srtr);
576 return 0;
577}
578
579
580
581
582
583
584
585
586
587
588static inline int
589config_port(struct ioc3_port *port,
590 int baud, int byte_size, int stop_bits, int parenb, int parodd)
591{
592 char lcr, sizebits;
593 int spiniter = 0;
594
595 DPRINT_CONFIG(("%s: line %d baud %d byte_size %d stop %d parenb %d "
596 "parodd %d\n",
597 __func__, ((struct uart_port *)port->ip_port)->line,
598 baud, byte_size, stop_bits, parenb, parodd));
599
600 if (set_baud(port, baud))
601 return 1;
602
603 switch (byte_size) {
604 case 5:
605 sizebits = UART_LCR_WLEN5;
606 break;
607 case 6:
608 sizebits = UART_LCR_WLEN6;
609 break;
610 case 7:
611 sizebits = UART_LCR_WLEN7;
612 break;
613 case 8:
614 sizebits = UART_LCR_WLEN8;
615 break;
616 default:
617 return 1;
618 }
619
620
621 if (port->ip_sscr & SSCR_DMA_EN) {
622 writel(port->ip_sscr | SSCR_DMA_PAUSE,
623 &port->ip_serial_regs->sscr);
624 while ((readl(&port->ip_serial_regs->sscr)
625 & SSCR_PAUSE_STATE) == 0) {
626 spiniter++;
627 if (spiniter > MAXITER)
628 return -1;
629 }
630 }
631
632
633 lcr = readb(&port->ip_uart_regs->iu_lcr);
634 lcr &= ~(LCR_MASK_BITS_CHAR | UART_LCR_EPAR |
635 UART_LCR_PARITY | LCR_MASK_STOP_BITS);
636
637
638 lcr |= sizebits;
639
640
641 if (parenb) {
642 lcr |= UART_LCR_PARITY;
643 if (!parodd)
644 lcr |= UART_LCR_EPAR;
645 }
646
647
648 if (stop_bits)
649 lcr |= UART_LCR_STOP ;
650
651 writeb(lcr, &port->ip_uart_regs->iu_lcr);
652
653
654 if (port->ip_sscr & SSCR_DMA_EN) {
655 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
656 }
657 port->ip_baud = baud;
658
659
660
661
662
663 port->ip_tx_lowat = (TX_LOWAT_CHARS(baud) + 3) / 4;
664 if (port->ip_tx_lowat == 0)
665 port->ip_tx_lowat = 1;
666
667 set_rx_timeout(port, 2);
668 return 0;
669}
670
671
672
673
674
675
676
677
678static inline int do_write(struct ioc3_port *port, char *buf, int len)
679{
680 int prod_ptr, cons_ptr, total = 0;
681 struct ring *outring;
682 struct ring_entry *entry;
683 struct port_hooks *hooks = port->ip_hooks;
684
685 BUG_ON(!(len >= 0));
686
687 prod_ptr = port->ip_tx_prod;
688 cons_ptr = readl(&port->ip_serial_regs->stcir) & PROD_CONS_MASK;
689 outring = port->ip_outring;
690
691
692
693
694
695 cons_ptr = (cons_ptr - (int)sizeof(struct ring_entry)) & PROD_CONS_MASK;
696
697
698 while ((prod_ptr != cons_ptr) && (len > 0)) {
699 int xx;
700
701
702 entry = (struct ring_entry *)((caddr_t) outring + prod_ptr);
703
704
705 entry->ring_allsc = 0;
706
707
708 for (xx = 0; (xx < 4) && (len > 0); xx++) {
709 entry->ring_data[xx] = *buf++;
710 entry->ring_sc[xx] = TXCB_VALID;
711 len--;
712 total++;
713 }
714
715
716
717
718
719
720
721 if (!(port->ip_flags & LOWAT_WRITTEN) &&
722 ((cons_ptr - prod_ptr) & PROD_CONS_MASK)
723 <= port->ip_tx_lowat * (int)sizeof(struct ring_entry)) {
724 port->ip_flags |= LOWAT_WRITTEN;
725 entry->ring_sc[0] |= TXCB_INT_WHEN_DONE;
726 }
727
728
729 prod_ptr += sizeof(struct ring_entry);
730 prod_ptr &= PROD_CONS_MASK;
731 }
732
733
734 if (total > 0 && !(port->ip_sscr & SSCR_DMA_EN)) {
735 port->ip_sscr |= SSCR_DMA_EN;
736 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
737 }
738
739
740
741
742 if (!uart_tx_stopped(port->ip_port)) {
743 writel(prod_ptr, &port->ip_serial_regs->stpir);
744
745
746
747
748 if (total > 0)
749 enable_intrs(port, hooks->intr_tx_mt);
750 }
751 port->ip_tx_prod = prod_ptr;
752
753 return total;
754}
755
756
757
758
759
760
761static inline void disable_intrs(struct ioc3_port *port, uint32_t mask)
762{
763 if (port->ip_card->ic_enable & mask) {
764 ioc3_disable(port->ip_is, port->ip_idd, mask);
765 port->ip_card->ic_enable &= ~mask;
766 }
767}
768
769
770
771
772
773
774
775static int set_notification(struct ioc3_port *port, int mask, int set_on)
776{
777 struct port_hooks *hooks = port->ip_hooks;
778 uint32_t intrbits, sscrbits;
779
780 BUG_ON(!mask);
781
782 intrbits = sscrbits = 0;
783
784 if (mask & N_DATA_READY)
785 intrbits |= (hooks->intr_rx_timer | hooks->intr_rx_high);
786 if (mask & N_OUTPUT_LOWAT)
787 intrbits |= hooks->intr_tx_explicit;
788 if (mask & N_DDCD) {
789 intrbits |= hooks->intr_delta_dcd;
790 sscrbits |= SSCR_RX_RING_DCD;
791 }
792 if (mask & N_DCTS)
793 intrbits |= hooks->intr_delta_cts;
794
795 if (set_on) {
796 enable_intrs(port, intrbits);
797 port->ip_notify |= mask;
798 port->ip_sscr |= sscrbits;
799 } else {
800 disable_intrs(port, intrbits);
801 port->ip_notify &= ~mask;
802 port->ip_sscr &= ~sscrbits;
803 }
804
805
806
807
808
809 if (port->ip_notify & (N_DATA_READY | N_DDCD))
810 port->ip_sscr |= SSCR_DMA_EN;
811 else if (!(port->ip_card->ic_enable & hooks->intr_tx_mt))
812 port->ip_sscr &= ~SSCR_DMA_EN;
813
814 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
815 return 0;
816}
817
818
819
820
821
822
823
824static inline int set_mcr(struct uart_port *the_port,
825 int mask1, int mask2)
826{
827 struct ioc3_port *port = get_ioc3_port(the_port);
828 uint32_t shadow;
829 int spiniter = 0;
830 char mcr;
831
832 if (!port)
833 return -1;
834
835
836 if (port->ip_sscr & SSCR_DMA_EN) {
837 writel(port->ip_sscr | SSCR_DMA_PAUSE,
838 &port->ip_serial_regs->sscr);
839 while ((readl(&port->ip_serial_regs->sscr)
840 & SSCR_PAUSE_STATE) == 0) {
841 spiniter++;
842 if (spiniter > MAXITER)
843 return -1;
844 }
845 }
846 shadow = readl(&port->ip_serial_regs->shadow);
847 mcr = (shadow & 0xff000000) >> 24;
848
849
850 mcr |= mask1;
851 shadow |= mask2;
852 writeb(mcr, &port->ip_uart_regs->iu_mcr);
853 writel(shadow, &port->ip_serial_regs->shadow);
854
855
856 if (port->ip_sscr & SSCR_DMA_EN) {
857 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
858 }
859 return 0;
860}
861
862
863
864
865
866
867static int ioc3_set_proto(struct ioc3_port *port, int proto)
868{
869 struct port_hooks *hooks = port->ip_hooks;
870
871 switch (proto) {
872 default:
873 case PROTO_RS232:
874
875 DPRINT_CONFIG(("%s: rs232\n", __func__));
876 writel(0, (&port->ip_idd->vma->gppr[0]
877 + hooks->rs422_select_pin));
878 break;
879
880 case PROTO_RS422:
881
882 DPRINT_CONFIG(("%s: rs422\n", __func__));
883 writel(1, (&port->ip_idd->vma->gppr[0]
884 + hooks->rs422_select_pin));
885 break;
886 }
887 return 0;
888}
889
890
891
892
893
894static void transmit_chars(struct uart_port *the_port)
895{
896 int xmit_count, tail, head;
897 int result;
898 char *start;
899 struct tty_struct *tty;
900 struct ioc3_port *port = get_ioc3_port(the_port);
901 struct uart_state *state;
902
903 if (!the_port)
904 return;
905 if (!port)
906 return;
907
908 state = the_port->state;
909 tty = state->port.tty;
910
911 if (uart_circ_empty(&state->xmit) || uart_tx_stopped(the_port)) {
912
913 set_notification(port, N_ALL_OUTPUT, 0);
914 return;
915 }
916
917 head = state->xmit.head;
918 tail = state->xmit.tail;
919 start = (char *)&state->xmit.buf[tail];
920
921
922 xmit_count = (head < tail) ? (UART_XMIT_SIZE - tail) : (head - tail);
923 if (xmit_count > 0) {
924 result = do_write(port, start, xmit_count);
925 if (result > 0) {
926
927 xmit_count -= result;
928 the_port->icount.tx += result;
929
930 tail += result;
931 tail &= UART_XMIT_SIZE - 1;
932 state->xmit.tail = tail;
933 start = (char *)&state->xmit.buf[tail];
934 }
935 }
936 if (uart_circ_chars_pending(&state->xmit) < WAKEUP_CHARS)
937 uart_write_wakeup(the_port);
938
939 if (uart_circ_empty(&state->xmit)) {
940 set_notification(port, N_OUTPUT_LOWAT, 0);
941 } else {
942 set_notification(port, N_OUTPUT_LOWAT, 1);
943 }
944}
945
946
947
948
949
950
951
952static void
953ioc3_change_speed(struct uart_port *the_port,
954 struct ktermios *new_termios, struct ktermios *old_termios)
955{
956 struct ioc3_port *port = get_ioc3_port(the_port);
957 unsigned int cflag, iflag;
958 int baud;
959 int new_parity = 0, new_parity_enable = 0, new_stop = 0, new_data = 8;
960 struct uart_state *state = the_port->state;
961
962 cflag = new_termios->c_cflag;
963 iflag = new_termios->c_iflag;
964
965 switch (cflag & CSIZE) {
966 case CS5:
967 new_data = 5;
968 break;
969 case CS6:
970 new_data = 6;
971 break;
972 case CS7:
973 new_data = 7;
974 break;
975 case CS8:
976 new_data = 8;
977 break;
978 default:
979
980 new_data = 5;
981 break;
982 }
983 if (cflag & CSTOPB) {
984 new_stop = 1;
985 }
986 if (cflag & PARENB) {
987 new_parity_enable = 1;
988 if (cflag & PARODD)
989 new_parity = 1;
990 }
991 baud = uart_get_baud_rate(the_port, new_termios, old_termios,
992 MIN_BAUD_SUPPORTED, MAX_BAUD_SUPPORTED);
993 DPRINT_CONFIG(("%s: returned baud %d for line %d\n", __func__, baud,
994 the_port->line));
995
996 if (!the_port->fifosize)
997 the_port->fifosize = FIFO_SIZE;
998 uart_update_timeout(the_port, cflag, baud);
999
1000 the_port->ignore_status_mask = N_ALL_INPUT;
1001
1002 state->port.tty->low_latency = 1;
1003
1004 if (iflag & IGNPAR)
1005 the_port->ignore_status_mask &= ~(N_PARITY_ERROR
1006 | N_FRAMING_ERROR);
1007 if (iflag & IGNBRK) {
1008 the_port->ignore_status_mask &= ~N_BREAK;
1009 if (iflag & IGNPAR)
1010 the_port->ignore_status_mask &= ~N_OVERRUN_ERROR;
1011 }
1012 if (!(cflag & CREAD)) {
1013
1014 the_port->ignore_status_mask &= ~N_DATA_READY;
1015 }
1016
1017 if (cflag & CRTSCTS) {
1018
1019 port->ip_sscr |= SSCR_HFC_EN;
1020 }
1021 else {
1022
1023 port->ip_sscr &= ~SSCR_HFC_EN;
1024 }
1025 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1026
1027
1028 DPRINT_CONFIG(("%s : port 0x%p line %d cflag 0%o "
1029 "config_port(baud %d data %d stop %d penable %d "
1030 " parity %d), notification 0x%x\n",
1031 __func__, (void *)port, the_port->line, cflag, baud,
1032 new_data, new_stop, new_parity_enable, new_parity,
1033 the_port->ignore_status_mask));
1034
1035 if ((config_port(port, baud,
1036 new_data,
1037 new_stop,
1038 new_parity_enable,
1039 new_parity)) >= 0) {
1040 set_notification(port, the_port->ignore_status_mask, 1);
1041 }
1042}
1043
1044
1045
1046
1047
1048static inline int ic3_startup_local(struct uart_port *the_port)
1049{
1050 struct ioc3_port *port;
1051
1052 if (!the_port) {
1053 NOT_PROGRESS();
1054 return -1;
1055 }
1056
1057 port = get_ioc3_port(the_port);
1058 if (!port) {
1059 NOT_PROGRESS();
1060 return -1;
1061 }
1062
1063 local_open(port);
1064
1065
1066 ioc3_set_proto(port, IS_RS232(the_port->line) ? PROTO_RS232 :
1067 PROTO_RS422);
1068 return 0;
1069}
1070
1071
1072
1073
1074
1075static void ioc3_cb_output_lowat(struct ioc3_port *port)
1076{
1077 unsigned long pflags;
1078
1079
1080 if (port->ip_port) {
1081 spin_lock_irqsave(&port->ip_port->lock, pflags);
1082 transmit_chars(port->ip_port);
1083 spin_unlock_irqrestore(&port->ip_port->lock, pflags);
1084 }
1085}
1086
1087
1088
1089
1090
1091
1092static void ioc3_cb_post_ncs(struct uart_port *the_port, int ncs)
1093{
1094 struct uart_icount *icount;
1095
1096 icount = &the_port->icount;
1097
1098 if (ncs & NCS_BREAK)
1099 icount->brk++;
1100 if (ncs & NCS_FRAMING)
1101 icount->frame++;
1102 if (ncs & NCS_OVERRUN)
1103 icount->overrun++;
1104 if (ncs & NCS_PARITY)
1105 icount->parity++;
1106}
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116static inline int do_read(struct uart_port *the_port, char *buf, int len)
1117{
1118 int prod_ptr, cons_ptr, total;
1119 struct ioc3_port *port = get_ioc3_port(the_port);
1120 struct ring *inring;
1121 struct ring_entry *entry;
1122 struct port_hooks *hooks = port->ip_hooks;
1123 int byte_num;
1124 char *sc;
1125 int loop_counter;
1126
1127 BUG_ON(!(len >= 0));
1128 BUG_ON(!port);
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152 writel(port->ip_rx_cons | SRCIR_ARM, &port->ip_serial_regs->srcir);
1153
1154 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1155 cons_ptr = port->ip_rx_cons;
1156
1157 if (prod_ptr == cons_ptr) {
1158 int reset_dma = 0;
1159
1160
1161
1162
1163 if (!(port->ip_sscr & SSCR_DMA_EN)) {
1164 port->ip_sscr |= SSCR_DMA_EN;
1165 reset_dma = 1;
1166 }
1167
1168
1169
1170
1171
1172
1173
1174 writel(port->ip_sscr | SSCR_RX_DRAIN,
1175 &port->ip_serial_regs->sscr);
1176 prod_ptr = readl(&port->ip_serial_regs->srpir) & PROD_CONS_MASK;
1177
1178
1179
1180
1181
1182
1183
1184
1185 if (prod_ptr == cons_ptr) {
1186 loop_counter = 0;
1187 while (readl(&port->ip_serial_regs->sscr) &
1188 SSCR_RX_DRAIN) {
1189 loop_counter++;
1190 if (loop_counter > MAXITER)
1191 return -1;
1192 }
1193
1194
1195
1196
1197 prod_ptr = readl(&port->ip_serial_regs->srpir)
1198 & PROD_CONS_MASK;
1199 }
1200 if (reset_dma) {
1201 port->ip_sscr &= ~SSCR_DMA_EN;
1202 writel(port->ip_sscr, &port->ip_serial_regs->sscr);
1203 }
1204 }
1205 inring = port->ip_inring;
1206 port->ip_flags &= ~READ_ABORTED;
1207
1208 total = 0;
1209 loop_counter = 0xfffff;
1210
1211
1212 while ((prod_ptr != cons_ptr) && (len > 0)) {
1213 entry = (struct ring_entry *)((caddr_t) inring + cons_ptr);
1214
1215 if (loop_counter-- <= 0) {
1216 printk(KERN_WARNING "IOC3 serial: "
1217 "possible hang condition/"
1218 "port stuck on read (line %d).\n",
1219 the_port->line);
1220 break;
1221 }
1222
1223
1224
1225
1226
1227
1228 if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1229
1230
1231
1232
1233 port->ip_flags |= READ_ABORTED;
1234 len = 0;
1235 break;
1236 }
1237
1238
1239 for (byte_num = 0; byte_num < 4 && len > 0; byte_num++) {
1240 sc = &(entry->ring_sc[byte_num]);
1241
1242
1243 if ((*sc & RXSB_MODEM_VALID)
1244 && (port->ip_notify & N_DDCD)) {
1245
1246 if ((port->ip_flags & DCD_ON)
1247 && !(*sc & RXSB_DCD)) {
1248
1249
1250
1251
1252
1253
1254
1255 if (total > 0) {
1256 len = 0;
1257 break;
1258 }
1259 port->ip_flags &= ~DCD_ON;
1260
1261
1262
1263
1264
1265 *sc &= ~RXSB_MODEM_VALID;
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275 if ((entry->ring_allsc & RING_ANY_VALID)
1276 == 0) {
1277 cons_ptr += (int)sizeof
1278 (struct ring_entry);
1279 cons_ptr &= PROD_CONS_MASK;
1280 }
1281 writel(cons_ptr,
1282 &port->ip_serial_regs->srcir);
1283 port->ip_rx_cons = cons_ptr;
1284
1285
1286 if ((port->ip_notify & N_DDCD)
1287 && port->ip_port) {
1288 uart_handle_dcd_change
1289 (port->ip_port, 0);
1290 wake_up_interruptible
1291 (&the_port->state->
1292 port.delta_msr_wait);
1293 }
1294
1295
1296
1297
1298 return 0;
1299 }
1300 }
1301 if (*sc & RXSB_MODEM_VALID) {
1302
1303 if ((*sc & RXSB_OVERRUN)
1304 && (port->ip_notify & N_OVERRUN_ERROR)) {
1305 ioc3_cb_post_ncs(the_port, NCS_OVERRUN);
1306 }
1307
1308 *sc &= ~RXSB_MODEM_VALID;
1309 }
1310
1311
1312 if ((*sc & RXSB_DATA_VALID) &&
1313 ((*sc & (RXSB_PAR_ERR
1314 | RXSB_FRAME_ERR | RXSB_BREAK))
1315 && (port->ip_notify & (N_PARITY_ERROR
1316 | N_FRAMING_ERROR
1317 | N_BREAK)))) {
1318
1319
1320
1321
1322
1323
1324
1325 if (total > 0) {
1326 len = 0;
1327 break;
1328 } else {
1329 if ((*sc & RXSB_PAR_ERR) &&
1330 (port->
1331 ip_notify & N_PARITY_ERROR)) {
1332 ioc3_cb_post_ncs(the_port,
1333 NCS_PARITY);
1334 }
1335 if ((*sc & RXSB_FRAME_ERR) &&
1336 (port->
1337 ip_notify & N_FRAMING_ERROR)) {
1338 ioc3_cb_post_ncs(the_port,
1339 NCS_FRAMING);
1340 }
1341 if ((*sc & RXSB_BREAK)
1342 && (port->ip_notify & N_BREAK)) {
1343 ioc3_cb_post_ncs
1344 (the_port, NCS_BREAK);
1345 }
1346 len = 1;
1347 }
1348 }
1349 if (*sc & RXSB_DATA_VALID) {
1350 *sc &= ~RXSB_DATA_VALID;
1351 *buf = entry->ring_data[byte_num];
1352 buf++;
1353 len--;
1354 total++;
1355 }
1356 }
1357
1358
1359
1360
1361
1362
1363 if ((entry->ring_allsc & RING_ANY_VALID) == 0) {
1364 cons_ptr += (int)sizeof(struct ring_entry);
1365 cons_ptr &= PROD_CONS_MASK;
1366 }
1367 }
1368
1369
1370 writel(cons_ptr, &port->ip_serial_regs->srcir);
1371 port->ip_rx_cons = cons_ptr;
1372
1373
1374
1375
1376 if ((port->ip_flags & INPUT_HIGH) && (((prod_ptr - cons_ptr)
1377 & PROD_CONS_MASK) <
1378 ((port->
1379 ip_sscr &
1380 SSCR_RX_THRESHOLD)
1381 << PROD_CONS_PTR_OFF))) {
1382 port->ip_flags &= ~INPUT_HIGH;
1383 enable_intrs(port, hooks->intr_rx_high);
1384 }
1385 return total;
1386}
1387
1388
1389
1390
1391
1392static int receive_chars(struct uart_port *the_port)
1393{
1394 struct tty_struct *tty;
1395 unsigned char ch[MAX_CHARS];
1396 int read_count = 0, read_room, flip = 0;
1397 struct uart_state *state = the_port->state;
1398 struct ioc3_port *port = get_ioc3_port(the_port);
1399 unsigned long pflags;
1400
1401
1402 if (!state)
1403 return 0;
1404 if (!state->port.tty)
1405 return 0;
1406
1407 if (!(port->ip_flags & INPUT_ENABLE))
1408 return 0;
1409
1410 spin_lock_irqsave(&the_port->lock, pflags);
1411 tty = state->port.tty;
1412
1413 read_count = do_read(the_port, ch, MAX_CHARS);
1414 if (read_count > 0) {
1415 flip = 1;
1416 read_room = tty_insert_flip_string(tty, ch, read_count);
1417 the_port->icount.rx += read_count;
1418 }
1419 spin_unlock_irqrestore(&the_port->lock, pflags);
1420
1421 if (flip)
1422 tty_flip_buffer_push(tty);
1423
1424 return read_count;
1425}
1426
1427
1428
1429
1430
1431
1432
1433
1434static int inline
1435ioc3uart_intr_one(struct ioc3_submodule *is,
1436 struct ioc3_driver_data *idd,
1437 unsigned int pending)
1438{
1439 int port_num = GET_PORT_FROM_SIO_IR(pending);
1440 struct port_hooks *hooks;
1441 unsigned int rx_high_rd_aborted = 0;
1442 unsigned long flags;
1443 struct uart_port *the_port;
1444 struct ioc3_port *port;
1445 int loop_counter;
1446 struct ioc3_card *card_ptr;
1447 unsigned int sio_ir;
1448
1449 card_ptr = idd->data[is->id];
1450 port = card_ptr->ic_port[port_num].icp_port;
1451 hooks = port->ip_hooks;
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468 sio_ir = pending & ~(hooks->intr_tx_mt);
1469 spin_lock_irqsave(&port->ip_lock, flags);
1470
1471 loop_counter = MAXITER;
1472
1473 do {
1474 uint32_t shadow;
1475
1476 if (loop_counter-- <= 0) {
1477 printk(KERN_WARNING "IOC3 serial: "
1478 "possible hang condition/"
1479 "port stuck on interrupt (line %d).\n",
1480 ((struct uart_port *)port->ip_port)->line);
1481 break;
1482 }
1483
1484 if (sio_ir & hooks->intr_delta_dcd) {
1485 ioc3_ack(is, idd, hooks->intr_delta_dcd);
1486 shadow = readl(&port->ip_serial_regs->shadow);
1487
1488 if ((port->ip_notify & N_DDCD)
1489 && (shadow & SHADOW_DCD)
1490 && (port->ip_port)) {
1491 the_port = port->ip_port;
1492 uart_handle_dcd_change(the_port,
1493 shadow & SHADOW_DCD);
1494 wake_up_interruptible
1495 (&the_port->state->port.delta_msr_wait);
1496 } else if ((port->ip_notify & N_DDCD)
1497 && !(shadow & SHADOW_DCD)) {
1498
1499 uart_handle_dcd_change(port->ip_port,
1500 shadow & SHADOW_DCD);
1501 port->ip_flags |= DCD_ON;
1502 }
1503 }
1504
1505
1506 if (sio_ir & hooks->intr_delta_cts) {
1507 ioc3_ack(is, idd, hooks->intr_delta_cts);
1508 shadow = readl(&port->ip_serial_regs->shadow);
1509
1510 if ((port->ip_notify & N_DCTS) && (port->ip_port)) {
1511 the_port = port->ip_port;
1512 uart_handle_cts_change(the_port, shadow
1513 & SHADOW_CTS);
1514 wake_up_interruptible
1515 (&the_port->state->port.delta_msr_wait);
1516 }
1517 }
1518
1519
1520
1521
1522
1523 if (sio_ir & hooks->intr_rx_timer) {
1524 ioc3_ack(is, idd, hooks->intr_rx_timer);
1525 if ((port->ip_notify & N_DATA_READY)
1526 && (port->ip_port)) {
1527 receive_chars(port->ip_port);
1528 }
1529 }
1530
1531
1532 else if (sio_ir & hooks->intr_rx_high) {
1533
1534 if ((port->ip_notify & N_DATA_READY) && port->ip_port) {
1535 receive_chars(port->ip_port);
1536 }
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547 if ((sio_ir = PENDING(card_ptr, idd))
1548 & hooks->intr_rx_high) {
1549 if (port->ip_flags & READ_ABORTED) {
1550 rx_high_rd_aborted++;
1551 }
1552 else {
1553 card_ptr->ic_enable &= ~hooks->intr_rx_high;
1554 port->ip_flags |= INPUT_HIGH;
1555 }
1556 }
1557 }
1558
1559
1560
1561
1562
1563 if (sio_ir & hooks->intr_tx_explicit) {
1564 port->ip_flags &= ~LOWAT_WRITTEN;
1565 ioc3_ack(is, idd, hooks->intr_tx_explicit);
1566 if (port->ip_notify & N_OUTPUT_LOWAT)
1567 ioc3_cb_output_lowat(port);
1568 }
1569
1570
1571 else if (sio_ir & hooks->intr_tx_mt) {
1572
1573
1574
1575
1576
1577
1578
1579 if (port->ip_notify & N_OUTPUT_LOWAT) {
1580 ioc3_cb_output_lowat(port);
1581
1582
1583
1584
1585
1586 sio_ir = PENDING(card_ptr, idd);
1587 }
1588
1589
1590
1591
1592 if (sio_ir & hooks->intr_tx_mt) {
1593
1594
1595
1596
1597
1598 if (!(port->ip_notify
1599 & (N_DATA_READY | N_DDCD))) {
1600 BUG_ON(!(port->ip_sscr
1601 & SSCR_DMA_EN));
1602 port->ip_sscr &= ~SSCR_DMA_EN;
1603 writel(port->ip_sscr,
1604 &port->ip_serial_regs->sscr);
1605 }
1606
1607 card_ptr->ic_enable &= ~hooks->intr_tx_mt;
1608 }
1609 }
1610 sio_ir = PENDING(card_ptr, idd);
1611
1612
1613
1614
1615
1616 if (rx_high_rd_aborted && (sio_ir == hooks->intr_rx_high)) {
1617 sio_ir &= ~hooks->intr_rx_high;
1618 }
1619 } while (sio_ir & hooks->intr_all);
1620
1621 spin_unlock_irqrestore(&port->ip_lock, flags);
1622 ioc3_enable(is, idd, card_ptr->ic_enable);
1623 return 0;
1624}
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634static int ioc3uart_intr(struct ioc3_submodule *is,
1635 struct ioc3_driver_data *idd,
1636 unsigned int pending)
1637{
1638 int ret = 0;
1639
1640
1641
1642
1643
1644
1645 if (pending & SIO_IR_SA)
1646 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SA);
1647 if (pending & SIO_IR_SB)
1648 ret |= ioc3uart_intr_one(is, idd, pending & SIO_IR_SB);
1649
1650 return ret;
1651}
1652
1653
1654
1655
1656
1657
1658static const char *ic3_type(struct uart_port *the_port)
1659{
1660 if (IS_RS232(the_port->line))
1661 return "SGI IOC3 Serial [rs232]";
1662 else
1663 return "SGI IOC3 Serial [rs422]";
1664}
1665
1666
1667
1668
1669
1670
1671static unsigned int ic3_tx_empty(struct uart_port *the_port)
1672{
1673 unsigned int ret = 0;
1674 struct ioc3_port *port = get_ioc3_port(the_port);
1675
1676 if (readl(&port->ip_serial_regs->shadow) & SHADOW_TEMT)
1677 ret = TIOCSER_TEMT;
1678 return ret;
1679}
1680
1681
1682
1683
1684
1685
1686static void ic3_stop_tx(struct uart_port *the_port)
1687{
1688 struct ioc3_port *port = get_ioc3_port(the_port);
1689
1690 if (port)
1691 set_notification(port, N_OUTPUT_LOWAT, 0);
1692}
1693
1694
1695
1696
1697
1698
1699static void ic3_stop_rx(struct uart_port *the_port)
1700{
1701 struct ioc3_port *port = get_ioc3_port(the_port);
1702
1703 if (port)
1704 port->ip_flags &= ~INPUT_ENABLE;
1705}
1706
1707
1708
1709
1710
1711
1712static void null_void_function(struct uart_port *the_port)
1713{
1714}
1715
1716
1717
1718
1719
1720
1721static void ic3_shutdown(struct uart_port *the_port)
1722{
1723 unsigned long port_flags;
1724 struct ioc3_port *port;
1725 struct uart_state *state;
1726
1727 port = get_ioc3_port(the_port);
1728 if (!port)
1729 return;
1730
1731 state = the_port->state;
1732 wake_up_interruptible(&state->port.delta_msr_wait);
1733
1734 spin_lock_irqsave(&the_port->lock, port_flags);
1735 set_notification(port, N_ALL, 0);
1736 spin_unlock_irqrestore(&the_port->lock, port_flags);
1737}
1738
1739
1740
1741
1742
1743
1744
1745static void ic3_set_mctrl(struct uart_port *the_port, unsigned int mctrl)
1746{
1747 unsigned char mcr = 0;
1748
1749 if (mctrl & TIOCM_RTS)
1750 mcr |= UART_MCR_RTS;
1751 if (mctrl & TIOCM_DTR)
1752 mcr |= UART_MCR_DTR;
1753 if (mctrl & TIOCM_OUT1)
1754 mcr |= UART_MCR_OUT1;
1755 if (mctrl & TIOCM_OUT2)
1756 mcr |= UART_MCR_OUT2;
1757 if (mctrl & TIOCM_LOOP)
1758 mcr |= UART_MCR_LOOP;
1759
1760 set_mcr(the_port, mcr, SHADOW_DTR);
1761}
1762
1763
1764
1765
1766
1767
1768static unsigned int ic3_get_mctrl(struct uart_port *the_port)
1769{
1770 struct ioc3_port *port = get_ioc3_port(the_port);
1771 uint32_t shadow;
1772 unsigned int ret = 0;
1773
1774 if (!port)
1775 return 0;
1776
1777 shadow = readl(&port->ip_serial_regs->shadow);
1778 if (shadow & SHADOW_DCD)
1779 ret |= TIOCM_CD;
1780 if (shadow & SHADOW_DR)
1781 ret |= TIOCM_DSR;
1782 if (shadow & SHADOW_CTS)
1783 ret |= TIOCM_CTS;
1784 return ret;
1785}
1786
1787
1788
1789
1790
1791
1792static void ic3_start_tx(struct uart_port *the_port)
1793{
1794 struct ioc3_port *port = get_ioc3_port(the_port);
1795
1796 if (port) {
1797 set_notification(port, N_OUTPUT_LOWAT, 1);
1798 enable_intrs(port, port->ip_hooks->intr_tx_mt);
1799 }
1800}
1801
1802
1803
1804
1805
1806
1807
1808static void ic3_break_ctl(struct uart_port *the_port, int break_state)
1809{
1810}
1811
1812
1813
1814
1815
1816
1817static int ic3_startup(struct uart_port *the_port)
1818{
1819 int retval;
1820 struct ioc3_port *port;
1821 struct ioc3_card *card_ptr;
1822 unsigned long port_flags;
1823
1824 if (!the_port) {
1825 NOT_PROGRESS();
1826 return -ENODEV;
1827 }
1828 port = get_ioc3_port(the_port);
1829 if (!port) {
1830 NOT_PROGRESS();
1831 return -ENODEV;
1832 }
1833 card_ptr = port->ip_card;
1834 port->ip_port = the_port;
1835
1836 if (!card_ptr) {
1837 NOT_PROGRESS();
1838 return -ENODEV;
1839 }
1840
1841
1842 spin_lock_irqsave(&the_port->lock, port_flags);
1843 retval = ic3_startup_local(the_port);
1844 spin_unlock_irqrestore(&the_port->lock, port_flags);
1845 return retval;
1846}
1847
1848
1849
1850
1851
1852
1853
1854
1855static void
1856ic3_set_termios(struct uart_port *the_port,
1857 struct ktermios *termios, struct ktermios *old_termios)
1858{
1859 unsigned long port_flags;
1860
1861 spin_lock_irqsave(&the_port->lock, port_flags);
1862 ioc3_change_speed(the_port, termios, old_termios);
1863 spin_unlock_irqrestore(&the_port->lock, port_flags);
1864}
1865
1866
1867
1868
1869
1870
1871static int ic3_request_port(struct uart_port *port)
1872{
1873 return 0;
1874}
1875
1876
1877static struct uart_ops ioc3_ops = {
1878 .tx_empty = ic3_tx_empty,
1879 .set_mctrl = ic3_set_mctrl,
1880 .get_mctrl = ic3_get_mctrl,
1881 .stop_tx = ic3_stop_tx,
1882 .start_tx = ic3_start_tx,
1883 .stop_rx = ic3_stop_rx,
1884 .enable_ms = null_void_function,
1885 .break_ctl = ic3_break_ctl,
1886 .startup = ic3_startup,
1887 .shutdown = ic3_shutdown,
1888 .set_termios = ic3_set_termios,
1889 .type = ic3_type,
1890 .release_port = null_void_function,
1891 .request_port = ic3_request_port,
1892};
1893
1894
1895
1896
1897
1898static struct uart_driver ioc3_uart = {
1899 .owner = THIS_MODULE,
1900 .driver_name = "ioc3_serial",
1901 .dev_name = DEVICE_NAME,
1902 .major = DEVICE_MAJOR,
1903 .minor = DEVICE_MINOR,
1904 .nr = MAX_LOGICAL_PORTS
1905};
1906
1907
1908
1909
1910
1911
1912
1913static inline int ioc3_serial_core_attach( struct ioc3_submodule *is,
1914 struct ioc3_driver_data *idd)
1915{
1916 struct ioc3_port *port;
1917 struct uart_port *the_port;
1918 struct ioc3_card *card_ptr = idd->data[is->id];
1919 int ii, phys_port;
1920 struct pci_dev *pdev = idd->pdev;
1921
1922 DPRINT_CONFIG(("%s: attach pdev 0x%p - card_ptr 0x%p\n",
1923 __func__, pdev, (void *)card_ptr));
1924
1925 if (!card_ptr)
1926 return -ENODEV;
1927
1928
1929 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1930 phys_port = GET_PHYSICAL_PORT(ii);
1931 the_port = &card_ptr->ic_port[phys_port].
1932 icp_uart_port[GET_LOGICAL_PORT(ii)];
1933 port = card_ptr->ic_port[phys_port].icp_port;
1934 port->ip_port = the_port;
1935
1936 DPRINT_CONFIG(("%s: attach the_port 0x%p / port 0x%p [%d/%d]\n",
1937 __func__, (void *)the_port, (void *)port,
1938 phys_port, ii));
1939
1940
1941 the_port->membase = (unsigned char __iomem *)1;
1942 the_port->iobase = (pdev->bus->number << 16) | ii;
1943 the_port->line = (Num_of_ioc3_cards << 2) | ii;
1944 the_port->mapbase = 1;
1945 the_port->type = PORT_16550A;
1946 the_port->fifosize = FIFO_SIZE;
1947 the_port->ops = &ioc3_ops;
1948 the_port->irq = idd->irq_io;
1949 the_port->dev = &pdev->dev;
1950
1951 if (uart_add_one_port(&ioc3_uart, the_port) < 0) {
1952 printk(KERN_WARNING
1953 "%s: unable to add port %d bus %d\n",
1954 __func__, the_port->line, pdev->bus->number);
1955 } else {
1956 DPRINT_CONFIG(("IOC3 serial port %d irq %d bus %d\n",
1957 the_port->line, the_port->irq, pdev->bus->number));
1958 }
1959
1960
1961 if (IS_PHYSICAL_PORT(ii))
1962 ioc3_set_proto(port, PROTO_RS232);
1963 }
1964 return 0;
1965}
1966
1967
1968
1969
1970
1971
1972
1973static int ioc3uart_remove(struct ioc3_submodule *is,
1974 struct ioc3_driver_data *idd)
1975{
1976 struct ioc3_card *card_ptr = idd->data[is->id];
1977 struct uart_port *the_port;
1978 struct ioc3_port *port;
1979 int ii;
1980
1981 if (card_ptr) {
1982 for (ii = 0; ii < LOGICAL_PORTS_PER_CARD; ii++) {
1983 the_port = &card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1984 icp_uart_port[GET_LOGICAL_PORT(ii)];
1985 if (the_port)
1986 uart_remove_one_port(&ioc3_uart, the_port);
1987 port = card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].icp_port;
1988 if (port && IS_PHYSICAL_PORT(ii)
1989 && (GET_PHYSICAL_PORT(ii) == 0)) {
1990 pci_free_consistent(port->ip_idd->pdev,
1991 TOTAL_RING_BUF_SIZE,
1992 (void *)port->ip_cpu_ringbuf,
1993 port->ip_dma_ringbuf);
1994 kfree(port);
1995 card_ptr->ic_port[GET_PHYSICAL_PORT(ii)].
1996 icp_port = NULL;
1997 }
1998 }
1999 kfree(card_ptr);
2000 idd->data[is->id] = NULL;
2001 }
2002 return 0;
2003}
2004
2005
2006
2007
2008
2009
2010
2011static int __devinit
2012ioc3uart_probe(struct ioc3_submodule *is, struct ioc3_driver_data *idd)
2013{
2014 struct pci_dev *pdev = idd->pdev;
2015 struct ioc3_card *card_ptr;
2016 int ret = 0;
2017 struct ioc3_port *port;
2018 struct ioc3_port *ports[PORTS_PER_CARD];
2019 int phys_port;
2020 int cnt;
2021
2022 DPRINT_CONFIG(("%s (0x%p, 0x%p)\n", __func__, is, idd));
2023
2024 card_ptr = kzalloc(sizeof(struct ioc3_card), GFP_KERNEL);
2025 if (!card_ptr) {
2026 printk(KERN_WARNING "ioc3_attach_one"
2027 ": unable to get memory for the IOC3\n");
2028 return -ENOMEM;
2029 }
2030 idd->data[is->id] = card_ptr;
2031 Submodule_slot = is->id;
2032
2033 writel(((UARTA_BASE >> 3) << SIO_CR_SER_A_BASE_SHIFT) |
2034 ((UARTB_BASE >> 3) << SIO_CR_SER_B_BASE_SHIFT) |
2035 (0xf << SIO_CR_CMD_PULSE_SHIFT), &idd->vma->sio_cr);
2036
2037 pci_write_config_dword(pdev, PCI_LAT, 0xff00);
2038
2039
2040 ioc3_gpcr_set(idd, GPCR_UARTA_MODESEL | GPCR_UARTB_MODESEL);
2041
2042
2043 for (phys_port = 0; phys_port < PORTS_PER_CARD; phys_port++) {
2044 port = kzalloc(sizeof(struct ioc3_port), GFP_KERNEL);
2045 if (!port) {
2046 printk(KERN_WARNING
2047 "IOC3 serial memory not available for port\n");
2048 ret = -ENOMEM;
2049 goto out4;
2050 }
2051 spin_lock_init(&port->ip_lock);
2052
2053
2054
2055
2056 ports[phys_port] = port;
2057
2058
2059 card_ptr->ic_port[phys_port].icp_port = port;
2060 port->ip_is = is;
2061 port->ip_idd = idd;
2062 port->ip_baud = 9600;
2063 port->ip_card = card_ptr;
2064 port->ip_hooks = &hooks_array[phys_port];
2065
2066
2067 if (phys_port == 0) {
2068 port->ip_serial_regs = &idd->vma->port_a;
2069 port->ip_uart_regs = &idd->vma->sregs.uarta;
2070
2071 DPRINT_CONFIG(("%s : Port A ip_serial_regs 0x%p "
2072 "ip_uart_regs 0x%p\n",
2073 __func__,
2074 (void *)port->ip_serial_regs,
2075 (void *)port->ip_uart_regs));
2076
2077
2078 port->ip_cpu_ringbuf = pci_alloc_consistent(pdev,
2079 TOTAL_RING_BUF_SIZE, &port->ip_dma_ringbuf);
2080
2081 BUG_ON(!((((int64_t) port->ip_dma_ringbuf) &
2082 (TOTAL_RING_BUF_SIZE - 1)) == 0));
2083 port->ip_inring = RING(port, RX_A);
2084 port->ip_outring = RING(port, TX_A);
2085 DPRINT_CONFIG(("%s : Port A ip_cpu_ringbuf 0x%p "
2086 "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2087 "ip_outring 0x%p\n",
2088 __func__,
2089 (void *)port->ip_cpu_ringbuf,
2090 (void *)port->ip_dma_ringbuf,
2091 (void *)port->ip_inring,
2092 (void *)port->ip_outring));
2093 }
2094 else {
2095 port->ip_serial_regs = &idd->vma->port_b;
2096 port->ip_uart_regs = &idd->vma->sregs.uartb;
2097
2098 DPRINT_CONFIG(("%s : Port B ip_serial_regs 0x%p "
2099 "ip_uart_regs 0x%p\n",
2100 __func__,
2101 (void *)port->ip_serial_regs,
2102 (void *)port->ip_uart_regs));
2103
2104
2105 port->ip_dma_ringbuf =
2106 ports[phys_port - 1]->ip_dma_ringbuf;
2107 port->ip_cpu_ringbuf =
2108 ports[phys_port - 1]->ip_cpu_ringbuf;
2109 port->ip_inring = RING(port, RX_B);
2110 port->ip_outring = RING(port, TX_B);
2111 DPRINT_CONFIG(("%s : Port B ip_cpu_ringbuf 0x%p "
2112 "ip_dma_ringbuf 0x%p, ip_inring 0x%p "
2113 "ip_outring 0x%p\n",
2114 __func__,
2115 (void *)port->ip_cpu_ringbuf,
2116 (void *)port->ip_dma_ringbuf,
2117 (void *)port->ip_inring,
2118 (void *)port->ip_outring));
2119 }
2120
2121 DPRINT_CONFIG(("%s : port %d [addr 0x%p] card_ptr 0x%p",
2122 __func__,
2123 phys_port, (void *)port, (void *)card_ptr));
2124 DPRINT_CONFIG((" ip_serial_regs 0x%p ip_uart_regs 0x%p\n",
2125 (void *)port->ip_serial_regs,
2126 (void *)port->ip_uart_regs));
2127
2128
2129 port_init(port);
2130
2131 DPRINT_CONFIG(("%s: phys_port %d port 0x%p inring 0x%p "
2132 "outring 0x%p\n",
2133 __func__,
2134 phys_port, (void *)port,
2135 (void *)port->ip_inring,
2136 (void *)port->ip_outring));
2137
2138 }
2139
2140
2141
2142 if ((ret = ioc3_serial_core_attach(is, idd)))
2143 goto out4;
2144
2145 Num_of_ioc3_cards++;
2146
2147 return ret;
2148
2149
2150out4:
2151 for (cnt = 0; cnt < phys_port; cnt++)
2152 kfree(ports[cnt]);
2153
2154 kfree(card_ptr);
2155 return ret;
2156}
2157
2158static struct ioc3_submodule ioc3uart_ops = {
2159 .name = "IOC3uart",
2160 .probe = ioc3uart_probe,
2161 .remove = ioc3uart_remove,
2162
2163 .irq_mask = SIO_IR_SA | SIO_IR_SB,
2164 .intr = ioc3uart_intr,
2165 .owner = THIS_MODULE,
2166};
2167
2168
2169
2170
2171static int __init ioc3uart_init(void)
2172{
2173 int ret;
2174
2175
2176 if ((ret = uart_register_driver(&ioc3_uart)) < 0) {
2177 printk(KERN_WARNING
2178 "%s: Couldn't register IOC3 uart serial driver\n",
2179 __func__);
2180 return ret;
2181 }
2182 ret = ioc3_register_submodule(&ioc3uart_ops);
2183 if (ret)
2184 uart_unregister_driver(&ioc3_uart);
2185 return ret;
2186}
2187
2188static void __exit ioc3uart_exit(void)
2189{
2190 ioc3_unregister_submodule(&ioc3uart_ops);
2191 uart_unregister_driver(&ioc3_uart);
2192}
2193
2194module_init(ioc3uart_init);
2195module_exit(ioc3uart_exit);
2196
2197MODULE_AUTHOR("Pat Gefre - Silicon Graphics Inc. (SGI) <pfg@sgi.com>");
2198MODULE_DESCRIPTION("Serial PCI driver module for SGI IOC3 card");
2199MODULE_LICENSE("GPL");
2200