linux/drivers/tty/serial/sunsu.c
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   1/*
   2 * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3 *
   4 * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5 * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   6 *
   7 * This is mainly a variation of 8250.c, credits go to authors mentioned
   8 * therein.  In fact this driver should be merged into the generic 8250.c
   9 * infrastructure perhaps using a 8250_sparc.c module.
  10 *
  11 * Fixed to use tty_get_baud_rate().
  12 *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13 *
  14 * Converted to new 2.5.x UART layer.
  15 *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  16 */
  17
  18#include <linux/module.h>
  19#include <linux/kernel.h>
  20#include <linux/spinlock.h>
  21#include <linux/errno.h>
  22#include <linux/tty.h>
  23#include <linux/tty_flip.h>
  24#include <linux/major.h>
  25#include <linux/string.h>
  26#include <linux/ptrace.h>
  27#include <linux/ioport.h>
  28#include <linux/circ_buf.h>
  29#include <linux/serial.h>
  30#include <linux/sysrq.h>
  31#include <linux/console.h>
  32#include <linux/slab.h>
  33#ifdef CONFIG_SERIO
  34#include <linux/serio.h>
  35#endif
  36#include <linux/serial_reg.h>
  37#include <linux/init.h>
  38#include <linux/delay.h>
  39#include <linux/of_device.h>
  40
  41#include <asm/io.h>
  42#include <asm/irq.h>
  43#include <asm/prom.h>
  44
  45#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  46#define SUPPORT_SYSRQ
  47#endif
  48
  49#include <linux/serial_core.h>
  50
  51#include "suncore.h"
  52
  53/* We are on a NS PC87303 clocked with 24.0 MHz, which results
  54 * in a UART clock of 1.8462 MHz.
  55 */
  56#define SU_BASE_BAUD    (1846200 / 16)
  57
  58enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  59static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  60
  61/*
  62 * Here we define the default xmit fifo size used for each type of UART.
  63 */
  64static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  65        { "unknown",    1,      0 },
  66        { "8250",       1,      0 },
  67        { "16450",      1,      0 },
  68        { "16550",      1,      0 },
  69        { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  70        { "Cirrus",     1,      0 },
  71        { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  72        { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  73        { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  74        { "Startech",   1,      0 },
  75        { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  76        { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  77        { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  78        { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  79};
  80
  81struct uart_sunsu_port {
  82        struct uart_port        port;
  83        unsigned char           acr;
  84        unsigned char           ier;
  85        unsigned short          rev;
  86        unsigned char           lcr;
  87        unsigned int            lsr_break_flag;
  88        unsigned int            cflag;
  89
  90        /* Probing information.  */
  91        enum su_type            su_type;
  92        unsigned int            type_probed;    /* XXX Stupid */
  93        unsigned long           reg_size;
  94
  95#ifdef CONFIG_SERIO
  96        struct serio            serio;
  97        int                     serio_open;
  98#endif
  99};
 100
 101static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 102{
 103        offset <<= up->port.regshift;
 104
 105        switch (up->port.iotype) {
 106        case UPIO_HUB6:
 107                outb(up->port.hub6 - 1 + offset, up->port.iobase);
 108                return inb(up->port.iobase + 1);
 109
 110        case UPIO_MEM:
 111                return readb(up->port.membase + offset);
 112
 113        default:
 114                return inb(up->port.iobase + offset);
 115        }
 116}
 117
 118static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 119{
 120#ifndef CONFIG_SPARC64
 121        /*
 122         * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 123         * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 124         * gate outputs a logical one. Since we use level triggered interrupts
 125         * we have lockup and watchdog reset. We cannot mask IRQ because
 126         * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 127         * This problem is similar to what Alpha people suffer, see serial.c.
 128         */
 129        if (offset == UART_MCR)
 130                value |= UART_MCR_OUT2;
 131#endif
 132        offset <<= up->port.regshift;
 133
 134        switch (up->port.iotype) {
 135        case UPIO_HUB6:
 136                outb(up->port.hub6 - 1 + offset, up->port.iobase);
 137                outb(value, up->port.iobase + 1);
 138                break;
 139
 140        case UPIO_MEM:
 141                writeb(value, up->port.membase + offset);
 142                break;
 143
 144        default:
 145                outb(value, up->port.iobase + offset);
 146        }
 147}
 148
 149/*
 150 * We used to support using pause I/O for certain machines.  We
 151 * haven't supported this for a while, but just in case it's badly
 152 * needed for certain old 386 machines, I've left these #define's
 153 * in....
 154 */
 155#define serial_inp(up, offset)          serial_in(up, offset)
 156#define serial_outp(up, offset, value)  serial_out(up, offset, value)
 157
 158
 159/*
 160 * For the 16C950
 161 */
 162static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 163{
 164        serial_out(up, UART_SCR, offset);
 165        serial_out(up, UART_ICR, value);
 166}
 167
 168#if 0 /* Unused currently */
 169static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 170{
 171        unsigned int value;
 172
 173        serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 174        serial_out(up, UART_SCR, offset);
 175        value = serial_in(up, UART_ICR);
 176        serial_icr_write(up, UART_ACR, up->acr);
 177
 178        return value;
 179}
 180#endif
 181
 182#ifdef CONFIG_SERIAL_8250_RSA
 183/*
 184 * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 185 * We set the port uart clock rate if we succeed.
 186 */
 187static int __enable_rsa(struct uart_sunsu_port *up)
 188{
 189        unsigned char mode;
 190        int result;
 191
 192        mode = serial_inp(up, UART_RSA_MSR);
 193        result = mode & UART_RSA_MSR_FIFO;
 194
 195        if (!result) {
 196                serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 197                mode = serial_inp(up, UART_RSA_MSR);
 198                result = mode & UART_RSA_MSR_FIFO;
 199        }
 200
 201        if (result)
 202                up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 203
 204        return result;
 205}
 206
 207static void enable_rsa(struct uart_sunsu_port *up)
 208{
 209        if (up->port.type == PORT_RSA) {
 210                if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 211                        spin_lock_irq(&up->port.lock);
 212                        __enable_rsa(up);
 213                        spin_unlock_irq(&up->port.lock);
 214                }
 215                if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 216                        serial_outp(up, UART_RSA_FRR, 0);
 217        }
 218}
 219
 220/*
 221 * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 222 * It is unknown why interrupts were disabled in here.  However,
 223 * the caller is expected to preserve this behaviour by grabbing
 224 * the spinlock before calling this function.
 225 */
 226static void disable_rsa(struct uart_sunsu_port *up)
 227{
 228        unsigned char mode;
 229        int result;
 230
 231        if (up->port.type == PORT_RSA &&
 232            up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 233                spin_lock_irq(&up->port.lock);
 234
 235                mode = serial_inp(up, UART_RSA_MSR);
 236                result = !(mode & UART_RSA_MSR_FIFO);
 237
 238                if (!result) {
 239                        serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 240                        mode = serial_inp(up, UART_RSA_MSR);
 241                        result = !(mode & UART_RSA_MSR_FIFO);
 242                }
 243
 244                if (result)
 245                        up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 246                spin_unlock_irq(&up->port.lock);
 247        }
 248}
 249#endif /* CONFIG_SERIAL_8250_RSA */
 250
 251static inline void __stop_tx(struct uart_sunsu_port *p)
 252{
 253        if (p->ier & UART_IER_THRI) {
 254                p->ier &= ~UART_IER_THRI;
 255                serial_out(p, UART_IER, p->ier);
 256        }
 257}
 258
 259static void sunsu_stop_tx(struct uart_port *port)
 260{
 261        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 262
 263        __stop_tx(up);
 264
 265        /*
 266         * We really want to stop the transmitter from sending.
 267         */
 268        if (up->port.type == PORT_16C950) {
 269                up->acr |= UART_ACR_TXDIS;
 270                serial_icr_write(up, UART_ACR, up->acr);
 271        }
 272}
 273
 274static void sunsu_start_tx(struct uart_port *port)
 275{
 276        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 277
 278        if (!(up->ier & UART_IER_THRI)) {
 279                up->ier |= UART_IER_THRI;
 280                serial_out(up, UART_IER, up->ier);
 281        }
 282
 283        /*
 284         * Re-enable the transmitter if we disabled it.
 285         */
 286        if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 287                up->acr &= ~UART_ACR_TXDIS;
 288                serial_icr_write(up, UART_ACR, up->acr);
 289        }
 290}
 291
 292static void sunsu_stop_rx(struct uart_port *port)
 293{
 294        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 295
 296        up->ier &= ~UART_IER_RLSI;
 297        up->port.read_status_mask &= ~UART_LSR_DR;
 298        serial_out(up, UART_IER, up->ier);
 299}
 300
 301static void sunsu_enable_ms(struct uart_port *port)
 302{
 303        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 304        unsigned long flags;
 305
 306        spin_lock_irqsave(&up->port.lock, flags);
 307        up->ier |= UART_IER_MSI;
 308        serial_out(up, UART_IER, up->ier);
 309        spin_unlock_irqrestore(&up->port.lock, flags);
 310}
 311
 312static struct tty_struct *
 313receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 314{
 315        struct tty_struct *tty = up->port.state->port.tty;
 316        unsigned char ch, flag;
 317        int max_count = 256;
 318        int saw_console_brk = 0;
 319
 320        do {
 321                ch = serial_inp(up, UART_RX);
 322                flag = TTY_NORMAL;
 323                up->port.icount.rx++;
 324
 325                if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 326                                       UART_LSR_FE | UART_LSR_OE))) {
 327                        /*
 328                         * For statistics only
 329                         */
 330                        if (*status & UART_LSR_BI) {
 331                                *status &= ~(UART_LSR_FE | UART_LSR_PE);
 332                                up->port.icount.brk++;
 333                                if (up->port.cons != NULL &&
 334                                    up->port.line == up->port.cons->index)
 335                                        saw_console_brk = 1;
 336                                /*
 337                                 * We do the SysRQ and SAK checking
 338                                 * here because otherwise the break
 339                                 * may get masked by ignore_status_mask
 340                                 * or read_status_mask.
 341                                 */
 342                                if (uart_handle_break(&up->port))
 343                                        goto ignore_char;
 344                        } else if (*status & UART_LSR_PE)
 345                                up->port.icount.parity++;
 346                        else if (*status & UART_LSR_FE)
 347                                up->port.icount.frame++;
 348                        if (*status & UART_LSR_OE)
 349                                up->port.icount.overrun++;
 350
 351                        /*
 352                         * Mask off conditions which should be ingored.
 353                         */
 354                        *status &= up->port.read_status_mask;
 355
 356                        if (up->port.cons != NULL &&
 357                            up->port.line == up->port.cons->index) {
 358                                /* Recover the break flag from console xmit */
 359                                *status |= up->lsr_break_flag;
 360                                up->lsr_break_flag = 0;
 361                        }
 362
 363                        if (*status & UART_LSR_BI) {
 364                                flag = TTY_BREAK;
 365                        } else if (*status & UART_LSR_PE)
 366                                flag = TTY_PARITY;
 367                        else if (*status & UART_LSR_FE)
 368                                flag = TTY_FRAME;
 369                }
 370                if (uart_handle_sysrq_char(&up->port, ch))
 371                        goto ignore_char;
 372                if ((*status & up->port.ignore_status_mask) == 0)
 373                        tty_insert_flip_char(tty, ch, flag);
 374                if (*status & UART_LSR_OE)
 375                        /*
 376                         * Overrun is special, since it's reported
 377                         * immediately, and doesn't affect the current
 378                         * character.
 379                         */
 380                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 381        ignore_char:
 382                *status = serial_inp(up, UART_LSR);
 383        } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 384
 385        if (saw_console_brk)
 386                sun_do_break();
 387
 388        return tty;
 389}
 390
 391static void transmit_chars(struct uart_sunsu_port *up)
 392{
 393        struct circ_buf *xmit = &up->port.state->xmit;
 394        int count;
 395
 396        if (up->port.x_char) {
 397                serial_outp(up, UART_TX, up->port.x_char);
 398                up->port.icount.tx++;
 399                up->port.x_char = 0;
 400                return;
 401        }
 402        if (uart_tx_stopped(&up->port)) {
 403                sunsu_stop_tx(&up->port);
 404                return;
 405        }
 406        if (uart_circ_empty(xmit)) {
 407                __stop_tx(up);
 408                return;
 409        }
 410
 411        count = up->port.fifosize;
 412        do {
 413                serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 414                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 415                up->port.icount.tx++;
 416                if (uart_circ_empty(xmit))
 417                        break;
 418        } while (--count > 0);
 419
 420        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 421                uart_write_wakeup(&up->port);
 422
 423        if (uart_circ_empty(xmit))
 424                __stop_tx(up);
 425}
 426
 427static void check_modem_status(struct uart_sunsu_port *up)
 428{
 429        int status;
 430
 431        status = serial_in(up, UART_MSR);
 432
 433        if ((status & UART_MSR_ANY_DELTA) == 0)
 434                return;
 435
 436        if (status & UART_MSR_TERI)
 437                up->port.icount.rng++;
 438        if (status & UART_MSR_DDSR)
 439                up->port.icount.dsr++;
 440        if (status & UART_MSR_DDCD)
 441                uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 442        if (status & UART_MSR_DCTS)
 443                uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 444
 445        wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 446}
 447
 448static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 449{
 450        struct uart_sunsu_port *up = dev_id;
 451        unsigned long flags;
 452        unsigned char status;
 453
 454        spin_lock_irqsave(&up->port.lock, flags);
 455
 456        do {
 457                struct tty_struct *tty;
 458
 459                status = serial_inp(up, UART_LSR);
 460                tty = NULL;
 461                if (status & UART_LSR_DR)
 462                        tty = receive_chars(up, &status);
 463                check_modem_status(up);
 464                if (status & UART_LSR_THRE)
 465                        transmit_chars(up);
 466
 467                spin_unlock_irqrestore(&up->port.lock, flags);
 468
 469                if (tty)
 470                        tty_flip_buffer_push(tty);
 471
 472                spin_lock_irqsave(&up->port.lock, flags);
 473
 474        } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 475
 476        spin_unlock_irqrestore(&up->port.lock, flags);
 477
 478        return IRQ_HANDLED;
 479}
 480
 481/* Separate interrupt handling path for keyboard/mouse ports.  */
 482
 483static void
 484sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 485                   unsigned int iflag, unsigned int quot);
 486
 487static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 488{
 489        unsigned int cur_cflag = up->cflag;
 490        int quot, new_baud;
 491
 492        up->cflag &= ~CBAUD;
 493        up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 494
 495        quot = up->port.uartclk / (16 * new_baud);
 496
 497        sunsu_change_speed(&up->port, up->cflag, 0, quot);
 498}
 499
 500static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 501{
 502        do {
 503                unsigned char ch = serial_inp(up, UART_RX);
 504
 505                /* Stop-A is handled by drivers/char/keyboard.c now. */
 506                if (up->su_type == SU_PORT_KBD) {
 507#ifdef CONFIG_SERIO
 508                        serio_interrupt(&up->serio, ch, 0);
 509#endif
 510                } else if (up->su_type == SU_PORT_MS) {
 511                        int ret = suncore_mouse_baud_detection(ch, is_break);
 512
 513                        switch (ret) {
 514                        case 2:
 515                                sunsu_change_mouse_baud(up);
 516                                /* fallthru */
 517                        case 1:
 518                                break;
 519
 520                        case 0:
 521#ifdef CONFIG_SERIO
 522                                serio_interrupt(&up->serio, ch, 0);
 523#endif
 524                                break;
 525                        };
 526                }
 527        } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 528}
 529
 530static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 531{
 532        struct uart_sunsu_port *up = dev_id;
 533
 534        if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 535                unsigned char status = serial_inp(up, UART_LSR);
 536
 537                if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 538                        receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 539        }
 540
 541        return IRQ_HANDLED;
 542}
 543
 544static unsigned int sunsu_tx_empty(struct uart_port *port)
 545{
 546        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 547        unsigned long flags;
 548        unsigned int ret;
 549
 550        spin_lock_irqsave(&up->port.lock, flags);
 551        ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 552        spin_unlock_irqrestore(&up->port.lock, flags);
 553
 554        return ret;
 555}
 556
 557static unsigned int sunsu_get_mctrl(struct uart_port *port)
 558{
 559        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 560        unsigned char status;
 561        unsigned int ret;
 562
 563        status = serial_in(up, UART_MSR);
 564
 565        ret = 0;
 566        if (status & UART_MSR_DCD)
 567                ret |= TIOCM_CAR;
 568        if (status & UART_MSR_RI)
 569                ret |= TIOCM_RNG;
 570        if (status & UART_MSR_DSR)
 571                ret |= TIOCM_DSR;
 572        if (status & UART_MSR_CTS)
 573                ret |= TIOCM_CTS;
 574        return ret;
 575}
 576
 577static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 578{
 579        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 580        unsigned char mcr = 0;
 581
 582        if (mctrl & TIOCM_RTS)
 583                mcr |= UART_MCR_RTS;
 584        if (mctrl & TIOCM_DTR)
 585                mcr |= UART_MCR_DTR;
 586        if (mctrl & TIOCM_OUT1)
 587                mcr |= UART_MCR_OUT1;
 588        if (mctrl & TIOCM_OUT2)
 589                mcr |= UART_MCR_OUT2;
 590        if (mctrl & TIOCM_LOOP)
 591                mcr |= UART_MCR_LOOP;
 592
 593        serial_out(up, UART_MCR, mcr);
 594}
 595
 596static void sunsu_break_ctl(struct uart_port *port, int break_state)
 597{
 598        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 599        unsigned long flags;
 600
 601        spin_lock_irqsave(&up->port.lock, flags);
 602        if (break_state == -1)
 603                up->lcr |= UART_LCR_SBC;
 604        else
 605                up->lcr &= ~UART_LCR_SBC;
 606        serial_out(up, UART_LCR, up->lcr);
 607        spin_unlock_irqrestore(&up->port.lock, flags);
 608}
 609
 610static int sunsu_startup(struct uart_port *port)
 611{
 612        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 613        unsigned long flags;
 614        int retval;
 615
 616        if (up->port.type == PORT_16C950) {
 617                /* Wake up and initialize UART */
 618                up->acr = 0;
 619                serial_outp(up, UART_LCR, 0xBF);
 620                serial_outp(up, UART_EFR, UART_EFR_ECB);
 621                serial_outp(up, UART_IER, 0);
 622                serial_outp(up, UART_LCR, 0);
 623                serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 624                serial_outp(up, UART_LCR, 0xBF);
 625                serial_outp(up, UART_EFR, UART_EFR_ECB);
 626                serial_outp(up, UART_LCR, 0);
 627        }
 628
 629#ifdef CONFIG_SERIAL_8250_RSA
 630        /*
 631         * If this is an RSA port, see if we can kick it up to the
 632         * higher speed clock.
 633         */
 634        enable_rsa(up);
 635#endif
 636
 637        /*
 638         * Clear the FIFO buffers and disable them.
 639         * (they will be reenabled in set_termios())
 640         */
 641        if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 642                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 643                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 644                                UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 645                serial_outp(up, UART_FCR, 0);
 646        }
 647
 648        /*
 649         * Clear the interrupt registers.
 650         */
 651        (void) serial_inp(up, UART_LSR);
 652        (void) serial_inp(up, UART_RX);
 653        (void) serial_inp(up, UART_IIR);
 654        (void) serial_inp(up, UART_MSR);
 655
 656        /*
 657         * At this point, there's no way the LSR could still be 0xff;
 658         * if it is, then bail out, because there's likely no UART
 659         * here.
 660         */
 661        if (!(up->port.flags & UPF_BUGGY_UART) &&
 662            (serial_inp(up, UART_LSR) == 0xff)) {
 663                printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 664                return -ENODEV;
 665        }
 666
 667        if (up->su_type != SU_PORT_PORT) {
 668                retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 669                                     IRQF_SHARED, su_typev[up->su_type], up);
 670        } else {
 671                retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 672                                     IRQF_SHARED, su_typev[up->su_type], up);
 673        }
 674        if (retval) {
 675                printk("su: Cannot register IRQ %d\n", up->port.irq);
 676                return retval;
 677        }
 678
 679        /*
 680         * Now, initialize the UART
 681         */
 682        serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 683
 684        spin_lock_irqsave(&up->port.lock, flags);
 685
 686        up->port.mctrl |= TIOCM_OUT2;
 687
 688        sunsu_set_mctrl(&up->port, up->port.mctrl);
 689        spin_unlock_irqrestore(&up->port.lock, flags);
 690
 691        /*
 692         * Finally, enable interrupts.  Note: Modem status interrupts
 693         * are set via set_termios(), which will be occurring imminently
 694         * anyway, so we don't enable them here.
 695         */
 696        up->ier = UART_IER_RLSI | UART_IER_RDI;
 697        serial_outp(up, UART_IER, up->ier);
 698
 699        if (up->port.flags & UPF_FOURPORT) {
 700                unsigned int icp;
 701                /*
 702                 * Enable interrupts on the AST Fourport board
 703                 */
 704                icp = (up->port.iobase & 0xfe0) | 0x01f;
 705                outb_p(0x80, icp);
 706                (void) inb_p(icp);
 707        }
 708
 709        /*
 710         * And clear the interrupt registers again for luck.
 711         */
 712        (void) serial_inp(up, UART_LSR);
 713        (void) serial_inp(up, UART_RX);
 714        (void) serial_inp(up, UART_IIR);
 715        (void) serial_inp(up, UART_MSR);
 716
 717        return 0;
 718}
 719
 720static void sunsu_shutdown(struct uart_port *port)
 721{
 722        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 723        unsigned long flags;
 724
 725        /*
 726         * Disable interrupts from this port
 727         */
 728        up->ier = 0;
 729        serial_outp(up, UART_IER, 0);
 730
 731        spin_lock_irqsave(&up->port.lock, flags);
 732        if (up->port.flags & UPF_FOURPORT) {
 733                /* reset interrupts on the AST Fourport board */
 734                inb((up->port.iobase & 0xfe0) | 0x1f);
 735                up->port.mctrl |= TIOCM_OUT1;
 736        } else
 737                up->port.mctrl &= ~TIOCM_OUT2;
 738
 739        sunsu_set_mctrl(&up->port, up->port.mctrl);
 740        spin_unlock_irqrestore(&up->port.lock, flags);
 741
 742        /*
 743         * Disable break condition and FIFOs
 744         */
 745        serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 746        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 747                                  UART_FCR_CLEAR_RCVR |
 748                                  UART_FCR_CLEAR_XMIT);
 749        serial_outp(up, UART_FCR, 0);
 750
 751#ifdef CONFIG_SERIAL_8250_RSA
 752        /*
 753         * Reset the RSA board back to 115kbps compat mode.
 754         */
 755        disable_rsa(up);
 756#endif
 757
 758        /*
 759         * Read data port to reset things.
 760         */
 761        (void) serial_in(up, UART_RX);
 762
 763        free_irq(up->port.irq, up);
 764}
 765
 766static void
 767sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 768                   unsigned int iflag, unsigned int quot)
 769{
 770        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 771        unsigned char cval, fcr = 0;
 772        unsigned long flags;
 773
 774        switch (cflag & CSIZE) {
 775        case CS5:
 776                cval = 0x00;
 777                break;
 778        case CS6:
 779                cval = 0x01;
 780                break;
 781        case CS7:
 782                cval = 0x02;
 783                break;
 784        default:
 785        case CS8:
 786                cval = 0x03;
 787                break;
 788        }
 789
 790        if (cflag & CSTOPB)
 791                cval |= 0x04;
 792        if (cflag & PARENB)
 793                cval |= UART_LCR_PARITY;
 794        if (!(cflag & PARODD))
 795                cval |= UART_LCR_EPAR;
 796#ifdef CMSPAR
 797        if (cflag & CMSPAR)
 798                cval |= UART_LCR_SPAR;
 799#endif
 800
 801        /*
 802         * Work around a bug in the Oxford Semiconductor 952 rev B
 803         * chip which causes it to seriously miscalculate baud rates
 804         * when DLL is 0.
 805         */
 806        if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 807            up->rev == 0x5201)
 808                quot ++;
 809
 810        if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 811                if ((up->port.uartclk / quot) < (2400 * 16))
 812                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 813#ifdef CONFIG_SERIAL_8250_RSA
 814                else if (up->port.type == PORT_RSA)
 815                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 816#endif
 817                else
 818                        fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 819        }
 820        if (up->port.type == PORT_16750)
 821                fcr |= UART_FCR7_64BYTE;
 822
 823        /*
 824         * Ok, we're now changing the port state.  Do it with
 825         * interrupts disabled.
 826         */
 827        spin_lock_irqsave(&up->port.lock, flags);
 828
 829        /*
 830         * Update the per-port timeout.
 831         */
 832        uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 833
 834        up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 835        if (iflag & INPCK)
 836                up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 837        if (iflag & (BRKINT | PARMRK))
 838                up->port.read_status_mask |= UART_LSR_BI;
 839
 840        /*
 841         * Characteres to ignore
 842         */
 843        up->port.ignore_status_mask = 0;
 844        if (iflag & IGNPAR)
 845                up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 846        if (iflag & IGNBRK) {
 847                up->port.ignore_status_mask |= UART_LSR_BI;
 848                /*
 849                 * If we're ignoring parity and break indicators,
 850                 * ignore overruns too (for real raw support).
 851                 */
 852                if (iflag & IGNPAR)
 853                        up->port.ignore_status_mask |= UART_LSR_OE;
 854        }
 855
 856        /*
 857         * ignore all characters if CREAD is not set
 858         */
 859        if ((cflag & CREAD) == 0)
 860                up->port.ignore_status_mask |= UART_LSR_DR;
 861
 862        /*
 863         * CTS flow control flag and modem status interrupts
 864         */
 865        up->ier &= ~UART_IER_MSI;
 866        if (UART_ENABLE_MS(&up->port, cflag))
 867                up->ier |= UART_IER_MSI;
 868
 869        serial_out(up, UART_IER, up->ier);
 870
 871        if (uart_config[up->port.type].flags & UART_STARTECH) {
 872                serial_outp(up, UART_LCR, 0xBF);
 873                serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 874        }
 875        serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 876        serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 877        serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 878        if (up->port.type == PORT_16750)
 879                serial_outp(up, UART_FCR, fcr);         /* set fcr */
 880        serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 881        up->lcr = cval;                                 /* Save LCR */
 882        if (up->port.type != PORT_16750) {
 883                if (fcr & UART_FCR_ENABLE_FIFO) {
 884                        /* emulated UARTs (Lucent Venus 167x) need two steps */
 885                        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 886                }
 887                serial_outp(up, UART_FCR, fcr);         /* set fcr */
 888        }
 889
 890        up->cflag = cflag;
 891
 892        spin_unlock_irqrestore(&up->port.lock, flags);
 893}
 894
 895static void
 896sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 897                  struct ktermios *old)
 898{
 899        unsigned int baud, quot;
 900
 901        /*
 902         * Ask the core to calculate the divisor for us.
 903         */
 904        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 
 905        quot = uart_get_divisor(port, baud);
 906
 907        sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 908}
 909
 910static void sunsu_release_port(struct uart_port *port)
 911{
 912}
 913
 914static int sunsu_request_port(struct uart_port *port)
 915{
 916        return 0;
 917}
 918
 919static void sunsu_config_port(struct uart_port *port, int flags)
 920{
 921        struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 922
 923        if (flags & UART_CONFIG_TYPE) {
 924                /*
 925                 * We are supposed to call autoconfig here, but this requires
 926                 * splitting all the OBP probing crap from the UART probing.
 927                 * We'll do it when we kill sunsu.c altogether.
 928                 */
 929                port->type = up->type_probed;   /* XXX */
 930        }
 931}
 932
 933static int
 934sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 935{
 936        return -EINVAL;
 937}
 938
 939static const char *
 940sunsu_type(struct uart_port *port)
 941{
 942        int type = port->type;
 943
 944        if (type >= ARRAY_SIZE(uart_config))
 945                type = 0;
 946        return uart_config[type].name;
 947}
 948
 949static struct uart_ops sunsu_pops = {
 950        .tx_empty       = sunsu_tx_empty,
 951        .set_mctrl      = sunsu_set_mctrl,
 952        .get_mctrl      = sunsu_get_mctrl,
 953        .stop_tx        = sunsu_stop_tx,
 954        .start_tx       = sunsu_start_tx,
 955        .stop_rx        = sunsu_stop_rx,
 956        .enable_ms      = sunsu_enable_ms,
 957        .break_ctl      = sunsu_break_ctl,
 958        .startup        = sunsu_startup,
 959        .shutdown       = sunsu_shutdown,
 960        .set_termios    = sunsu_set_termios,
 961        .type           = sunsu_type,
 962        .release_port   = sunsu_release_port,
 963        .request_port   = sunsu_request_port,
 964        .config_port    = sunsu_config_port,
 965        .verify_port    = sunsu_verify_port,
 966};
 967
 968#define UART_NR 4
 969
 970static struct uart_sunsu_port sunsu_ports[UART_NR];
 971
 972#ifdef CONFIG_SERIO
 973
 974static DEFINE_SPINLOCK(sunsu_serio_lock);
 975
 976static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 977{
 978        struct uart_sunsu_port *up = serio->port_data;
 979        unsigned long flags;
 980        int lsr;
 981
 982        spin_lock_irqsave(&sunsu_serio_lock, flags);
 983
 984        do {
 985                lsr = serial_in(up, UART_LSR);
 986        } while (!(lsr & UART_LSR_THRE));
 987
 988        /* Send the character out. */
 989        serial_out(up, UART_TX, ch);
 990
 991        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 992
 993        return 0;
 994}
 995
 996static int sunsu_serio_open(struct serio *serio)
 997{
 998        struct uart_sunsu_port *up = serio->port_data;
 999        unsigned long flags;
1000        int ret;
1001
1002        spin_lock_irqsave(&sunsu_serio_lock, flags);
1003        if (!up->serio_open) {
1004                up->serio_open = 1;
1005                ret = 0;
1006        } else
1007                ret = -EBUSY;
1008        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1009
1010        return ret;
1011}
1012
1013static void sunsu_serio_close(struct serio *serio)
1014{
1015        struct uart_sunsu_port *up = serio->port_data;
1016        unsigned long flags;
1017
1018        spin_lock_irqsave(&sunsu_serio_lock, flags);
1019        up->serio_open = 0;
1020        spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1021}
1022
1023#endif /* CONFIG_SERIO */
1024
1025static void sunsu_autoconfig(struct uart_sunsu_port *up)
1026{
1027        unsigned char status1, status2, scratch, scratch2, scratch3;
1028        unsigned char save_lcr, save_mcr;
1029        unsigned long flags;
1030
1031        if (up->su_type == SU_PORT_NONE)
1032                return;
1033
1034        up->type_probed = PORT_UNKNOWN;
1035        up->port.iotype = UPIO_MEM;
1036
1037        spin_lock_irqsave(&up->port.lock, flags);
1038
1039        if (!(up->port.flags & UPF_BUGGY_UART)) {
1040                /*
1041                 * Do a simple existence test first; if we fail this, there's
1042                 * no point trying anything else.
1043                 *
1044                 * 0x80 is used as a nonsense port to prevent against false
1045                 * positives due to ISA bus float.  The assumption is that
1046                 * 0x80 is a non-existent port; which should be safe since
1047                 * include/asm/io.h also makes this assumption.
1048                 */
1049                scratch = serial_inp(up, UART_IER);
1050                serial_outp(up, UART_IER, 0);
1051#ifdef __i386__
1052                outb(0xff, 0x080);
1053#endif
1054                scratch2 = serial_inp(up, UART_IER);
1055                serial_outp(up, UART_IER, 0x0f);
1056#ifdef __i386__
1057                outb(0, 0x080);
1058#endif
1059                scratch3 = serial_inp(up, UART_IER);
1060                serial_outp(up, UART_IER, scratch);
1061                if (scratch2 != 0 || scratch3 != 0x0F)
1062                        goto out;       /* We failed; there's nothing here */
1063        }
1064
1065        save_mcr = serial_in(up, UART_MCR);
1066        save_lcr = serial_in(up, UART_LCR);
1067
1068        /* 
1069         * Check to see if a UART is really there.  Certain broken
1070         * internal modems based on the Rockwell chipset fail this
1071         * test, because they apparently don't implement the loopback
1072         * test mode.  So this test is skipped on the COM 1 through
1073         * COM 4 ports.  This *should* be safe, since no board
1074         * manufacturer would be stupid enough to design a board
1075         * that conflicts with COM 1-4 --- we hope!
1076         */
1077        if (!(up->port.flags & UPF_SKIP_TEST)) {
1078                serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1079                status1 = serial_inp(up, UART_MSR) & 0xF0;
1080                serial_outp(up, UART_MCR, save_mcr);
1081                if (status1 != 0x90)
1082                        goto out;       /* We failed loopback test */
1083        }
1084        serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1085        serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1086        serial_outp(up, UART_LCR, 0);
1087        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1088        scratch = serial_in(up, UART_IIR) >> 6;
1089        switch (scratch) {
1090                case 0:
1091                        up->port.type = PORT_16450;
1092                        break;
1093                case 1:
1094                        up->port.type = PORT_UNKNOWN;
1095                        break;
1096                case 2:
1097                        up->port.type = PORT_16550;
1098                        break;
1099                case 3:
1100                        up->port.type = PORT_16550A;
1101                        break;
1102        }
1103        if (up->port.type == PORT_16550A) {
1104                /* Check for Startech UART's */
1105                serial_outp(up, UART_LCR, UART_LCR_DLAB);
1106                if (serial_in(up, UART_EFR) == 0) {
1107                        up->port.type = PORT_16650;
1108                } else {
1109                        serial_outp(up, UART_LCR, 0xBF);
1110                        if (serial_in(up, UART_EFR) == 0)
1111                                up->port.type = PORT_16650V2;
1112                }
1113        }
1114        if (up->port.type == PORT_16550A) {
1115                /* Check for TI 16750 */
1116                serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1117                serial_outp(up, UART_FCR,
1118                            UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1119                scratch = serial_in(up, UART_IIR) >> 5;
1120                if (scratch == 7) {
1121                        /*
1122                         * If this is a 16750, and not a cheap UART
1123                         * clone, then it should only go into 64 byte
1124                         * mode if the UART_FCR7_64BYTE bit was set
1125                         * while UART_LCR_DLAB was latched.
1126                         */
1127                        serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1128                        serial_outp(up, UART_LCR, 0);
1129                        serial_outp(up, UART_FCR,
1130                                    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1131                        scratch = serial_in(up, UART_IIR) >> 5;
1132                        if (scratch == 6)
1133                                up->port.type = PORT_16750;
1134                }
1135                serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1136        }
1137        serial_outp(up, UART_LCR, save_lcr);
1138        if (up->port.type == PORT_16450) {
1139                scratch = serial_in(up, UART_SCR);
1140                serial_outp(up, UART_SCR, 0xa5);
1141                status1 = serial_in(up, UART_SCR);
1142                serial_outp(up, UART_SCR, 0x5a);
1143                status2 = serial_in(up, UART_SCR);
1144                serial_outp(up, UART_SCR, scratch);
1145
1146                if ((status1 != 0xa5) || (status2 != 0x5a))
1147                        up->port.type = PORT_8250;
1148        }
1149
1150        up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1151
1152        if (up->port.type == PORT_UNKNOWN)
1153                goto out;
1154        up->type_probed = up->port.type;        /* XXX */
1155
1156        /*
1157         * Reset the UART.
1158         */
1159#ifdef CONFIG_SERIAL_8250_RSA
1160        if (up->port.type == PORT_RSA)
1161                serial_outp(up, UART_RSA_FRR, 0);
1162#endif
1163        serial_outp(up, UART_MCR, save_mcr);
1164        serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1165                                     UART_FCR_CLEAR_RCVR |
1166                                     UART_FCR_CLEAR_XMIT));
1167        serial_outp(up, UART_FCR, 0);
1168        (void)serial_in(up, UART_RX);
1169        serial_outp(up, UART_IER, 0);
1170
1171out:
1172        spin_unlock_irqrestore(&up->port.lock, flags);
1173}
1174
1175static struct uart_driver sunsu_reg = {
1176        .owner                  = THIS_MODULE,
1177        .driver_name            = "sunsu",
1178        .dev_name               = "ttyS",
1179        .major                  = TTY_MAJOR,
1180};
1181
1182static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1183{
1184        int quot, baud;
1185#ifdef CONFIG_SERIO
1186        struct serio *serio;
1187#endif
1188
1189        if (up->su_type == SU_PORT_KBD) {
1190                up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1191                baud = 1200;
1192        } else {
1193                up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1194                baud = 4800;
1195        }
1196        quot = up->port.uartclk / (16 * baud);
1197
1198        sunsu_autoconfig(up);
1199        if (up->port.type == PORT_UNKNOWN)
1200                return -ENODEV;
1201
1202        printk("%s: %s port at %llx, irq %u\n",
1203               up->port.dev->of_node->full_name,
1204               (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1205               (unsigned long long) up->port.mapbase,
1206               up->port.irq);
1207
1208#ifdef CONFIG_SERIO
1209        serio = &up->serio;
1210        serio->port_data = up;
1211
1212        serio->id.type = SERIO_RS232;
1213        if (up->su_type == SU_PORT_KBD) {
1214                serio->id.proto = SERIO_SUNKBD;
1215                strlcpy(serio->name, "sukbd", sizeof(serio->name));
1216        } else {
1217                serio->id.proto = SERIO_SUN;
1218                serio->id.extra = 1;
1219                strlcpy(serio->name, "sums", sizeof(serio->name));
1220        }
1221        strlcpy(serio->phys,
1222                (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1223                sizeof(serio->phys));
1224
1225        serio->write = sunsu_serio_write;
1226        serio->open = sunsu_serio_open;
1227        serio->close = sunsu_serio_close;
1228        serio->dev.parent = up->port.dev;
1229
1230        serio_register_port(serio);
1231#endif
1232
1233        sunsu_change_speed(&up->port, up->cflag, 0, quot);
1234
1235        sunsu_startup(&up->port);
1236        return 0;
1237}
1238
1239/*
1240 * ------------------------------------------------------------
1241 * Serial console driver
1242 * ------------------------------------------------------------
1243 */
1244
1245#ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1246
1247#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1248
1249/*
1250 *      Wait for transmitter & holding register to empty
1251 */
1252static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1253{
1254        unsigned int status, tmout = 10000;
1255
1256        /* Wait up to 10ms for the character(s) to be sent. */
1257        do {
1258                status = serial_in(up, UART_LSR);
1259
1260                if (status & UART_LSR_BI)
1261                        up->lsr_break_flag = UART_LSR_BI;
1262
1263                if (--tmout == 0)
1264                        break;
1265                udelay(1);
1266        } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1267
1268        /* Wait up to 1s for flow control if necessary */
1269        if (up->port.flags & UPF_CONS_FLOW) {
1270                tmout = 1000000;
1271                while (--tmout &&
1272                       ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1273                        udelay(1);
1274        }
1275}
1276
1277static void sunsu_console_putchar(struct uart_port *port, int ch)
1278{
1279        struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1280
1281        wait_for_xmitr(up);
1282        serial_out(up, UART_TX, ch);
1283}
1284
1285/*
1286 *      Print a string to the serial port trying not to disturb
1287 *      any possible real use of the port...
1288 */
1289static void sunsu_console_write(struct console *co, const char *s,
1290                                unsigned int count)
1291{
1292        struct uart_sunsu_port *up = &sunsu_ports[co->index];
1293        unsigned long flags;
1294        unsigned int ier;
1295        int locked = 1;
1296
1297        local_irq_save(flags);
1298        if (up->port.sysrq) {
1299                locked = 0;
1300        } else if (oops_in_progress) {
1301                locked = spin_trylock(&up->port.lock);
1302        } else
1303                spin_lock(&up->port.lock);
1304
1305        /*
1306         *      First save the UER then disable the interrupts
1307         */
1308        ier = serial_in(up, UART_IER);
1309        serial_out(up, UART_IER, 0);
1310
1311        uart_console_write(&up->port, s, count, sunsu_console_putchar);
1312
1313        /*
1314         *      Finally, wait for transmitter to become empty
1315         *      and restore the IER
1316         */
1317        wait_for_xmitr(up);
1318        serial_out(up, UART_IER, ier);
1319
1320        if (locked)
1321                spin_unlock(&up->port.lock);
1322        local_irq_restore(flags);
1323}
1324
1325/*
1326 *      Setup initial baud/bits/parity. We do two things here:
1327 *      - construct a cflag setting for the first su_open()
1328 *      - initialize the serial port
1329 *      Return non-zero if we didn't find a serial port.
1330 */
1331static int __init sunsu_console_setup(struct console *co, char *options)
1332{
1333        static struct ktermios dummy;
1334        struct ktermios termios;
1335        struct uart_port *port;
1336
1337        printk("Console: ttyS%d (SU)\n",
1338               (sunsu_reg.minor - 64) + co->index);
1339
1340        /*
1341         * Check whether an invalid uart number has been specified, and
1342         * if so, search for the first available port that does have
1343         * console support.
1344         */
1345        if (co->index >= UART_NR)
1346                co->index = 0;
1347        port = &sunsu_ports[co->index].port;
1348
1349        /*
1350         * Temporary fix.
1351         */
1352        spin_lock_init(&port->lock);
1353
1354        /* Get firmware console settings.  */
1355        sunserial_console_termios(co, port->dev->of_node);
1356
1357        memset(&termios, 0, sizeof(struct ktermios));
1358        termios.c_cflag = co->cflag;
1359        port->mctrl |= TIOCM_DTR;
1360        port->ops->set_termios(port, &termios, &dummy);
1361
1362        return 0;
1363}
1364
1365static struct console sunsu_console = {
1366        .name   =       "ttyS",
1367        .write  =       sunsu_console_write,
1368        .device =       uart_console_device,
1369        .setup  =       sunsu_console_setup,
1370        .flags  =       CON_PRINTBUFFER,
1371        .index  =       -1,
1372        .data   =       &sunsu_reg,
1373};
1374
1375/*
1376 *      Register console.
1377 */
1378
1379static inline struct console *SUNSU_CONSOLE(void)
1380{
1381        return &sunsu_console;
1382}
1383#else
1384#define SUNSU_CONSOLE()                 (NULL)
1385#define sunsu_serial_console_init()     do { } while (0)
1386#endif
1387
1388static enum su_type __devinit su_get_type(struct device_node *dp)
1389{
1390        struct device_node *ap = of_find_node_by_path("/aliases");
1391
1392        if (ap) {
1393                const char *keyb = of_get_property(ap, "keyboard", NULL);
1394                const char *ms = of_get_property(ap, "mouse", NULL);
1395
1396                if (keyb) {
1397                        if (dp == of_find_node_by_path(keyb))
1398                                return SU_PORT_KBD;
1399                }
1400                if (ms) {
1401                        if (dp == of_find_node_by_path(ms))
1402                                return SU_PORT_MS;
1403                }
1404        }
1405
1406        return SU_PORT_PORT;
1407}
1408
1409static int __devinit su_probe(struct platform_device *op, const struct of_device_id *match)
1410{
1411        static int inst;
1412        struct device_node *dp = op->dev.of_node;
1413        struct uart_sunsu_port *up;
1414        struct resource *rp;
1415        enum su_type type;
1416        bool ignore_line;
1417        int err;
1418
1419        type = su_get_type(dp);
1420        if (type == SU_PORT_PORT) {
1421                if (inst >= UART_NR)
1422                        return -EINVAL;
1423                up = &sunsu_ports[inst];
1424        } else {
1425                up = kzalloc(sizeof(*up), GFP_KERNEL);
1426                if (!up)
1427                        return -ENOMEM;
1428        }
1429
1430        up->port.line = inst;
1431
1432        spin_lock_init(&up->port.lock);
1433
1434        up->su_type = type;
1435
1436        rp = &op->resource[0];
1437        up->port.mapbase = rp->start;
1438        up->reg_size = (rp->end - rp->start) + 1;
1439        up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1440        if (!up->port.membase) {
1441                if (type != SU_PORT_PORT)
1442                        kfree(up);
1443                return -ENOMEM;
1444        }
1445
1446        up->port.irq = op->archdata.irqs[0];
1447
1448        up->port.dev = &op->dev;
1449
1450        up->port.type = PORT_UNKNOWN;
1451        up->port.uartclk = (SU_BASE_BAUD * 16);
1452
1453        err = 0;
1454        if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1455                err = sunsu_kbd_ms_init(up);
1456                if (err) {
1457                        of_iounmap(&op->resource[0],
1458                                   up->port.membase, up->reg_size);
1459                        kfree(up);
1460                        return err;
1461                }
1462                dev_set_drvdata(&op->dev, up);
1463
1464                return 0;
1465        }
1466
1467        up->port.flags |= UPF_BOOT_AUTOCONF;
1468
1469        sunsu_autoconfig(up);
1470
1471        err = -ENODEV;
1472        if (up->port.type == PORT_UNKNOWN)
1473                goto out_unmap;
1474
1475        up->port.ops = &sunsu_pops;
1476
1477        ignore_line = false;
1478        if (!strcmp(dp->name, "rsc-console") ||
1479            !strcmp(dp->name, "lom-console"))
1480                ignore_line = true;
1481
1482        sunserial_console_match(SUNSU_CONSOLE(), dp,
1483                                &sunsu_reg, up->port.line,
1484                                ignore_line);
1485        err = uart_add_one_port(&sunsu_reg, &up->port);
1486        if (err)
1487                goto out_unmap;
1488
1489        dev_set_drvdata(&op->dev, up);
1490
1491        inst++;
1492
1493        return 0;
1494
1495out_unmap:
1496        of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1497        return err;
1498}
1499
1500static int __devexit su_remove(struct platform_device *op)
1501{
1502        struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1503        bool kbdms = false;
1504
1505        if (up->su_type == SU_PORT_MS ||
1506            up->su_type == SU_PORT_KBD)
1507                kbdms = true;
1508
1509        if (kbdms) {
1510#ifdef CONFIG_SERIO
1511                serio_unregister_port(&up->serio);
1512#endif
1513        } else if (up->port.type != PORT_UNKNOWN)
1514                uart_remove_one_port(&sunsu_reg, &up->port);
1515
1516        if (up->port.membase)
1517                of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1518
1519        if (kbdms)
1520                kfree(up);
1521
1522        dev_set_drvdata(&op->dev, NULL);
1523
1524        return 0;
1525}
1526
1527static const struct of_device_id su_match[] = {
1528        {
1529                .name = "su",
1530        },
1531        {
1532                .name = "su_pnp",
1533        },
1534        {
1535                .name = "serial",
1536                .compatible = "su",
1537        },
1538        {
1539                .type = "serial",
1540                .compatible = "su",
1541        },
1542        {},
1543};
1544MODULE_DEVICE_TABLE(of, su_match);
1545
1546static struct of_platform_driver su_driver = {
1547        .driver = {
1548                .name = "su",
1549                .owner = THIS_MODULE,
1550                .of_match_table = su_match,
1551        },
1552        .probe          = su_probe,
1553        .remove         = __devexit_p(su_remove),
1554};
1555
1556static int __init sunsu_init(void)
1557{
1558        struct device_node *dp;
1559        int err;
1560        int num_uart = 0;
1561
1562        for_each_node_by_name(dp, "su") {
1563                if (su_get_type(dp) == SU_PORT_PORT)
1564                        num_uart++;
1565        }
1566        for_each_node_by_name(dp, "su_pnp") {
1567                if (su_get_type(dp) == SU_PORT_PORT)
1568                        num_uart++;
1569        }
1570        for_each_node_by_name(dp, "serial") {
1571                if (of_device_is_compatible(dp, "su")) {
1572                        if (su_get_type(dp) == SU_PORT_PORT)
1573                                num_uart++;
1574                }
1575        }
1576        for_each_node_by_type(dp, "serial") {
1577                if (of_device_is_compatible(dp, "su")) {
1578                        if (su_get_type(dp) == SU_PORT_PORT)
1579                                num_uart++;
1580                }
1581        }
1582
1583        if (num_uart) {
1584                err = sunserial_register_minors(&sunsu_reg, num_uart);
1585                if (err)
1586                        return err;
1587        }
1588
1589        err = of_register_platform_driver(&su_driver);
1590        if (err && num_uart)
1591                sunserial_unregister_minors(&sunsu_reg, num_uart);
1592
1593        return err;
1594}
1595
1596static void __exit sunsu_exit(void)
1597{
1598        if (sunsu_reg.nr)
1599                sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1600}
1601
1602module_init(sunsu_init);
1603module_exit(sunsu_exit);
1604
1605MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1606MODULE_DESCRIPTION("Sun SU serial port driver");
1607MODULE_VERSION("2.0");
1608MODULE_LICENSE("GPL");
1609