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22#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/errno.h>
26#include <linux/platform_device.h>
27#include <linux/delay.h>
28#include <linux/list.h>
29#include <linux/interrupt.h>
30#include <linux/proc_fs.h>
31#include <linux/clk.h>
32#include <linux/irq.h>
33#include <linux/gpio.h>
34#include <linux/slab.h>
35
36#include <asm/byteorder.h>
37#include <mach/hardware.h>
38
39#include <linux/usb.h>
40#include <linux/usb/ch9.h>
41#include <linux/usb/gadget.h>
42#include <mach/udc.h>
43
44#include "pxa27x_udc.h"
45
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82
83#define DRIVER_VERSION "2008-04-18"
84#define DRIVER_DESC "PXA 27x USB Device Controller driver"
85
86static const char driver_name[] = "pxa27x_udc";
87static struct pxa_udc *the_controller;
88
89static void handle_ep(struct pxa_ep *ep);
90
91
92
93
94#ifdef CONFIG_USB_GADGET_DEBUG_FS
95
96#include <linux/debugfs.h>
97#include <linux/uaccess.h>
98#include <linux/seq_file.h>
99
100static int state_dbg_show(struct seq_file *s, void *p)
101{
102 struct pxa_udc *udc = s->private;
103 int pos = 0, ret;
104 u32 tmp;
105
106 ret = -ENODEV;
107 if (!udc->driver)
108 goto out;
109
110
111 pos += seq_printf(s, DRIVER_DESC "\n"
112 "%s version: %s\nGadget driver: %s\n",
113 driver_name, DRIVER_VERSION,
114 udc->driver ? udc->driver->driver.name : "(none)");
115
116 tmp = udc_readl(udc, UDCCR);
117 pos += seq_printf(s,
118 "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), "
119 "con=%d,inter=%d,altinter=%d\n", tmp,
120 (tmp & UDCCR_OEN) ? " oen":"",
121 (tmp & UDCCR_AALTHNP) ? " aalthnp":"",
122 (tmp & UDCCR_AHNP) ? " rem" : "",
123 (tmp & UDCCR_BHNP) ? " rstir" : "",
124 (tmp & UDCCR_DWRE) ? " dwre" : "",
125 (tmp & UDCCR_SMAC) ? " smac" : "",
126 (tmp & UDCCR_EMCE) ? " emce" : "",
127 (tmp & UDCCR_UDR) ? " udr" : "",
128 (tmp & UDCCR_UDA) ? " uda" : "",
129 (tmp & UDCCR_UDE) ? " ude" : "",
130 (tmp & UDCCR_ACN) >> UDCCR_ACN_S,
131 (tmp & UDCCR_AIN) >> UDCCR_AIN_S,
132 (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S);
133
134 pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n",
135 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1));
136 pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n",
137 udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1));
138 pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR));
139 pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, "
140 "reconfig=%lu\n",
141 udc->stats.irqs_reset, udc->stats.irqs_suspend,
142 udc->stats.irqs_resume, udc->stats.irqs_reconfig);
143
144 ret = 0;
145out:
146 return ret;
147}
148
149static int queues_dbg_show(struct seq_file *s, void *p)
150{
151 struct pxa_udc *udc = s->private;
152 struct pxa_ep *ep;
153 struct pxa27x_request *req;
154 int pos = 0, i, maxpkt, ret;
155
156 ret = -ENODEV;
157 if (!udc->driver)
158 goto out;
159
160
161 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
162 ep = &udc->pxa_ep[i];
163 maxpkt = ep->fifo_size;
164 pos += seq_printf(s, "%-12s max_pkt=%d %s\n",
165 EPNAME(ep), maxpkt, "pio");
166
167 if (list_empty(&ep->queue)) {
168 pos += seq_printf(s, "\t(nothing queued)\n");
169 continue;
170 }
171
172 list_for_each_entry(req, &ep->queue, queue) {
173 pos += seq_printf(s, "\treq %p len %d/%d buf %p\n",
174 &req->req, req->req.actual,
175 req->req.length, req->req.buf);
176 }
177 }
178
179 ret = 0;
180out:
181 return ret;
182}
183
184static int eps_dbg_show(struct seq_file *s, void *p)
185{
186 struct pxa_udc *udc = s->private;
187 struct pxa_ep *ep;
188 int pos = 0, i, ret;
189 u32 tmp;
190
191 ret = -ENODEV;
192 if (!udc->driver)
193 goto out;
194
195 ep = &udc->pxa_ep[0];
196 tmp = udc_ep_readl(ep, UDCCSR);
197 pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp,
198 (tmp & UDCCSR0_SA) ? " sa" : "",
199 (tmp & UDCCSR0_RNE) ? " rne" : "",
200 (tmp & UDCCSR0_FST) ? " fst" : "",
201 (tmp & UDCCSR0_SST) ? " sst" : "",
202 (tmp & UDCCSR0_DME) ? " dme" : "",
203 (tmp & UDCCSR0_IPR) ? " ipr" : "",
204 (tmp & UDCCSR0_OPC) ? " opc" : "");
205 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
206 ep = &udc->pxa_ep[i];
207 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
208 pos += seq_printf(s, "%-12s: "
209 "IN %lu(%lu reqs), OUT %lu(%lu reqs), "
210 "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, "
211 "udcbcr=%d\n",
212 EPNAME(ep),
213 ep->stats.in_bytes, ep->stats.in_ops,
214 ep->stats.out_bytes, ep->stats.out_ops,
215 ep->stats.irqs,
216 tmp, udc_ep_readl(ep, UDCCSR),
217 udc_ep_readl(ep, UDCBCR));
218 }
219
220 ret = 0;
221out:
222 return ret;
223}
224
225static int eps_dbg_open(struct inode *inode, struct file *file)
226{
227 return single_open(file, eps_dbg_show, inode->i_private);
228}
229
230static int queues_dbg_open(struct inode *inode, struct file *file)
231{
232 return single_open(file, queues_dbg_show, inode->i_private);
233}
234
235static int state_dbg_open(struct inode *inode, struct file *file)
236{
237 return single_open(file, state_dbg_show, inode->i_private);
238}
239
240static const struct file_operations state_dbg_fops = {
241 .owner = THIS_MODULE,
242 .open = state_dbg_open,
243 .llseek = seq_lseek,
244 .read = seq_read,
245 .release = single_release,
246};
247
248static const struct file_operations queues_dbg_fops = {
249 .owner = THIS_MODULE,
250 .open = queues_dbg_open,
251 .llseek = seq_lseek,
252 .read = seq_read,
253 .release = single_release,
254};
255
256static const struct file_operations eps_dbg_fops = {
257 .owner = THIS_MODULE,
258 .open = eps_dbg_open,
259 .llseek = seq_lseek,
260 .read = seq_read,
261 .release = single_release,
262};
263
264static void pxa_init_debugfs(struct pxa_udc *udc)
265{
266 struct dentry *root, *state, *queues, *eps;
267
268 root = debugfs_create_dir(udc->gadget.name, NULL);
269 if (IS_ERR(root) || !root)
270 goto err_root;
271
272 state = debugfs_create_file("udcstate", 0400, root, udc,
273 &state_dbg_fops);
274 if (!state)
275 goto err_state;
276 queues = debugfs_create_file("queues", 0400, root, udc,
277 &queues_dbg_fops);
278 if (!queues)
279 goto err_queues;
280 eps = debugfs_create_file("epstate", 0400, root, udc,
281 &eps_dbg_fops);
282 if (!eps)
283 goto err_eps;
284
285 udc->debugfs_root = root;
286 udc->debugfs_state = state;
287 udc->debugfs_queues = queues;
288 udc->debugfs_eps = eps;
289 return;
290err_eps:
291 debugfs_remove(eps);
292err_queues:
293 debugfs_remove(queues);
294err_state:
295 debugfs_remove(root);
296err_root:
297 dev_err(udc->dev, "debugfs is not available\n");
298}
299
300static void pxa_cleanup_debugfs(struct pxa_udc *udc)
301{
302 debugfs_remove(udc->debugfs_eps);
303 debugfs_remove(udc->debugfs_queues);
304 debugfs_remove(udc->debugfs_state);
305 debugfs_remove(udc->debugfs_root);
306 udc->debugfs_eps = NULL;
307 udc->debugfs_queues = NULL;
308 udc->debugfs_state = NULL;
309 udc->debugfs_root = NULL;
310}
311
312#else
313static inline void pxa_init_debugfs(struct pxa_udc *udc)
314{
315}
316
317static inline void pxa_cleanup_debugfs(struct pxa_udc *udc)
318{
319}
320#endif
321
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330
331
332static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep,
333 int config, int interface, int altsetting)
334{
335 if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr)
336 return 0;
337 if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in)
338 return 0;
339 if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type)
340 return 0;
341 if ((ep->config != config) || (ep->interface != interface)
342 || (ep->alternate != altsetting))
343 return 0;
344 return 1;
345}
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371
372static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc,
373 struct udc_usb_ep *udc_usb_ep)
374{
375 int i;
376 struct pxa_ep *ep;
377 int cfg = udc->config;
378 int iface = udc->last_interface;
379 int alt = udc->last_alternate;
380
381 if (udc_usb_ep == &udc->udc_usb_ep[0])
382 return &udc->pxa_ep[0];
383
384 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
385 ep = &udc->pxa_ep[i];
386 if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt))
387 return ep;
388 }
389 return NULL;
390}
391
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400
401
402static void update_pxa_ep_matches(struct pxa_udc *udc)
403{
404 int i;
405 struct udc_usb_ep *udc_usb_ep;
406
407 for (i = 1; i < NR_USB_ENDPOINTS; i++) {
408 udc_usb_ep = &udc->udc_usb_ep[i];
409 if (udc_usb_ep->pxa_ep)
410 udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep);
411 }
412}
413
414
415
416
417
418static void pio_irq_enable(struct pxa_ep *ep)
419{
420 struct pxa_udc *udc = ep->dev;
421 int index = EPIDX(ep);
422 u32 udcicr0 = udc_readl(udc, UDCICR0);
423 u32 udcicr1 = udc_readl(udc, UDCICR1);
424
425 if (index < 16)
426 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2)));
427 else
428 udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2)));
429}
430
431
432
433
434
435static void pio_irq_disable(struct pxa_ep *ep)
436{
437 struct pxa_udc *udc = ep->dev;
438 int index = EPIDX(ep);
439 u32 udcicr0 = udc_readl(udc, UDCICR0);
440 u32 udcicr1 = udc_readl(udc, UDCICR1);
441
442 if (index < 16)
443 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2)));
444 else
445 udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2)));
446}
447
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454
455static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask)
456{
457 u32 udccr = udc_readl(udc, UDCCR);
458 udc_writel(udc, UDCCR,
459 (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS));
460}
461
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468
469static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask)
470{
471 u32 udccr = udc_readl(udc, UDCCR);
472 udc_writel(udc, UDCCR,
473 (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS));
474}
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485
486static inline void ep_write_UDCCSR(struct pxa_ep *ep, int mask)
487{
488 if (is_ep0(ep))
489 mask |= UDCCSR0_ACM;
490 udc_ep_writel(ep, UDCCSR, mask);
491}
492
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498
499static int ep_count_bytes_remain(struct pxa_ep *ep)
500{
501 if (ep->dir_in)
502 return -EOPNOTSUPP;
503 return udc_ep_readl(ep, UDCBCR) & 0x3ff;
504}
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516static int ep_is_empty(struct pxa_ep *ep)
517{
518 int ret;
519
520 if (!is_ep0(ep) && ep->dir_in)
521 return -EOPNOTSUPP;
522 if (is_ep0(ep))
523 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE);
524 else
525 ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE);
526 return ret;
527}
528
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537
538static int ep_is_full(struct pxa_ep *ep)
539{
540 if (is_ep0(ep))
541 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR);
542 if (!ep->dir_in)
543 return -EOPNOTSUPP;
544 return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF));
545}
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552
553static int epout_has_pkt(struct pxa_ep *ep)
554{
555 if (!is_ep0(ep) && ep->dir_in)
556 return -EOPNOTSUPP;
557 if (is_ep0(ep))
558 return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC);
559 return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC);
560}
561
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565
566
567static void set_ep0state(struct pxa_udc *udc, int state)
568{
569 struct pxa_ep *ep = &udc->pxa_ep[0];
570 char *old_stname = EP0_STNAME(udc);
571
572 udc->ep0state = state;
573 ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname,
574 EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR),
575 udc_ep_readl(ep, UDCBCR));
576}
577
578
579
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581
582static void ep0_idle(struct pxa_udc *dev)
583{
584 set_ep0state(dev, WAIT_FOR_SETUP);
585}
586
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592
593
594static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in)
595{
596 if (is_in)
597 ep->stats.in_ops++;
598 else
599 ep->stats.out_ops++;
600}
601
602
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606
607
608static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in)
609{
610 if (is_in)
611 ep->stats.in_bytes += count;
612 else
613 ep->stats.out_bytes += count;
614}
615
616
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618
619
620
621
622static __init void pxa_ep_setup(struct pxa_ep *ep)
623{
624 u32 new_udccr;
625
626 new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN)
627 | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN)
628 | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN)
629 | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN)
630 | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET)
631 | ((ep->dir_in) ? UDCCONR_ED : 0)
632 | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS)
633 | UDCCONR_EE;
634
635 udc_ep_writel(ep, UDCCR, new_udccr);
636}
637
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642
643
644static __init void pxa_eps_setup(struct pxa_udc *dev)
645{
646 unsigned int i;
647
648 dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev);
649
650 for (i = 1; i < NR_PXA_ENDPOINTS; i++)
651 pxa_ep_setup(&dev->pxa_ep[i]);
652}
653
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662
663static struct usb_request *
664pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
665{
666 struct pxa27x_request *req;
667
668 req = kzalloc(sizeof *req, gfp_flags);
669 if (!req)
670 return NULL;
671
672 INIT_LIST_HEAD(&req->queue);
673 req->in_use = 0;
674 req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
675
676 return &req->req;
677}
678
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685
686static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
687{
688 struct pxa27x_request *req;
689
690 req = container_of(_req, struct pxa27x_request, req);
691 WARN_ON(!list_empty(&req->queue));
692 kfree(req);
693}
694
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703
704
705static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req)
706{
707 if (unlikely(!req))
708 return;
709 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
710 req->req.length, udc_ep_readl(ep, UDCCSR));
711
712 req->in_use = 1;
713 list_add_tail(&req->queue, &ep->queue);
714 pio_irq_enable(ep);
715}
716
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723
724
725
726
727
728static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req)
729{
730 if (unlikely(!req))
731 return;
732 ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req,
733 req->req.length, udc_ep_readl(ep, UDCCSR));
734
735 list_del_init(&req->queue);
736 req->in_use = 0;
737 if (!is_ep0(ep) && list_empty(&ep->queue))
738 pio_irq_disable(ep);
739}
740
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748
749
750
751
752static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status,
753 unsigned long *pflags)
754{
755 unsigned long flags;
756
757 ep_del_request(ep, req);
758 if (likely(req->req.status == -EINPROGRESS))
759 req->req.status = status;
760 else
761 status = req->req.status;
762
763 if (status && status != -ESHUTDOWN)
764 ep_dbg(ep, "complete req %p stat %d len %u/%u\n",
765 &req->req, status,
766 req->req.actual, req->req.length);
767
768 if (pflags)
769 spin_unlock_irqrestore(&ep->lock, *pflags);
770 local_irq_save(flags);
771 req->req.complete(&req->udc_usb_ep->usb_ep, &req->req);
772 local_irq_restore(flags);
773 if (pflags)
774 spin_lock_irqsave(&ep->lock, *pflags);
775}
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786
787static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
788 unsigned long *pflags)
789{
790 inc_ep_stats_reqs(ep, !USB_DIR_IN);
791 req_done(ep, req, 0, pflags);
792}
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804
805static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req,
806 unsigned long *pflags)
807{
808 set_ep0state(ep->dev, OUT_STATUS_STAGE);
809 ep_end_out_req(ep, req, pflags);
810 ep0_idle(ep->dev);
811}
812
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821
822
823static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
824 unsigned long *pflags)
825{
826 inc_ep_stats_reqs(ep, USB_DIR_IN);
827 req_done(ep, req, 0, pflags);
828}
829
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841static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req,
842 unsigned long *pflags)
843{
844 set_ep0state(ep->dev, IN_STATUS_STAGE);
845 ep_end_in_req(ep, req, pflags);
846}
847
848
849
850
851
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855
856
857
858static void nuke(struct pxa_ep *ep, int status)
859{
860 struct pxa27x_request *req;
861 unsigned long flags;
862
863 spin_lock_irqsave(&ep->lock, flags);
864 while (!list_empty(&ep->queue)) {
865 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
866 req_done(ep, req, status, &flags);
867 }
868 spin_unlock_irqrestore(&ep->lock, flags);
869}
870
871
872
873
874
875
876
877
878
879
880
881
882static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req)
883{
884 u32 *buf;
885 int bytes_ep, bufferspace, count, i;
886
887 bytes_ep = ep_count_bytes_remain(ep);
888 bufferspace = req->req.length - req->req.actual;
889
890 buf = (u32 *)(req->req.buf + req->req.actual);
891 prefetchw(buf);
892
893 if (likely(!ep_is_empty(ep)))
894 count = min(bytes_ep, bufferspace);
895 else
896 count = 0;
897
898 for (i = count; i > 0; i -= 4)
899 *buf++ = udc_ep_readl(ep, UDCDR);
900 req->req.actual += count;
901
902 ep_write_UDCCSR(ep, UDCCSR_PC);
903
904 return count;
905}
906
907
908
909
910
911
912
913
914
915
916
917
918
919static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req,
920 unsigned int max)
921{
922 int length, count, remain, i;
923 u32 *buf;
924 u8 *buf_8;
925
926 buf = (u32 *)(req->req.buf + req->req.actual);
927 prefetch(buf);
928
929 length = min(req->req.length - req->req.actual, max);
930 req->req.actual += length;
931
932 remain = length & 0x3;
933 count = length & ~(0x3);
934 for (i = count; i > 0 ; i -= 4)
935 udc_ep_writel(ep, UDCDR, *buf++);
936
937 buf_8 = (u8 *)buf;
938 for (i = remain; i > 0; i--)
939 udc_ep_writeb(ep, UDCDR, *buf_8++);
940
941 ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain,
942 udc_ep_readl(ep, UDCCSR));
943
944 return length;
945}
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
962{
963 int count, is_short, completed = 0;
964
965 while (epout_has_pkt(ep)) {
966 count = read_packet(ep, req);
967 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
968
969 is_short = (count < ep->fifo_size);
970 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
971 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
972 &req->req, req->req.actual, req->req.length);
973
974
975 if (is_short || req->req.actual == req->req.length) {
976 completed = 1;
977 break;
978 }
979
980 }
981 return completed;
982}
983
984
985
986
987
988
989
990
991
992
993
994
995
996static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
997{
998 unsigned max;
999 int count, is_short, is_last = 0, completed = 0, totcount = 0;
1000 u32 udccsr;
1001
1002 max = ep->fifo_size;
1003 do {
1004 is_short = 0;
1005
1006 udccsr = udc_ep_readl(ep, UDCCSR);
1007 if (udccsr & UDCCSR_PC) {
1008 ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n",
1009 udccsr);
1010 ep_write_UDCCSR(ep, UDCCSR_PC);
1011 }
1012 if (udccsr & UDCCSR_TRN) {
1013 ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n",
1014 udccsr);
1015 ep_write_UDCCSR(ep, UDCCSR_TRN);
1016 }
1017
1018 count = write_packet(ep, req, max);
1019 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1020 totcount += count;
1021
1022
1023 if (unlikely(count < max)) {
1024 is_last = 1;
1025 is_short = 1;
1026 } else {
1027 if (likely(req->req.length > req->req.actual)
1028 || req->req.zero)
1029 is_last = 0;
1030 else
1031 is_last = 1;
1032
1033 is_short = unlikely(max < ep->fifo_size);
1034 }
1035
1036 if (is_short)
1037 ep_write_UDCCSR(ep, UDCCSR_SP);
1038
1039
1040 if (is_last) {
1041 completed = 1;
1042 break;
1043 }
1044 } while (!ep_is_full(ep));
1045
1046 ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n",
1047 totcount, is_last ? "/L" : "", is_short ? "/S" : "",
1048 req->req.length - req->req.actual, &req->req);
1049
1050 return completed;
1051}
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1065{
1066 int count, is_short, completed = 0;
1067
1068 while (epout_has_pkt(ep)) {
1069 count = read_packet(ep, req);
1070 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1071 inc_ep_stats_bytes(ep, count, !USB_DIR_IN);
1072
1073 is_short = (count < ep->fifo_size);
1074 ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n",
1075 udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "",
1076 &req->req, req->req.actual, req->req.length);
1077
1078 if (is_short || req->req.actual >= req->req.length) {
1079 completed = 1;
1080 break;
1081 }
1082 }
1083
1084 return completed;
1085}
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req)
1103{
1104 unsigned count;
1105 int is_last, is_short;
1106
1107 count = write_packet(ep, req, EP0_FIFO_SIZE);
1108 inc_ep_stats_bytes(ep, count, USB_DIR_IN);
1109
1110 is_short = (count < EP0_FIFO_SIZE);
1111 is_last = ((count == 0) || (count < EP0_FIFO_SIZE));
1112
1113
1114 if (unlikely(is_short))
1115 ep_write_UDCCSR(ep, UDCCSR0_IPR);
1116
1117 ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n",
1118 count, is_short ? "/S" : "", is_last ? "/L" : "",
1119 req->req.length - req->req.actual,
1120 &req->req, udc_ep_readl(ep, UDCCSR));
1121
1122 return is_last;
1123}
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
1138 gfp_t gfp_flags)
1139{
1140 struct udc_usb_ep *udc_usb_ep;
1141 struct pxa_ep *ep;
1142 struct pxa27x_request *req;
1143 struct pxa_udc *dev;
1144 unsigned long flags;
1145 int rc = 0;
1146 int is_first_req;
1147 unsigned length;
1148 int recursion_detected;
1149
1150 req = container_of(_req, struct pxa27x_request, req);
1151 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1152
1153 if (unlikely(!_req || !_req->complete || !_req->buf))
1154 return -EINVAL;
1155
1156 if (unlikely(!_ep))
1157 return -EINVAL;
1158
1159 dev = udc_usb_ep->dev;
1160 ep = udc_usb_ep->pxa_ep;
1161 if (unlikely(!ep))
1162 return -EINVAL;
1163
1164 dev = ep->dev;
1165 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1166 ep_dbg(ep, "bogus device state\n");
1167 return -ESHUTDOWN;
1168 }
1169
1170
1171
1172
1173 if (unlikely(EPXFERTYPE_is_ISO(ep)
1174 && req->req.length > ep->fifo_size))
1175 return -EMSGSIZE;
1176
1177 spin_lock_irqsave(&ep->lock, flags);
1178 recursion_detected = ep->in_handle_ep;
1179
1180 is_first_req = list_empty(&ep->queue);
1181 ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n",
1182 _req, is_first_req ? "yes" : "no",
1183 _req->length, _req->buf);
1184
1185 if (!ep->enabled) {
1186 _req->status = -ESHUTDOWN;
1187 rc = -ESHUTDOWN;
1188 goto out_locked;
1189 }
1190
1191 if (req->in_use) {
1192 ep_err(ep, "refusing to queue req %p (already queued)\n", req);
1193 goto out_locked;
1194 }
1195
1196 length = _req->length;
1197 _req->status = -EINPROGRESS;
1198 _req->actual = 0;
1199
1200 ep_add_request(ep, req);
1201 spin_unlock_irqrestore(&ep->lock, flags);
1202
1203 if (is_ep0(ep)) {
1204 switch (dev->ep0state) {
1205 case WAIT_ACK_SET_CONF_INTERF:
1206 if (length == 0) {
1207 ep_end_in_req(ep, req, NULL);
1208 } else {
1209 ep_err(ep, "got a request of %d bytes while"
1210 "in state WAIT_ACK_SET_CONF_INTERF\n",
1211 length);
1212 ep_del_request(ep, req);
1213 rc = -EL2HLT;
1214 }
1215 ep0_idle(ep->dev);
1216 break;
1217 case IN_DATA_STAGE:
1218 if (!ep_is_full(ep))
1219 if (write_ep0_fifo(ep, req))
1220 ep0_end_in_req(ep, req, NULL);
1221 break;
1222 case OUT_DATA_STAGE:
1223 if ((length == 0) || !epout_has_pkt(ep))
1224 if (read_ep0_fifo(ep, req))
1225 ep0_end_out_req(ep, req, NULL);
1226 break;
1227 default:
1228 ep_err(ep, "odd state %s to send me a request\n",
1229 EP0_STNAME(ep->dev));
1230 ep_del_request(ep, req);
1231 rc = -EL2HLT;
1232 break;
1233 }
1234 } else {
1235 if (!recursion_detected)
1236 handle_ep(ep);
1237 }
1238
1239out:
1240 return rc;
1241out_locked:
1242 spin_unlock_irqrestore(&ep->lock, flags);
1243 goto out;
1244}
1245
1246
1247
1248
1249
1250
1251
1252
1253static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1254{
1255 struct pxa_ep *ep;
1256 struct udc_usb_ep *udc_usb_ep;
1257 struct pxa27x_request *req;
1258 unsigned long flags;
1259 int rc = -EINVAL;
1260
1261 if (!_ep)
1262 return rc;
1263 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1264 ep = udc_usb_ep->pxa_ep;
1265 if (!ep || is_ep0(ep))
1266 return rc;
1267
1268 spin_lock_irqsave(&ep->lock, flags);
1269
1270
1271 list_for_each_entry(req, &ep->queue, queue) {
1272 if (&req->req == _req) {
1273 rc = 0;
1274 break;
1275 }
1276 }
1277
1278 spin_unlock_irqrestore(&ep->lock, flags);
1279 if (!rc)
1280 req_done(ep, req, -ECONNRESET, NULL);
1281 return rc;
1282}
1283
1284
1285
1286
1287
1288
1289
1290
1291static int pxa_ep_set_halt(struct usb_ep *_ep, int value)
1292{
1293 struct pxa_ep *ep;
1294 struct udc_usb_ep *udc_usb_ep;
1295 unsigned long flags;
1296 int rc;
1297
1298
1299 if (!_ep)
1300 return -EINVAL;
1301 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1302 ep = udc_usb_ep->pxa_ep;
1303 if (!ep || is_ep0(ep))
1304 return -EINVAL;
1305
1306 if (value == 0) {
1307
1308
1309
1310
1311
1312
1313 ep_dbg(ep, "only host can clear halt\n");
1314 return -EROFS;
1315 }
1316
1317 spin_lock_irqsave(&ep->lock, flags);
1318
1319 rc = -EAGAIN;
1320 if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue)))
1321 goto out;
1322
1323
1324 rc = 0;
1325 ep_write_UDCCSR(ep, UDCCSR_FST | UDCCSR_FEF);
1326 if (is_ep0(ep))
1327 set_ep0state(ep->dev, STALL);
1328
1329out:
1330 spin_unlock_irqrestore(&ep->lock, flags);
1331 return rc;
1332}
1333
1334
1335
1336
1337
1338
1339
1340static int pxa_ep_fifo_status(struct usb_ep *_ep)
1341{
1342 struct pxa_ep *ep;
1343 struct udc_usb_ep *udc_usb_ep;
1344
1345 if (!_ep)
1346 return -ENODEV;
1347 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1348 ep = udc_usb_ep->pxa_ep;
1349 if (!ep || is_ep0(ep))
1350 return -ENODEV;
1351
1352 if (ep->dir_in)
1353 return -EOPNOTSUPP;
1354 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep))
1355 return 0;
1356 else
1357 return ep_count_bytes_remain(ep) + 1;
1358}
1359
1360
1361
1362
1363
1364
1365
1366static void pxa_ep_fifo_flush(struct usb_ep *_ep)
1367{
1368 struct pxa_ep *ep;
1369 struct udc_usb_ep *udc_usb_ep;
1370 unsigned long flags;
1371
1372 if (!_ep)
1373 return;
1374 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1375 ep = udc_usb_ep->pxa_ep;
1376 if (!ep || is_ep0(ep))
1377 return;
1378
1379 spin_lock_irqsave(&ep->lock, flags);
1380
1381 if (unlikely(!list_empty(&ep->queue)))
1382 ep_dbg(ep, "called while queue list not empty\n");
1383 ep_dbg(ep, "called\n");
1384
1385
1386 if (!ep->dir_in) {
1387 while (!ep_is_empty(ep))
1388 udc_ep_readl(ep, UDCDR);
1389 } else {
1390
1391 ep_write_UDCCSR(ep,
1392 UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN
1393 | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST));
1394 }
1395
1396 spin_unlock_irqrestore(&ep->lock, flags);
1397}
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409static int pxa_ep_enable(struct usb_ep *_ep,
1410 const struct usb_endpoint_descriptor *desc)
1411{
1412 struct pxa_ep *ep;
1413 struct udc_usb_ep *udc_usb_ep;
1414 struct pxa_udc *udc;
1415
1416 if (!_ep || !desc)
1417 return -EINVAL;
1418
1419 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1420 if (udc_usb_ep->pxa_ep) {
1421 ep = udc_usb_ep->pxa_ep;
1422 ep_warn(ep, "usb_ep %s already enabled, doing nothing\n",
1423 _ep->name);
1424 } else {
1425 ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep);
1426 }
1427
1428 if (!ep || is_ep0(ep)) {
1429 dev_err(udc_usb_ep->dev->dev,
1430 "unable to match pxa_ep for ep %s\n",
1431 _ep->name);
1432 return -EINVAL;
1433 }
1434
1435 if ((desc->bDescriptorType != USB_DT_ENDPOINT)
1436 || (ep->type != usb_endpoint_type(desc))) {
1437 ep_err(ep, "type mismatch\n");
1438 return -EINVAL;
1439 }
1440
1441 if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) {
1442 ep_err(ep, "bad maxpacket\n");
1443 return -ERANGE;
1444 }
1445
1446 udc_usb_ep->pxa_ep = ep;
1447 udc = ep->dev;
1448
1449 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
1450 ep_err(ep, "bogus device state\n");
1451 return -ESHUTDOWN;
1452 }
1453
1454 ep->enabled = 1;
1455
1456
1457 pxa_ep_fifo_flush(_ep);
1458
1459 ep_dbg(ep, "enabled\n");
1460 return 0;
1461}
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471static int pxa_ep_disable(struct usb_ep *_ep)
1472{
1473 struct pxa_ep *ep;
1474 struct udc_usb_ep *udc_usb_ep;
1475
1476 if (!_ep)
1477 return -EINVAL;
1478
1479 udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep);
1480 ep = udc_usb_ep->pxa_ep;
1481 if (!ep || is_ep0(ep) || !list_empty(&ep->queue))
1482 return -EINVAL;
1483
1484 ep->enabled = 0;
1485 nuke(ep, -ESHUTDOWN);
1486
1487 pxa_ep_fifo_flush(_ep);
1488 udc_usb_ep->pxa_ep = NULL;
1489
1490 ep_dbg(ep, "disabled\n");
1491 return 0;
1492}
1493
1494static struct usb_ep_ops pxa_ep_ops = {
1495 .enable = pxa_ep_enable,
1496 .disable = pxa_ep_disable,
1497
1498 .alloc_request = pxa_ep_alloc_request,
1499 .free_request = pxa_ep_free_request,
1500
1501 .queue = pxa_ep_queue,
1502 .dequeue = pxa_ep_dequeue,
1503
1504 .set_halt = pxa_ep_set_halt,
1505 .fifo_status = pxa_ep_fifo_status,
1506 .fifo_flush = pxa_ep_fifo_flush,
1507};
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518static void dplus_pullup(struct pxa_udc *udc, int on)
1519{
1520 if (on) {
1521 if (gpio_is_valid(udc->mach->gpio_pullup))
1522 gpio_set_value(udc->mach->gpio_pullup,
1523 !udc->mach->gpio_pullup_inverted);
1524 if (udc->mach->udc_command)
1525 udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
1526 } else {
1527 if (gpio_is_valid(udc->mach->gpio_pullup))
1528 gpio_set_value(udc->mach->gpio_pullup,
1529 udc->mach->gpio_pullup_inverted);
1530 if (udc->mach->udc_command)
1531 udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
1532 }
1533 udc->pullup_on = on;
1534}
1535
1536
1537
1538
1539
1540static int pxa_udc_get_frame(struct usb_gadget *_gadget)
1541{
1542 struct pxa_udc *udc = to_gadget_udc(_gadget);
1543
1544 return (udc_readl(udc, UDCFNR) & 0x7ff);
1545}
1546
1547
1548
1549
1550
1551
1552
1553static int pxa_udc_wakeup(struct usb_gadget *_gadget)
1554{
1555 struct pxa_udc *udc = to_gadget_udc(_gadget);
1556
1557
1558 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1559 return -EHOSTUNREACH;
1560 udc_set_mask_UDCCR(udc, UDCCR_UDR);
1561 return 0;
1562}
1563
1564static void udc_enable(struct pxa_udc *udc);
1565static void udc_disable(struct pxa_udc *udc);
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580static int should_enable_udc(struct pxa_udc *udc)
1581{
1582 int put_on;
1583
1584 put_on = ((udc->pullup_on) && (udc->driver));
1585 put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
1586 return put_on;
1587}
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601static int should_disable_udc(struct pxa_udc *udc)
1602{
1603 int put_off;
1604
1605 put_off = ((!udc->pullup_on) || (!udc->driver));
1606 put_off |= ((!udc->vbus_sensed) && (udc->transceiver));
1607 return put_off;
1608}
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618static int pxa_udc_pullup(struct usb_gadget *_gadget, int is_active)
1619{
1620 struct pxa_udc *udc = to_gadget_udc(_gadget);
1621
1622 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
1623 return -EOPNOTSUPP;
1624
1625 dplus_pullup(udc, is_active);
1626
1627 if (should_enable_udc(udc))
1628 udc_enable(udc);
1629 if (should_disable_udc(udc))
1630 udc_disable(udc);
1631 return 0;
1632}
1633
1634static void udc_enable(struct pxa_udc *udc);
1635static void udc_disable(struct pxa_udc *udc);
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647static int pxa_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1648{
1649 struct pxa_udc *udc = to_gadget_udc(_gadget);
1650
1651 udc->vbus_sensed = is_active;
1652 if (should_enable_udc(udc))
1653 udc_enable(udc);
1654 if (should_disable_udc(udc))
1655 udc_disable(udc);
1656
1657 return 0;
1658}
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672static int pxa_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1673{
1674 struct pxa_udc *udc;
1675
1676 udc = to_gadget_udc(_gadget);
1677 if (udc->transceiver)
1678 return otg_set_power(udc->transceiver, mA);
1679 return -EOPNOTSUPP;
1680}
1681
1682static const struct usb_gadget_ops pxa_udc_ops = {
1683 .get_frame = pxa_udc_get_frame,
1684 .wakeup = pxa_udc_wakeup,
1685 .pullup = pxa_udc_pullup,
1686 .vbus_session = pxa_udc_vbus_session,
1687 .vbus_draw = pxa_udc_vbus_draw,
1688};
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698static void udc_disable(struct pxa_udc *udc)
1699{
1700 if (!udc->enabled)
1701 return;
1702
1703 udc_writel(udc, UDCICR0, 0);
1704 udc_writel(udc, UDCICR1, 0);
1705
1706 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1707 clk_disable(udc->clk);
1708
1709 ep0_idle(udc);
1710 udc->gadget.speed = USB_SPEED_UNKNOWN;
1711
1712 udc->enabled = 0;
1713}
1714
1715
1716
1717
1718
1719
1720
1721
1722static __init void udc_init_data(struct pxa_udc *dev)
1723{
1724 int i;
1725 struct pxa_ep *ep;
1726
1727
1728 INIT_LIST_HEAD(&dev->gadget.ep_list);
1729 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1730 dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0];
1731 ep0_idle(dev);
1732
1733
1734 for (i = 0; i < NR_PXA_ENDPOINTS; i++) {
1735 ep = &dev->pxa_ep[i];
1736
1737 ep->enabled = is_ep0(ep);
1738 INIT_LIST_HEAD(&ep->queue);
1739 spin_lock_init(&ep->lock);
1740 }
1741
1742
1743 for (i = 1; i < NR_USB_ENDPOINTS; i++)
1744 list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list,
1745 &dev->gadget.ep_list);
1746}
1747
1748
1749
1750
1751
1752
1753
1754
1755static void udc_enable(struct pxa_udc *udc)
1756{
1757 if (udc->enabled)
1758 return;
1759
1760 udc_writel(udc, UDCICR0, 0);
1761 udc_writel(udc, UDCICR1, 0);
1762 udc_clear_mask_UDCCR(udc, UDCCR_UDE);
1763
1764 clk_enable(udc->clk);
1765
1766 ep0_idle(udc);
1767 udc->gadget.speed = USB_SPEED_FULL;
1768 memset(&udc->stats, 0, sizeof(udc->stats));
1769
1770 udc_set_mask_UDCCR(udc, UDCCR_UDE);
1771 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_ACM);
1772 udelay(2);
1773 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
1774 dev_err(udc->dev, "Configuration errors, udc disabled\n");
1775
1776
1777
1778
1779 msleep(100);
1780
1781
1782 udc_writel(udc, UDCICR1,
1783 UDCICR1_IECC | UDCICR1_IERU
1784 | UDCICR1_IESU | UDCICR1_IERS);
1785
1786
1787 pio_irq_enable(&udc->pxa_ep[0]);
1788
1789 udc->enabled = 1;
1790}
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
1808 int (*bind)(struct usb_gadget *))
1809{
1810 struct pxa_udc *udc = the_controller;
1811 int retval;
1812
1813 if (!driver || driver->speed < USB_SPEED_FULL || !bind
1814 || !driver->disconnect || !driver->setup)
1815 return -EINVAL;
1816 if (!udc)
1817 return -ENODEV;
1818 if (udc->driver)
1819 return -EBUSY;
1820
1821
1822 udc->driver = driver;
1823 udc->gadget.dev.driver = &driver->driver;
1824 dplus_pullup(udc, 1);
1825
1826 retval = device_add(&udc->gadget.dev);
1827 if (retval) {
1828 dev_err(udc->dev, "device_add error %d\n", retval);
1829 goto add_fail;
1830 }
1831 retval = bind(&udc->gadget);
1832 if (retval) {
1833 dev_err(udc->dev, "bind to driver %s --> error %d\n",
1834 driver->driver.name, retval);
1835 goto bind_fail;
1836 }
1837 dev_dbg(udc->dev, "registered gadget driver '%s'\n",
1838 driver->driver.name);
1839
1840 if (udc->transceiver) {
1841 retval = otg_set_peripheral(udc->transceiver, &udc->gadget);
1842 if (retval) {
1843 dev_err(udc->dev, "can't bind to transceiver\n");
1844 goto transceiver_fail;
1845 }
1846 }
1847
1848 if (should_enable_udc(udc))
1849 udc_enable(udc);
1850 return 0;
1851
1852transceiver_fail:
1853 if (driver->unbind)
1854 driver->unbind(&udc->gadget);
1855bind_fail:
1856 device_del(&udc->gadget.dev);
1857add_fail:
1858 udc->driver = NULL;
1859 udc->gadget.dev.driver = NULL;
1860 return retval;
1861}
1862EXPORT_SYMBOL(usb_gadget_probe_driver);
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver)
1874{
1875 int i;
1876
1877
1878 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1879 driver = NULL;
1880 udc->gadget.speed = USB_SPEED_UNKNOWN;
1881
1882 for (i = 0; i < NR_USB_ENDPOINTS; i++)
1883 pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep);
1884
1885 if (driver)
1886 driver->disconnect(&udc->gadget);
1887}
1888
1889
1890
1891
1892
1893
1894
1895int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1896{
1897 struct pxa_udc *udc = the_controller;
1898
1899 if (!udc)
1900 return -ENODEV;
1901 if (!driver || driver != udc->driver || !driver->unbind)
1902 return -EINVAL;
1903
1904 stop_activity(udc, driver);
1905 udc_disable(udc);
1906 dplus_pullup(udc, 0);
1907
1908 driver->unbind(&udc->gadget);
1909 udc->driver = NULL;
1910
1911 device_del(&udc->gadget.dev);
1912 dev_info(udc->dev, "unregistered gadget driver '%s'\n",
1913 driver->driver.name);
1914
1915 if (udc->transceiver)
1916 return otg_set_peripheral(udc->transceiver, NULL);
1917 return 0;
1918}
1919EXPORT_SYMBOL(usb_gadget_unregister_driver);
1920
1921
1922
1923
1924
1925
1926static void handle_ep0_ctrl_req(struct pxa_udc *udc,
1927 struct pxa27x_request *req)
1928{
1929 struct pxa_ep *ep = &udc->pxa_ep[0];
1930 union {
1931 struct usb_ctrlrequest r;
1932 u32 word[2];
1933 } u;
1934 int i;
1935 int have_extrabytes = 0;
1936 unsigned long flags;
1937
1938 nuke(ep, -EPROTO);
1939 spin_lock_irqsave(&ep->lock, flags);
1940
1941
1942
1943
1944
1945
1946
1947 if (epout_has_pkt(ep) && (ep_count_bytes_remain(ep) == 0))
1948 ep_write_UDCCSR(ep, UDCCSR0_OPC);
1949
1950
1951 for (i = 0; i < 2; i++) {
1952 if (unlikely(ep_is_empty(ep)))
1953 goto stall;
1954 u.word[i] = udc_ep_readl(ep, UDCDR);
1955 }
1956
1957 have_extrabytes = !ep_is_empty(ep);
1958 while (!ep_is_empty(ep)) {
1959 i = udc_ep_readl(ep, UDCDR);
1960 ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i);
1961 }
1962
1963 ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1964 u.r.bRequestType, u.r.bRequest,
1965 le16_to_cpu(u.r.wValue), le16_to_cpu(u.r.wIndex),
1966 le16_to_cpu(u.r.wLength));
1967 if (unlikely(have_extrabytes))
1968 goto stall;
1969
1970 if (u.r.bRequestType & USB_DIR_IN)
1971 set_ep0state(udc, IN_DATA_STAGE);
1972 else
1973 set_ep0state(udc, OUT_DATA_STAGE);
1974
1975
1976 ep_write_UDCCSR(ep, UDCCSR0_SA | UDCCSR0_OPC);
1977
1978 spin_unlock_irqrestore(&ep->lock, flags);
1979 i = udc->driver->setup(&udc->gadget, &u.r);
1980 spin_lock_irqsave(&ep->lock, flags);
1981 if (i < 0)
1982 goto stall;
1983out:
1984 spin_unlock_irqrestore(&ep->lock, flags);
1985 return;
1986stall:
1987 ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n",
1988 udc_ep_readl(ep, UDCCSR), i);
1989 ep_write_UDCCSR(ep, UDCCSR0_FST | UDCCSR0_FTF);
1990 set_ep0state(udc, STALL);
1991 goto out;
1992}
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq)
2043{
2044 u32 udccsr0;
2045 struct pxa_ep *ep = &udc->pxa_ep[0];
2046 struct pxa27x_request *req = NULL;
2047 int completed = 0;
2048
2049 if (!list_empty(&ep->queue))
2050 req = list_entry(ep->queue.next, struct pxa27x_request, queue);
2051
2052 udccsr0 = udc_ep_readl(ep, UDCCSR);
2053 ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n",
2054 EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR),
2055 (fifo_irq << 1 | opc_irq));
2056
2057 if (udccsr0 & UDCCSR0_SST) {
2058 ep_dbg(ep, "clearing stall status\n");
2059 nuke(ep, -EPIPE);
2060 ep_write_UDCCSR(ep, UDCCSR0_SST);
2061 ep0_idle(udc);
2062 }
2063
2064 if (udccsr0 & UDCCSR0_SA) {
2065 nuke(ep, 0);
2066 set_ep0state(udc, SETUP_STAGE);
2067 }
2068
2069 switch (udc->ep0state) {
2070 case WAIT_FOR_SETUP:
2071
2072
2073
2074
2075
2076
2077 break;
2078 case SETUP_STAGE:
2079 udccsr0 &= UDCCSR0_CTRL_REQ_MASK;
2080 if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK))
2081 handle_ep0_ctrl_req(udc, req);
2082 break;
2083 case IN_DATA_STAGE:
2084 if (epout_has_pkt(ep))
2085 ep_write_UDCCSR(ep, UDCCSR0_OPC);
2086 if (req && !ep_is_full(ep))
2087 completed = write_ep0_fifo(ep, req);
2088 if (completed)
2089 ep0_end_in_req(ep, req, NULL);
2090 break;
2091 case OUT_DATA_STAGE:
2092 if (epout_has_pkt(ep) && req)
2093 completed = read_ep0_fifo(ep, req);
2094 if (completed)
2095 ep0_end_out_req(ep, req, NULL);
2096 break;
2097 case STALL:
2098 ep_write_UDCCSR(ep, UDCCSR0_FST);
2099 break;
2100 case IN_STATUS_STAGE:
2101
2102
2103
2104
2105
2106 if (opc_irq)
2107 ep0_idle(udc);
2108 break;
2109 case OUT_STATUS_STAGE:
2110 case WAIT_ACK_SET_CONF_INTERF:
2111 ep_warn(ep, "should never get in %s state here!!!\n",
2112 EP0_STNAME(ep->dev));
2113 ep0_idle(udc);
2114 break;
2115 }
2116}
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127static void handle_ep(struct pxa_ep *ep)
2128{
2129 struct pxa27x_request *req;
2130 int completed;
2131 u32 udccsr;
2132 int is_in = ep->dir_in;
2133 int loop = 0;
2134 unsigned long flags;
2135
2136 spin_lock_irqsave(&ep->lock, flags);
2137 if (ep->in_handle_ep)
2138 goto recursion_detected;
2139 ep->in_handle_ep = 1;
2140
2141 do {
2142 completed = 0;
2143 udccsr = udc_ep_readl(ep, UDCCSR);
2144
2145 if (likely(!list_empty(&ep->queue)))
2146 req = list_entry(ep->queue.next,
2147 struct pxa27x_request, queue);
2148 else
2149 req = NULL;
2150
2151 ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n",
2152 req, udccsr, loop++);
2153
2154 if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN)))
2155 udc_ep_writel(ep, UDCCSR,
2156 udccsr & (UDCCSR_SST | UDCCSR_TRN));
2157 if (!req)
2158 break;
2159
2160 if (unlikely(is_in)) {
2161 if (likely(!ep_is_full(ep)))
2162 completed = write_fifo(ep, req);
2163 } else {
2164 if (likely(epout_has_pkt(ep)))
2165 completed = read_fifo(ep, req);
2166 }
2167
2168 if (completed) {
2169 if (is_in)
2170 ep_end_in_req(ep, req, &flags);
2171 else
2172 ep_end_out_req(ep, req, &flags);
2173 }
2174 } while (completed);
2175
2176 ep->in_handle_ep = 0;
2177recursion_detected:
2178 spin_unlock_irqrestore(&ep->lock, flags);
2179}
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189static void pxa27x_change_configuration(struct pxa_udc *udc, int config)
2190{
2191 struct usb_ctrlrequest req ;
2192
2193 dev_dbg(udc->dev, "config=%d\n", config);
2194
2195 udc->config = config;
2196 udc->last_interface = 0;
2197 udc->last_alternate = 0;
2198
2199 req.bRequestType = 0;
2200 req.bRequest = USB_REQ_SET_CONFIGURATION;
2201 req.wValue = config;
2202 req.wIndex = 0;
2203 req.wLength = 0;
2204
2205 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2206 udc->driver->setup(&udc->gadget, &req);
2207 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2208}
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt)
2220{
2221 struct usb_ctrlrequest req;
2222
2223 dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt);
2224
2225 udc->last_interface = iface;
2226 udc->last_alternate = alt;
2227
2228 req.bRequestType = USB_RECIP_INTERFACE;
2229 req.bRequest = USB_REQ_SET_INTERFACE;
2230 req.wValue = alt;
2231 req.wIndex = iface;
2232 req.wLength = 0;
2233
2234 set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF);
2235 udc->driver->setup(&udc->gadget, &req);
2236 ep_write_UDCCSR(&udc->pxa_ep[0], UDCCSR0_AREN);
2237}
2238
2239
2240
2241
2242
2243
2244
2245
2246static void irq_handle_data(int irq, struct pxa_udc *udc)
2247{
2248 int i;
2249 struct pxa_ep *ep;
2250 u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK;
2251 u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK;
2252
2253 if (udcisr0 & UDCISR_INT_MASK) {
2254 udc->pxa_ep[0].stats.irqs++;
2255 udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK));
2256 handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR),
2257 !!(udcisr0 & UDCICR_PKTCOMPL));
2258 }
2259
2260 udcisr0 >>= 2;
2261 for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) {
2262 if (!(udcisr0 & UDCISR_INT_MASK))
2263 continue;
2264
2265 udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK));
2266
2267 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2268 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2269 ep = &udc->pxa_ep[i];
2270 ep->stats.irqs++;
2271 handle_ep(ep);
2272 }
2273 }
2274
2275 for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) {
2276 udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK));
2277 if (!(udcisr1 & UDCISR_INT_MASK))
2278 continue;
2279
2280 WARN_ON(i >= ARRAY_SIZE(udc->pxa_ep));
2281 if (i < ARRAY_SIZE(udc->pxa_ep)) {
2282 ep = &udc->pxa_ep[i];
2283 ep->stats.irqs++;
2284 handle_ep(ep);
2285 }
2286 }
2287
2288}
2289
2290
2291
2292
2293
2294static void irq_udc_suspend(struct pxa_udc *udc)
2295{
2296 udc_writel(udc, UDCISR1, UDCISR1_IRSU);
2297 udc->stats.irqs_suspend++;
2298
2299 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2300 && udc->driver && udc->driver->suspend)
2301 udc->driver->suspend(&udc->gadget);
2302 ep0_idle(udc);
2303}
2304
2305
2306
2307
2308
2309static void irq_udc_resume(struct pxa_udc *udc)
2310{
2311 udc_writel(udc, UDCISR1, UDCISR1_IRRU);
2312 udc->stats.irqs_resume++;
2313
2314 if (udc->gadget.speed != USB_SPEED_UNKNOWN
2315 && udc->driver && udc->driver->resume)
2316 udc->driver->resume(&udc->gadget);
2317}
2318
2319
2320
2321
2322
2323static void irq_udc_reconfig(struct pxa_udc *udc)
2324{
2325 unsigned config, interface, alternate, config_change;
2326 u32 udccr = udc_readl(udc, UDCCR);
2327
2328 udc_writel(udc, UDCISR1, UDCISR1_IRCC);
2329 udc->stats.irqs_reconfig++;
2330
2331 config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S;
2332 config_change = (config != udc->config);
2333 pxa27x_change_configuration(udc, config);
2334
2335 interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S;
2336 alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S;
2337 pxa27x_change_interface(udc, interface, alternate);
2338
2339 if (config_change)
2340 update_pxa_ep_matches(udc);
2341 udc_set_mask_UDCCR(udc, UDCCR_SMAC);
2342}
2343
2344
2345
2346
2347
2348static void irq_udc_reset(struct pxa_udc *udc)
2349{
2350 u32 udccr = udc_readl(udc, UDCCR);
2351 struct pxa_ep *ep = &udc->pxa_ep[0];
2352
2353 dev_info(udc->dev, "USB reset\n");
2354 udc_writel(udc, UDCISR1, UDCISR1_IRRS);
2355 udc->stats.irqs_reset++;
2356
2357 if ((udccr & UDCCR_UDA) == 0) {
2358 dev_dbg(udc->dev, "USB reset start\n");
2359 stop_activity(udc, udc->driver);
2360 }
2361 udc->gadget.speed = USB_SPEED_FULL;
2362 memset(&udc->stats, 0, sizeof udc->stats);
2363
2364 nuke(ep, -EPROTO);
2365 ep_write_UDCCSR(ep, UDCCSR0_FTF | UDCCSR0_OPC);
2366 ep0_idle(udc);
2367}
2368
2369
2370
2371
2372
2373
2374
2375
2376static irqreturn_t pxa_udc_irq(int irq, void *_dev)
2377{
2378 struct pxa_udc *udc = _dev;
2379 u32 udcisr0 = udc_readl(udc, UDCISR0);
2380 u32 udcisr1 = udc_readl(udc, UDCISR1);
2381 u32 udccr = udc_readl(udc, UDCCR);
2382 u32 udcisr1_spec;
2383
2384 dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, "
2385 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2386
2387 udcisr1_spec = udcisr1 & 0xf8000000;
2388 if (unlikely(udcisr1_spec & UDCISR1_IRSU))
2389 irq_udc_suspend(udc);
2390 if (unlikely(udcisr1_spec & UDCISR1_IRRU))
2391 irq_udc_resume(udc);
2392 if (unlikely(udcisr1_spec & UDCISR1_IRCC))
2393 irq_udc_reconfig(udc);
2394 if (unlikely(udcisr1_spec & UDCISR1_IRRS))
2395 irq_udc_reset(udc);
2396
2397 if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK))
2398 irq_handle_data(irq, udc);
2399
2400 return IRQ_HANDLED;
2401}
2402
2403static struct pxa_udc memory = {
2404 .gadget = {
2405 .ops = &pxa_udc_ops,
2406 .ep0 = &memory.udc_usb_ep[0].usb_ep,
2407 .name = driver_name,
2408 .dev = {
2409 .init_name = "gadget",
2410 },
2411 },
2412
2413 .udc_usb_ep = {
2414 USB_EP_CTRL,
2415 USB_EP_OUT_BULK(1),
2416 USB_EP_IN_BULK(2),
2417 USB_EP_IN_ISO(3),
2418 USB_EP_OUT_ISO(4),
2419 USB_EP_IN_INT(5),
2420 },
2421
2422 .pxa_ep = {
2423 PXA_EP_CTRL,
2424
2425 PXA_EP_OUT_BULK(1, 1, 3, 0, 0),
2426 PXA_EP_IN_BULK(2, 2, 3, 0, 0),
2427
2428 PXA_EP_OUT_BULK(3, 1, 1, 0, 0),
2429 PXA_EP_IN_BULK(4, 2, 1, 0, 0),
2430 PXA_EP_IN_ISO(5, 3, 1, 0, 0),
2431 PXA_EP_OUT_ISO(6, 4, 1, 0, 0),
2432 PXA_EP_IN_INT(7, 5, 1, 0, 0),
2433
2434 PXA_EP_OUT_BULK(8, 1, 2, 0, 0),
2435 PXA_EP_IN_BULK(9, 2, 2, 0, 0),
2436 PXA_EP_IN_INT(10, 5, 2, 0, 0),
2437
2438
2439
2440
2441
2442 PXA_EP_OUT_BULK(11, 1, 2, 1, 0),
2443 PXA_EP_IN_BULK(12, 2, 2, 1, 0),
2444
2445 PXA_EP_OUT_BULK(13, 1, 1, 1, 1),
2446 PXA_EP_IN_BULK(14, 2, 1, 1, 1),
2447 }
2448};
2449
2450
2451
2452
2453
2454
2455
2456
2457static int __init pxa_udc_probe(struct platform_device *pdev)
2458{
2459 struct resource *regs;
2460 struct pxa_udc *udc = &memory;
2461 int retval = 0, gpio;
2462
2463 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2464 if (!regs)
2465 return -ENXIO;
2466 udc->irq = platform_get_irq(pdev, 0);
2467 if (udc->irq < 0)
2468 return udc->irq;
2469
2470 udc->dev = &pdev->dev;
2471 udc->mach = pdev->dev.platform_data;
2472 udc->transceiver = otg_get_transceiver();
2473
2474 gpio = udc->mach->gpio_pullup;
2475 if (gpio_is_valid(gpio)) {
2476 retval = gpio_request(gpio, "USB D+ pullup");
2477 if (retval == 0)
2478 gpio_direction_output(gpio,
2479 udc->mach->gpio_pullup_inverted);
2480 }
2481 if (retval) {
2482 dev_err(&pdev->dev, "Couldn't request gpio %d : %d\n",
2483 gpio, retval);
2484 return retval;
2485 }
2486
2487 udc->clk = clk_get(&pdev->dev, NULL);
2488 if (IS_ERR(udc->clk)) {
2489 retval = PTR_ERR(udc->clk);
2490 goto err_clk;
2491 }
2492
2493 retval = -ENOMEM;
2494 udc->regs = ioremap(regs->start, resource_size(regs));
2495 if (!udc->regs) {
2496 dev_err(&pdev->dev, "Unable to map UDC I/O memory\n");
2497 goto err_map;
2498 }
2499
2500 device_initialize(&udc->gadget.dev);
2501 udc->gadget.dev.parent = &pdev->dev;
2502 udc->gadget.dev.dma_mask = NULL;
2503 udc->vbus_sensed = 0;
2504
2505 the_controller = udc;
2506 platform_set_drvdata(pdev, udc);
2507 udc_init_data(udc);
2508 pxa_eps_setup(udc);
2509
2510
2511 retval = request_irq(udc->irq, pxa_udc_irq,
2512 IRQF_SHARED, driver_name, udc);
2513 if (retval != 0) {
2514 dev_err(udc->dev, "%s: can't get irq %i, err %d\n",
2515 driver_name, IRQ_USB, retval);
2516 goto err_irq;
2517 }
2518
2519 pxa_init_debugfs(udc);
2520 return 0;
2521err_irq:
2522 iounmap(udc->regs);
2523err_map:
2524 clk_put(udc->clk);
2525 udc->clk = NULL;
2526err_clk:
2527 return retval;
2528}
2529
2530
2531
2532
2533
2534static int __exit pxa_udc_remove(struct platform_device *_dev)
2535{
2536 struct pxa_udc *udc = platform_get_drvdata(_dev);
2537 int gpio = udc->mach->gpio_pullup;
2538
2539 usb_gadget_unregister_driver(udc->driver);
2540 free_irq(udc->irq, udc);
2541 pxa_cleanup_debugfs(udc);
2542 if (gpio_is_valid(gpio))
2543 gpio_free(gpio);
2544
2545 otg_put_transceiver(udc->transceiver);
2546
2547 udc->transceiver = NULL;
2548 platform_set_drvdata(_dev, NULL);
2549 the_controller = NULL;
2550 clk_put(udc->clk);
2551 iounmap(udc->regs);
2552
2553 return 0;
2554}
2555
2556static void pxa_udc_shutdown(struct platform_device *_dev)
2557{
2558 struct pxa_udc *udc = platform_get_drvdata(_dev);
2559
2560 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2561 udc_disable(udc);
2562}
2563
2564#ifdef CONFIG_PXA27x
2565extern void pxa27x_clear_otgph(void);
2566#else
2567#define pxa27x_clear_otgph() do {} while (0)
2568#endif
2569
2570#ifdef CONFIG_PM
2571
2572
2573
2574
2575
2576
2577
2578
2579static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state)
2580{
2581 int i;
2582 struct pxa_udc *udc = platform_get_drvdata(_dev);
2583 struct pxa_ep *ep;
2584
2585 ep = &udc->pxa_ep[0];
2586 udc->udccsr0 = udc_ep_readl(ep, UDCCSR);
2587 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2588 ep = &udc->pxa_ep[i];
2589 ep->udccsr_value = udc_ep_readl(ep, UDCCSR);
2590 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2591 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2592 ep->udccsr_value, ep->udccr_value);
2593 }
2594
2595 udc_disable(udc);
2596 udc->pullup_resume = udc->pullup_on;
2597 dplus_pullup(udc, 0);
2598
2599 return 0;
2600}
2601
2602
2603
2604
2605
2606
2607
2608
2609static int pxa_udc_resume(struct platform_device *_dev)
2610{
2611 int i;
2612 struct pxa_udc *udc = platform_get_drvdata(_dev);
2613 struct pxa_ep *ep;
2614
2615 ep = &udc->pxa_ep[0];
2616 udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME));
2617 for (i = 1; i < NR_PXA_ENDPOINTS; i++) {
2618 ep = &udc->pxa_ep[i];
2619 udc_ep_writel(ep, UDCCSR, ep->udccsr_value);
2620 udc_ep_writel(ep, UDCCR, ep->udccr_value);
2621 ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n",
2622 ep->udccsr_value, ep->udccr_value);
2623 }
2624
2625 dplus_pullup(udc, udc->pullup_resume);
2626 if (should_enable_udc(udc))
2627 udc_enable(udc);
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637 pxa27x_clear_otgph();
2638
2639 return 0;
2640}
2641#endif
2642
2643
2644MODULE_ALIAS("platform:pxa27x-udc");
2645
2646static struct platform_driver udc_driver = {
2647 .driver = {
2648 .name = "pxa27x-udc",
2649 .owner = THIS_MODULE,
2650 },
2651 .remove = __exit_p(pxa_udc_remove),
2652 .shutdown = pxa_udc_shutdown,
2653#ifdef CONFIG_PM
2654 .suspend = pxa_udc_suspend,
2655 .resume = pxa_udc_resume
2656#endif
2657};
2658
2659static int __init udc_init(void)
2660{
2661 if (!cpu_is_pxa27x() && !cpu_is_pxa3xx())
2662 return -ENODEV;
2663
2664 printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2665 return platform_driver_probe(&udc_driver, pxa_udc_probe);
2666}
2667module_init(udc_init);
2668
2669
2670static void __exit udc_exit(void)
2671{
2672 platform_driver_unregister(&udc_driver);
2673}
2674module_exit(udc_exit);
2675
2676MODULE_DESCRIPTION(DRIVER_DESC);
2677MODULE_AUTHOR("Robert Jarzmik");
2678MODULE_LICENSE("GPL");
2679