LXR linux/include/linux/mfd/davinci

   1/*
   2 * DaVinci Voice Codec Core Interface for TI platforms
   3 *
   4 * Copyright (C) 2010 Texas Instruments, Inc
   5 *
   6 * Author: Miguel Aguilar <miguel.aguilar@ridgerun.com>
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21 */
  22
  23#ifndef __LINUX_MFD_DAVINCI_VOICECODEC_H_
  24#define __LINUX_MFD_DAVINIC_VOICECODEC_H_
  25
  26#include <linux/kernel.h>
  27#include <linux/platform_device.h>
  28#include <linux/mfd/core.h>
  29
  30#include <mach/edma.h>
  31
  32/*
  33 * Register values.
  34 */
  35#define DAVINCI_VC_PID                  0x00
  36#define DAVINCI_VC_CTRL                 0x04
  37#define DAVINCI_VC_INTEN                0x08
  38#define DAVINCI_VC_INTSTATUS            0x0c
  39#define DAVINCI_VC_INTCLR               0x10
  40#define DAVINCI_VC_EMUL_CTRL            0x14
  41#define DAVINCI_VC_RFIFO                0x20
  42#define DAVINCI_VC_WFIFO                0x24
  43#define DAVINCI_VC_FIFOSTAT             0x28
  44#define DAVINCI_VC_TST_CTRL             0x2C
  45#define DAVINCI_VC_REG05                0x94
  46#define DAVINCI_VC_REG09                0xA4
  47#define DAVINCI_VC_REG12                0xB0
  48
  49/* DAVINCI_VC_CTRL bit fields */
  50#define DAVINCI_VC_CTRL_MASK            0x5500
  51#define DAVINCI_VC_CTRL_RSTADC          BIT(0)
  52#define DAVINCI_VC_CTRL_RSTDAC          BIT(1)
  53#define DAVINCI_VC_CTRL_RD_BITS_8       BIT(4)
  54#define DAVINCI_VC_CTRL_RD_UNSIGNED     BIT(5)
  55#define DAVINCI_VC_CTRL_WD_BITS_8       BIT(6)
  56#define DAVINCI_VC_CTRL_WD_UNSIGNED     BIT(7)
  57#define DAVINCI_VC_CTRL_RFIFOEN         BIT(8)
  58#define DAVINCI_VC_CTRL_RFIFOCL         BIT(9)
  59#define DAVINCI_VC_CTRL_RFIFOMD_WORD_1  BIT(10)
  60#define DAVINCI_VC_CTRL_WFIFOEN         BIT(12)
  61#define DAVINCI_VC_CTRL_WFIFOCL         BIT(13)
  62#define DAVINCI_VC_CTRL_WFIFOMD_WORD_1  BIT(14)
  63
  64/* DAVINCI_VC_INT bit fields */
  65#define DAVINCI_VC_INT_MASK             0x3F
  66#define DAVINCI_VC_INT_RDRDY_MASK       BIT(0)
  67#define DAVINCI_VC_INT_RERROVF_MASK     BIT(1)
  68#define DAVINCI_VC_INT_RERRUDR_MASK     BIT(2)
  69#define DAVINCI_VC_INT_WDREQ_MASK       BIT(3)
  70#define DAVINCI_VC_INT_WERROVF_MASKBIT  BIT(4)
  71#define DAVINCI_VC_INT_WERRUDR_MASK     BIT(5)
  72
  73/* DAVINCI_VC_REG05 bit fields */
  74#define DAVINCI_VC_REG05_PGA_GAIN       0x07
  75
  76/* DAVINCI_VC_REG09 bit fields */
  77#define DAVINCI_VC_REG09_MUTE           0x40
  78#define DAVINCI_VC_REG09_DIG_ATTEN      0x3F
  79
  80/* DAVINCI_VC_REG12 bit fields */
  81#define DAVINCI_VC_REG12_POWER_ALL_ON   0xFD
  82#define DAVINCI_VC_REG12_POWER_ALL_OFF  0x00
  83
  84#define DAVINCI_VC_CELLS                2
  85
  86enum davinci_vc_cells {
  87        DAVINCI_VC_VCIF_CELL,
  88        DAVINCI_VC_CQ93VC_CELL,
  89};
  90
  91struct davinci_vcif {
  92        struct platform_device  *pdev;
  93        u32 dma_tx_channel;
  94        u32 dma_rx_channel;
  95        dma_addr_t dma_tx_addr;
  96        dma_addr_t dma_rx_addr;
  97};
  98
  99struct cq93vc {
 100        struct platform_device *pdev;
 101        struct snd_soc_codec *codec;
 102        u32 sysclk;
 103};
 104
 105struct davinci_vc;
 106
 107struct davinci_vc {
 108        /* Device data */
 109        struct device *dev;
 110        struct platform_device *pdev;
 111        struct clk *clk;
 112
 113        /* Memory resources */
 114        void __iomem *base;
 115        resource_size_t pbase;
 116        size_t base_size;
 117
 118        /* MFD cells */
 119        struct mfd_cell cells[DAVINCI_VC_CELLS];
 120
 121        /* Client devices */
 122        struct davinci_vcif davinci_vcif;
 123        struct cq93vc cq93vc;
 124};
 125
 126#endif
 127