1/* 2 * Copyright (C) 2005 David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 */ 18 19#ifndef __LINUX_SPI_H 20#define __LINUX_SPI_H 21 22#include <linux/device.h> 23#include <linux/mod_devicetable.h> 24#include <linux/slab.h> 25 26/* 27 * INTERFACES between SPI master-side drivers and SPI infrastructure. 28 * (There's no SPI slave support for Linux yet...) 29 */ 30extern struct bus_type spi_bus_type; 31 32/** 33 * struct spi_device - Master side proxy for an SPI slave device 34 * @dev: Driver model representation of the device. 35 * @master: SPI controller used with the device. 36 * @max_speed_hz: Maximum clock rate to be used with this chip 37 * (on this board); may be changed by the device's driver. 38 * The spi_transfer.speed_hz can override this for each transfer. 39 * @chip_select: Chipselect, distinguishing chips handled by @master. 40 * @mode: The spi mode defines how data is clocked out and in. 41 * This may be changed by the device's driver. 42 * The "active low" default for chipselect mode can be overridden 43 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for 44 * each word in a transfer (by specifying SPI_LSB_FIRST). 45 * @bits_per_word: Data transfers involve one or more words; word sizes 46 * like eight or 12 bits are common. In-memory wordsizes are 47 * powers of two bytes (e.g. 20 bit samples use 32 bits). 48 * This may be changed by the device's driver, or left at the 49 * default (0) indicating protocol words are eight bit bytes. 50 * The spi_transfer.bits_per_word can override this for each transfer. 51 * @irq: Negative, or the number passed to request_irq() to receive 52 * interrupts from this device. 53 * @controller_state: Controller's runtime state 54 * @controller_data: Board-specific definitions for controller, such as 55 * FIFO initialization parameters; from board_info.controller_data 56 * @modalias: Name of the driver to use with this device, or an alias 57 * for that name. This appears in the sysfs "modalias" attribute 58 * for driver coldplugging, and in uevents used for hotplugging 59 * 60 * A @spi_device is used to interchange data between an SPI slave 61 * (usually a discrete chip) and CPU memory. 62 * 63 * In @dev, the platform_data is used to hold information about this 64 * device that's meaningful to the device's protocol driver, but not 65 * to its controller. One example might be an identifier for a chip 66 * variant with slightly different functionality; another might be 67 * information about how this particular board wires the chip's pins. 68 */ 69struct spi_device { 70 struct device dev; 71 struct spi_master *master; 72 u32 max_speed_hz; 73 u8 chip_select; 74 u8 mode; 75#define SPI_CPHA 0x01 /* clock phase */ 76#define SPI_CPOL 0x02 /* clock polarity */ 77#define SPI_MODE_0 (0|0) /* (original MicroWire) */ 78#define SPI_MODE_1 (0|SPI_CPHA) 79#define SPI_MODE_2 (SPI_CPOL|0) 80#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) 81#define SPI_CS_HIGH 0x04 /* chipselect active high? */ 82#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ 83#define SPI_3WIRE 0x10 /* SI/SO signals shared */ 84#define SPI_LOOP 0x20 /* loopback mode */ 85#define SPI_NO_CS 0x40 /* 1 dev/bus, no chipselect */ 86#define SPI_READY 0x80 /* slave pulls low to pause */ 87 u8 bits_per_word; 88 int irq; 89 void *controller_state; 90 void *controller_data; 91 char modalias[SPI_NAME_SIZE]; 92 93 /* 94 * likely need more hooks for more protocol options affecting how 95 * the controller talks to each chip, like: 96 * - memory packing (12 bit samples into low bits, others zeroed) 97 * - priority 98 * - drop chipselect after each word 99 * - chipselect delays 100 * - ... 101 */ 102}; 103 104static inline struct spi_device *to_spi_device(struct device *dev) 105{ 106 return dev ? container_of(dev, struct spi_device, dev) : NULL; 107} 108 109/* most drivers won't need to care about device refcounting */ 110static inline struct spi_device *spi_dev_get(struct spi_device *spi) 111{ 112 return (spi && get_device(&spi->dev)) ? spi : NULL; 113} 114 115static inline void spi_dev_put(struct spi_device *spi) 116{ 117 if (spi) 118 put_device(&spi->dev); 119} 120 121/* ctldata is for the bus_master driver's runtime state */ 122static inline void *spi_get_ctldata(struct spi_device *spi) 123{ 124 return spi->controller_state; 125} 126 127static inline void spi_set_ctldata(struct spi_device *spi, void *state) 128{ 129 spi->controller_state = state; 130} 131 132/* device driver data */ 133 134static inline void spi_set_drvdata(struct spi_device *spi, void *data) 135{ 136 dev_set_drvdata(&spi->dev, data); 137} 138 139static inline void *spi_get_drvdata(struct spi_device *spi) 140{ 141 return dev_get_drvdata(&spi->dev); 142} 143 144struct spi_message; 145 146 147 148/** 149 * struct spi_driver - Host side "protocol" driver 150 * @id_table: List of SPI devices supported by this driver 151 * @probe: Binds this driver to the spi device. Drivers can verify 152 * that the device is actually present, and may need to configure 153 * characteristics (such as bits_per_word) which weren't needed for 154 * the initial configuration done during system setup. 155 * @remove: Unbinds this driver from the spi device 156 * @shutdown: Standard shutdown callback used during system state 157 * transitions such as powerdown/halt and kexec 158 * @suspend: Standard suspend callback used during system state transitions 159 * @resume: Standard resume callback used during system state transitions 160 * @driver: SPI device drivers should initialize the name and owner 161 * field of this structure. 162 * 163 * This represents the kind of device driver that uses SPI messages to 164 * interact with the hardware at the other end of a SPI link. It's called 165 * a "protocol" driver because it works through messages rather than talking 166 * directly to SPI hardware (which is what the underlying SPI controller 167 * driver does to pass those messages). These protocols are defined in the 168 * specification for the device(s) supported by the driver. 169 * 170 * As a rule, those device protocols represent the lowest level interface 171 * supported by a driver, and it will support upper level interfaces too. 172 * Examples of such upper levels include frameworks like MTD, networking, 173 * MMC, RTC, filesystem character device nodes, and hardware monitoring. 174 */ 175struct spi_driver { 176 const struct spi_device_id *id_table; 177 int (*probe)(struct spi_device *spi); 178 int (*remove)(struct spi_device *spi); 179 void (*shutdown)(struct spi_device *spi); 180 int (*suspend)(struct spi_device *spi, pm_message_t mesg); 181 int (*resume)(struct spi_device *spi); 182 struct device_driver driver; 183}; 184 185static inline struct spi_driver *to_spi_driver(struct device_driver *drv) 186{ 187 return drv ? container_of(drv, struct spi_driver, driver) : NULL; 188} 189 190extern int spi_register_driver(struct spi_driver *sdrv); 191 192/** 193 * spi_unregister_driver - reverse effect of spi_register_driver 194 * @sdrv: the driver to unregister 195 * Context: can sleep 196 */ 197static inline void spi_unregister_driver(struct spi_driver *sdrv) 198{ 199 if (sdrv) 200 driver_unregister(&sdrv->driver); 201} 202 203 204/** 205 * struct spi_master - interface to SPI master controller 206 * @dev: device interface to this driver 207 * @list: link with the global spi_master list 208 * @bus_num: board-specific (and often SOC-specific) identifier for a 209 * given SPI controller. 210 * @num_chipselect: chipselects are used to distinguish individual 211 * SPI slaves, and are numbered from zero to num_chipselects. 212 * each slave has a chipselect signal, but it's common that not 213 * every chipselect is connected to a slave. 214 * @dma_alignment: SPI controller constraint on DMA buffers alignment. 215 * @mode_bits: flags understood by this controller driver 216 * @flags: other constraints relevant to this driver 217 * @bus_lock_spinlock: spinlock for SPI bus locking 218 * @bus_lock_mutex: mutex for SPI bus locking 219 * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use 220 * @setup: updates the device mode and clocking records used by a 221 * device's SPI controller; protocol code may call this. This 222 * must fail if an unrecognized or unsupported mode is requested. 223 * It's always safe to call this unless transfers are pending on 224 * the device whose settings are being modified. 225 * @transfer: adds a message to the controller's transfer queue. 226 * @cleanup: frees controller-specific state 227 * 228 * Each SPI master controller can communicate with one or more @spi_device 229 * children. These make a small bus, sharing MOSI, MISO and SCK signals 230 * but not chip select signals. Each device may be configured to use a 231 * different clock rate, since those shared signals are ignored unless 232 * the chip is selected. 233 * 234 * The driver for an SPI controller manages access to those devices through 235 * a queue of spi_message transactions, copying data between CPU memory and 236 * an SPI slave device. For each such message it queues, it calls the 237 * message's completion function when the transaction completes. 238 */ 239struct spi_master { 240 struct device dev; 241 242 struct list_head list; 243 244 /* other than negative (== assign one dynamically), bus_num is fully 245 * board-specific. usually that simplifies to being SOC-specific. 246 * example: one SOC has three SPI controllers, numbered 0..2, 247 * and one board's schematics might show it using SPI-2. software 248 * would normally use bus_num=2 for that controller. 249 */ 250 s16 bus_num; 251 252 /* chipselects will be integral to many controllers; some others 253 * might use board-specific GPIOs. 254 */ 255 u16 num_chipselect; 256 257 /* some SPI controllers pose alignment requirements on DMAable 258 * buffers; let protocol drivers know about these requirements. 259 */ 260 u16 dma_alignment; 261 262 /* spi_device.mode flags understood by this controller driver */ 263 u16 mode_bits; 264 265 /* other constraints relevant to this driver */ 266 u16 flags; 267#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */ 268#define SPI_MASTER_NO_RX BIT(1) /* can't do buffer read */ 269#define SPI_MASTER_NO_TX BIT(2) /* can't do buffer write */ 270 271 /* lock and mutex for SPI bus locking */ 272 spinlock_t bus_lock_spinlock; 273 struct mutex bus_lock_mutex; 274 275 /* flag indicating that the SPI bus is locked for exclusive use */ 276 bool bus_lock_flag; 277 278 /* Setup mode and clock, etc (spi driver may call many times). 279 * 280 * IMPORTANT: this may be called when transfers to another 281 * device are active. DO NOT UPDATE SHARED REGISTERS in ways 282 * which could break those transfers. 283 */ 284 int (*setup)(struct spi_device *spi); 285 286 /* bidirectional bulk transfers 287 * 288 * + The transfer() method may not sleep; its main role is 289 * just to add the message to the queue. 290 * + For now there's no remove-from-queue operation, or 291 * any other request management 292 * + To a given spi_device, message queueing is pure fifo 293 * 294 * + The master's main job is to process its message queue, 295 * selecting a chip then transferring data 296 * + If there are multiple spi_device children, the i/o queue 297 * arbitration algorithm is unspecified (round robin, fifo, 298 * priority, reservations, preemption, etc) 299 * 300 * + Chipselect stays active during the entire message 301 * (unless modified by spi_transfer.cs_change != 0). 302 * + The message transfers use clock and SPI mode parameters 303 * previously established by setup() for this device 304 */ 305 int (*transfer)(struct spi_device *spi, 306 struct spi_message *mesg); 307 308 /* called on release() to free memory provided by spi_master */ 309 void (*cleanup)(struct spi_device *spi); 310}; 311 312static inline void *spi_master_get_devdata(struct spi_master *master) 313{ 314 return dev_get_drvdata(&master->dev); 315} 316 317static inline void spi_master_set_devdata(struct spi_master *master, void *data) 318{ 319 dev_set_drvdata(&master->dev, data); 320} 321 322static inline struct spi_master *spi_master_get(struct spi_master *master) 323{ 324 if (!master || !get_device(&master->dev)) 325 return NULL; 326 return master; 327} 328 329static inline void spi_master_put(struct spi_master *master) 330{ 331 if (master) 332 put_device(&master->dev); 333} 334 335 336/* the spi driver core manages memory for the spi_master classdev */ 337extern struct spi_master * 338spi_alloc_master(struct device *host, unsigned size); 339 340extern int spi_register_master(struct spi_master *master); 341extern void spi_unregister_master(struct spi_master *master); 342 343extern struct spi_master *spi_busnum_to_master(u16 busnum); 344 345/*---------------------------------------------------------------------------*/ 346 347/* 348 * I/O INTERFACE between SPI controller and protocol drivers 349 * 350 * Protocol drivers use a queue of spi_messages, each transferring data 351 * between the controller and memory buffers. 352 * 353 * The spi_messages themselves consist of a series of read+write transfer 354 * segments. Those segments always read the same number of bits as they 355 * write; but one or the other is easily ignored by passing a null buffer 356 * pointer. (This is unlike most types of I/O API, because SPI hardware 357 * is full duplex.) 358 * 359 * NOTE: Allocation of spi_transfer and spi_message memory is entirely 360 * up to the protocol driver, which guarantees the integrity of both (as 361 * well as the data buffers) for as long as the message is queued. 362 */ 363 364/** 365 * struct spi_transfer - a read/write buffer pair 366 * @tx_buf: data to be written (dma-safe memory), or NULL 367 * @rx_buf: data to be read (dma-safe memory), or NULL 368 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped 369 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped 370 * @len: size of rx and tx buffers (in bytes) 371 * @speed_hz: Select a speed other than the device default for this 372 * transfer. If 0 the default (from @spi_device) is used. 373 * @bits_per_word: select a bits_per_word other than the device default 374 * for this transfer. If 0 the default (from @spi_device) is used. 375 * @cs_change: affects chipselect after this transfer completes 376 * @delay_usecs: microseconds to delay after this transfer before 377 * (optionally) changing the chipselect status, then starting 378 * the next transfer or completing this @spi_message. 379 * @transfer_list: transfers are sequenced through @spi_message.transfers 380 * 381 * SPI transfers always write the same number of bytes as they read. 382 * Protocol drivers should always provide @rx_buf and/or @tx_buf. 383 * In some cases, they may also want to provide DMA addresses for 384 * the data being transferred; that may reduce overhead, when the 385 * underlying driver uses dma. 386 * 387 * If the transmit buffer is null, zeroes will be shifted out 388 * while filling @rx_buf. If the receive buffer is null, the data 389 * shifted in will be discarded. Only "len" bytes shift out (or in). 390 * It's an error to try to shift out a partial word. (For example, by 391 * shifting out three bytes with word size of sixteen or twenty bits; 392 * the former uses two bytes per word, the latter uses four bytes.) 393 * 394 * In-memory data values are always in native CPU byte order, translated 395 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So 396 * for example when bits_per_word is sixteen, buffers are 2N bytes long 397 * (@len = 2N) and hold N sixteen bit words in CPU byte order. 398 * 399 * When the word size of the SPI transfer is not a power-of-two multiple 400 * of eight bits, those in-memory words include extra bits. In-memory 401 * words are always seen by protocol drivers as right-justified, so the 402 * undefined (rx) or unused (tx) bits are always the most significant bits. 403 * 404 * All SPI transfers start with the relevant chipselect active. Normally 405 * it stays selected until after the last transfer in a message. Drivers 406 * can affect the chipselect signal using cs_change. 407 * 408 * (i) If the transfer isn't the last one in the message, this flag is 409 * used to make the chipselect briefly go inactive in the middle of the 410 * message. Toggling chipselect in this way may be needed to terminate 411 * a chip command, letting a single spi_message perform all of group of 412 * chip transactions together. 413 * 414 * (ii) When the transfer is the last one in the message, the chip may 415 * stay selected until the next transfer. On multi-device SPI busses 416 * with nothing blocking messages going to other devices, this is just 417 * a performance hint; starting a message to another device deselects 418 * this one. But in other cases, this can be used to ensure correctness. 419 * Some devices need protocol transactions to be built from a series of 420 * spi_message submissions, where the content of one message is determined 421 * by the results of previous messages and where the whole transaction 422 * ends when the chipselect goes intactive. 423 * 424 * The code that submits an spi_message (and its spi_transfers) 425 * to the lower layers is responsible for managing its memory. 426 * Zero-initialize every field you don't set up explicitly, to 427 * insulate against future API updates. After you submit a message 428 * and its transfers, ignore them until its completion callback. 429 */ 430struct spi_transfer { 431 /* it's ok if tx_buf == rx_buf (right?) 432 * for MicroWire, one buffer must be null 433 * buffers must work with dma_*map_single() calls, unless 434 * spi_message.is_dma_mapped reports a pre-existing mapping 435 */ 436 const void *tx_buf; 437 void *rx_buf; 438 unsigned len; 439 440 dma_addr_t tx_dma; 441 dma_addr_t rx_dma; 442 443 unsigned cs_change:1; 444 u8 bits_per_word; 445 u16 delay_usecs; 446 u32 speed_hz; 447 448 struct list_head transfer_list; 449}; 450 451/** 452 * struct spi_message - one multi-segment SPI transaction 453 * @transfers: list of transfer segments in this transaction 454 * @spi: SPI device to which the transaction is queued 455 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual 456 * addresses for each transfer buffer 457 * @complete: called to report transaction completions 458 * @context: the argument to complete() when it's called 459 * @actual_length: the total number of bytes that were transferred in all 460 * successful segments 461 * @status: zero for success, else negative errno 462 * @queue: for use by whichever driver currently owns the message 463 * @state: for use by whichever driver currently owns the message 464 * 465 * A @spi_message is used to execute an atomic sequence of data transfers, 466 * each represented by a struct spi_transfer. The sequence is "atomic" 467 * in the sense that no other spi_message may use that SPI bus until that 468 * sequence completes. On some systems, many such sequences can execute as 469 * as single programmed DMA transfer. On all systems, these messages are 470 * queued, and might complete after transactions to other devices. Messages 471 * sent to a given spi_device are alway executed in FIFO order. 472 * 473 * The code that submits an spi_message (and its spi_transfers) 474 * to the lower layers is responsible for managing its memory. 475 * Zero-initialize every field you don't set up explicitly, to 476 * insulate against future API updates. After you submit a message 477 * and its transfers, ignore them until its completion callback. 478 */ 479struct spi_message { 480 struct list_head transfers; 481 482 struct spi_device *spi; 483 484 unsigned is_dma_mapped:1; 485 486 /* REVISIT: we might want a flag affecting the behavior of the 487 * last transfer ... allowing things like "read 16 bit length L" 488 * immediately followed by "read L bytes". Basically imposing 489 * a specific message scheduling algorithm. 490 * 491 * Some controller drivers (message-at-a-time queue processing) 492 * could provide that as their default scheduling algorithm. But 493 * others (with multi-message pipelines) could need a flag to 494 * tell them about such special cases. 495 */ 496 497 /* completion is reported through a callback */ 498 void (*complete)(void *context); 499 void *context; 500 unsigned actual_length; 501 int status; 502 503 /* for optional use by whatever driver currently owns the 504 * spi_message ... between calls to spi_async and then later 505 * complete(), that's the spi_master controller driver. 506 */ 507 struct list_head queue; 508 void *state; 509}; 510 511static inline void spi_message_init(struct spi_message *m) 512{ 513 memset(m, 0, sizeof *m); 514 INIT_LIST_HEAD(&m->transfers); 515} 516 517static inline void 518spi_message_add_tail(struct spi_transfer *t, struct spi_message *m) 519{ 520 list_add_tail(&t->transfer_list, &m->transfers); 521} 522 523static inline void 524spi_transfer_del(struct spi_transfer *t) 525{ 526 list_del(&t->transfer_list); 527} 528 529/* It's fine to embed message and transaction structures in other data 530 * structures so long as you don't free them while they're in use. 531 */ 532 533static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags) 534{ 535 struct spi_message *m; 536 537 m = kzalloc(sizeof(struct spi_message) 538 + ntrans * sizeof(struct spi_transfer), 539 flags); 540 if (m) { 541 int i; 542 struct spi_transfer *t = (struct spi_transfer *)(m + 1); 543 544 INIT_LIST_HEAD(&m->transfers); 545 for (i = 0; i < ntrans; i++, t++) 546 spi_message_add_tail(t, m); 547 } 548 return m; 549} 550 551static inline void spi_message_free(struct spi_message *m) 552{ 553 kfree(m); 554} 555 556extern int spi_setup(struct spi_device *spi); 557extern int spi_async(struct spi_device *spi, struct spi_message *message); 558extern int spi_async_locked(struct spi_device *spi, 559 struct spi_message *message); 560 561/*---------------------------------------------------------------------------*/ 562 563/* All these synchronous SPI transfer routines are utilities layered 564 * over the core async transfer primitive. Here, "synchronous" means 565 * they will sleep uninterruptibly until the async transfer completes. 566 */ 567 568extern int spi_sync(struct spi_device *spi, struct spi_message *message); 569extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message); 570extern int spi_bus_lock(struct spi_master *master); 571extern int spi_bus_unlock(struct spi_master *master); 572 573/** 574 * spi_write - SPI synchronous write 575 * @spi: device to which data will be written 576 * @buf: data buffer 577 * @len: data buffer size 578 * Context: can sleep 579 * 580 * This writes the buffer and returns zero or a negative error code. 581 * Callable only from contexts that can sleep. 582 */ 583static inline int 584spi_write(struct spi_device *spi, const u8 *buf, size_t len) 585{ 586 struct spi_transfer t = { 587 .tx_buf = buf, 588 .len = len, 589 }; 590 struct spi_message m; 591 592 spi_message_init(&m); 593 spi_message_add_tail(&t, &m); 594 return spi_sync(spi, &m); 595} 596 597/** 598 * spi_read - SPI synchronous read 599 * @spi: device from which data will be read 600 * @buf: data buffer 601 * @len: data buffer size 602 * Context: can sleep 603 * 604 * This reads the buffer and returns zero or a negative error code. 605 * Callable only from contexts that can sleep. 606 */ 607static inline int 608spi_read(struct spi_device *spi, u8 *buf, size_t len) 609{ 610 struct spi_transfer t = { 611 .rx_buf = buf, 612 .len = len, 613 }; 614 struct spi_message m; 615 616 spi_message_init(&m); 617 spi_message_add_tail(&t, &m); 618 return spi_sync(spi, &m); 619} 620 621/* this copies txbuf and rxbuf data; for small transfers only! */ 622extern int spi_write_then_read(struct spi_device *spi, 623 const u8 *txbuf, unsigned n_tx, 624 u8 *rxbuf, unsigned n_rx); 625 626/** 627 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read 628 * @spi: device with which data will be exchanged 629 * @cmd: command to be written before data is read back 630 * Context: can sleep 631 * 632 * This returns the (unsigned) eight bit number returned by the 633 * device, or else a negative error code. Callable only from 634 * contexts that can sleep. 635 */ 636static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd) 637{ 638 ssize_t status; 639 u8 result; 640 641 status = spi_write_then_read(spi, &cmd, 1, &result, 1); 642 643 /* return negative errno or unsigned value */ 644 return (status < 0) ? status : result; 645} 646 647/** 648 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read 649 * @spi: device with which data will be exchanged 650 * @cmd: command to be written before data is read back 651 * Context: can sleep 652 * 653 * This returns the (unsigned) sixteen bit number returned by the 654 * device, or else a negative error code. Callable only from 655 * contexts that can sleep. 656 * 657 * The number is returned in wire-order, which is at least sometimes 658 * big-endian. 659 */ 660static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd) 661{ 662 ssize_t status; 663 u16 result; 664 665 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2); 666 667 /* return negative errno or unsigned value */ 668 return (status < 0) ? status : result; 669} 670 671/*---------------------------------------------------------------------------*/ 672 673/* 674 * INTERFACE between board init code and SPI infrastructure. 675 * 676 * No SPI driver ever sees these SPI device table segments, but 677 * it's how the SPI core (or adapters that get hotplugged) grows 678 * the driver model tree. 679 * 680 * As a rule, SPI devices can't be probed. Instead, board init code 681 * provides a table listing the devices which are present, with enough 682 * information to bind and set up the device's driver. There's basic 683 * support for nonstatic configurations too; enough to handle adding 684 * parport adapters, or microcontrollers acting as USB-to-SPI bridges. 685 */ 686 687/** 688 * struct spi_board_info - board-specific template for a SPI device 689 * @modalias: Initializes spi_device.modalias; identifies the driver. 690 * @platform_data: Initializes spi_device.platform_data; the particular 691 * data stored there is driver-specific. 692 * @controller_data: Initializes spi_device.controller_data; some 693 * controllers need hints about hardware setup, e.g. for DMA. 694 * @irq: Initializes spi_device.irq; depends on how the board is wired. 695 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits 696 * from the chip datasheet and board-specific signal quality issues. 697 * @bus_num: Identifies which spi_master parents the spi_device; unused 698 * by spi_new_device(), and otherwise depends on board wiring. 699 * @chip_select: Initializes spi_device.chip_select; depends on how 700 * the board is wired. 701 * @mode: Initializes spi_device.mode; based on the chip datasheet, board 702 * wiring (some devices support both 3WIRE and standard modes), and 703 * possibly presence of an inverter in the chipselect path. 704 * 705 * When adding new SPI devices to the device tree, these structures serve 706 * as a partial device template. They hold information which can't always 707 * be determined by drivers. Information that probe() can establish (such 708 * as the default transfer wordsize) is not included here. 709 * 710 * These structures are used in two places. Their primary role is to 711 * be stored in tables of board-specific device descriptors, which are 712 * declared early in board initialization and then used (much later) to 713 * populate a controller's device tree after the that controller's driver 714 * initializes. A secondary (and atypical) role is as a parameter to 715 * spi_new_device() call, which happens after those controller drivers 716 * are active in some dynamic board configuration models. 717 */ 718struct spi_board_info { 719 /* the device name and module name are coupled, like platform_bus; 720 * "modalias" is normally the driver name. 721 * 722 * platform_data goes to spi_device.dev.platform_data, 723 * controller_data goes to spi_device.controller_data, 724 * irq is copied too 725 */ 726 char modalias[SPI_NAME_SIZE]; 727 const void *platform_data; 728 void *controller_data; 729 int irq; 730 731 /* slower signaling on noisy or low voltage boards */ 732 u32 max_speed_hz; 733 734 735 /* bus_num is board specific and matches the bus_num of some 736 * spi_master that will probably be registered later. 737 * 738 * chip_select reflects how this chip is wired to that master; 739 * it's less than num_chipselect. 740 */ 741 u16 bus_num; 742 u16 chip_select; 743 744 /* mode becomes spi_device.mode, and is essential for chips 745 * where the default of SPI_CS_HIGH = 0 is wrong. 746 */ 747 u8 mode; 748 749 /* ... may need additional spi_device chip config data here. 750 * avoid stuff protocol drivers can set; but include stuff 751 * needed to behave without being bound to a driver: 752 * - quirks like clock rate mattering when not selected 753 */ 754}; 755 756#ifdef CONFIG_SPI 757extern int 758spi_register_board_info(struct spi_board_info const *info, unsigned n); 759#else 760/* board init code may ignore whether SPI is configured or not */ 761static inline int 762spi_register_board_info(struct spi_board_info const *info, unsigned n) 763 { return 0; } 764#endif 765 766 767/* If you're hotplugging an adapter with devices (parport, usb, etc) 768 * use spi_new_device() to describe each device. You can also call 769 * spi_unregister_device() to start making that device vanish, but 770 * normally that would be handled by spi_unregister_master(). 771 * 772 * You can also use spi_alloc_device() and spi_add_device() to use a two 773 * stage registration sequence for each spi_device. This gives the caller 774 * some more control over the spi_device structure before it is registered, 775 * but requires that caller to initialize fields that would otherwise 776 * be defined using the board info. 777 */ 778extern struct spi_device * 779spi_alloc_device(struct spi_master *master); 780 781extern int 782spi_add_device(struct spi_device *spi); 783 784extern struct spi_device * 785spi_new_device(struct spi_master *, struct spi_board_info *); 786 787static inline void 788spi_unregister_device(struct spi_device *spi) 789{ 790 if (spi) 791 device_unregister(&spi->dev); 792} 793 794extern const struct spi_device_id * 795spi_get_device_id(const struct spi_device *sdev); 796 797#endif /* __LINUX_SPI_H */ 798