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17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/slab.h>
20#include <linux/clk.h>
21#include <linux/io.h>
22
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/initval.h>
27#include <sound/soc.h>
28
29#include <mach/hardware.h>
30#include <mach/ep93xx-regs.h>
31#include <mach/dma.h>
32
33#include "ep93xx-pcm.h"
34
35#define EP93XX_I2S_TXCLKCFG 0x00
36#define EP93XX_I2S_RXCLKCFG 0x04
37#define EP93XX_I2S_GLCTRL 0x0C
38
39#define EP93XX_I2S_TXLINCTRLDATA 0x28
40#define EP93XX_I2S_TXCTRL 0x2C
41#define EP93XX_I2S_TXWRDLEN 0x30
42#define EP93XX_I2S_TX0EN 0x34
43
44#define EP93XX_I2S_RXLINCTRLDATA 0x58
45#define EP93XX_I2S_RXCTRL 0x5C
46#define EP93XX_I2S_RXWRDLEN 0x60
47#define EP93XX_I2S_RX0EN 0x64
48
49#define EP93XX_I2S_WRDLEN_16 (0 << 0)
50#define EP93XX_I2S_WRDLEN_24 (1 << 0)
51#define EP93XX_I2S_WRDLEN_32 (2 << 0)
52
53#define EP93XX_I2S_LINCTRLDATA_R_JUST (1 << 2)
54
55#define EP93XX_I2S_CLKCFG_LRS (1 << 0)
56#define EP93XX_I2S_CLKCFG_CKP (1 << 1)
57#define EP93XX_I2S_CLKCFG_REL (1 << 2)
58#define EP93XX_I2S_CLKCFG_MASTER (1 << 3)
59#define EP93XX_I2S_CLKCFG_NBCG (1 << 4)
60
61struct ep93xx_i2s_info {
62 struct clk *mclk;
63 struct clk *sclk;
64 struct clk *lrclk;
65 struct ep93xx_pcm_dma_params *dma_params;
66 struct resource *mem;
67 void __iomem *regs;
68};
69
70struct ep93xx_pcm_dma_params ep93xx_i2s_dma_params[] = {
71 [SNDRV_PCM_STREAM_PLAYBACK] = {
72 .name = "i2s-pcm-out",
73 .dma_port = EP93XX_DMA_M2P_PORT_I2S1,
74 },
75 [SNDRV_PCM_STREAM_CAPTURE] = {
76 .name = "i2s-pcm-in",
77 .dma_port = EP93XX_DMA_M2P_PORT_I2S1,
78 },
79};
80
81static inline void ep93xx_i2s_write_reg(struct ep93xx_i2s_info *info,
82 unsigned reg, unsigned val)
83{
84 __raw_writel(val, info->regs + reg);
85}
86
87static inline unsigned ep93xx_i2s_read_reg(struct ep93xx_i2s_info *info,
88 unsigned reg)
89{
90 return __raw_readl(info->regs + reg);
91}
92
93static void ep93xx_i2s_enable(struct ep93xx_i2s_info *info, int stream)
94{
95 unsigned base_reg;
96 int i;
97
98 if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
99 (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
100
101 clk_enable(info->mclk);
102 clk_enable(info->sclk);
103 clk_enable(info->lrclk);
104
105
106 ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 1);
107 }
108
109
110 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
111 base_reg = EP93XX_I2S_TX0EN;
112 else
113 base_reg = EP93XX_I2S_RX0EN;
114 for (i = 0; i < 3; i++)
115 ep93xx_i2s_write_reg(info, base_reg + (i * 4), 1);
116}
117
118static void ep93xx_i2s_disable(struct ep93xx_i2s_info *info, int stream)
119{
120 unsigned base_reg;
121 int i;
122
123
124 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
125 base_reg = EP93XX_I2S_TX0EN;
126 else
127 base_reg = EP93XX_I2S_RX0EN;
128 for (i = 0; i < 3; i++)
129 ep93xx_i2s_write_reg(info, base_reg + (i * 4), 0);
130
131 if ((ep93xx_i2s_read_reg(info, EP93XX_I2S_TX0EN) & 0x1) == 0 &&
132 (ep93xx_i2s_read_reg(info, EP93XX_I2S_RX0EN) & 0x1) == 0) {
133
134 ep93xx_i2s_write_reg(info, EP93XX_I2S_GLCTRL, 0);
135
136
137 clk_disable(info->lrclk);
138 clk_disable(info->sclk);
139 clk_disable(info->mclk);
140 }
141}
142
143static int ep93xx_i2s_startup(struct snd_pcm_substream *substream,
144 struct snd_soc_dai *dai)
145{
146 struct snd_soc_pcm_runtime *rtd = substream->private_data;
147 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
148 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
149
150 snd_soc_dai_set_dma_data(cpu_dai, substream,
151 &info->dma_params[substream->stream]);
152 return 0;
153}
154
155static void ep93xx_i2s_shutdown(struct snd_pcm_substream *substream,
156 struct snd_soc_dai *dai)
157{
158 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
159
160 ep93xx_i2s_disable(info, substream->stream);
161}
162
163static int ep93xx_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
164 unsigned int fmt)
165{
166 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai);
167 unsigned int clk_cfg, lin_ctrl;
168
169 clk_cfg = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXCLKCFG);
170 lin_ctrl = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXLINCTRLDATA);
171
172 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
173 case SND_SOC_DAIFMT_I2S:
174 clk_cfg |= EP93XX_I2S_CLKCFG_REL;
175 lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
176 break;
177
178 case SND_SOC_DAIFMT_LEFT_J:
179 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
180 lin_ctrl &= ~EP93XX_I2S_LINCTRLDATA_R_JUST;
181 break;
182
183 case SND_SOC_DAIFMT_RIGHT_J:
184 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
185 lin_ctrl |= EP93XX_I2S_LINCTRLDATA_R_JUST;
186 break;
187
188 default:
189 return -EINVAL;
190 }
191
192 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
193 case SND_SOC_DAIFMT_CBS_CFS:
194
195 clk_cfg |= EP93XX_I2S_CLKCFG_MASTER;
196 break;
197
198 case SND_SOC_DAIFMT_CBM_CFM:
199
200 clk_cfg &= ~EP93XX_I2S_CLKCFG_MASTER;
201 break;
202
203 default:
204 return -EINVAL;
205 }
206
207 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
208 case SND_SOC_DAIFMT_NB_NF:
209
210 clk_cfg &= ~(EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL);
211 break;
212
213 case SND_SOC_DAIFMT_NB_IF:
214
215 clk_cfg &= ~EP93XX_I2S_CLKCFG_CKP;
216 clk_cfg |= EP93XX_I2S_CLKCFG_REL;
217 break;
218
219 case SND_SOC_DAIFMT_IB_NF:
220
221 clk_cfg |= EP93XX_I2S_CLKCFG_CKP;
222 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL;
223 break;
224
225 case SND_SOC_DAIFMT_IB_IF:
226
227 clk_cfg |= EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_REL;
228 break;
229 }
230
231
232 ep93xx_i2s_write_reg(info, EP93XX_I2S_RXCLKCFG, clk_cfg);
233 ep93xx_i2s_write_reg(info, EP93XX_I2S_TXCLKCFG, clk_cfg);
234 ep93xx_i2s_write_reg(info, EP93XX_I2S_RXLINCTRLDATA, lin_ctrl);
235 ep93xx_i2s_write_reg(info, EP93XX_I2S_TXLINCTRLDATA, lin_ctrl);
236 return 0;
237}
238
239static int ep93xx_i2s_hw_params(struct snd_pcm_substream *substream,
240 struct snd_pcm_hw_params *params,
241 struct snd_soc_dai *dai)
242{
243 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
244 unsigned word_len, div, sdiv, lrdiv;
245 int found = 0, err;
246
247 switch (params_format(params)) {
248 case SNDRV_PCM_FORMAT_S16_LE:
249 word_len = EP93XX_I2S_WRDLEN_16;
250 break;
251
252 case SNDRV_PCM_FORMAT_S24_LE:
253 word_len = EP93XX_I2S_WRDLEN_24;
254 break;
255
256 case SNDRV_PCM_FORMAT_S32_LE:
257 word_len = EP93XX_I2S_WRDLEN_32;
258 break;
259
260 default:
261 return -EINVAL;
262 }
263
264 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
265 ep93xx_i2s_write_reg(info, EP93XX_I2S_TXWRDLEN, word_len);
266 else
267 ep93xx_i2s_write_reg(info, EP93XX_I2S_RXWRDLEN, word_len);
268
269
270
271
272
273
274
275
276
277 div = clk_get_rate(info->mclk) / params_rate(params);
278 for (sdiv = 2; sdiv <= 4; sdiv += 2)
279 for (lrdiv = 64; lrdiv <= 128; lrdiv <<= 1)
280 if (sdiv * lrdiv == div) {
281 found = 1;
282 goto out;
283 }
284out:
285 if (!found)
286 return -EINVAL;
287
288 err = clk_set_rate(info->sclk, clk_get_rate(info->mclk) / sdiv);
289 if (err)
290 return err;
291
292 err = clk_set_rate(info->lrclk, clk_get_rate(info->sclk) / lrdiv);
293 if (err)
294 return err;
295
296 ep93xx_i2s_enable(info, substream->stream);
297 return 0;
298}
299
300static int ep93xx_i2s_set_sysclk(struct snd_soc_dai *cpu_dai, int clk_id,
301 unsigned int freq, int dir)
302{
303 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(cpu_dai);
304
305 if (dir == SND_SOC_CLOCK_IN || clk_id != 0)
306 return -EINVAL;
307
308 return clk_set_rate(info->mclk, freq);
309}
310
311#ifdef CONFIG_PM
312static int ep93xx_i2s_suspend(struct snd_soc_dai *dai)
313{
314 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
315
316 if (!dai->active)
317 return;
318
319 ep93xx_i2s_disable(info, SNDRV_PCM_STREAM_PLAYBACK);
320 ep93xx_i2s_disable(info, SNDRV_PCM_STREAM_CAPTURE);
321}
322
323static int ep93xx_i2s_resume(struct snd_soc_dai *dai)
324{
325 struct ep93xx_i2s_info *info = snd_soc_dai_get_drvdata(dai);
326
327 if (!dai->active)
328 return;
329
330 ep93xx_i2s_enable(info, SNDRV_PCM_STREAM_PLAYBACK);
331 ep93xx_i2s_enable(info, SNDRV_PCM_STREAM_CAPTURE);
332}
333#else
334#define ep93xx_i2s_suspend NULL
335#define ep93xx_i2s_resume NULL
336#endif
337
338static struct snd_soc_dai_ops ep93xx_i2s_dai_ops = {
339 .startup = ep93xx_i2s_startup,
340 .shutdown = ep93xx_i2s_shutdown,
341 .hw_params = ep93xx_i2s_hw_params,
342 .set_sysclk = ep93xx_i2s_set_sysclk,
343 .set_fmt = ep93xx_i2s_set_dai_fmt,
344};
345
346#define EP93XX_I2S_FORMATS (SNDRV_PCM_FMTBIT_S32_LE)
347
348static struct snd_soc_dai_driver ep93xx_i2s_dai = {
349 .symmetric_rates= 1,
350 .suspend = ep93xx_i2s_suspend,
351 .resume = ep93xx_i2s_resume,
352 .playback = {
353 .channels_min = 2,
354 .channels_max = 2,
355 .rates = SNDRV_PCM_RATE_8000_96000,
356 .formats = EP93XX_I2S_FORMATS,
357 },
358 .capture = {
359 .channels_min = 2,
360 .channels_max = 2,
361 .rates = SNDRV_PCM_RATE_8000_96000,
362 .formats = EP93XX_I2S_FORMATS,
363 },
364 .ops = &ep93xx_i2s_dai_ops,
365};
366
367static int ep93xx_i2s_probe(struct platform_device *pdev)
368{
369 struct ep93xx_i2s_info *info;
370 struct resource *res;
371 int err;
372
373 info = kzalloc(sizeof(struct ep93xx_i2s_info), GFP_KERNEL);
374 if (!info) {
375 err = -ENOMEM;
376 goto fail;
377 }
378
379 dev_set_drvdata(&pdev->dev, info);
380 info->dma_params = ep93xx_i2s_dma_params;
381
382 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
383 if (!res) {
384 err = -ENODEV;
385 goto fail;
386 }
387
388 info->mem = request_mem_region(res->start, resource_size(res),
389 pdev->name);
390 if (!info->mem) {
391 err = -EBUSY;
392 goto fail;
393 }
394
395 info->regs = ioremap(info->mem->start, resource_size(info->mem));
396 if (!info->regs) {
397 err = -ENXIO;
398 goto fail_release_mem;
399 }
400
401 info->mclk = clk_get(&pdev->dev, "mclk");
402 if (IS_ERR(info->mclk)) {
403 err = PTR_ERR(info->mclk);
404 goto fail_unmap_mem;
405 }
406
407 info->sclk = clk_get(&pdev->dev, "sclk");
408 if (IS_ERR(info->sclk)) {
409 err = PTR_ERR(info->sclk);
410 goto fail_put_mclk;
411 }
412
413 info->lrclk = clk_get(&pdev->dev, "lrclk");
414 if (IS_ERR(info->lrclk)) {
415 err = PTR_ERR(info->lrclk);
416 goto fail_put_sclk;
417 }
418
419 err = snd_soc_register_dai(&pdev->dev, &ep93xx_i2s_dai);
420 if (err)
421 goto fail_put_lrclk;
422
423 return 0;
424
425fail_put_lrclk:
426 clk_put(info->lrclk);
427fail_put_sclk:
428 clk_put(info->sclk);
429fail_put_mclk:
430 clk_put(info->mclk);
431fail_unmap_mem:
432 iounmap(info->regs);
433fail_release_mem:
434 release_mem_region(info->mem->start, resource_size(info->mem));
435 kfree(info);
436fail:
437 return err;
438}
439
440static int __devexit ep93xx_i2s_remove(struct platform_device *pdev)
441{
442 struct ep93xx_i2s_info *info = dev_get_drvdata(&pdev->dev);
443
444 snd_soc_unregister_dai(&pdev->dev);
445 clk_put(info->lrclk);
446 clk_put(info->sclk);
447 clk_put(info->mclk);
448 iounmap(info->regs);
449 release_mem_region(info->mem->start, resource_size(info->mem));
450 kfree(info);
451 return 0;
452}
453
454static struct platform_driver ep93xx_i2s_driver = {
455 .probe = ep93xx_i2s_probe,
456 .remove = __devexit_p(ep93xx_i2s_remove),
457 .driver = {
458 .name = "ep93xx-i2s",
459 .owner = THIS_MODULE,
460 },
461};
462
463static int __init ep93xx_i2s_init(void)
464{
465 return platform_driver_register(&ep93xx_i2s_driver);
466}
467
468static void __exit ep93xx_i2s_exit(void)
469{
470 platform_driver_unregister(&ep93xx_i2s_driver);
471}
472
473module_init(ep93xx_i2s_init);
474module_exit(ep93xx_i2s_exit);
475
476MODULE_ALIAS("platform:ep93xx-i2s");
477MODULE_AUTHOR("Ryan Mallon <ryan@bluewatersys.com>");
478MODULE_DESCRIPTION("EP93XX I2S driver");
479MODULE_LICENSE("GPL");
480
