LXR linux/arch/arm/mach-mx5/mm.c

   1/*
   2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3 *
   4 * The code contained herein is licensed under the GNU General Public
   5 * License.  You may obtain a copy of the GNU General Public License
   6 * Version 2 or later at the following locations:
   7 *
   8 * http://www.opensource.org/licenses/gpl-license.html
   9 * http://www.gnu.org/copyleft/gpl.html
  10 *
  11 * Create static mapping between physical to virtual memory.
  12 */
  13
  14#include <linux/mm.h>
  15#include <linux/init.h>
  16
  17#include <asm/mach/map.h>
  18
  19#include <mach/hardware.h>
  20#include <mach/common.h>
  21#include <mach/iomux-v3.h>
  22
  23/*
  24 * Define the MX51 memory map.
  25 */
  26static struct map_desc mx51_io_desc[] __initdata = {
  27        imx_map_entry(MX51, IRAM, MT_DEVICE),
  28        imx_map_entry(MX51, DEBUG, MT_DEVICE),
  29        imx_map_entry(MX51, AIPS1, MT_DEVICE),
  30        imx_map_entry(MX51, SPBA0, MT_DEVICE),
  31        imx_map_entry(MX51, AIPS2, MT_DEVICE),
  32};
  33
  34/*
  35 * Define the MX53 memory map.
  36 */
  37static struct map_desc mx53_io_desc[] __initdata = {
  38        imx_map_entry(MX53, AIPS1, MT_DEVICE),
  39        imx_map_entry(MX53, SPBA0, MT_DEVICE),
  40        imx_map_entry(MX53, AIPS2, MT_DEVICE),
  41};
  42
  43/*
  44 * This function initializes the memory map. It is called during the
  45 * system startup to create static physical to virtual memory mappings
  46 * for the IO modules.
  47 */
  48void __init mx51_map_io(void)
  49{
  50        iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
  51}
  52
  53void __init imx51_init_early(void)
  54{
  55        mxc_set_cpu_type(MXC_CPU_MX51);
  56        mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
  57        mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
  58}
  59
  60void __init mx53_map_io(void)
  61{
  62        iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
  63}
  64
  65void __init imx53_init_early(void)
  66{
  67        mxc_set_cpu_type(MXC_CPU_MX53);
  68        mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
  69        mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
  70}
  71
  72int imx51_register_gpios(void);
  73
  74void __init mx51_init_irq(void)
  75{
  76        unsigned long tzic_addr;
  77        void __iomem *tzic_virt;
  78
  79        if (mx51_revision() < IMX_CHIP_REVISION_2_0)
  80                tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
  81        else
  82                tzic_addr = MX51_TZIC_BASE_ADDR;
  83
  84        tzic_virt = ioremap(tzic_addr, SZ_16K);
  85        if (!tzic_virt)
  86                panic("unable to map TZIC interrupt controller\n");
  87
  88        tzic_init_irq(tzic_virt);
  89        imx51_register_gpios();
  90}
  91
  92int imx53_register_gpios(void);
  93
  94void __init mx53_init_irq(void)
  95{
  96        unsigned long tzic_addr;
  97        void __iomem *tzic_virt;
  98
  99        tzic_addr = MX53_TZIC_BASE_ADDR;
 100
 101        tzic_virt = ioremap(tzic_addr, SZ_16K);
 102        if (!tzic_virt)
 103                panic("unable to map TZIC interrupt controller\n");
 104
 105        tzic_init_irq(tzic_virt);
 106        imx53_register_gpios();
 107}
 108