linux/arch/arm/mach-s5pv210/include/mach/map.h
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   1/* linux/arch/arm/mach-s5pv210/include/mach/map.h
   2 *
   3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   4 *              http://www.samsung.com/
   5 *
   6 * S5PV210 - Memory map definitions
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11*/
  12
  13#ifndef __ASM_ARCH_MAP_H
  14#define __ASM_ARCH_MAP_H __FILE__
  15
  16#include <plat/map-base.h>
  17#include <plat/map-s5p.h>
  18
  19#define S5PV210_PA_SDRAM                0x20000000
  20
  21#define S5PV210_PA_SROM_BANK5           0xA8000000
  22
  23#define S5PC110_PA_ONENAND              0xB0000000
  24#define S5PC110_PA_ONENAND_DMA          0xB0600000
  25
  26#define S5PV210_PA_CHIPID               0xE0000000
  27
  28#define S5PV210_PA_SYSCON               0xE0100000
  29
  30#define S5PV210_PA_GPIO                 0xE0200000
  31
  32#define S5PV210_PA_SPDIF                0xE1100000
  33
  34#define S5PV210_PA_SPI0                 0xE1300000
  35#define S5PV210_PA_SPI1                 0xE1400000
  36
  37#define S5PV210_PA_KEYPAD               0xE1600000
  38
  39#define S5PV210_PA_ADC                  0xE1700000
  40
  41#define S5PV210_PA_IIC0                 0xE1800000
  42#define S5PV210_PA_IIC1                 0xFAB00000
  43#define S5PV210_PA_IIC2                 0xE1A00000
  44
  45#define S5PV210_PA_AC97                 0xE2200000
  46
  47#define S5PV210_PA_PCM0                 0xE2300000
  48#define S5PV210_PA_PCM1                 0xE1200000
  49#define S5PV210_PA_PCM2                 0xE2B00000
  50
  51#define S5PV210_PA_TIMER                0xE2500000
  52#define S5PV210_PA_SYSTIMER             0xE2600000
  53#define S5PV210_PA_WATCHDOG             0xE2700000
  54#define S5PV210_PA_RTC                  0xE2800000
  55
  56#define S5PV210_PA_UART                 0xE2900000
  57
  58#define S5PV210_PA_SROMC                0xE8000000
  59
  60#define S5PV210_PA_CFCON                0xE8200000
  61
  62#define S5PV210_PA_HSMMC(x)             (0xEB000000 + ((x) * 0x100000))
  63
  64#define S5PV210_PA_HSOTG                0xEC000000
  65#define S5PV210_PA_HSPHY                0xEC100000
  66
  67#define S5PV210_PA_IIS0                 0xEEE30000
  68#define S5PV210_PA_IIS1                 0xE2100000
  69#define S5PV210_PA_IIS2                 0xE2A00000
  70
  71#define S5PV210_PA_DMC0                 0xF0000000
  72#define S5PV210_PA_DMC1                 0xF1400000
  73
  74#define S5PV210_PA_VIC0                 0xF2000000
  75#define S5PV210_PA_VIC1                 0xF2100000
  76#define S5PV210_PA_VIC2                 0xF2200000
  77#define S5PV210_PA_VIC3                 0xF2300000
  78
  79#define S5PV210_PA_FB                   0xF8000000
  80
  81#define S5PV210_PA_MDMA                 0xFA200000
  82#define S5PV210_PA_PDMA0                0xE0900000
  83#define S5PV210_PA_PDMA1                0xE0A00000
  84
  85#define S5PV210_PA_MIPI_CSIS            0xFA600000
  86
  87#define S5PV210_PA_FIMC0                0xFB200000
  88#define S5PV210_PA_FIMC1                0xFB300000
  89#define S5PV210_PA_FIMC2                0xFB400000
  90
  91/* Compatibiltiy Defines */
  92
  93#define S3C_PA_FB                       S5PV210_PA_FB
  94#define S3C_PA_HSMMC0                   S5PV210_PA_HSMMC(0)
  95#define S3C_PA_HSMMC1                   S5PV210_PA_HSMMC(1)
  96#define S3C_PA_HSMMC2                   S5PV210_PA_HSMMC(2)
  97#define S3C_PA_HSMMC3                   S5PV210_PA_HSMMC(3)
  98#define S3C_PA_IIC                      S5PV210_PA_IIC0
  99#define S3C_PA_IIC1                     S5PV210_PA_IIC1
 100#define S3C_PA_IIC2                     S5PV210_PA_IIC2
 101#define S3C_PA_RTC                      S5PV210_PA_RTC
 102#define S3C_PA_USB_HSOTG                S5PV210_PA_HSOTG
 103#define S3C_PA_WDT                      S5PV210_PA_WATCHDOG
 104
 105#define S5P_PA_CHIPID                   S5PV210_PA_CHIPID
 106#define S5P_PA_FIMC0                    S5PV210_PA_FIMC0
 107#define S5P_PA_FIMC1                    S5PV210_PA_FIMC1
 108#define S5P_PA_FIMC2                    S5PV210_PA_FIMC2
 109#define S5P_PA_MIPI_CSIS0               S5PV210_PA_MIPI_CSIS
 110#define S5P_PA_ONENAND                  S5PC110_PA_ONENAND
 111#define S5P_PA_ONENAND_DMA              S5PC110_PA_ONENAND_DMA
 112#define S5P_PA_SDRAM                    S5PV210_PA_SDRAM
 113#define S5P_PA_SROMC                    S5PV210_PA_SROMC
 114#define S5P_PA_SYSCON                   S5PV210_PA_SYSCON
 115#define S5P_PA_TIMER                    S5PV210_PA_TIMER
 116
 117#define SAMSUNG_PA_ADC                  S5PV210_PA_ADC
 118#define SAMSUNG_PA_CFCON                S5PV210_PA_CFCON
 119#define SAMSUNG_PA_KEYPAD               S5PV210_PA_KEYPAD
 120
 121/* UART */
 122
 123#define S3C_VA_UARTx(x)                 (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
 124
 125#define S3C_PA_UART                     S5PV210_PA_UART
 126
 127#define S5P_PA_UART(x)                  (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
 128#define S5P_PA_UART0                    S5P_PA_UART(0)
 129#define S5P_PA_UART1                    S5P_PA_UART(1)
 130#define S5P_PA_UART2                    S5P_PA_UART(2)
 131#define S5P_PA_UART3                    S5P_PA_UART(3)
 132
 133#define S5P_SZ_UART                     SZ_256
 134
 135#endif /* __ASM_ARCH_MAP_H */
 136