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10#include <linux/device.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/mtd/physmap.h>
15#include <linux/spi/spi.h>
16#include <linux/spi/flash.h>
17#include <linux/i2c.h>
18#include <linux/irq.h>
19#include <linux/interrupt.h>
20#include <linux/usb/musb.h>
21#include <linux/leds.h>
22#include <linux/input.h>
23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
26#include <asm/nand.h>
27#include <asm/portmux.h>
28#include <asm/dpmc.h>
29
30#if defined(CONFIG_TOUCHSCREEN_AD7879) \
31 || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
32#include <linux/spi/ad7879.h>
33#define LCD_BACKLIGHT_GPIO 0x40
34
35
36
37#endif
38
39
40
41
42const char bfin_board_name[] = "TLL6527M";
43
44
45
46
47#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
48static struct resource musb_resources[] = {
49 [0] = {
50 .start = 0xffc03800,
51 .end = 0xffc03cff,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_USB_INT0,
56 .end = IRQ_USB_INT0,
57 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
58 },
59 [2] = {
60 .start = IRQ_USB_DMA,
61 .end = IRQ_USB_DMA,
62 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
63 },
64};
65
66static struct musb_hdrc_config musb_config = {
67 .multipoint = 0,
68 .dyn_fifo = 0,
69 .soft_con = 1,
70 .dma = 1,
71 .num_eps = 8,
72 .dma_channels = 8,
73
74
75
76
77 .gpio_vrsel_active = 1,
78};
79
80static struct musb_hdrc_platform_data musb_plat = {
81#if defined(CONFIG_USB_MUSB_OTG)
82 .mode = MUSB_OTG,
83#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
84 .mode = MUSB_HOST,
85#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
86 .mode = MUSB_PERIPHERAL,
87#endif
88 .config = &musb_config,
89};
90
91static u64 musb_dmamask = ~(u32)0;
92
93static struct platform_device musb_device = {
94 .name = "musb-blackfin",
95 .id = 0,
96 .dev = {
97 .dma_mask = &musb_dmamask,
98 .coherent_dma_mask = 0xffffffff,
99 .platform_data = &musb_plat,
100 },
101 .num_resources = ARRAY_SIZE(musb_resources),
102 .resource = musb_resources,
103};
104#endif
105
106#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
107#include <asm/bfin-lq035q1.h>
108
109static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
110 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
111 .ppi_mode = USE_RGB565_16_BIT_PPI,
112 .use_bl = 1,
113 .gpio_bl = LCD_BACKLIGHT_GPIO,
114};
115
116static struct resource bfin_lq035q1_resources[] = {
117 {
118 .start = IRQ_PPI_ERROR,
119 .end = IRQ_PPI_ERROR,
120 .flags = IORESOURCE_IRQ,
121 },
122};
123
124static struct platform_device bfin_lq035q1_device = {
125 .name = "bfin-lq035q1",
126 .id = -1,
127 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
128 .resource = bfin_lq035q1_resources,
129 .dev = {
130 .platform_data = &bfin_lq035q1_data,
131 },
132};
133#endif
134
135#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
136static struct mtd_partition tll6527m_partitions[] = {
137 {
138 .name = "bootloader(nor)",
139 .size = 0xA0000,
140 .offset = 0,
141 }, {
142 .name = "linux kernel(nor)",
143 .size = 0xD00000,
144 .offset = MTDPART_OFS_APPEND,
145 }, {
146 .name = "file system(nor)",
147 .size = MTDPART_SIZ_FULL,
148 .offset = MTDPART_OFS_APPEND,
149 }
150};
151
152static struct physmap_flash_data tll6527m_flash_data = {
153 .width = 2,
154 .parts = tll6527m_partitions,
155 .nr_parts = ARRAY_SIZE(tll6527m_partitions),
156};
157
158static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
159
160static struct resource tll6527m_flash_resource[] = {
161 {
162 .name = "cfi_probe",
163 .start = 0x20000000,
164 .end = 0x201fffff,
165 .flags = IORESOURCE_MEM,
166 }, {
167 .start = (unsigned long)tll6527m_flash_gpios,
168 .end = ARRAY_SIZE(tll6527m_flash_gpios),
169 .flags = IORESOURCE_IRQ,
170 }
171};
172
173static struct platform_device tll6527m_flash_device = {
174 .name = "gpio-addr-flash",
175 .id = 0,
176 .dev = {
177 .platform_data = &tll6527m_flash_data,
178 },
179 .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
180 .resource = tll6527m_flash_resource,
181};
182#endif
183
184#if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
185
186
187
188
189
190#include <linux/gpio-decoder.h>
191#define EXP_GPIO_SPISEL_BASE 0x64
192static unsigned gpio_addr_inputs[] = {
193 GPIO_PG1, GPIO_PH9, GPIO_PH10
194};
195
196static struct gpio_decoder_platform_data spi_decoded_cs = {
197 .base = EXP_GPIO_SPISEL_BASE,
198 .input_addrs = gpio_addr_inputs,
199 .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
200 .default_output = 0,
201
202};
203
204static struct platform_device spi_decoded_gpio = {
205 .name = "gpio-decoder",
206 .id = 0,
207 .dev = {
208 .platform_data = &spi_decoded_cs,
209 },
210};
211
212#else
213#define EXP_GPIO_SPISEL_BASE 0x0
214
215#endif
216
217#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
218#include <linux/input/adxl34x.h>
219static const struct adxl34x_platform_data adxl345_info = {
220 .x_axis_offset = 0,
221 .y_axis_offset = 0,
222 .z_axis_offset = 0,
223 .tap_threshold = 0x31,
224 .tap_duration = 0x10,
225 .tap_latency = 0x60,
226 .tap_window = 0xF0,
227 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
228 .act_axis_control = 0xFF,
229 .activity_threshold = 5,
230 .inactivity_threshold = 2,
231 .inactivity_time = 2,
232 .free_fall_threshold = 0x7,
233 .free_fall_time = 0x20,
234 .data_rate = 0x8,
235 .data_range = ADXL_FULL_RES,
236
237 .ev_type = EV_ABS,
238 .ev_code_x = ABS_X,
239 .ev_code_y = ABS_Y,
240 .ev_code_z = ABS_Z,
241
242 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH},
243
244
245 .ev_code_act_inactivity = KEY_A,
246 .use_int2 = 1,
247 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
248 .fifo_mode = ADXL_FIFO_STREAM,
249};
250#endif
251
252#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
253static struct platform_device rtc_device = {
254 .name = "rtc-bfin",
255 .id = -1,
256};
257#endif
258
259#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
260#include <linux/bfin_mac.h>
261static const unsigned short bfin_mac_peripherals[] = P_RMII0;
262
263static struct bfin_phydev_platform_data bfin_phydev_data[] = {
264 {
265 .addr = 1,
266 .irq = IRQ_MAC_PHYINT,
267 },
268};
269
270static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
271 .phydev_number = 1,
272 .phydev_data = bfin_phydev_data,
273 .phy_mode = PHY_INTERFACE_MODE_RMII,
274 .mac_peripherals = bfin_mac_peripherals,
275};
276
277static struct platform_device bfin_mii_bus = {
278 .name = "bfin_mii_bus",
279 .dev = {
280 .platform_data = &bfin_mii_bus_data,
281 }
282};
283
284static struct platform_device bfin_mac_device = {
285 .name = "bfin_mac",
286 .dev = {
287 .platform_data = &bfin_mii_bus,
288 }
289};
290#endif
291
292#if defined(CONFIG_MTD_M25P80) \
293 || defined(CONFIG_MTD_M25P80_MODULE)
294static struct mtd_partition bfin_spi_flash_partitions[] = {
295 {
296 .name = "bootloader(spi)",
297 .size = 0x00040000,
298 .offset = 0,
299 .mask_flags = MTD_CAP_ROM
300 }, {
301 .name = "linux kernel(spi)",
302 .size = MTDPART_SIZ_FULL,
303 .offset = MTDPART_OFS_APPEND,
304 }
305};
306
307static struct flash_platform_data bfin_spi_flash_data = {
308 .name = "m25p80",
309 .parts = bfin_spi_flash_partitions,
310 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
311 .type = "m25p16",
312};
313
314
315static struct bfin5xx_spi_chip spi_flash_chip_info = {
316 .enable_dma = 0,
317 .bits_per_word = 8,
318};
319#endif
320
321#if defined(CONFIG_BFIN_SPI_ADC) \
322 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
323
324static struct bfin5xx_spi_chip spi_adc_chip_info = {
325 .enable_dma = 0,
326
327
328
329
330
331
332 .bits_per_word = 16,
333};
334#endif
335
336#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
337static struct bfin5xx_spi_chip mmc_spi_chip_info = {
338 .enable_dma = 0,
339 .bits_per_word = 8,
340};
341#endif
342
343#if defined(CONFIG_TOUCHSCREEN_AD7879) \
344 || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
345static const struct ad7879_platform_data bfin_ad7879_ts_info = {
346 .model = 7879,
347 .x_plate_ohms = 620,
348 .pressure_max = 10000,
349 .pressure_min = 0,
350 .first_conversion_delay = 3,
351
352 .acquisition_time = 1,
353 .median = 2,
354 .averaging = 1,
355
356 .pen_down_acc_interval = 255,
357 .gpio_export = 1,
358 .gpio_base = LCD_BACKLIGHT_GPIO,
359};
360#endif
361
362#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
363 || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
364static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
365 .enable_dma = 0,
366 .bits_per_word = 16,
367};
368#endif
369
370#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
371static struct bfin5xx_spi_chip spidev_chip_info = {
372 .enable_dma = 0,
373 .bits_per_word = 8,
374};
375#endif
376
377#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
378static struct platform_device bfin_i2s = {
379 .name = "bfin-i2s",
380 .id = CONFIG_SND_BF5XX_SPORT_NUM,
381
382};
383#endif
384
385#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
386static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
387 .enable_dma = 0,
388 .bits_per_word = 8,
389};
390#endif
391
392#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
393static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = {
394 .enable_dma = 0,
395 .bits_per_word = 8,
396};
397
398static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = {
399 .enable_dma = 0,
400 .bits_per_word = 8,
401};
402
403#include <linux/spi/mcp23s08.h>
404static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
405 .chip[0].is_present = true,
406 .base = 0x30,
407};
408static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
409 .chip[2].is_present = true,
410 .base = 0x38,
411};
412#endif
413
414static struct spi_board_info bfin_spi_board_info[] __initdata = {
415#if defined(CONFIG_MTD_M25P80) \
416 || defined(CONFIG_MTD_M25P80_MODULE)
417 {
418
419 .modalias = "m25p80",
420 .max_speed_hz = 25000000,
421
422 .bus_num = 0,
423 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
424
425
426 .platform_data = &bfin_spi_flash_data,
427 .controller_data = &spi_flash_chip_info,
428 .mode = SPI_MODE_3,
429 },
430#endif
431
432#if defined(CONFIG_BFIN_SPI_ADC)
433 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
434 {
435 .modalias = "bfin_spi_adc",
436
437 .max_speed_hz = 10000000,
438
439 .bus_num = 0,
440 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
441
442 .platform_data = NULL,
443 .controller_data = &spi_adc_chip_info,
444 .mode = SPI_MODE_0,
445 },
446#endif
447
448#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
449 {
450 .modalias = "mmc_spi",
451
452
453
454
455 .max_speed_hz = 10000000,
456
457 .bus_num = 0,
458 .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
459 .controller_data = &mmc_spi_chip_info,
460 .mode = SPI_MODE_0,
461 },
462#endif
463#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
464 || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
465 {
466 .modalias = "ad7879",
467 .platform_data = &bfin_ad7879_ts_info,
468 .irq = IRQ_PH14,
469 .max_speed_hz = 5000000,
470
471 .bus_num = 0,
472 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
473 .controller_data = &spi_ad7879_chip_info,
474 .mode = SPI_CPHA | SPI_CPOL,
475 },
476#endif
477#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
478 {
479 .modalias = "spidev",
480 .max_speed_hz = 10000000,
481
482 .bus_num = 0,
483 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
484 .mode = SPI_CPHA | SPI_CPOL,
485 .controller_data = &spidev_chip_info,
486 },
487#endif
488#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
489 {
490 .modalias = "bfin-lq035q1-spi",
491 .max_speed_hz = 20000000,
492 .bus_num = 0,
493 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
494 .controller_data = &lq035q1_spi_chip_info,
495 .mode = SPI_CPHA | SPI_CPOL,
496 },
497#endif
498#if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
499 {
500 .modalias = "mcp23s08",
501 .platform_data = &bfin_mcp23s08_sys_gpio_info,
502 .max_speed_hz = 5000000,
503 .bus_num = 0,
504 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
505 .controller_data = &spi_mcp23s08_sys_chip_info,
506 .mode = SPI_CPHA | SPI_CPOL,
507 },
508 {
509 .modalias = "mcp23s08",
510 .platform_data = &bfin_mcp23s08_usr_gpio_info,
511 .max_speed_hz = 5000000,
512 .bus_num = 0,
513 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
514 .controller_data = &spi_mcp23s08_usr_chip_info,
515 .mode = SPI_CPHA | SPI_CPOL,
516 },
517#endif
518};
519
520#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
521
522static struct bfin5xx_spi_master bfin_spi0_info = {
523 .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
524
525 .enable_dma = 1,
526 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
527};
528
529
530static struct resource bfin_spi0_resource[] = {
531 [0] = {
532 .start = SPI0_REGBASE,
533 .end = SPI0_REGBASE + 0xFF,
534 .flags = IORESOURCE_MEM,
535 },
536 [1] = {
537 .start = CH_SPI,
538 .end = CH_SPI,
539 .flags = IORESOURCE_DMA,
540 },
541 [2] = {
542 .start = IRQ_SPI,
543 .end = IRQ_SPI,
544 .flags = IORESOURCE_IRQ,
545 },
546};
547
548static struct platform_device bfin_spi0_device = {
549 .name = "bfin-spi",
550 .id = 0,
551 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
552 .resource = bfin_spi0_resource,
553 .dev = {
554 .platform_data = &bfin_spi0_info,
555 },
556};
557#endif
558
559#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
560#ifdef CONFIG_SERIAL_BFIN_UART0
561static struct resource bfin_uart0_resources[] = {
562 {
563 .start = UART0_THR,
564 .end = UART0_GCTL+2,
565 .flags = IORESOURCE_MEM,
566 },
567 {
568 .start = IRQ_UART0_RX,
569 .end = IRQ_UART0_RX+1,
570 .flags = IORESOURCE_IRQ,
571 },
572 {
573 .start = IRQ_UART0_ERROR,
574 .end = IRQ_UART0_ERROR,
575 .flags = IORESOURCE_IRQ,
576 },
577 {
578 .start = CH_UART0_TX,
579 .end = CH_UART0_TX,
580 .flags = IORESOURCE_DMA,
581 },
582 {
583 .start = CH_UART0_RX,
584 .end = CH_UART0_RX,
585 .flags = IORESOURCE_DMA,
586 },
587};
588
589static unsigned short bfin_uart0_peripherals[] = {
590 P_UART0_TX, P_UART0_RX, 0
591};
592
593static struct platform_device bfin_uart0_device = {
594 .name = "bfin-uart",
595 .id = 0,
596 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
597 .resource = bfin_uart0_resources,
598 .dev = {
599 .platform_data = &bfin_uart0_peripherals,
600
601 },
602};
603#endif
604#ifdef CONFIG_SERIAL_BFIN_UART1
605static struct resource bfin_uart1_resources[] = {
606 {
607 .start = UART1_THR,
608 .end = UART1_GCTL+2,
609 .flags = IORESOURCE_MEM,
610 },
611 {
612 .start = IRQ_UART1_RX,
613 .end = IRQ_UART1_RX+1,
614 .flags = IORESOURCE_IRQ,
615 },
616 {
617 .start = IRQ_UART1_ERROR,
618 .end = IRQ_UART1_ERROR,
619 .flags = IORESOURCE_IRQ,
620 },
621 {
622 .start = CH_UART1_TX,
623 .end = CH_UART1_TX,
624 .flags = IORESOURCE_DMA,
625 },
626 {
627 .start = CH_UART1_RX,
628 .end = CH_UART1_RX,
629 .flags = IORESOURCE_DMA,
630 },
631#ifdef CONFIG_BFIN_UART1_CTSRTS
632 {
633 .start = GPIO_PF9,
634 .end = GPIO_PF9,
635 .flags = IORESOURCE_IO,
636 },
637 {
638 .start = GPIO_PF10,
639 .end = GPIO_PF10,
640 .flags = IORESOURCE_IO,
641 },
642#endif
643};
644
645static unsigned short bfin_uart1_peripherals[] = {
646 P_UART1_TX, P_UART1_RX, 0
647};
648
649static struct platform_device bfin_uart1_device = {
650 .name = "bfin-uart",
651 .id = 1,
652 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
653 .resource = bfin_uart1_resources,
654 .dev = {
655 .platform_data = &bfin_uart1_peripherals,
656
657 },
658};
659#endif
660#endif
661
662#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
663#ifdef CONFIG_BFIN_SIR0
664static struct resource bfin_sir0_resources[] = {
665 {
666 .start = 0xFFC00400,
667 .end = 0xFFC004FF,
668 .flags = IORESOURCE_MEM,
669 },
670 {
671 .start = IRQ_UART0_RX,
672 .end = IRQ_UART0_RX+1,
673 .flags = IORESOURCE_IRQ,
674 },
675 {
676 .start = CH_UART0_RX,
677 .end = CH_UART0_RX+1,
678 .flags = IORESOURCE_DMA,
679 },
680};
681
682static struct platform_device bfin_sir0_device = {
683 .name = "bfin_sir",
684 .id = 0,
685 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
686 .resource = bfin_sir0_resources,
687};
688#endif
689#ifdef CONFIG_BFIN_SIR1
690static struct resource bfin_sir1_resources[] = {
691 {
692 .start = 0xFFC02000,
693 .end = 0xFFC020FF,
694 .flags = IORESOURCE_MEM,
695 },
696 {
697 .start = IRQ_UART1_RX,
698 .end = IRQ_UART1_RX+1,
699 .flags = IORESOURCE_IRQ,
700 },
701 {
702 .start = CH_UART1_RX,
703 .end = CH_UART1_RX+1,
704 .flags = IORESOURCE_DMA,
705 },
706};
707
708static struct platform_device bfin_sir1_device = {
709 .name = "bfin_sir",
710 .id = 1,
711 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
712 .resource = bfin_sir1_resources,
713};
714#endif
715#endif
716
717#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
718static struct resource bfin_twi0_resource[] = {
719 [0] = {
720 .start = TWI0_REGBASE,
721 .end = TWI0_REGBASE,
722 .flags = IORESOURCE_MEM,
723 },
724 [1] = {
725 .start = IRQ_TWI,
726 .end = IRQ_TWI,
727 .flags = IORESOURCE_IRQ,
728 },
729};
730
731static struct platform_device i2c_bfin_twi_device = {
732 .name = "i2c-bfin-twi",
733 .id = 0,
734 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
735 .resource = bfin_twi0_resource,
736};
737#endif
738
739static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
740#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
741 {
742 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
743 },
744#endif
745
746#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
747 {
748 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
749 },
750#endif
751#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
752 || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
753 {
754 I2C_BOARD_INFO("ad7879", 0x2C),
755 .irq = IRQ_PH14,
756 .platform_data = (void *)&bfin_ad7879_ts_info,
757 },
758#endif
759#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
760 {
761 I2C_BOARD_INFO("ssm2602", 0x1b),
762 },
763#endif
764 {
765 I2C_BOARD_INFO("adm1192", 0x2e),
766 },
767
768 {
769 I2C_BOARD_INFO("ltc3576", 0x09),
770 },
771#if defined(CONFIG_INPUT_ADXL34X_I2C) \
772 || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
773 {
774 I2C_BOARD_INFO("adxl34x", 0x53),
775 .irq = IRQ_PH13,
776 .platform_data = (void *)&adxl345_info,
777 },
778#endif
779};
780
781#if defined(CONFIG_SERIAL_BFIN_SPORT) \
782 || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
783#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
784static struct resource bfin_sport0_uart_resources[] = {
785 {
786 .start = SPORT0_TCR1,
787 .end = SPORT0_MRCS3+4,
788 .flags = IORESOURCE_MEM,
789 },
790 {
791 .start = IRQ_SPORT0_RX,
792 .end = IRQ_SPORT0_RX+1,
793 .flags = IORESOURCE_IRQ,
794 },
795 {
796 .start = IRQ_SPORT0_ERROR,
797 .end = IRQ_SPORT0_ERROR,
798 .flags = IORESOURCE_IRQ,
799 },
800};
801
802static unsigned short bfin_sport0_peripherals[] = {
803 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
804 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
805};
806
807static struct platform_device bfin_sport0_uart_device = {
808 .name = "bfin-sport-uart",
809 .id = 0,
810 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
811 .resource = bfin_sport0_uart_resources,
812 .dev = {
813 .platform_data = &bfin_sport0_peripherals,
814
815 },
816};
817#endif
818#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
819static struct resource bfin_sport1_uart_resources[] = {
820 {
821 .start = SPORT1_TCR1,
822 .end = SPORT1_MRCS3+4,
823 .flags = IORESOURCE_MEM,
824 },
825 {
826 .start = IRQ_SPORT1_RX,
827 .end = IRQ_SPORT1_RX+1,
828 .flags = IORESOURCE_IRQ,
829 },
830 {
831 .start = IRQ_SPORT1_ERROR,
832 .end = IRQ_SPORT1_ERROR,
833 .flags = IORESOURCE_IRQ,
834 },
835};
836
837static unsigned short bfin_sport1_peripherals[] = {
838 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
839 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
840};
841
842static struct platform_device bfin_sport1_uart_device = {
843 .name = "bfin-sport-uart",
844 .id = 1,
845 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
846 .resource = bfin_sport1_uart_resources,
847 .dev = {
848 .platform_data = &bfin_sport1_peripherals,
849
850 },
851};
852#endif
853#endif
854
855static const unsigned int cclk_vlev_datasheet[] = {
856 VRPAIR(VLEV_100, 400000000),
857 VRPAIR(VLEV_105, 426000000),
858 VRPAIR(VLEV_110, 500000000),
859 VRPAIR(VLEV_115, 533000000),
860 VRPAIR(VLEV_120, 600000000),
861};
862
863static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
864 .tuple_tab = cclk_vlev_datasheet,
865 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
866 .vr_settling_time = 25 ,
867};
868
869static struct platform_device bfin_dpmc = {
870 .name = "bfin dpmc",
871 .dev = {
872 .platform_data = &bfin_dmpc_vreg_data,
873 },
874};
875
876static struct platform_device *tll6527m_devices[] __initdata = {
877
878 &bfin_dpmc,
879
880#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
881 &rtc_device,
882#endif
883
884#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
885 &musb_device,
886#endif
887
888#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
889 &bfin_mii_bus,
890 &bfin_mac_device,
891#endif
892
893#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
894 &bfin_spi0_device,
895#endif
896
897#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
898 &bfin_lq035q1_device,
899#endif
900
901#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
902#ifdef CONFIG_SERIAL_BFIN_UART0
903 &bfin_uart0_device,
904#endif
905#ifdef CONFIG_SERIAL_BFIN_UART1
906 &bfin_uart1_device,
907#endif
908#endif
909
910#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
911#ifdef CONFIG_BFIN_SIR0
912 &bfin_sir0_device,
913#endif
914#ifdef CONFIG_BFIN_SIR1
915 &bfin_sir1_device,
916#endif
917#endif
918
919#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
920 &i2c_bfin_twi_device,
921#endif
922
923#if defined(CONFIG_SERIAL_BFIN_SPORT) \
924 || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
925#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
926 &bfin_sport0_uart_device,
927#endif
928#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
929 &bfin_sport1_uart_device,
930#endif
931#endif
932
933#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
934 &tll6527m_flash_device,
935#endif
936
937#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
938 &bfin_i2s,
939#endif
940
941#if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
942 &spi_decoded_gpio,
943#endif
944};
945
946static int __init tll6527m_init(void)
947{
948 printk(KERN_INFO "%s(): registering device resources\n", __func__);
949 i2c_register_board_info(0, bfin_i2c_board_info,
950 ARRAY_SIZE(bfin_i2c_board_info));
951 platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
952 spi_register_board_info(bfin_spi_board_info,
953 ARRAY_SIZE(bfin_spi_board_info));
954 return 0;
955}
956
957arch_initcall(tll6527m_init);
958
959static struct platform_device *tll6527m_early_devices[] __initdata = {
960#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
961#ifdef CONFIG_SERIAL_BFIN_UART0
962 &bfin_uart0_device,
963#endif
964#ifdef CONFIG_SERIAL_BFIN_UART1
965 &bfin_uart1_device,
966#endif
967#endif
968
969#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
970#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
971 &bfin_sport0_uart_device,
972#endif
973#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
974 &bfin_sport1_uart_device,
975#endif
976#endif
977};
978
979void __init native_machine_early_platform_add_devices(void)
980{
981 printk(KERN_INFO "register early platform devices\n");
982 early_platform_add_devices(tll6527m_early_devices,
983 ARRAY_SIZE(tll6527m_early_devices));
984}
985
986void native_machine_restart(char *cmd)
987{
988
989 if ((bfin_read_SYSCR() & 0x7) == 0x3)
990 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
991}
992
993void bfin_get_ether_addr(char *addr)
994{
995
996 u32 ret;
997 u64 otp_mac;
998 u32 (*otp_read)(u32 page, u32 flags,
999 u64 *page_content) = (void *)0xEF00001A;
1000
1001 ret = otp_read(0xDF, 0x00, &otp_mac);
1002 if (!(ret & 0x1)) {
1003 char *otp_mac_p = (char *)&otp_mac;
1004 for (ret = 0; ret < 6; ++ret)
1005 addr[ret] = otp_mac_p[5 - ret];
1006 }
1007}
1008EXPORT_SYMBOL(bfin_get_ether_addr);
1009