LXR linux/arch/m68k/platform/68328/head-ram.S

   1
   2        .global __main
   3        .global __rom_start
   4
   5        .global _rambase
   6        .global _ramstart
   7        
   8        .global splash_bits
   9        .global _start
  10        .global _stext
  11        .global _edata
  12
  13#define DEBUG
  14#define ROM_OFFSET 0x10C00000
  15#define STACK_GAURD 0x10
  16
  17        .text
  18        
  19_start:
  20_stext:
  21        movew   #0x2700, %sr            /* Exceptions off! */
  22
  23#if 0
  24        /* Init chip registers.  uCsimm specific */
  25        moveb   #0x00,   0xfffffb0b     /* Watchdog off */
  26        moveb   #0x10,   0xfffff000     /* SCR */
  27
  28        movew   #0x2400, 0xfffff200     /* PLLCR */
  29        movew   #0x0123, 0xfffff202     /* PLLFSR */
  30
  31        moveb   #0x00,   0xfffff40b     /* enable chip select */
  32        moveb   #0x00,   0xfffff423     /* enable /DWE */
  33        moveb   #0x08,   0xfffffd0d     /* disable hardmap */
  34        moveb   #0x07,   0xfffffd0e     /* level 7 interrupt clear */
  35
  36        movew   #0x8600, 0xfffff100     /* FLASH at 0x10c00000 */
  37        movew   #0x018b, 0xfffff110     /* 2Meg, enable, 0ws */
  38
  39        movew   #0x8f00, 0xfffffc00     /* DRAM configuration */
  40        movew   #0x9667, 0xfffffc02     /* DRAM control */
  41        movew   #0x0000, 0xfffff106     /* DRAM at 0x00000000 */
  42        movew   #0x068f, 0xfffff116     /* 8Meg, enable, 0ws */
  43
  44        moveb   #0x40,   0xfffff300     /* IVR */
  45        movel   #0x007FFFFF, %d0        /* IMR */
  46        movel   %d0,     0xfffff304
  47
  48        moveb   0xfffff42b, %d0
  49        andb    #0xe0,   %d0
  50        moveb   %d0,     0xfffff42b
  51
  52        moveb   #0x08,   0xfffff907     /* Ignore CTS */
  53        movew   #0x010b, 0xfffff902     /* BAUD to 9600 */
  54        movew   #0xe100, 0xfffff900     /* enable */
  55#endif
  56
  57        movew   #16384, %d0  /* PLL settle wait loop */
  58L0:
  59        subw    #1, %d0
  60        bne     L0
  61#ifdef DEBUG
  62        moveq   #70, %d7                /* 'F' */
  63        moveb   %d7,0xfffff907          /* No absolute addresses */
  64pclp1:
  65        movew   0xfffff906, %d7
  66        andw    #0x2000, %d7
  67        beq     pclp1
  68#endif /* DEBUG */
  69
  70#ifdef DEBUG
  71        moveq   #82, %d7                /* 'R' */
  72        moveb   %d7,0xfffff907          /* No absolute addresses */
  73pclp3:
  74        movew   0xfffff906, %d7
  75        andw    #0x2000, %d7
  76        beq     pclp3
  77#endif /* DEBUG */
  78        moveal  #0x007ffff0, %ssp
  79        moveal  #_sbss, %a0
  80        moveal  #_ebss, %a1
  81
  82        /* Copy 0 to %a0 until %a0 >= %a1 */
  83L1:
  84        movel   #0, %a0@+
  85        cmpal   %a0, %a1
  86        bhi     L1
  87
  88#ifdef DEBUG
  89        moveq   #67, %d7                /* 'C' */
  90        jsr     putc
  91#endif /* DEBUG */
  92
  93        pea     0
  94        pea     env
  95        pea     %sp@(4)
  96        pea     0
  97
  98#ifdef DEBUG
  99        moveq   #70, %d7                /* 'F' */
 100        jsr     putc
 101#endif /* DEBUG */
 102
 103lp:
 104        jsr     start_kernel
 105        jmp lp
 106_exit:
 107
 108        jmp     _exit
 109
 110__main:
 111        /* nothing */
 112        rts
 113
 114#ifdef DEBUG
 115putc:
 116        moveb   %d7,0xfffff907
 117pclp:
 118        movew   0xfffff906, %d7
 119        andw    #0x2000, %d7
 120        beq     pclp
 121        rts
 122#endif /* DEBUG */
 123
 124        .data
 125
 126/*
 127 *      Set up the usable of RAM stuff. Size of RAM is determined then
 128 *      an initial stack set up at the end.
 129 */
 130.align 4
 131_ramvec:
 132.long   0
 133_rambase:
 134.long   0
 135_ramstart:
 136.long   0
 137_ramend:
 138.long   0
 139
 140env:
 141        .long   0
 142