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9#ifndef __ASM_MACH_IP27_DMA_COHERENCE_H
10#define __ASM_MACH_IP27_DMA_COHERENCE_H
11
12#include <asm/pci/bridge.h>
13
14#define pdev_to_baddr(pdev, addr) \
15 (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr))
16#define dev_to_baddr(dev, addr) \
17 pdev_to_baddr(to_pci_dev(dev), (addr))
18
19struct device;
20
21static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr,
22 size_t size)
23{
24 dma_addr_t pa = dev_to_baddr(dev, virt_to_phys(addr));
25
26 return pa;
27}
28
29static inline dma_addr_t plat_map_dma_mem_page(struct device *dev,
30 struct page *page)
31{
32 dma_addr_t pa = dev_to_baddr(dev, page_to_phys(page));
33
34 return pa;
35}
36
37static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
38 dma_addr_t dma_addr)
39{
40 return dma_addr & ~(0xffUL << 56);
41}
42
43static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
44 size_t size, enum dma_data_direction direction)
45{
46}
47
48static inline int plat_dma_supported(struct device *dev, u64 mask)
49{
50
51
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53
54
55 if (mask < DMA_BIT_MASK(24))
56 return 0;
57
58 return 1;
59}
60
61static inline void plat_extra_sync_for_device(struct device *dev)
62{
63 return;
64}
65
66static inline int plat_dma_mapping_error(struct device *dev,
67 dma_addr_t dma_addr)
68{
69 return 0;
70}
71
72static inline int plat_device_is_coherent(struct device *dev)
73{
74 return 1;
75}
76
77#endif
78