LXR linux/arch/s390/include/asm/processor.h

   1/*
   2 *  include/asm-s390/processor.h
   3 *
   4 *  S390 version
   5 *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6 *    Author(s): Hartmut Penner (hp@de.ibm.com),
   7 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   8 *
   9 *  Derived from "include/asm-i386/processor.h"
  10 *    Copyright (C) 1994, Linus Torvalds
  11 */
  12
  13#ifndef __ASM_S390_PROCESSOR_H
  14#define __ASM_S390_PROCESSOR_H
  15
  16#include <linux/linkage.h>
  17#include <asm/cpu.h>
  18#include <asm/page.h>
  19#include <asm/ptrace.h>
  20#include <asm/setup.h>
  21
  22#ifdef __KERNEL__
  23/*
  24 * Default implementation of macro that returns current
  25 * instruction pointer ("program counter").
  26 */
  27#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  28
  29static inline void get_cpu_id(struct cpuid *ptr)
  30{
  31        asm volatile("stidp %0" : "=Q" (*ptr));
  32}
  33
  34extern void s390_adjust_jiffies(void);
  35extern int get_cpu_capability(unsigned int *);
  36
  37/*
  38 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  39 */
  40#ifndef __s390x__
  41
  42#define TASK_SIZE               (1UL << 31)
  43#define TASK_UNMAPPED_BASE      (1UL << 30)
  44
  45#else /* __s390x__ */
  46
  47#define TASK_SIZE_OF(tsk)       ((tsk)->mm->context.asce_limit)
  48#define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_31BIT) ? \
  49                                        (1UL << 30) : (1UL << 41))
  50#define TASK_SIZE               TASK_SIZE_OF(current)
  51
  52#endif /* __s390x__ */
  53
  54#ifdef __KERNEL__
  55
  56#ifndef __s390x__
  57#define STACK_TOP               (1UL << 31)
  58#define STACK_TOP_MAX           (1UL << 31)
  59#else /* __s390x__ */
  60#define STACK_TOP               (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
  61#define STACK_TOP_MAX           (1UL << 42)
  62#endif /* __s390x__ */
  63
  64
  65#endif
  66
  67#define HAVE_ARCH_PICK_MMAP_LAYOUT
  68
  69typedef struct {
  70        __u32 ar4;
  71} mm_segment_t;
  72
  73/*
  74 * Thread structure
  75 */
  76struct thread_struct {
  77        s390_fp_regs fp_regs;
  78        unsigned int  acrs[NUM_ACRS];
  79        unsigned long ksp;              /* kernel stack pointer             */
  80        mm_segment_t mm_segment;
  81        unsigned long prot_addr;        /* address of protection-excep.     */
  82        unsigned int trap_no;
  83        struct per_regs per_user;       /* User specified PER registers */
  84        struct per_event per_event;     /* Cause of the last PER trap */
  85        /* pfault_wait is used to block the process on a pfault event */
  86        unsigned long pfault_wait;
  87};
  88
  89typedef struct thread_struct thread_struct;
  90
  91/*
  92 * Stack layout of a C stack frame.
  93 */
  94#ifndef __PACK_STACK
  95struct stack_frame {
  96        unsigned long back_chain;
  97        unsigned long empty1[5];
  98        unsigned long gprs[10];
  99        unsigned int  empty2[8];
 100};
 101#else
 102struct stack_frame {
 103        unsigned long empty1[5];
 104        unsigned int  empty2[8];
 105        unsigned long gprs[10];
 106        unsigned long back_chain;
 107};
 108#endif
 109
 110#define ARCH_MIN_TASKALIGN      8
 111
 112#define INIT_THREAD {                                                   \
 113        .ksp = sizeof(init_stack) + (unsigned long) &init_stack,        \
 114}
 115
 116/*
 117 * Do necessary setup to start up a new thread.
 118 */
 119#define start_thread(regs, new_psw, new_stackp) do {            \
 120        set_fs(USER_DS);                                        \
 121        regs->psw.mask  = psw_user_bits;                        \
 122        regs->psw.addr  = new_psw | PSW_ADDR_AMODE;             \
 123        regs->gprs[15]  = new_stackp;                           \
 124} while (0)
 125
 126#define start_thread31(regs, new_psw, new_stackp) do {          \
 127        set_fs(USER_DS);                                        \
 128        regs->psw.mask  = psw_user32_bits;                      \
 129        regs->psw.addr  = new_psw | PSW_ADDR_AMODE;             \
 130        regs->gprs[15]  = new_stackp;                           \
 131        crst_table_downgrade(current->mm, 1UL << 31);           \
 132} while (0)
 133
 134/* Forward declaration, a strange C thing */
 135struct task_struct;
 136struct mm_struct;
 137struct seq_file;
 138
 139/* Free all resources held by a thread. */
 140extern void release_thread(struct task_struct *);
 141extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 142
 143/* Prepare to copy thread state - unlazy all lazy status */
 144#define prepare_to_copy(tsk)    do { } while (0)
 145
 146/*
 147 * Return saved PC of a blocked thread.
 148 */
 149extern unsigned long thread_saved_pc(struct task_struct *t);
 150
 151extern void show_code(struct pt_regs *regs);
 152
 153unsigned long get_wchan(struct task_struct *p);
 154#define task_pt_regs(tsk) ((struct pt_regs *) \
 155        (task_stack_page(tsk) + THREAD_SIZE) - 1)
 156#define KSTK_EIP(tsk)   (task_pt_regs(tsk)->psw.addr)
 157#define KSTK_ESP(tsk)   (task_pt_regs(tsk)->gprs[15])
 158
 159/*
 160 * Give up the time slice of the virtual PU.
 161 */
 162static inline void cpu_relax(void)
 163{
 164        if (MACHINE_HAS_DIAG44)
 165                asm volatile("diag 0,0,68");
 166        barrier();
 167}
 168
 169static inline void psw_set_key(unsigned int key)
 170{
 171        asm volatile("spka 0(%0)" : : "d" (key));
 172}
 173
 174/*
 175 * Set PSW to specified value.
 176 */
 177static inline void __load_psw(psw_t psw)
 178{
 179#ifndef __s390x__
 180        asm volatile("lpsw  %0" : : "Q" (psw) : "cc");
 181#else
 182        asm volatile("lpswe %0" : : "Q" (psw) : "cc");
 183#endif
 184}
 185
 186/*
 187 * Set PSW mask to specified value, while leaving the
 188 * PSW addr pointing to the next instruction.
 189 */
 190
 191static inline void __load_psw_mask (unsigned long mask)
 192{
 193        unsigned long addr;
 194        psw_t psw;
 195
 196        psw.mask = mask;
 197
 198#ifndef __s390x__
 199        asm volatile(
 200                "       basr    %0,0\n"
 201                "0:     ahi     %0,1f-0b\n"
 202                "       st      %0,%O1+4(%R1)\n"
 203                "       lpsw    %1\n"
 204                "1:"
 205                : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 206#else /* __s390x__ */
 207        asm volatile(
 208                "       larl    %0,1f\n"
 209                "       stg     %0,%O1+8(%R1)\n"
 210                "       lpswe   %1\n"
 211                "1:"
 212                : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 213#endif /* __s390x__ */
 214}
 215 
 216/*
 217 * Function to stop a processor until an interruption occurred
 218 */
 219static inline void enabled_wait(void)
 220{
 221        __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
 222                        PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
 223}
 224
 225/*
 226 * Function to drop a processor into disabled wait state
 227 */
 228
 229static inline void ATTRIB_NORET disabled_wait(unsigned long code)
 230{
 231        unsigned long ctl_buf;
 232        psw_t dw_psw;
 233
 234        dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
 235        dw_psw.addr = code;
 236        /* 
 237         * Store status and then load disabled wait psw,
 238         * the processor is dead afterwards
 239         */
 240#ifndef __s390x__
 241        asm volatile(
 242                "       stctl   0,0,0(%2)\n"
 243                "       ni      0(%2),0xef\n"   /* switch off protection */
 244                "       lctl    0,0,0(%2)\n"
 245                "       stpt    0xd8\n"         /* store timer */
 246                "       stckc   0xe0\n"         /* store clock comparator */
 247                "       stpx    0x108\n"        /* store prefix register */
 248                "       stam    0,15,0x120\n"   /* store access registers */
 249                "       std     0,0x160\n"      /* store f0 */
 250                "       std     2,0x168\n"      /* store f2 */
 251                "       std     4,0x170\n"      /* store f4 */
 252                "       std     6,0x178\n"      /* store f6 */
 253                "       stm     0,15,0x180\n"   /* store general registers */
 254                "       stctl   0,15,0x1c0\n"   /* store control registers */
 255                "       oi      0x1c0,0x10\n"   /* fake protection bit */
 256                "       lpsw    0(%1)"
 257                : "=m" (ctl_buf)
 258                : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
 259#else /* __s390x__ */
 260        asm volatile(
 261                "       stctg   0,0,0(%2)\n"
 262                "       ni      4(%2),0xef\n"   /* switch off protection */
 263                "       lctlg   0,0,0(%2)\n"
 264                "       lghi    1,0x1000\n"
 265                "       stpt    0x328(1)\n"     /* store timer */
 266                "       stckc   0x330(1)\n"     /* store clock comparator */
 267                "       stpx    0x318(1)\n"     /* store prefix register */
 268                "       stam    0,15,0x340(1)\n"/* store access registers */
 269                "       stfpc   0x31c(1)\n"     /* store fpu control */
 270                "       std     0,0x200(1)\n"   /* store f0 */
 271                "       std     1,0x208(1)\n"   /* store f1 */
 272                "       std     2,0x210(1)\n"   /* store f2 */
 273                "       std     3,0x218(1)\n"   /* store f3 */
 274                "       std     4,0x220(1)\n"   /* store f4 */
 275                "       std     5,0x228(1)\n"   /* store f5 */
 276                "       std     6,0x230(1)\n"   /* store f6 */
 277                "       std     7,0x238(1)\n"   /* store f7 */
 278                "       std     8,0x240(1)\n"   /* store f8 */
 279                "       std     9,0x248(1)\n"   /* store f9 */
 280                "       std     10,0x250(1)\n"  /* store f10 */
 281                "       std     11,0x258(1)\n"  /* store f11 */
 282                "       std     12,0x260(1)\n"  /* store f12 */
 283                "       std     13,0x268(1)\n"  /* store f13 */
 284                "       std     14,0x270(1)\n"  /* store f14 */
 285                "       std     15,0x278(1)\n"  /* store f15 */
 286                "       stmg    0,15,0x280(1)\n"/* store general registers */
 287                "       stctg   0,15,0x380(1)\n"/* store control registers */
 288                "       oi      0x384(1),0x10\n"/* fake protection bit */
 289                "       lpswe   0(%1)"
 290                : "=m" (ctl_buf)
 291                : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
 292#endif /* __s390x__ */
 293        while (1);
 294}
 295
 296/*
 297 * Basic Machine Check/Program Check Handler.
 298 */
 299
 300extern void s390_base_mcck_handler(void);
 301extern void s390_base_pgm_handler(void);
 302extern void s390_base_ext_handler(void);
 303
 304extern void (*s390_base_mcck_handler_fn)(void);
 305extern void (*s390_base_pgm_handler_fn)(void);
 306extern void (*s390_base_ext_handler_fn)(void);
 307
 308#define ARCH_LOW_ADDRESS_LIMIT  0x7fffffffUL
 309
 310#endif
 311
 312/*
 313 * Helper macro for exception table entries
 314 */
 315#ifndef __s390x__
 316#define EX_TABLE(_fault,_target)                        \
 317        ".section __ex_table,\"a\"\n"                   \
 318        "       .align 4\n"                             \
 319        "       .long  " #_fault "," #_target "\n"      \
 320        ".previous\n"
 321#else
 322#define EX_TABLE(_fault,_target)                        \
 323        ".section __ex_table,\"a\"\n"                   \
 324        "       .align 8\n"                             \
 325        "       .quad  " #_fault "," #_target "\n"      \
 326        ".previous\n"
 327#endif
 328
 329#endif                                 /* __ASM_S390_PROCESSOR_H           */
 330