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9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <mach-se/mach/se.h>
12#include <mach-se/mach/mrshpc.h>
13#include <asm/machvec.h>
14#include <asm/io.h>
15#include <asm/smc37c93x.h>
16#include <asm/heartbeat.h>
17
18
19
20
21static void __init smsc_config(int index, int data)
22{
23 outb_p(index, INDEX_PORT);
24 outb_p(data, DATA_PORT);
25}
26
27
28static void __init smsc_setup(char **cmdline_p)
29{
30 outb_p(CONFIG_ENTER, CONFIG_PORT);
31 outb_p(CONFIG_ENTER, CONFIG_PORT);
32
33
34 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
35 smsc_config(ACTIVATE_INDEX, 0x01);
36 smsc_config(IRQ_SELECT_INDEX, 6);
37
38
39 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
40 smsc_config(GPIO46_INDEX, 0x00);
41 smsc_config(GPIO47_INDEX, 0x00);
42
43
44 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
45 smsc_config(ACTIVATE_INDEX, 0x01);
46 smsc_config(IO_BASE_HI_INDEX, 0x03);
47 smsc_config(IO_BASE_LO_INDEX, 0xf8);
48 smsc_config(IRQ_SELECT_INDEX, 4);
49
50
51 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
52 smsc_config(ACTIVATE_INDEX, 0x01);
53 smsc_config(IO_BASE_HI_INDEX, 0x02);
54 smsc_config(IO_BASE_LO_INDEX, 0xf8);
55 smsc_config(IRQ_SELECT_INDEX, 3);
56
57
58 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
59 smsc_config(ACTIVATE_INDEX, 0x01);
60 smsc_config(IRQ_SELECT_INDEX, 8);
61
62
63 outb_p(CONFIG_EXIT, CONFIG_PORT);
64}
65
66
67static struct resource cf_ide_resources[] = {
68 [0] = {
69 .start = PA_MRSHPC_IO + 0x1f0,
70 .end = PA_MRSHPC_IO + 0x1f0 + 8,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
75 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
76 .flags = IORESOURCE_MEM,
77 },
78 [2] = {
79 .start = IRQ_CFCARD,
80 .flags = IORESOURCE_IRQ,
81 },
82};
83
84static struct platform_device cf_ide_device = {
85 .name = "pata_platform",
86 .id = -1,
87 .num_resources = ARRAY_SIZE(cf_ide_resources),
88 .resource = cf_ide_resources,
89};
90
91static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
92
93static struct heartbeat_data heartbeat_data = {
94 .bit_pos = heartbeat_bit_pos,
95 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
96};
97
98static struct resource heartbeat_resource = {
99 .start = PA_LED,
100 .end = PA_LED,
101 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
102};
103
104static struct platform_device heartbeat_device = {
105 .name = "heartbeat",
106 .id = -1,
107 .dev = {
108 .platform_data = &heartbeat_data,
109 },
110 .num_resources = 1,
111 .resource = &heartbeat_resource,
112};
113
114#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
115 defined(CONFIG_CPU_SUBTYPE_SH7712)
116
117static struct resource sh_eth0_resources[] = {
118 [0] = {
119 .start = SH_ETH0_BASE,
120 .end = SH_ETH0_BASE + 0x1B8,
121 .flags = IORESOURCE_MEM,
122 },
123 [1] = {
124 .start = SH_ETH0_IRQ,
125 .end = SH_ETH0_IRQ,
126 .flags = IORESOURCE_IRQ,
127 },
128};
129
130static struct platform_device sh_eth0_device = {
131 .name = "sh-eth",
132 .id = 0,
133 .dev = {
134 .platform_data = PHY_ID,
135 },
136 .num_resources = ARRAY_SIZE(sh_eth0_resources),
137 .resource = sh_eth0_resources,
138};
139
140static struct resource sh_eth1_resources[] = {
141 [0] = {
142 .start = SH_ETH1_BASE,
143 .end = SH_ETH1_BASE + 0x1B8,
144 .flags = IORESOURCE_MEM,
145 },
146 [1] = {
147 .start = SH_ETH1_IRQ,
148 .end = SH_ETH1_IRQ,
149 .flags = IORESOURCE_IRQ,
150 },
151};
152
153static struct platform_device sh_eth1_device = {
154 .name = "sh-eth",
155 .id = 1,
156 .dev = {
157 .platform_data = PHY_ID,
158 },
159 .num_resources = ARRAY_SIZE(sh_eth1_resources),
160 .resource = sh_eth1_resources,
161};
162#endif
163
164static struct platform_device *se_devices[] __initdata = {
165 &heartbeat_device,
166 &cf_ide_device,
167#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
168 defined(CONFIG_CPU_SUBTYPE_SH7712)
169 &sh_eth0_device,
170 &sh_eth1_device,
171#endif
172};
173
174static int __init se_devices_setup(void)
175{
176 mrshpc_setup_windows();
177 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
178}
179device_initcall(se_devices_setup);
180
181
182
183
184static struct sh_machine_vector mv_se __initmv = {
185 .mv_name = "SolutionEngine",
186 .mv_setup = smsc_setup,
187#if defined(CONFIG_CPU_SH4)
188 .mv_nr_irqs = 48,
189#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
190 .mv_nr_irqs = 32,
191#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
192 .mv_nr_irqs = 61,
193#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
194 .mv_nr_irqs = 86,
195#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
196 .mv_nr_irqs = 104,
197#endif
198 .mv_init_irq = init_se_IRQ,
199};
200