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2
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4
5
6#ifndef _SPARC_SMP_H
7#define _SPARC_SMP_H
8
9#include <linux/threads.h>
10#include <asm/head.h>
11#include <asm/btfixup.h>
12
13#ifndef __ASSEMBLY__
14
15#include <linux/cpumask.h>
16
17#endif
18
19#ifdef CONFIG_SMP
20
21#ifndef __ASSEMBLY__
22
23#include <asm/ptrace.h>
24#include <asm/asi.h>
25#include <asm/atomic.h>
26
27
28
29
30
31extern unsigned char boot_cpu_id;
32extern volatile unsigned long cpu_callin_map[NR_CPUS];
33extern cpumask_t smp_commenced_mask;
34extern struct linux_prom_registers smp_penguin_ctable;
35
36typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
37 unsigned long, unsigned long);
38
39void cpu_panic(void);
40extern void smp4m_irq_rotate(int cpu);
41
42
43
44
45
46void sun4m_init_smp(void);
47void sun4d_init_smp(void);
48
49void smp_callin(void);
50void smp_boot_cpus(void);
51void smp_store_cpu_info(int);
52
53struct seq_file;
54void smp_bogo(struct seq_file *);
55void smp_info(struct seq_file *);
56
57BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
58BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
59BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
60BTFIXUPDEF_BLACKBOX(load_current)
61
62#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
63
64static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
65static inline void xc1(smpfunc_t func, unsigned long arg1)
66{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
67static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
68{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
69static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
70 unsigned long arg3)
71{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
72static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
73 unsigned long arg3, unsigned long arg4)
74{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }
75
76static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
77{
78 xc1((smpfunc_t)func, (unsigned long)info);
79 return 0;
80}
81
82static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
83 void *info, int wait)
84{
85 smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
86 (unsigned long) info, 0, 0, 0);
87 return 0;
88}
89
90static inline int cpu_logical_map(int cpu)
91{
92 return cpu;
93}
94
95static inline int hard_smp4m_processor_id(void)
96{
97 int cpuid;
98
99 __asm__ __volatile__("rd %%tbr, %0\n\t"
100 "srl %0, 12, %0\n\t"
101 "and %0, 3, %0\n\t" :
102 "=&r" (cpuid));
103 return cpuid;
104}
105
106static inline int hard_smp4d_processor_id(void)
107{
108 int cpuid;
109
110 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
111 "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
112 return cpuid;
113}
114
115extern inline int hard_smpleon_processor_id(void)
116{
117 int cpuid;
118 __asm__ __volatile__("rd %%asr17,%0\n\t"
119 "srl %0,28,%0" :
120 "=&r" (cpuid) : );
121 return cpuid;
122}
123
124#ifndef MODULE
125static inline int hard_smp_processor_id(void)
126{
127 int cpuid;
128
129
130
131
132
133
134
135
136
137
138
139
140 __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
141 "sethi %%hi(boot_cpu_id), %0\n\t"
142 "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
143 "=&r" (cpuid));
144 return cpuid;
145}
146#else
147static inline int hard_smp_processor_id(void)
148{
149 int cpuid;
150
151 __asm__ __volatile__("mov %%o7, %%g1\n\t"
152 "call ___f___hard_smp_processor_id\n\t"
153 " nop\n\t"
154 "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
155 return cpuid;
156}
157#endif
158
159#define raw_smp_processor_id() (current_thread_info()->cpu)
160
161#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
162#define prof_counter(__cpu) cpu_data(__cpu).counter
163
164void smp_setup_cpu_possible_map(void);
165
166#endif
167
168
169#define MSG_CROSS_CALL 0x0005
170
171
172
173
174
175
176
177#define MBOX_STOPCPU 0xFB
178#define MBOX_IDLECPU 0xFC
179#define MBOX_IDLECPU2 0xFD
180#define MBOX_STOPCPU2 0xFE
181
182#else
183
184#define hard_smp_processor_id() 0
185#define smp_setup_cpu_possible_map() do { } while (0)
186
187#endif
188#endif
189