1/* 2 * Renesas SuperH DMA Engine support 3 * 4 * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 5 * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved. 6 * 7 * This is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 */ 13#ifndef __DMA_SHDMA_H 14#define __DMA_SHDMA_H 15 16#include <linux/dmaengine.h> 17#include <linux/interrupt.h> 18#include <linux/list.h> 19 20#define SH_DMAC_MAX_CHANNELS 6 21#define SH_DMA_SLAVE_NUMBER 256 22#define SH_DMA_TCR_MAX 0x00FFFFFF /* 16MB */ 23 24struct device; 25 26struct sh_dmae_chan { 27 dma_cookie_t completed_cookie; /* The maximum cookie completed */ 28 spinlock_t desc_lock; /* Descriptor operation lock */ 29 struct list_head ld_queue; /* Link descriptors queue */ 30 struct list_head ld_free; /* Link descriptors free */ 31 struct dma_chan common; /* DMA common channel */ 32 struct device *dev; /* Channel device */ 33 struct tasklet_struct tasklet; /* Tasklet */ 34 int descs_allocated; /* desc count */ 35 int xmit_shift; /* log_2(bytes_per_xfer) */ 36 int irq; 37 int id; /* Raw id of this channel */ 38 u32 __iomem *base; 39 char dev_id[16]; /* unique name per DMAC of channel */ 40}; 41 42struct sh_dmae_device { 43 struct dma_device common; 44 struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS]; 45 struct sh_dmae_pdata *pdata; 46 struct list_head node; 47 u32 __iomem *chan_reg; 48 u16 __iomem *dmars; 49}; 50 51#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common) 52#define to_sh_desc(lh) container_of(lh, struct sh_desc, node) 53#define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx) 54 55#endif /* __DMA_SHDMA_H */ 56