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13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <linux/delay.h>
17#include <linux/i2c.h>
18#include <linux/timer.h>
19#include <linux/completion.h>
20#include <linux/platform_device.h>
21#include <linux/i2c-pnx.h>
22#include <linux/io.h>
23#include <linux/err.h>
24#include <linux/clk.h>
25#include <linux/slab.h>
26
27#include <mach/hardware.h>
28#include <mach/i2c.h>
29
30#define I2C_PNX_TIMEOUT 10
31#define I2C_PNX_SPEED_KHZ 100
32#define I2C_PNX_REGION_SIZE 0x100
33
34static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
35{
36 while (timeout > 0 &&
37 (ioread32(I2C_REG_STS(data)) & mstatus_active)) {
38 mdelay(1);
39 timeout--;
40 }
41 return (timeout <= 0);
42}
43
44static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
45{
46 while (timeout > 0 &&
47 (ioread32(I2C_REG_CTL(data)) & mcntrl_reset)) {
48 mdelay(1);
49 timeout--;
50 }
51 return (timeout <= 0);
52}
53
54static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
55{
56 struct timer_list *timer = &alg_data->mif.timer;
57 unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
58
59 if (expires <= 1)
60 expires = 2;
61
62 del_timer_sync(timer);
63
64 dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
65 jiffies, expires);
66
67 timer->expires = jiffies + expires;
68 timer->data = (unsigned long)alg_data;
69
70 add_timer(timer);
71}
72
73
74
75
76
77
78
79
80static int i2c_pnx_start(unsigned char slave_addr,
81 struct i2c_pnx_algo_data *alg_data)
82{
83 dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
84 slave_addr, alg_data->mif.mode);
85
86
87 if (slave_addr & ~0x7f) {
88 dev_err(&alg_data->adapter.dev,
89 "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
90 alg_data->adapter.name, slave_addr);
91 return -EINVAL;
92 }
93
94
95 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
96
97 dev_err(&alg_data->adapter.dev,
98 "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
99 alg_data->adapter.name, slave_addr,
100 ioread32(I2C_REG_CTL(alg_data)),
101 ioread32(I2C_REG_STS(alg_data)));
102 return -EBUSY;
103 } else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
104
105 dev_err(&alg_data->adapter.dev,
106 "%s: Arbitration failure. Slave addr = %02x\n",
107 alg_data->adapter.name, slave_addr);
108 return -EIO;
109 }
110
111
112
113
114
115 iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
116 I2C_REG_STS(alg_data));
117
118 dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
119 (slave_addr << 1) | start_bit | alg_data->mif.mode);
120
121
122 iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
123 I2C_REG_TX(alg_data));
124
125 dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
126
127 return 0;
128}
129
130
131
132
133
134
135
136static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
137{
138
139 long timeout = 1000;
140
141 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
142 __func__, ioread32(I2C_REG_STS(alg_data)));
143
144
145 iowrite32(0xff | stop_bit, I2C_REG_TX(alg_data));
146
147
148 while (timeout > 0 &&
149 (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {
150
151 udelay(1);
152 timeout--;
153 }
154
155 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
156 __func__, ioread32(I2C_REG_STS(alg_data)));
157}
158
159
160
161
162
163
164
165static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
166{
167 u32 val;
168
169 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
170 __func__, ioread32(I2C_REG_STS(alg_data)));
171
172 if (alg_data->mif.len > 0) {
173
174 val = *alg_data->mif.buf++;
175
176 if (alg_data->mif.len == 1)
177 val |= stop_bit;
178
179 alg_data->mif.len--;
180 iowrite32(val, I2C_REG_TX(alg_data));
181
182 dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
183 __func__, val, alg_data->mif.len + 1);
184
185 if (alg_data->mif.len == 0) {
186 if (alg_data->last) {
187
188 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
189 dev_err(&alg_data->adapter.dev,
190 "The bus is still active after timeout\n");
191 }
192
193 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
194 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
195 I2C_REG_CTL(alg_data));
196
197 del_timer_sync(&alg_data->mif.timer);
198
199 dev_dbg(&alg_data->adapter.dev,
200 "%s(): Waking up xfer routine.\n",
201 __func__);
202
203 complete(&alg_data->mif.complete);
204 }
205 } else if (alg_data->mif.len == 0) {
206
207 i2c_pnx_stop(alg_data);
208
209
210 iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
211 ~(mcntrl_afie | mcntrl_naie | mcntrl_drmie),
212 I2C_REG_CTL(alg_data));
213
214
215 del_timer_sync(&alg_data->mif.timer);
216 dev_dbg(&alg_data->adapter.dev,
217 "%s(): Waking up xfer routine after zero-xfer.\n",
218 __func__);
219
220 complete(&alg_data->mif.complete);
221 }
222
223 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
224 __func__, ioread32(I2C_REG_STS(alg_data)));
225
226 return 0;
227}
228
229
230
231
232
233
234
235static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
236{
237 unsigned int val = 0;
238 u32 ctl = 0;
239
240 dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
241 __func__, ioread32(I2C_REG_STS(alg_data)));
242
243
244
245
246 if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
247 dev_dbg(&alg_data->adapter.dev,
248 "%s(): Write dummy data to fill Rx-fifo...\n",
249 __func__);
250
251 if (alg_data->mif.len == 1) {
252
253 val |= stop_bit;
254
255
256
257
258
259 ctl = ioread32(I2C_REG_CTL(alg_data));
260 ctl |= mcntrl_rffie | mcntrl_daie;
261 ctl &= ~mcntrl_drmie;
262 iowrite32(ctl, I2C_REG_CTL(alg_data));
263 }
264
265
266
267
268
269
270 iowrite32(val, I2C_REG_TX(alg_data));
271
272 return 0;
273 }
274
275
276 if (alg_data->mif.len > 0) {
277 val = ioread32(I2C_REG_RX(alg_data));
278 *alg_data->mif.buf++ = (u8) (val & 0xff);
279 dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
280 __func__, val, alg_data->mif.len);
281
282 alg_data->mif.len--;
283 if (alg_data->mif.len == 0) {
284 if (alg_data->last)
285
286 if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
287 dev_err(&alg_data->adapter.dev,
288 "The bus is still active after timeout\n");
289
290
291 ctl = ioread32(I2C_REG_CTL(alg_data));
292 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
293 mcntrl_drmie | mcntrl_daie);
294 iowrite32(ctl, I2C_REG_CTL(alg_data));
295
296
297 del_timer_sync(&alg_data->mif.timer);
298 complete(&alg_data->mif.complete);
299 }
300 }
301
302 dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
303 __func__, ioread32(I2C_REG_STS(alg_data)));
304
305 return 0;
306}
307
308static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
309{
310 struct i2c_pnx_algo_data *alg_data = dev_id;
311 u32 stat, ctl;
312
313 dev_dbg(&alg_data->adapter.dev,
314 "%s(): mstat = %x mctrl = %x, mode = %d\n",
315 __func__,
316 ioread32(I2C_REG_STS(alg_data)),
317 ioread32(I2C_REG_CTL(alg_data)),
318 alg_data->mif.mode);
319 stat = ioread32(I2C_REG_STS(alg_data));
320
321
322 if (stat & mstatus_afi) {
323
324 alg_data->mif.ret = -EIO;
325
326
327 ctl = ioread32(I2C_REG_CTL(alg_data));
328 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
329 mcntrl_drmie);
330 iowrite32(ctl, I2C_REG_CTL(alg_data));
331
332
333 del_timer_sync(&alg_data->mif.timer);
334 complete(&alg_data->mif.complete);
335 } else if (stat & mstatus_nai) {
336
337 dev_dbg(&alg_data->adapter.dev,
338 "%s(): Slave did not acknowledge, generating a STOP.\n",
339 __func__);
340 i2c_pnx_stop(alg_data);
341
342
343 ctl = ioread32(I2C_REG_CTL(alg_data));
344 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie |
345 mcntrl_drmie);
346 iowrite32(ctl, I2C_REG_CTL(alg_data));
347
348
349 alg_data->mif.ret = -EIO;
350
351
352 del_timer_sync(&alg_data->mif.timer);
353 complete(&alg_data->mif.complete);
354 } else {
355
356
357
358
359
360
361
362
363
364 if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
365 if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
366 i2c_pnx_master_xmit(alg_data);
367 } else if (alg_data->mif.mode == I2C_SMBUS_READ) {
368 i2c_pnx_master_rcv(alg_data);
369 }
370 }
371 }
372
373
374 stat = ioread32(I2C_REG_STS(alg_data));
375 iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
376
377 dev_dbg(&alg_data->adapter.dev,
378 "%s(): exiting, stat = %x ctrl = %x.\n",
379 __func__, ioread32(I2C_REG_STS(alg_data)),
380 ioread32(I2C_REG_CTL(alg_data)));
381
382 return IRQ_HANDLED;
383}
384
385static void i2c_pnx_timeout(unsigned long data)
386{
387 struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
388 u32 ctl;
389
390 dev_err(&alg_data->adapter.dev,
391 "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
392 ioread32(I2C_REG_STS(alg_data)),
393 ioread32(I2C_REG_CTL(alg_data)));
394
395
396 ctl = ioread32(I2C_REG_CTL(alg_data));
397 ctl &= ~(mcntrl_afie | mcntrl_naie | mcntrl_rffie | mcntrl_drmie);
398 iowrite32(ctl, I2C_REG_CTL(alg_data));
399
400 ctl |= mcntrl_reset;
401 iowrite32(ctl, I2C_REG_CTL(alg_data));
402 wait_reset(I2C_PNX_TIMEOUT, alg_data);
403 alg_data->mif.ret = -EIO;
404 complete(&alg_data->mif.complete);
405}
406
407static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
408{
409 u32 stat;
410
411 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
412 dev_err(&alg_data->adapter.dev,
413 "%s: Bus is still active after xfer. Reset it...\n",
414 alg_data->adapter.name);
415 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
416 I2C_REG_CTL(alg_data));
417 wait_reset(I2C_PNX_TIMEOUT, alg_data);
418 } else if (!(stat & mstatus_rfe) || !(stat & mstatus_tfe)) {
419
420
421
422 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
423 I2C_REG_CTL(alg_data));
424 wait_reset(I2C_PNX_TIMEOUT, alg_data);
425 } else if (stat & mstatus_nai) {
426 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
427 I2C_REG_CTL(alg_data));
428 wait_reset(I2C_PNX_TIMEOUT, alg_data);
429 }
430}
431
432
433
434
435
436
437
438
439
440static int
441i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
442{
443 struct i2c_msg *pmsg;
444 int rc = 0, completed = 0, i;
445 struct i2c_pnx_algo_data *alg_data = adap->algo_data;
446 u32 stat = ioread32(I2C_REG_STS(alg_data));
447
448 dev_dbg(&alg_data->adapter.dev,
449 "%s(): entering: %d messages, stat = %04x.\n",
450 __func__, num, ioread32(I2C_REG_STS(alg_data)));
451
452 bus_reset_if_active(alg_data);
453
454
455 for (i = 0; rc >= 0 && i < num; i++) {
456 u8 addr;
457
458 pmsg = &msgs[i];
459 addr = pmsg->addr;
460
461 if (pmsg->flags & I2C_M_TEN) {
462 dev_err(&alg_data->adapter.dev,
463 "%s: 10 bits addr not supported!\n",
464 alg_data->adapter.name);
465 rc = -EINVAL;
466 break;
467 }
468
469 alg_data->mif.buf = pmsg->buf;
470 alg_data->mif.len = pmsg->len;
471 alg_data->mif.mode = (pmsg->flags & I2C_M_RD) ?
472 I2C_SMBUS_READ : I2C_SMBUS_WRITE;
473 alg_data->mif.ret = 0;
474 alg_data->last = (i == num - 1);
475
476 dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
477 __func__, alg_data->mif.mode, alg_data->mif.len);
478
479 i2c_pnx_arm_timer(alg_data);
480
481
482 init_completion(&alg_data->mif.complete);
483
484
485 iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_afie |
486 mcntrl_naie | mcntrl_drmie,
487 I2C_REG_CTL(alg_data));
488
489
490 rc = i2c_pnx_start(addr, alg_data);
491 if (rc < 0)
492 break;
493
494
495 wait_for_completion(&alg_data->mif.complete);
496
497 if (!(rc = alg_data->mif.ret))
498 completed++;
499 dev_dbg(&alg_data->adapter.dev,
500 "%s(): Complete, return code = %d.\n",
501 __func__, rc);
502
503
504 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
505 dev_dbg(&alg_data->adapter.dev,
506 "%s: TDI still set... clearing now.\n",
507 alg_data->adapter.name);
508 iowrite32(stat, I2C_REG_STS(alg_data));
509 }
510 if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
511 dev_dbg(&alg_data->adapter.dev,
512 "%s: AFI still set... clearing now.\n",
513 alg_data->adapter.name);
514 iowrite32(stat, I2C_REG_STS(alg_data));
515 }
516 }
517
518 bus_reset_if_active(alg_data);
519
520
521 alg_data->mif.buf = NULL;
522 alg_data->mif.len = 0;
523
524 dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
525 __func__, ioread32(I2C_REG_STS(alg_data)));
526
527 if (completed != num)
528 return ((rc < 0) ? rc : -EREMOTEIO);
529
530 return num;
531}
532
533static u32 i2c_pnx_func(struct i2c_adapter *adapter)
534{
535 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
536}
537
538static struct i2c_algorithm pnx_algorithm = {
539 .master_xfer = i2c_pnx_xfer,
540 .functionality = i2c_pnx_func,
541};
542
543#ifdef CONFIG_PM
544static int i2c_pnx_controller_suspend(struct platform_device *pdev,
545 pm_message_t state)
546{
547 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
548
549
550 clk_enable(alg_data->clk);
551
552 return 0;
553}
554
555static int i2c_pnx_controller_resume(struct platform_device *pdev)
556{
557 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
558
559 return clk_enable(alg_data->clk);
560}
561#else
562#define i2c_pnx_controller_suspend NULL
563#define i2c_pnx_controller_resume NULL
564#endif
565
566static int __devinit i2c_pnx_probe(struct platform_device *pdev)
567{
568 unsigned long tmp;
569 int ret = 0;
570 struct i2c_pnx_algo_data *alg_data;
571 unsigned long freq;
572 struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
573
574 if (!i2c_pnx || !i2c_pnx->name) {
575 dev_err(&pdev->dev, "%s: no platform data supplied\n",
576 __func__);
577 ret = -EINVAL;
578 goto out;
579 }
580
581 alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
582 if (!alg_data) {
583 ret = -ENOMEM;
584 goto err_kzalloc;
585 }
586
587 platform_set_drvdata(pdev, alg_data);
588
589 strlcpy(alg_data->adapter.name, i2c_pnx->name,
590 sizeof(alg_data->adapter.name));
591 alg_data->adapter.dev.parent = &pdev->dev;
592 alg_data->adapter.algo = &pnx_algorithm;
593 alg_data->adapter.algo_data = alg_data;
594 alg_data->adapter.nr = pdev->id;
595 alg_data->i2c_pnx = i2c_pnx;
596
597 alg_data->clk = clk_get(&pdev->dev, NULL);
598 if (IS_ERR(alg_data->clk)) {
599 ret = PTR_ERR(alg_data->clk);
600 goto out_drvdata;
601 }
602
603 init_timer(&alg_data->mif.timer);
604 alg_data->mif.timer.function = i2c_pnx_timeout;
605 alg_data->mif.timer.data = (unsigned long)alg_data;
606
607
608 if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
609 pdev->name)) {
610 dev_err(&pdev->dev,
611 "I/O region 0x%08x for I2C already in use.\n",
612 i2c_pnx->base);
613 ret = -ENODEV;
614 goto out_clkget;
615 }
616
617 alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
618 if (!alg_data->ioaddr) {
619 dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
620 ret = -ENOMEM;
621 goto out_release;
622 }
623
624 ret = clk_enable(alg_data->clk);
625 if (ret)
626 goto out_unmap;
627
628 freq = clk_get_rate(alg_data->clk);
629
630
631
632
633
634
635
636
637
638
639
640
641 tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
642 if (tmp > 0x3FF)
643 tmp = 0x3FF;
644 iowrite32(tmp, I2C_REG_CKH(alg_data));
645 iowrite32(tmp, I2C_REG_CKL(alg_data));
646
647 iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
648 if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
649 ret = -ENODEV;
650 goto out_clock;
651 }
652 init_completion(&alg_data->mif.complete);
653
654 ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
655 0, pdev->name, alg_data);
656 if (ret)
657 goto out_clock;
658
659
660 ret = i2c_add_numbered_adapter(&alg_data->adapter);
661 if (ret < 0) {
662 dev_err(&pdev->dev, "I2C: Failed to add bus\n");
663 goto out_irq;
664 }
665
666 dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
667 alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
668
669 return 0;
670
671out_irq:
672 free_irq(i2c_pnx->irq, alg_data);
673out_clock:
674 clk_disable(alg_data->clk);
675out_unmap:
676 iounmap(alg_data->ioaddr);
677out_release:
678 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
679out_clkget:
680 clk_put(alg_data->clk);
681out_drvdata:
682 kfree(alg_data);
683err_kzalloc:
684 platform_set_drvdata(pdev, NULL);
685out:
686 return ret;
687}
688
689static int __devexit i2c_pnx_remove(struct platform_device *pdev)
690{
691 struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
692 struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
693
694 free_irq(i2c_pnx->irq, alg_data);
695 i2c_del_adapter(&alg_data->adapter);
696 clk_disable(alg_data->clk);
697 iounmap(alg_data->ioaddr);
698 release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
699 clk_put(alg_data->clk);
700 kfree(alg_data);
701 platform_set_drvdata(pdev, NULL);
702
703 return 0;
704}
705
706static struct platform_driver i2c_pnx_driver = {
707 .driver = {
708 .name = "pnx-i2c",
709 .owner = THIS_MODULE,
710 },
711 .probe = i2c_pnx_probe,
712 .remove = __devexit_p(i2c_pnx_remove),
713 .suspend = i2c_pnx_controller_suspend,
714 .resume = i2c_pnx_controller_resume,
715};
716
717static int __init i2c_adap_pnx_init(void)
718{
719 return platform_driver_register(&i2c_pnx_driver);
720}
721
722static void __exit i2c_adap_pnx_exit(void)
723{
724 platform_driver_unregister(&i2c_pnx_driver);
725}
726
727MODULE_AUTHOR("Vitaly Wool, Dennis Kovalev <source@mvista.com>");
728MODULE_DESCRIPTION("I2C driver for Philips IP3204-based I2C busses");
729MODULE_LICENSE("GPL");
730MODULE_ALIAS("platform:pnx-i2c");
731
732
733subsys_initcall(i2c_adap_pnx_init);
734module_exit(i2c_adap_pnx_exit);
735