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17#include "htc.h"
18
19MODULE_AUTHOR("Atheros Communications");
20MODULE_LICENSE("Dual BSD/GPL");
21MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
22
23static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24module_param_named(debug, ath9k_debug, uint, 0);
25MODULE_PARM_DESC(debug, "Debugging mask");
26
27int htc_modparam_nohwcrypt;
28module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
29MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31#define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
33 .hw_value = (_idx), \
34 .max_power = 20, \
35}
36
37#define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
41 .max_power = 20, \
42}
43
44#define ATH_HTC_BTCOEX_PRODUCT_ID "wb193"
45
46static struct ieee80211_channel ath9k_2ghz_channels[] = {
47 CHAN2G(2412, 0),
48 CHAN2G(2417, 1),
49 CHAN2G(2422, 2),
50 CHAN2G(2427, 3),
51 CHAN2G(2432, 4),
52 CHAN2G(2437, 5),
53 CHAN2G(2442, 6),
54 CHAN2G(2447, 7),
55 CHAN2G(2452, 8),
56 CHAN2G(2457, 9),
57 CHAN2G(2462, 10),
58 CHAN2G(2467, 11),
59 CHAN2G(2472, 12),
60 CHAN2G(2484, 13),
61};
62
63static struct ieee80211_channel ath9k_5ghz_channels[] = {
64
65 CHAN5G(5180, 14),
66 CHAN5G(5200, 15),
67 CHAN5G(5220, 16),
68 CHAN5G(5240, 17),
69
70 CHAN5G(5260, 18),
71 CHAN5G(5280, 19),
72 CHAN5G(5300, 20),
73 CHAN5G(5320, 21),
74
75 CHAN5G(5500, 22),
76 CHAN5G(5520, 23),
77 CHAN5G(5540, 24),
78 CHAN5G(5560, 25),
79 CHAN5G(5580, 26),
80 CHAN5G(5600, 27),
81 CHAN5G(5620, 28),
82 CHAN5G(5640, 29),
83 CHAN5G(5660, 30),
84 CHAN5G(5680, 31),
85 CHAN5G(5700, 32),
86
87 CHAN5G(5745, 33),
88 CHAN5G(5765, 34),
89 CHAN5G(5785, 35),
90 CHAN5G(5805, 36),
91 CHAN5G(5825, 37),
92};
93
94
95#define SHPCHECK(__hw_rate, __flags) \
96 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
97
98#define RATE(_bitrate, _hw_rate, _flags) { \
99 .bitrate = (_bitrate), \
100 .flags = (_flags), \
101 .hw_value = (_hw_rate), \
102 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
103}
104
105static struct ieee80211_rate ath9k_legacy_rates[] = {
106 RATE(10, 0x1b, 0),
107 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE),
108 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE),
109 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE),
110 RATE(60, 0x0b, 0),
111 RATE(90, 0x0f, 0),
112 RATE(120, 0x0a, 0),
113 RATE(180, 0x0e, 0),
114 RATE(240, 0x09, 0),
115 RATE(360, 0x0d, 0),
116 RATE(480, 0x08, 0),
117 RATE(540, 0x0c, 0),
118};
119
120static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
121{
122 int time_left;
123
124 if (atomic_read(&priv->htc->tgt_ready) > 0) {
125 atomic_dec(&priv->htc->tgt_ready);
126 return 0;
127 }
128
129
130 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
131 if (!time_left) {
132 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
133 return -ETIMEDOUT;
134 }
135
136 atomic_dec(&priv->htc->tgt_ready);
137
138 return 0;
139}
140
141static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
142{
143 ath9k_htc_exit_debug(priv->ah);
144 ath9k_hw_deinit(priv->ah);
145 kfree(priv->ah);
146 priv->ah = NULL;
147}
148
149static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
150{
151 struct ieee80211_hw *hw = priv->hw;
152
153 wiphy_rfkill_stop_polling(hw->wiphy);
154 ath9k_deinit_leds(priv);
155 ieee80211_unregister_hw(hw);
156 ath9k_rx_cleanup(priv);
157 ath9k_tx_cleanup(priv);
158 ath9k_deinit_priv(priv);
159}
160
161static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
162 u16 service_id,
163 void (*tx) (void *,
164 struct sk_buff *,
165 enum htc_endpoint_id,
166 bool txok),
167 enum htc_endpoint_id *ep_id)
168{
169 struct htc_service_connreq req;
170
171 memset(&req, 0, sizeof(struct htc_service_connreq));
172
173 req.service_id = service_id;
174 req.ep_callbacks.priv = priv;
175 req.ep_callbacks.rx = ath9k_htc_rxep;
176 req.ep_callbacks.tx = tx;
177
178 return htc_connect_service(priv->htc, &req, ep_id);
179}
180
181static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
182 u32 drv_info)
183{
184 int ret;
185
186
187 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
188 if (ret)
189 goto err;
190
191
192 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
193 &priv->beacon_ep);
194 if (ret)
195 goto err;
196
197
198 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
199 &priv->cab_ep);
200 if (ret)
201 goto err;
202
203
204
205 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
206 &priv->uapsd_ep);
207 if (ret)
208 goto err;
209
210
211 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
212 &priv->mgmt_ep);
213 if (ret)
214 goto err;
215
216
217 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
218 &priv->data_be_ep);
219 if (ret)
220 goto err;
221
222
223 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
224 &priv->data_bk_ep);
225 if (ret)
226 goto err;
227
228
229 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
230 &priv->data_vi_ep);
231 if (ret)
232 goto err;
233
234
235 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
236 &priv->data_vo_ep);
237 if (ret)
238 goto err;
239
240
241
242
243
244
245
246 if (IS_AR7010_DEVICE(drv_info))
247 priv->htc->credits = 45;
248 else
249 priv->htc->credits = 33;
250
251 ret = htc_init(priv->htc);
252 if (ret)
253 goto err;
254
255 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
256 priv->htc->credits);
257
258 return 0;
259
260err:
261 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
262 return ret;
263}
264
265static int ath9k_reg_notifier(struct wiphy *wiphy,
266 struct regulatory_request *request)
267{
268 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
269 struct ath9k_htc_priv *priv = hw->priv;
270
271 return ath_reg_notifier_apply(wiphy, request,
272 ath9k_hw_regulatory(priv->ah));
273}
274
275static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
276{
277 struct ath_hw *ah = (struct ath_hw *) hw_priv;
278 struct ath_common *common = ath9k_hw_common(ah);
279 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
280 __be32 val, reg = cpu_to_be32(reg_offset);
281 int r;
282
283 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
284 (u8 *) ®, sizeof(reg),
285 (u8 *) &val, sizeof(val),
286 100);
287 if (unlikely(r)) {
288 ath_dbg(common, ATH_DBG_WMI,
289 "REGISTER READ FAILED: (0x%04x, %d)\n",
290 reg_offset, r);
291 return -EIO;
292 }
293
294 return be32_to_cpu(val);
295}
296
297static void ath9k_multi_regread(void *hw_priv, u32 *addr,
298 u32 *val, u16 count)
299{
300 struct ath_hw *ah = (struct ath_hw *) hw_priv;
301 struct ath_common *common = ath9k_hw_common(ah);
302 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
303 __be32 tmpaddr[8];
304 __be32 tmpval[8];
305 int i, ret;
306
307 for (i = 0; i < count; i++) {
308 tmpaddr[i] = cpu_to_be32(addr[i]);
309 }
310
311 ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
312 (u8 *)tmpaddr , sizeof(u32) * count,
313 (u8 *)tmpval, sizeof(u32) * count,
314 100);
315 if (unlikely(ret)) {
316 ath_dbg(common, ATH_DBG_WMI,
317 "Multiple REGISTER READ FAILED (count: %d)\n", count);
318 }
319
320 for (i = 0; i < count; i++) {
321 val[i] = be32_to_cpu(tmpval[i]);
322 }
323}
324
325static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
326{
327 struct ath_hw *ah = (struct ath_hw *) hw_priv;
328 struct ath_common *common = ath9k_hw_common(ah);
329 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
330 const __be32 buf[2] = {
331 cpu_to_be32(reg_offset),
332 cpu_to_be32(val),
333 };
334 int r;
335
336 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
337 (u8 *) &buf, sizeof(buf),
338 (u8 *) &val, sizeof(val),
339 100);
340 if (unlikely(r)) {
341 ath_dbg(common, ATH_DBG_WMI,
342 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
343 reg_offset, r);
344 }
345}
346
347static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
348{
349 struct ath_hw *ah = (struct ath_hw *) hw_priv;
350 struct ath_common *common = ath9k_hw_common(ah);
351 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
352 u32 rsp_status;
353 int r;
354
355 mutex_lock(&priv->wmi->multi_write_mutex);
356
357
358 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
359 cpu_to_be32(reg_offset);
360 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
361 cpu_to_be32(val);
362
363 priv->wmi->multi_write_idx++;
364
365
366 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
367 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
368 (u8 *) &priv->wmi->multi_write,
369 sizeof(struct register_write) * priv->wmi->multi_write_idx,
370 (u8 *) &rsp_status, sizeof(rsp_status),
371 100);
372 if (unlikely(r)) {
373 ath_dbg(common, ATH_DBG_WMI,
374 "REGISTER WRITE FAILED, multi len: %d\n",
375 priv->wmi->multi_write_idx);
376 }
377 priv->wmi->multi_write_idx = 0;
378 }
379
380 mutex_unlock(&priv->wmi->multi_write_mutex);
381}
382
383static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
384{
385 struct ath_hw *ah = (struct ath_hw *) hw_priv;
386 struct ath_common *common = ath9k_hw_common(ah);
387 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
388
389 if (atomic_read(&priv->wmi->mwrite_cnt))
390 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
391 else
392 ath9k_regwrite_single(hw_priv, val, reg_offset);
393}
394
395static void ath9k_enable_regwrite_buffer(void *hw_priv)
396{
397 struct ath_hw *ah = (struct ath_hw *) hw_priv;
398 struct ath_common *common = ath9k_hw_common(ah);
399 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
400
401 atomic_inc(&priv->wmi->mwrite_cnt);
402}
403
404static void ath9k_regwrite_flush(void *hw_priv)
405{
406 struct ath_hw *ah = (struct ath_hw *) hw_priv;
407 struct ath_common *common = ath9k_hw_common(ah);
408 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
409 u32 rsp_status;
410 int r;
411
412 atomic_dec(&priv->wmi->mwrite_cnt);
413
414 mutex_lock(&priv->wmi->multi_write_mutex);
415
416 if (priv->wmi->multi_write_idx) {
417 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
418 (u8 *) &priv->wmi->multi_write,
419 sizeof(struct register_write) * priv->wmi->multi_write_idx,
420 (u8 *) &rsp_status, sizeof(rsp_status),
421 100);
422 if (unlikely(r)) {
423 ath_dbg(common, ATH_DBG_WMI,
424 "REGISTER WRITE FAILED, multi len: %d\n",
425 priv->wmi->multi_write_idx);
426 }
427 priv->wmi->multi_write_idx = 0;
428 }
429
430 mutex_unlock(&priv->wmi->multi_write_mutex);
431}
432
433static const struct ath_ops ath9k_common_ops = {
434 .read = ath9k_regread,
435 .multi_read = ath9k_multi_regread,
436 .write = ath9k_regwrite,
437 .enable_write_buffer = ath9k_enable_regwrite_buffer,
438 .write_flush = ath9k_regwrite_flush,
439};
440
441static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
442{
443 *csz = L1_CACHE_BYTES >> 2;
444}
445
446static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
447{
448 struct ath_hw *ah = (struct ath_hw *) common->ah;
449
450 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
451
452 if (!ath9k_hw_wait(ah,
453 AR_EEPROM_STATUS_DATA,
454 AR_EEPROM_STATUS_DATA_BUSY |
455 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
456 AH_WAIT_TIMEOUT))
457 return false;
458
459 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
460 AR_EEPROM_STATUS_DATA_VAL);
461
462 return true;
463}
464
465static const struct ath_bus_ops ath9k_usb_bus_ops = {
466 .ath_bus_type = ATH_USB,
467 .read_cachesize = ath_usb_read_cachesize,
468 .eeprom_read = ath_usb_eeprom_read,
469};
470
471static void setup_ht_cap(struct ath9k_htc_priv *priv,
472 struct ieee80211_sta_ht_cap *ht_info)
473{
474 struct ath_common *common = ath9k_hw_common(priv->ah);
475 u8 tx_streams, rx_streams;
476 int i;
477
478 ht_info->ht_supported = true;
479 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
480 IEEE80211_HT_CAP_SM_PS |
481 IEEE80211_HT_CAP_SGI_40 |
482 IEEE80211_HT_CAP_DSSSCCK40;
483
484 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
485 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
486
487 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
488
489 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
490 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
491
492 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
493
494
495 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
496 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
497
498 ath_dbg(common, ATH_DBG_CONFIG,
499 "TX streams %d, RX streams: %d\n",
500 tx_streams, rx_streams);
501
502 if (tx_streams != rx_streams) {
503 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
504 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
505 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
506 }
507
508 for (i = 0; i < rx_streams; i++)
509 ht_info->mcs.rx_mask[i] = 0xff;
510
511 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
512}
513
514static int ath9k_init_queues(struct ath9k_htc_priv *priv)
515{
516 struct ath_common *common = ath9k_hw_common(priv->ah);
517 int i;
518
519 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
520 priv->hwq_map[i] = -1;
521
522 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
523 if (priv->beaconq == -1) {
524 ath_err(common, "Unable to setup BEACON xmit queue\n");
525 goto err;
526 }
527
528 priv->cabq = ath9k_htc_cabq_setup(priv);
529 if (priv->cabq == -1) {
530 ath_err(common, "Unable to setup CAB xmit queue\n");
531 goto err;
532 }
533
534 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
535 ath_err(common, "Unable to setup xmit queue for BE traffic\n");
536 goto err;
537 }
538
539 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
540 ath_err(common, "Unable to setup xmit queue for BK traffic\n");
541 goto err;
542 }
543 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
544 ath_err(common, "Unable to setup xmit queue for VI traffic\n");
545 goto err;
546 }
547 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
548 ath_err(common, "Unable to setup xmit queue for VO traffic\n");
549 goto err;
550 }
551
552 return 0;
553
554err:
555 return -EINVAL;
556}
557
558static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
559{
560 struct ath_common *common = ath9k_hw_common(priv->ah);
561 int i = 0;
562
563
564 common->keymax = priv->ah->caps.keycache_size;
565 if (common->keymax > ATH_KEYMAX) {
566 ath_dbg(common, ATH_DBG_ANY,
567 "Warning, using only %u entries in %u key cache\n",
568 ATH_KEYMAX, common->keymax);
569 common->keymax = ATH_KEYMAX;
570 }
571
572 if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
573 common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
574
575
576
577
578
579 for (i = 0; i < common->keymax; i++)
580 ath_hw_keyreset(common, (u16) i);
581}
582
583static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
584{
585 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
586 priv->sbands[IEEE80211_BAND_2GHZ].channels =
587 ath9k_2ghz_channels;
588 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
589 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
590 ARRAY_SIZE(ath9k_2ghz_channels);
591 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
592 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
593 ARRAY_SIZE(ath9k_legacy_rates);
594 }
595
596 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
597 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
598 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
599 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
600 ARRAY_SIZE(ath9k_5ghz_channels);
601 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
602 ath9k_legacy_rates + 4;
603 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
604 ARRAY_SIZE(ath9k_legacy_rates) - 4;
605 }
606}
607
608static void ath9k_init_misc(struct ath9k_htc_priv *priv)
609{
610 struct ath_common *common = ath9k_hw_common(priv->ah);
611
612 common->tx_chainmask = priv->ah->caps.tx_chainmask;
613 common->rx_chainmask = priv->ah->caps.rx_chainmask;
614
615 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
616
617 priv->ah->opmode = NL80211_IFTYPE_STATION;
618}
619
620static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
621{
622 int qnum;
623
624 switch (priv->ah->btcoex_hw.scheme) {
625 case ATH_BTCOEX_CFG_NONE:
626 break;
627 case ATH_BTCOEX_CFG_3WIRE:
628 priv->ah->btcoex_hw.btactive_gpio = 7;
629 priv->ah->btcoex_hw.btpriority_gpio = 6;
630 priv->ah->btcoex_hw.wlanactive_gpio = 8;
631 priv->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
632 ath9k_hw_btcoex_init_3wire(priv->ah);
633 ath_htc_init_btcoex_work(priv);
634 qnum = priv->hwq_map[WME_AC_BE];
635 ath9k_hw_init_btcoex_hw(priv->ah, qnum);
636 break;
637 default:
638 WARN_ON(1);
639 break;
640 }
641}
642
643static int ath9k_init_priv(struct ath9k_htc_priv *priv,
644 u16 devid, char *product,
645 u32 drv_info)
646{
647 struct ath_hw *ah = NULL;
648 struct ath_common *common;
649 int ret = 0, csz = 0;
650
651 priv->op_flags |= OP_INVALID;
652
653 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
654 if (!ah)
655 return -ENOMEM;
656
657 ah->hw_version.devid = devid;
658 ah->hw_version.subsysid = 0;
659 ah->hw_version.usbdev = drv_info;
660 ah->ah_flags |= AH_USE_EEPROM;
661 priv->ah = ah;
662
663 common = ath9k_hw_common(ah);
664 common->ops = &ath9k_common_ops;
665 common->bus_ops = &ath9k_usb_bus_ops;
666 common->ah = ah;
667 common->hw = priv->hw;
668 common->priv = priv;
669 common->debug_mask = ath9k_debug;
670
671 spin_lock_init(&priv->wmi->wmi_lock);
672 spin_lock_init(&priv->beacon_lock);
673 spin_lock_init(&priv->tx_lock);
674 mutex_init(&priv->mutex);
675 mutex_init(&priv->htc_pm_lock);
676 tasklet_init(&priv->swba_tasklet, ath9k_swba_tasklet,
677 (unsigned long)priv);
678 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
679 (unsigned long)priv);
680 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet,
681 (unsigned long)priv);
682 INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
683 INIT_WORK(&priv->ps_work, ath9k_ps_work);
684 INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
685
686
687
688
689
690 ath_read_cachesize(common, &csz);
691 common->cachelsz = csz << 2;
692
693 ret = ath9k_hw_init(ah);
694 if (ret) {
695 ath_err(common,
696 "Unable to initialize hardware; initialization status: %d\n",
697 ret);
698 goto err_hw;
699 }
700
701 ret = ath9k_htc_init_debug(ah);
702 if (ret) {
703 ath_err(common, "Unable to create debugfs files\n");
704 goto err_debug;
705 }
706
707 ret = ath9k_init_queues(priv);
708 if (ret)
709 goto err_queues;
710
711 ath9k_init_crypto(priv);
712 ath9k_init_channels_rates(priv);
713 ath9k_init_misc(priv);
714
715 if (product && strncmp(product, ATH_HTC_BTCOEX_PRODUCT_ID, 5) == 0) {
716 ah->btcoex_hw.scheme = ATH_BTCOEX_CFG_3WIRE;
717 ath9k_init_btcoex(priv);
718 }
719
720 return 0;
721
722err_queues:
723 ath9k_htc_exit_debug(ah);
724err_debug:
725 ath9k_hw_deinit(ah);
726err_hw:
727
728 kfree(ah);
729 priv->ah = NULL;
730
731 return ret;
732}
733
734static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
735 struct ieee80211_hw *hw)
736{
737 struct ath_common *common = ath9k_hw_common(priv->ah);
738
739 hw->flags = IEEE80211_HW_SIGNAL_DBM |
740 IEEE80211_HW_AMPDU_AGGREGATION |
741 IEEE80211_HW_SPECTRUM_MGMT |
742 IEEE80211_HW_HAS_RATE_CONTROL |
743 IEEE80211_HW_RX_INCLUDES_FCS |
744 IEEE80211_HW_SUPPORTS_PS |
745 IEEE80211_HW_PS_NULLFUNC_STACK;
746
747 hw->wiphy->interface_modes =
748 BIT(NL80211_IFTYPE_STATION) |
749 BIT(NL80211_IFTYPE_ADHOC);
750
751 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
752
753 hw->queues = 4;
754 hw->channel_change_time = 5000;
755 hw->max_listen_interval = 10;
756 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
757 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
758
759
760 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
761 sizeof(struct htc_frame_hdr) + 4;
762
763 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
764 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
765 &priv->sbands[IEEE80211_BAND_2GHZ];
766 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
767 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
768 &priv->sbands[IEEE80211_BAND_5GHZ];
769
770 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
771 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
772 setup_ht_cap(priv,
773 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
774 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
775 setup_ht_cap(priv,
776 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
777 }
778
779 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
780}
781
782static int ath9k_init_device(struct ath9k_htc_priv *priv,
783 u16 devid, char *product, u32 drv_info)
784{
785 struct ieee80211_hw *hw = priv->hw;
786 struct ath_common *common;
787 struct ath_hw *ah;
788 int error = 0;
789 struct ath_regulatory *reg;
790 char hw_name[64];
791
792
793 error = ath9k_init_priv(priv, devid, product, drv_info);
794 if (error != 0)
795 goto err_init;
796
797 ah = priv->ah;
798 common = ath9k_hw_common(ah);
799 ath9k_set_hw_capab(priv, hw);
800
801
802 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
803 ath9k_reg_notifier);
804 if (error)
805 goto err_regd;
806
807 reg = &common->regulatory;
808
809
810 error = ath9k_tx_init(priv);
811 if (error != 0)
812 goto err_tx;
813
814
815 error = ath9k_rx_init(priv);
816 if (error != 0)
817 goto err_rx;
818
819
820 error = ieee80211_register_hw(hw);
821 if (error)
822 goto err_register;
823
824
825 if (!ath_is_world_regd(reg)) {
826 error = regulatory_hint(hw->wiphy, reg->alpha2);
827 if (error)
828 goto err_world;
829 }
830
831 ath_dbg(common, ATH_DBG_CONFIG,
832 "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, "
833 "BE:%d, BK:%d, VI:%d, VO:%d\n",
834 priv->wmi_cmd_ep,
835 priv->beacon_ep,
836 priv->cab_ep,
837 priv->uapsd_ep,
838 priv->mgmt_ep,
839 priv->data_be_ep,
840 priv->data_bk_ep,
841 priv->data_vi_ep,
842 priv->data_vo_ep);
843
844 ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
845 wiphy_info(hw->wiphy, "%s\n", hw_name);
846
847 ath9k_init_leds(priv);
848 ath9k_start_rfkill_poll(priv);
849
850 return 0;
851
852err_world:
853 ieee80211_unregister_hw(hw);
854err_register:
855 ath9k_rx_cleanup(priv);
856err_rx:
857 ath9k_tx_cleanup(priv);
858err_tx:
859
860err_regd:
861 ath9k_deinit_priv(priv);
862err_init:
863 return error;
864}
865
866int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
867 u16 devid, char *product, u32 drv_info)
868{
869 struct ieee80211_hw *hw;
870 struct ath9k_htc_priv *priv;
871 int ret;
872
873 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
874 if (!hw)
875 return -ENOMEM;
876
877 priv = hw->priv;
878 priv->hw = hw;
879 priv->htc = htc_handle;
880 priv->dev = dev;
881 htc_handle->drv_priv = priv;
882 SET_IEEE80211_DEV(hw, priv->dev);
883
884 ret = ath9k_htc_wait_for_target(priv);
885 if (ret)
886 goto err_free;
887
888 priv->wmi = ath9k_init_wmi(priv);
889 if (!priv->wmi) {
890 ret = -EINVAL;
891 goto err_free;
892 }
893
894 ret = ath9k_init_htc_services(priv, devid, drv_info);
895 if (ret)
896 goto err_init;
897
898 ret = ath9k_init_device(priv, devid, product, drv_info);
899 if (ret)
900 goto err_init;
901
902 return 0;
903
904err_init:
905 ath9k_deinit_wmi(priv);
906err_free:
907 ieee80211_free_hw(hw);
908 return ret;
909}
910
911void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
912{
913 if (htc_handle->drv_priv) {
914
915
916 if (hotunplug)
917 htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
918
919 ath9k_deinit_device(htc_handle->drv_priv);
920 ath9k_deinit_wmi(htc_handle->drv_priv);
921 ieee80211_free_hw(htc_handle->drv_priv->hw);
922 }
923}
924
925#ifdef CONFIG_PM
926
927void ath9k_htc_suspend(struct htc_target *htc_handle)
928{
929 ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
930}
931
932int ath9k_htc_resume(struct htc_target *htc_handle)
933{
934 struct ath9k_htc_priv *priv = htc_handle->drv_priv;
935 int ret;
936
937 ret = ath9k_htc_wait_for_target(priv);
938 if (ret)
939 return ret;
940
941 ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
942 priv->ah->hw_version.usbdev);
943 return ret;
944}
945#endif
946
947static int __init ath9k_htc_init(void)
948{
949 int error;
950
951 error = ath9k_htc_debug_create_root();
952 if (error < 0) {
953 printk(KERN_ERR
954 "ath9k_htc: Unable to create debugfs root: %d\n",
955 error);
956 goto err_dbg;
957 }
958
959 error = ath9k_hif_usb_init();
960 if (error < 0) {
961 printk(KERN_ERR
962 "ath9k_htc: No USB devices found,"
963 " driver not installed.\n");
964 error = -ENODEV;
965 goto err_usb;
966 }
967
968 return 0;
969
970err_usb:
971 ath9k_htc_debug_remove_root();
972err_dbg:
973 return error;
974}
975module_init(ath9k_htc_init);
976
977static void __exit ath9k_htc_exit(void)
978{
979 ath9k_hif_usb_exit();
980 ath9k_htc_debug_remove_root();
981 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
982}
983module_exit(ath9k_htc_exit);
984
