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40#include <linux/init.h>
41#include <linux/slab.h>
42#include <linux/module.h>
43#include <linux/etherdevice.h>
44#include <net/mac80211.h>
45#include "carl9170.h"
46#include "hw.h"
47#include "cmd.h"
48
49static inline unsigned int __carl9170_get_queue(struct ar9170 *ar,
50 unsigned int queue)
51{
52 if (unlikely(modparam_noht)) {
53 return queue;
54 } else {
55
56
57
58
59
60
61 return 2;
62 }
63}
64
65static inline unsigned int carl9170_get_queue(struct ar9170 *ar,
66 struct sk_buff *skb)
67{
68 return __carl9170_get_queue(ar, skb_get_queue_mapping(skb));
69}
70
71static bool is_mem_full(struct ar9170 *ar)
72{
73 return (DIV_ROUND_UP(IEEE80211_MAX_FRAME_LEN, ar->fw.mem_block_size) >
74 atomic_read(&ar->mem_free_blocks));
75}
76
77static void carl9170_tx_accounting(struct ar9170 *ar, struct sk_buff *skb)
78{
79 int queue, i;
80 bool mem_full;
81
82 atomic_inc(&ar->tx_total_queued);
83
84 queue = skb_get_queue_mapping(skb);
85 spin_lock_bh(&ar->tx_stats_lock);
86
87
88
89
90
91
92
93 ar->tx_stats[queue].len++;
94 ar->tx_stats[queue].count++;
95
96 mem_full = is_mem_full(ar);
97 for (i = 0; i < ar->hw->queues; i++) {
98 if (mem_full || ar->tx_stats[i].len >= ar->tx_stats[i].limit) {
99 ieee80211_stop_queue(ar->hw, i);
100 ar->queue_stop_timeout[i] = jiffies;
101 }
102 }
103
104 spin_unlock_bh(&ar->tx_stats_lock);
105}
106
107static void carl9170_tx_accounting_free(struct ar9170 *ar, struct sk_buff *skb)
108{
109 struct ieee80211_tx_info *txinfo;
110 int queue;
111
112 txinfo = IEEE80211_SKB_CB(skb);
113 queue = skb_get_queue_mapping(skb);
114
115 spin_lock_bh(&ar->tx_stats_lock);
116
117 ar->tx_stats[queue].len--;
118
119 if (!is_mem_full(ar)) {
120 unsigned int i;
121 for (i = 0; i < ar->hw->queues; i++) {
122 if (ar->tx_stats[i].len >= CARL9170_NUM_TX_LIMIT_SOFT)
123 continue;
124
125 if (ieee80211_queue_stopped(ar->hw, i)) {
126 unsigned long tmp;
127
128 tmp = jiffies - ar->queue_stop_timeout[i];
129 if (tmp > ar->max_queue_stop_timeout[i])
130 ar->max_queue_stop_timeout[i] = tmp;
131 }
132
133 ieee80211_wake_queue(ar->hw, i);
134 }
135 }
136
137 spin_unlock_bh(&ar->tx_stats_lock);
138 if (atomic_dec_and_test(&ar->tx_total_queued))
139 complete(&ar->tx_flush);
140}
141
142static int carl9170_alloc_dev_space(struct ar9170 *ar, struct sk_buff *skb)
143{
144 struct _carl9170_tx_superframe *super = (void *) skb->data;
145 unsigned int chunks;
146 int cookie = -1;
147
148 atomic_inc(&ar->mem_allocs);
149
150 chunks = DIV_ROUND_UP(skb->len, ar->fw.mem_block_size);
151 if (unlikely(atomic_sub_return(chunks, &ar->mem_free_blocks) < 0)) {
152 atomic_add(chunks, &ar->mem_free_blocks);
153 return -ENOSPC;
154 }
155
156 spin_lock_bh(&ar->mem_lock);
157 cookie = bitmap_find_free_region(ar->mem_bitmap, ar->fw.mem_blocks, 0);
158 spin_unlock_bh(&ar->mem_lock);
159
160 if (unlikely(cookie < 0)) {
161 atomic_add(chunks, &ar->mem_free_blocks);
162 return -ENOSPC;
163 }
164
165 super = (void *) skb->data;
166
167
168
169
170
171
172
173
174 super->s.cookie = (u8) cookie + 1;
175 return 0;
176}
177
178static void carl9170_release_dev_space(struct ar9170 *ar, struct sk_buff *skb)
179{
180 struct _carl9170_tx_superframe *super = (void *) skb->data;
181 int cookie;
182
183
184 cookie = super->s.cookie;
185
186 super->s.cookie = 0;
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201 if (unlikely(WARN_ON_ONCE(cookie == 0) ||
202 WARN_ON_ONCE(cookie > ar->fw.mem_blocks)))
203 return;
204
205 atomic_add(DIV_ROUND_UP(skb->len, ar->fw.mem_block_size),
206 &ar->mem_free_blocks);
207
208 spin_lock_bh(&ar->mem_lock);
209 bitmap_release_region(ar->mem_bitmap, cookie - 1, 0);
210 spin_unlock_bh(&ar->mem_lock);
211}
212
213
214static void carl9170_tx_release(struct kref *ref)
215{
216 struct ar9170 *ar;
217 struct carl9170_tx_info *arinfo;
218 struct ieee80211_tx_info *txinfo;
219 struct sk_buff *skb;
220
221 arinfo = container_of(ref, struct carl9170_tx_info, ref);
222 txinfo = container_of((void *) arinfo, struct ieee80211_tx_info,
223 rate_driver_data);
224 skb = container_of((void *) txinfo, struct sk_buff, cb);
225
226 ar = arinfo->ar;
227 if (WARN_ON_ONCE(!ar))
228 return;
229
230 BUILD_BUG_ON(
231 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len) != 23);
232
233 memset(&txinfo->status.ampdu_ack_len, 0,
234 sizeof(struct ieee80211_tx_info) -
235 offsetof(struct ieee80211_tx_info, status.ampdu_ack_len));
236
237 if (atomic_read(&ar->tx_total_queued))
238 ar->tx_schedule = true;
239
240 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU) {
241 if (!atomic_read(&ar->tx_ampdu_upload))
242 ar->tx_ampdu_schedule = true;
243
244 if (txinfo->flags & IEEE80211_TX_STAT_AMPDU) {
245 struct _carl9170_tx_superframe *super;
246
247 super = (void *)skb->data;
248 txinfo->status.ampdu_len = super->s.rix;
249 txinfo->status.ampdu_ack_len = super->s.cnt;
250 } else if (txinfo->flags & IEEE80211_TX_STAT_ACK) {
251
252
253
254
255
256
257
258
259
260
261
262
263
264 dev_kfree_skb_any(skb);
265 return;
266 } else {
267
268
269
270
271
272 }
273 }
274
275 skb_pull(skb, sizeof(struct _carl9170_tx_superframe));
276 ieee80211_tx_status_irqsafe(ar->hw, skb);
277}
278
279void carl9170_tx_get_skb(struct sk_buff *skb)
280{
281 struct carl9170_tx_info *arinfo = (void *)
282 (IEEE80211_SKB_CB(skb))->rate_driver_data;
283 kref_get(&arinfo->ref);
284}
285
286int carl9170_tx_put_skb(struct sk_buff *skb)
287{
288 struct carl9170_tx_info *arinfo = (void *)
289 (IEEE80211_SKB_CB(skb))->rate_driver_data;
290
291 return kref_put(&arinfo->ref, carl9170_tx_release);
292}
293
294
295static void carl9170_tx_shift_bm(struct ar9170 *ar,
296 struct carl9170_sta_tid *tid_info, u16 seq)
297{
298 u16 off;
299
300 off = SEQ_DIFF(seq, tid_info->bsn);
301
302 if (WARN_ON_ONCE(off >= CARL9170_BAW_BITS))
303 return;
304
305
306
307
308
309
310
311 WARN_ON_ONCE(!test_and_clear_bit(off, tid_info->bitmap));
312
313 off = SEQ_DIFF(tid_info->snx, tid_info->bsn);
314 if (WARN_ON_ONCE(off >= CARL9170_BAW_BITS))
315 return;
316
317 if (!bitmap_empty(tid_info->bitmap, off))
318 off = find_first_bit(tid_info->bitmap, off);
319
320 tid_info->bsn += off;
321 tid_info->bsn &= 0x0fff;
322
323 bitmap_shift_right(tid_info->bitmap, tid_info->bitmap,
324 off, CARL9170_BAW_BITS);
325}
326
327static void carl9170_tx_status_process_ampdu(struct ar9170 *ar,
328 struct sk_buff *skb, struct ieee80211_tx_info *txinfo)
329{
330 struct _carl9170_tx_superframe *super = (void *) skb->data;
331 struct ieee80211_hdr *hdr = (void *) super->frame_data;
332 struct ieee80211_tx_info *tx_info;
333 struct carl9170_tx_info *ar_info;
334 struct carl9170_sta_info *sta_info;
335 struct ieee80211_sta *sta;
336 struct carl9170_sta_tid *tid_info;
337 struct ieee80211_vif *vif;
338 unsigned int vif_id;
339 u8 tid;
340
341 if (!(txinfo->flags & IEEE80211_TX_CTL_AMPDU) ||
342 txinfo->flags & IEEE80211_TX_CTL_INJECTED ||
343 (!(super->f.mac_control & cpu_to_le16(AR9170_TX_MAC_AGGR))))
344 return;
345
346 tx_info = IEEE80211_SKB_CB(skb);
347 ar_info = (void *) tx_info->rate_driver_data;
348
349 vif_id = (super->s.misc & CARL9170_TX_SUPER_MISC_VIF_ID) >>
350 CARL9170_TX_SUPER_MISC_VIF_ID_S;
351
352 if (WARN_ON_ONCE(vif_id >= AR9170_MAX_VIRTUAL_MAC))
353 return;
354
355 rcu_read_lock();
356 vif = rcu_dereference(ar->vif_priv[vif_id].vif);
357 if (unlikely(!vif))
358 goto out_rcu;
359
360
361
362
363
364
365
366
367
368
369 sta = ieee80211_find_sta(vif, hdr->addr1);
370 if (unlikely(!sta))
371 goto out_rcu;
372
373 tid = get_tid_h(hdr);
374
375 sta_info = (void *) sta->drv_priv;
376 tid_info = rcu_dereference(sta_info->agg[tid]);
377 if (!tid_info)
378 goto out_rcu;
379
380 spin_lock_bh(&tid_info->lock);
381 if (likely(tid_info->state >= CARL9170_TID_STATE_IDLE))
382 carl9170_tx_shift_bm(ar, tid_info, get_seq_h(hdr));
383
384 if (sta_info->stats[tid].clear) {
385 sta_info->stats[tid].clear = false;
386 sta_info->stats[tid].req = false;
387 sta_info->stats[tid].ampdu_len = 0;
388 sta_info->stats[tid].ampdu_ack_len = 0;
389 }
390
391 sta_info->stats[tid].ampdu_len++;
392 if (txinfo->status.rates[0].count == 1)
393 sta_info->stats[tid].ampdu_ack_len++;
394
395 if (!(txinfo->flags & IEEE80211_TX_STAT_ACK))
396 sta_info->stats[tid].req = true;
397
398 if (super->f.mac_control & cpu_to_le16(AR9170_TX_MAC_IMM_BA)) {
399 super->s.rix = sta_info->stats[tid].ampdu_len;
400 super->s.cnt = sta_info->stats[tid].ampdu_ack_len;
401 txinfo->flags |= IEEE80211_TX_STAT_AMPDU;
402 if (sta_info->stats[tid].req)
403 txinfo->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
404
405 sta_info->stats[tid].clear = true;
406 }
407 spin_unlock_bh(&tid_info->lock);
408
409out_rcu:
410 rcu_read_unlock();
411}
412
413void carl9170_tx_status(struct ar9170 *ar, struct sk_buff *skb,
414 const bool success)
415{
416 struct ieee80211_tx_info *txinfo;
417
418 carl9170_tx_accounting_free(ar, skb);
419
420 txinfo = IEEE80211_SKB_CB(skb);
421
422 if (success)
423 txinfo->flags |= IEEE80211_TX_STAT_ACK;
424 else
425 ar->tx_ack_failures++;
426
427 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU)
428 carl9170_tx_status_process_ampdu(ar, skb, txinfo);
429
430 carl9170_tx_put_skb(skb);
431}
432
433
434void carl9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb)
435{
436 struct ieee80211_tx_info *txinfo = IEEE80211_SKB_CB(skb);
437
438 atomic_dec(&ar->tx_total_pending);
439
440 if (txinfo->flags & IEEE80211_TX_CTL_AMPDU)
441 atomic_dec(&ar->tx_ampdu_upload);
442
443 if (carl9170_tx_put_skb(skb))
444 tasklet_hi_schedule(&ar->usb_tasklet);
445}
446
447static struct sk_buff *carl9170_get_queued_skb(struct ar9170 *ar, u8 cookie,
448 struct sk_buff_head *queue)
449{
450 struct sk_buff *skb;
451
452 spin_lock_bh(&queue->lock);
453 skb_queue_walk(queue, skb) {
454 struct _carl9170_tx_superframe *txc = (void *) skb->data;
455
456 if (txc->s.cookie != cookie)
457 continue;
458
459 __skb_unlink(skb, queue);
460 spin_unlock_bh(&queue->lock);
461
462 carl9170_release_dev_space(ar, skb);
463 return skb;
464 }
465 spin_unlock_bh(&queue->lock);
466
467 return NULL;
468}
469
470static void carl9170_tx_fill_rateinfo(struct ar9170 *ar, unsigned int rix,
471 unsigned int tries, struct ieee80211_tx_info *txinfo)
472{
473 unsigned int i;
474
475 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
476 if (txinfo->status.rates[i].idx < 0)
477 break;
478
479 if (i == rix) {
480 txinfo->status.rates[i].count = tries;
481 i++;
482 break;
483 }
484 }
485
486 for (; i < IEEE80211_TX_MAX_RATES; i++) {
487 txinfo->status.rates[i].idx = -1;
488 txinfo->status.rates[i].count = 0;
489 }
490}
491
492static void carl9170_check_queue_stop_timeout(struct ar9170 *ar)
493{
494 int i;
495 struct sk_buff *skb;
496 struct ieee80211_tx_info *txinfo;
497 struct carl9170_tx_info *arinfo;
498 bool restart = false;
499
500 for (i = 0; i < ar->hw->queues; i++) {
501 spin_lock_bh(&ar->tx_status[i].lock);
502
503 skb = skb_peek(&ar->tx_status[i]);
504
505 if (!skb)
506 goto next;
507
508 txinfo = IEEE80211_SKB_CB(skb);
509 arinfo = (void *) txinfo->rate_driver_data;
510
511 if (time_is_before_jiffies(arinfo->timeout +
512 msecs_to_jiffies(CARL9170_QUEUE_STUCK_TIMEOUT)) == true)
513 restart = true;
514
515next:
516 spin_unlock_bh(&ar->tx_status[i].lock);
517 }
518
519 if (restart) {
520
521
522
523
524
525
526
527
528
529
530
531
532
533 carl9170_restart(ar, CARL9170_RR_STUCK_TX);
534 }
535}
536
537static void carl9170_tx_ampdu_timeout(struct ar9170 *ar)
538{
539 struct carl9170_sta_tid *iter;
540 struct sk_buff *skb;
541 struct ieee80211_tx_info *txinfo;
542 struct carl9170_tx_info *arinfo;
543 struct _carl9170_tx_superframe *super;
544 struct ieee80211_sta *sta;
545 struct ieee80211_vif *vif;
546 struct ieee80211_hdr *hdr;
547 unsigned int vif_id;
548
549 rcu_read_lock();
550 list_for_each_entry_rcu(iter, &ar->tx_ampdu_list, list) {
551 if (iter->state < CARL9170_TID_STATE_IDLE)
552 continue;
553
554 spin_lock_bh(&iter->lock);
555 skb = skb_peek(&iter->queue);
556 if (!skb)
557 goto unlock;
558
559 txinfo = IEEE80211_SKB_CB(skb);
560 arinfo = (void *)txinfo->rate_driver_data;
561 if (time_is_after_jiffies(arinfo->timeout +
562 msecs_to_jiffies(CARL9170_QUEUE_TIMEOUT)))
563 goto unlock;
564
565 super = (void *) skb->data;
566 hdr = (void *) super->frame_data;
567
568 vif_id = (super->s.misc & CARL9170_TX_SUPER_MISC_VIF_ID) >>
569 CARL9170_TX_SUPER_MISC_VIF_ID_S;
570
571 if (WARN_ON(vif_id >= AR9170_MAX_VIRTUAL_MAC))
572 goto unlock;
573
574 vif = rcu_dereference(ar->vif_priv[vif_id].vif);
575 if (WARN_ON(!vif))
576 goto unlock;
577
578 sta = ieee80211_find_sta(vif, hdr->addr1);
579 if (WARN_ON(!sta))
580 goto unlock;
581
582 ieee80211_stop_tx_ba_session(sta, iter->tid);
583unlock:
584 spin_unlock_bh(&iter->lock);
585
586 }
587 rcu_read_unlock();
588}
589
590void carl9170_tx_janitor(struct work_struct *work)
591{
592 struct ar9170 *ar = container_of(work, struct ar9170,
593 tx_janitor.work);
594 if (!IS_STARTED(ar))
595 return;
596
597 ar->tx_janitor_last_run = jiffies;
598
599 carl9170_check_queue_stop_timeout(ar);
600 carl9170_tx_ampdu_timeout(ar);
601
602 if (!atomic_read(&ar->tx_total_queued))
603 return;
604
605 ieee80211_queue_delayed_work(ar->hw, &ar->tx_janitor,
606 msecs_to_jiffies(CARL9170_TX_TIMEOUT));
607}
608
609static void __carl9170_tx_process_status(struct ar9170 *ar,
610 const uint8_t cookie, const uint8_t info)
611{
612 struct sk_buff *skb;
613 struct ieee80211_tx_info *txinfo;
614 struct carl9170_tx_info *arinfo;
615 unsigned int r, t, q;
616 bool success = true;
617
618 q = ar9170_qmap[info & CARL9170_TX_STATUS_QUEUE];
619
620 skb = carl9170_get_queued_skb(ar, cookie, &ar->tx_status[q]);
621 if (!skb) {
622
623
624
625
626 return ;
627 }
628
629 txinfo = IEEE80211_SKB_CB(skb);
630 arinfo = (void *) txinfo->rate_driver_data;
631
632 if (!(info & CARL9170_TX_STATUS_SUCCESS))
633 success = false;
634
635 r = (info & CARL9170_TX_STATUS_RIX) >> CARL9170_TX_STATUS_RIX_S;
636 t = (info & CARL9170_TX_STATUS_TRIES) >> CARL9170_TX_STATUS_TRIES_S;
637
638 carl9170_tx_fill_rateinfo(ar, r, t, txinfo);
639 carl9170_tx_status(ar, skb, success);
640}
641
642void carl9170_tx_process_status(struct ar9170 *ar,
643 const struct carl9170_rsp *cmd)
644{
645 unsigned int i;
646
647 for (i = 0; i < cmd->hdr.ext; i++) {
648 if (WARN_ON(i > ((cmd->hdr.len / 2) + 1))) {
649 print_hex_dump_bytes("UU:", DUMP_PREFIX_NONE,
650 (void *) cmd, cmd->hdr.len + 4);
651 break;
652 }
653
654 __carl9170_tx_process_status(ar, cmd->_tx_status[i].cookie,
655 cmd->_tx_status[i].info);
656 }
657}
658
659static __le32 carl9170_tx_physet(struct ar9170 *ar,
660 struct ieee80211_tx_info *info, struct ieee80211_tx_rate *txrate)
661{
662 struct ieee80211_rate *rate = NULL;
663 u32 power, chains;
664 __le32 tmp;
665
666 tmp = cpu_to_le32(0);
667
668 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
669 tmp |= cpu_to_le32(AR9170_TX_PHY_BW_40MHZ <<
670 AR9170_TX_PHY_BW_S);
671
672 if (txrate->flags & IEEE80211_TX_RC_DUP_DATA)
673 tmp |= cpu_to_le32(AR9170_TX_PHY_BW_40MHZ_DUP <<
674 AR9170_TX_PHY_BW_S);
675
676 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
677 tmp |= cpu_to_le32(AR9170_TX_PHY_SHORT_GI);
678
679 if (txrate->flags & IEEE80211_TX_RC_MCS) {
680 u32 r = txrate->idx;
681 u8 *txpower;
682
683
684 tmp |= cpu_to_le32((r & 0x7) <<
685 AR9170_TX_PHY_TX_HEAVY_CLIP_S);
686
687 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) {
688 if (info->band == IEEE80211_BAND_5GHZ)
689 txpower = ar->power_5G_ht40;
690 else
691 txpower = ar->power_2G_ht40;
692 } else {
693 if (info->band == IEEE80211_BAND_5GHZ)
694 txpower = ar->power_5G_ht20;
695 else
696 txpower = ar->power_2G_ht20;
697 }
698
699 power = txpower[r & 7];
700
701
702 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
703 power += 2;
704
705 r <<= AR9170_TX_PHY_MCS_S;
706 BUG_ON(r & ~AR9170_TX_PHY_MCS);
707
708 tmp |= cpu_to_le32(r & AR9170_TX_PHY_MCS);
709 tmp |= cpu_to_le32(AR9170_TX_PHY_MOD_HT);
710
711
712
713
714
715
716
717 } else {
718 u8 *txpower;
719 u32 mod;
720 u32 phyrate;
721 u8 idx = txrate->idx;
722
723 if (info->band != IEEE80211_BAND_2GHZ) {
724 idx += 4;
725 txpower = ar->power_5G_leg;
726 mod = AR9170_TX_PHY_MOD_OFDM;
727 } else {
728 if (idx < 4) {
729 txpower = ar->power_2G_cck;
730 mod = AR9170_TX_PHY_MOD_CCK;
731 } else {
732 mod = AR9170_TX_PHY_MOD_OFDM;
733 txpower = ar->power_2G_ofdm;
734 }
735 }
736
737 rate = &__carl9170_ratetable[idx];
738
739 phyrate = rate->hw_value & 0xF;
740 power = txpower[(rate->hw_value & 0x30) >> 4];
741 phyrate <<= AR9170_TX_PHY_MCS_S;
742
743 tmp |= cpu_to_le32(mod);
744 tmp |= cpu_to_le32(phyrate);
745
746
747
748
749
750
751
752 }
753 power <<= AR9170_TX_PHY_TX_PWR_S;
754 power &= AR9170_TX_PHY_TX_PWR;
755 tmp |= cpu_to_le32(power);
756
757
758 if (ar->eeprom.tx_mask == 1) {
759 chains = AR9170_TX_PHY_TXCHAIN_1;
760 } else {
761 chains = AR9170_TX_PHY_TXCHAIN_2;
762
763
764 if (rate && rate->bitrate >= 360 &&
765 !(txrate->flags & IEEE80211_TX_RC_MCS))
766 chains = AR9170_TX_PHY_TXCHAIN_1;
767 }
768 tmp |= cpu_to_le32(chains << AR9170_TX_PHY_TXCHAIN_S);
769
770 return tmp;
771}
772
773static bool carl9170_tx_rts_check(struct ar9170 *ar,
774 struct ieee80211_tx_rate *rate,
775 bool ampdu, bool multi)
776{
777 switch (ar->erp_mode) {
778 case CARL9170_ERP_AUTO:
779 if (ampdu)
780 break;
781
782 case CARL9170_ERP_MAC80211:
783 if (!(rate->flags & IEEE80211_TX_RC_USE_RTS_CTS))
784 break;
785
786 case CARL9170_ERP_RTS:
787 if (likely(!multi))
788 return true;
789
790 default:
791 break;
792 }
793
794 return false;
795}
796
797static bool carl9170_tx_cts_check(struct ar9170 *ar,
798 struct ieee80211_tx_rate *rate)
799{
800 switch (ar->erp_mode) {
801 case CARL9170_ERP_AUTO:
802 case CARL9170_ERP_MAC80211:
803 if (!(rate->flags & IEEE80211_TX_RC_USE_CTS_PROTECT))
804 break;
805
806 case CARL9170_ERP_CTS:
807 return true;
808
809 default:
810 break;
811 }
812
813 return false;
814}
815
816static int carl9170_tx_prepare(struct ar9170 *ar, struct sk_buff *skb)
817{
818 struct ieee80211_hdr *hdr;
819 struct _carl9170_tx_superframe *txc;
820 struct carl9170_vif_info *cvif;
821 struct ieee80211_tx_info *info;
822 struct ieee80211_tx_rate *txrate;
823 struct ieee80211_sta *sta;
824 struct carl9170_tx_info *arinfo;
825 unsigned int hw_queue;
826 int i;
827 __le16 mac_tmp;
828 u16 len;
829 bool ampdu, no_ack;
830
831 BUILD_BUG_ON(sizeof(*arinfo) > sizeof(info->rate_driver_data));
832 BUILD_BUG_ON(sizeof(struct _carl9170_tx_superdesc) !=
833 CARL9170_TX_SUPERDESC_LEN);
834
835 BUILD_BUG_ON(sizeof(struct _ar9170_tx_hwdesc) !=
836 AR9170_TX_HWDESC_LEN);
837
838 BUILD_BUG_ON(IEEE80211_TX_MAX_RATES < CARL9170_TX_MAX_RATES);
839
840 BUILD_BUG_ON(AR9170_MAX_VIRTUAL_MAC >
841 ((CARL9170_TX_SUPER_MISC_VIF_ID >>
842 CARL9170_TX_SUPER_MISC_VIF_ID_S) + 1));
843
844 hw_queue = ar9170_qmap[carl9170_get_queue(ar, skb)];
845
846 hdr = (void *)skb->data;
847 info = IEEE80211_SKB_CB(skb);
848 len = skb->len;
849
850
851
852
853
854 if (likely(info->control.vif))
855 cvif = (void *) info->control.vif->drv_priv;
856 else
857 cvif = NULL;
858
859 sta = info->control.sta;
860
861 txc = (void *)skb_push(skb, sizeof(*txc));
862 memset(txc, 0, sizeof(*txc));
863
864 SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, txc->s.misc, hw_queue);
865
866 if (likely(cvif))
867 SET_VAL(CARL9170_TX_SUPER_MISC_VIF_ID, txc->s.misc, cvif->id);
868
869 if (unlikely(info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM))
870 txc->s.misc |= CARL9170_TX_SUPER_MISC_CAB;
871
872 if (unlikely(info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
873 txc->s.misc |= CARL9170_TX_SUPER_MISC_ASSIGN_SEQ;
874
875 if (unlikely(ieee80211_is_probe_resp(hdr->frame_control)))
876 txc->s.misc |= CARL9170_TX_SUPER_MISC_FILL_IN_TSF;
877
878 mac_tmp = cpu_to_le16(AR9170_TX_MAC_HW_DURATION |
879 AR9170_TX_MAC_BACKOFF);
880 mac_tmp |= cpu_to_le16((hw_queue << AR9170_TX_MAC_QOS_S) &
881 AR9170_TX_MAC_QOS);
882
883 no_ack = !!(info->flags & IEEE80211_TX_CTL_NO_ACK);
884 if (unlikely(no_ack))
885 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_NO_ACK);
886
887 if (info->control.hw_key) {
888 len += info->control.hw_key->icv_len;
889
890 switch (info->control.hw_key->cipher) {
891 case WLAN_CIPHER_SUITE_WEP40:
892 case WLAN_CIPHER_SUITE_WEP104:
893 case WLAN_CIPHER_SUITE_TKIP:
894 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_ENCR_RC4);
895 break;
896 case WLAN_CIPHER_SUITE_CCMP:
897 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_ENCR_AES);
898 break;
899 default:
900 WARN_ON(1);
901 goto err_out;
902 }
903 }
904
905 ampdu = !!(info->flags & IEEE80211_TX_CTL_AMPDU);
906 if (ampdu) {
907 unsigned int density, factor;
908
909 if (unlikely(!sta || !cvif))
910 goto err_out;
911
912 factor = min_t(unsigned int, 1u, sta->ht_cap.ampdu_factor);
913 density = sta->ht_cap.ampdu_density;
914
915 if (density) {
916
917
918
919
920
921
922
923 density = max_t(unsigned int, density + 1, 7u);
924 }
925
926 SET_VAL(CARL9170_TX_SUPER_AMPDU_DENSITY,
927 txc->s.ampdu_settings, density);
928
929 SET_VAL(CARL9170_TX_SUPER_AMPDU_FACTOR,
930 txc->s.ampdu_settings, factor);
931
932 for (i = 0; i < CARL9170_TX_MAX_RATES; i++) {
933 txrate = &info->control.rates[i];
934 if (txrate->idx >= 0) {
935 txc->s.ri[i] =
936 CARL9170_TX_SUPER_RI_AMPDU;
937
938 if (WARN_ON(!(txrate->flags &
939 IEEE80211_TX_RC_MCS))) {
940
941
942
943
944
945 goto err_out;
946 }
947 continue;
948 }
949
950 txrate->idx = 0;
951 txrate->count = ar->hw->max_rate_tries;
952 }
953
954 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_AGGR);
955 }
956
957
958
959
960
961
962 for (i = 1; i < CARL9170_TX_MAX_RATES; i++) {
963 txrate = &info->control.rates[i];
964 if (txrate->idx < 0)
965 break;
966
967 SET_VAL(CARL9170_TX_SUPER_RI_TRIES, txc->s.ri[i],
968 txrate->count);
969
970 if (carl9170_tx_rts_check(ar, txrate, ampdu, no_ack))
971 txc->s.ri[i] |= (AR9170_TX_MAC_PROT_RTS <<
972 CARL9170_TX_SUPER_RI_ERP_PROT_S);
973 else if (carl9170_tx_cts_check(ar, txrate))
974 txc->s.ri[i] |= (AR9170_TX_MAC_PROT_CTS <<
975 CARL9170_TX_SUPER_RI_ERP_PROT_S);
976
977 txc->s.rr[i - 1] = carl9170_tx_physet(ar, info, txrate);
978 }
979
980 txrate = &info->control.rates[0];
981 SET_VAL(CARL9170_TX_SUPER_RI_TRIES, txc->s.ri[0], txrate->count);
982
983 if (carl9170_tx_rts_check(ar, txrate, ampdu, no_ack))
984 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_PROT_RTS);
985 else if (carl9170_tx_cts_check(ar, txrate))
986 mac_tmp |= cpu_to_le16(AR9170_TX_MAC_PROT_CTS);
987
988 txc->s.len = cpu_to_le16(skb->len);
989 txc->f.length = cpu_to_le16(len + FCS_LEN);
990 txc->f.mac_control = mac_tmp;
991 txc->f.phy_control = carl9170_tx_physet(ar, info, txrate);
992
993 arinfo = (void *)info->rate_driver_data;
994 arinfo->timeout = jiffies;
995 arinfo->ar = ar;
996 kref_init(&arinfo->ref);
997 return 0;
998
999err_out:
1000 skb_pull(skb, sizeof(*txc));
1001 return -EINVAL;
1002}
1003
1004static void carl9170_set_immba(struct ar9170 *ar, struct sk_buff *skb)
1005{
1006 struct _carl9170_tx_superframe *super;
1007
1008 super = (void *) skb->data;
1009 super->f.mac_control |= cpu_to_le16(AR9170_TX_MAC_IMM_BA);
1010}
1011
1012static void carl9170_set_ampdu_params(struct ar9170 *ar, struct sk_buff *skb)
1013{
1014 struct _carl9170_tx_superframe *super;
1015 int tmp;
1016
1017 super = (void *) skb->data;
1018
1019 tmp = (super->s.ampdu_settings & CARL9170_TX_SUPER_AMPDU_DENSITY) <<
1020 CARL9170_TX_SUPER_AMPDU_DENSITY_S;
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033 if (tmp != ar->current_density) {
1034 ar->current_density = tmp;
1035 super->s.ampdu_settings |=
1036 CARL9170_TX_SUPER_AMPDU_COMMIT_DENSITY;
1037 }
1038
1039 tmp = (super->s.ampdu_settings & CARL9170_TX_SUPER_AMPDU_FACTOR) <<
1040 CARL9170_TX_SUPER_AMPDU_FACTOR_S;
1041
1042 if (tmp != ar->current_factor) {
1043 ar->current_factor = tmp;
1044 super->s.ampdu_settings |=
1045 CARL9170_TX_SUPER_AMPDU_COMMIT_FACTOR;
1046 }
1047}
1048
1049static bool carl9170_tx_rate_check(struct ar9170 *ar, struct sk_buff *_dest,
1050 struct sk_buff *_src)
1051{
1052 struct _carl9170_tx_superframe *dest, *src;
1053
1054 dest = (void *) _dest->data;
1055 src = (void *) _src->data;
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066 return (dest->f.phy_control == src->f.phy_control);
1067}
1068
1069static void carl9170_tx_ampdu(struct ar9170 *ar)
1070{
1071 struct sk_buff_head agg;
1072 struct carl9170_sta_tid *tid_info;
1073 struct sk_buff *skb, *first;
1074 unsigned int i = 0, done_ampdus = 0;
1075 u16 seq, queue, tmpssn;
1076
1077 atomic_inc(&ar->tx_ampdu_scheduler);
1078 ar->tx_ampdu_schedule = false;
1079
1080 if (atomic_read(&ar->tx_ampdu_upload))
1081 return;
1082
1083 if (!ar->tx_ampdu_list_len)
1084 return;
1085
1086 __skb_queue_head_init(&agg);
1087
1088 rcu_read_lock();
1089 tid_info = rcu_dereference(ar->tx_ampdu_iter);
1090 if (WARN_ON_ONCE(!tid_info)) {
1091 rcu_read_unlock();
1092 return;
1093 }
1094
1095retry:
1096 list_for_each_entry_continue_rcu(tid_info, &ar->tx_ampdu_list, list) {
1097 i++;
1098
1099 if (tid_info->state < CARL9170_TID_STATE_PROGRESS)
1100 continue;
1101
1102 queue = TID_TO_WME_AC(tid_info->tid);
1103
1104 spin_lock_bh(&tid_info->lock);
1105 if (tid_info->state != CARL9170_TID_STATE_XMIT)
1106 goto processed;
1107
1108 tid_info->counter++;
1109 first = skb_peek(&tid_info->queue);
1110 tmpssn = carl9170_get_seq(first);
1111 seq = tid_info->snx;
1112
1113 if (unlikely(tmpssn != seq)) {
1114 tid_info->state = CARL9170_TID_STATE_IDLE;
1115
1116 goto processed;
1117 }
1118
1119 while ((skb = skb_peek(&tid_info->queue))) {
1120
1121 if (unlikely(carl9170_get_seq(skb) != seq))
1122 break;
1123
1124
1125 if (unlikely(SEQ_DIFF(tid_info->snx, tid_info->bsn) >=
1126 (tid_info->max - 1)))
1127 break;
1128
1129 if (!carl9170_tx_rate_check(ar, skb, first))
1130 break;
1131
1132 atomic_inc(&ar->tx_ampdu_upload);
1133 tid_info->snx = seq = SEQ_NEXT(seq);
1134 __skb_unlink(skb, &tid_info->queue);
1135
1136 __skb_queue_tail(&agg, skb);
1137
1138 if (skb_queue_len(&agg) >= CARL9170_NUM_TX_AGG_MAX)
1139 break;
1140 }
1141
1142 if (skb_queue_empty(&tid_info->queue) ||
1143 carl9170_get_seq(skb_peek(&tid_info->queue)) !=
1144 tid_info->snx) {
1145
1146
1147
1148
1149
1150 tid_info->state = CARL9170_TID_STATE_IDLE;
1151 }
1152 done_ampdus++;
1153
1154processed:
1155 spin_unlock_bh(&tid_info->lock);
1156
1157 if (skb_queue_empty(&agg))
1158 continue;
1159
1160
1161 carl9170_set_ampdu_params(ar, skb_peek(&agg));
1162
1163
1164 carl9170_set_immba(ar, skb_peek_tail(&agg));
1165
1166 spin_lock_bh(&ar->tx_pending[queue].lock);
1167 skb_queue_splice_tail_init(&agg, &ar->tx_pending[queue]);
1168 spin_unlock_bh(&ar->tx_pending[queue].lock);
1169 ar->tx_schedule = true;
1170 }
1171 if ((done_ampdus++ == 0) && (i++ == 0))
1172 goto retry;
1173
1174 rcu_assign_pointer(ar->tx_ampdu_iter, tid_info);
1175 rcu_read_unlock();
1176}
1177
1178static struct sk_buff *carl9170_tx_pick_skb(struct ar9170 *ar,
1179 struct sk_buff_head *queue)
1180{
1181 struct sk_buff *skb;
1182 struct ieee80211_tx_info *info;
1183 struct carl9170_tx_info *arinfo;
1184
1185 BUILD_BUG_ON(sizeof(*arinfo) > sizeof(info->rate_driver_data));
1186
1187 spin_lock_bh(&queue->lock);
1188 skb = skb_peek(queue);
1189 if (unlikely(!skb))
1190 goto err_unlock;
1191
1192 if (carl9170_alloc_dev_space(ar, skb))
1193 goto err_unlock;
1194
1195 __skb_unlink(skb, queue);
1196 spin_unlock_bh(&queue->lock);
1197
1198 info = IEEE80211_SKB_CB(skb);
1199 arinfo = (void *) info->rate_driver_data;
1200
1201 arinfo->timeout = jiffies;
1202
1203
1204
1205
1206
1207
1208
1209 carl9170_tx_get_skb(skb);
1210
1211 return skb;
1212
1213err_unlock:
1214 spin_unlock_bh(&queue->lock);
1215 return NULL;
1216}
1217
1218void carl9170_tx_drop(struct ar9170 *ar, struct sk_buff *skb)
1219{
1220 struct _carl9170_tx_superframe *super;
1221 uint8_t q = 0;
1222
1223 ar->tx_dropped++;
1224
1225 super = (void *)skb->data;
1226 SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, q,
1227 ar9170_qmap[carl9170_get_queue(ar, skb)]);
1228 __carl9170_tx_process_status(ar, super->s.cookie, q);
1229}
1230
1231static void carl9170_tx(struct ar9170 *ar)
1232{
1233 struct sk_buff *skb;
1234 unsigned int i, q;
1235 bool schedule_garbagecollector = false;
1236
1237 ar->tx_schedule = false;
1238
1239 if (unlikely(!IS_STARTED(ar)))
1240 return;
1241
1242 carl9170_usb_handle_tx_err(ar);
1243
1244 for (i = 0; i < ar->hw->queues; i++) {
1245 while (!skb_queue_empty(&ar->tx_pending[i])) {
1246 skb = carl9170_tx_pick_skb(ar, &ar->tx_pending[i]);
1247 if (unlikely(!skb))
1248 break;
1249
1250 atomic_inc(&ar->tx_total_pending);
1251
1252 q = __carl9170_get_queue(ar, i);
1253
1254
1255
1256
1257 skb_queue_tail(&ar->tx_status[q], skb);
1258
1259 carl9170_usb_tx(ar, skb);
1260 schedule_garbagecollector = true;
1261 }
1262 }
1263
1264 if (!schedule_garbagecollector)
1265 return;
1266
1267 ieee80211_queue_delayed_work(ar->hw, &ar->tx_janitor,
1268 msecs_to_jiffies(CARL9170_TX_TIMEOUT));
1269}
1270
1271static bool carl9170_tx_ampdu_queue(struct ar9170 *ar,
1272 struct ieee80211_sta *sta, struct sk_buff *skb)
1273{
1274 struct _carl9170_tx_superframe *super = (void *) skb->data;
1275 struct carl9170_sta_info *sta_info;
1276 struct carl9170_sta_tid *agg;
1277 struct sk_buff *iter;
1278 unsigned int max;
1279 u16 tid, seq, qseq, off;
1280 bool run = false;
1281
1282 tid = carl9170_get_tid(skb);
1283 seq = carl9170_get_seq(skb);
1284 sta_info = (void *) sta->drv_priv;
1285
1286 rcu_read_lock();
1287 agg = rcu_dereference(sta_info->agg[tid]);
1288 max = sta_info->ampdu_max_len;
1289
1290 if (!agg)
1291 goto err_unlock_rcu;
1292
1293 spin_lock_bh(&agg->lock);
1294 if (unlikely(agg->state < CARL9170_TID_STATE_IDLE))
1295 goto err_unlock;
1296
1297
1298 if (unlikely(!BAW_WITHIN(agg->bsn, CARL9170_BAW_BITS, seq)))
1299 goto err_unlock;
1300
1301 if (WARN_ON_ONCE(!BAW_WITHIN(agg->snx, CARL9170_BAW_BITS, seq)))
1302 goto err_unlock;
1303
1304 off = SEQ_DIFF(seq, agg->bsn);
1305 if (WARN_ON_ONCE(test_and_set_bit(off, agg->bitmap)))
1306 goto err_unlock;
1307
1308 if (likely(BAW_WITHIN(agg->hsn, CARL9170_BAW_BITS, seq))) {
1309 __skb_queue_tail(&agg->queue, skb);
1310 agg->hsn = seq;
1311 goto queued;
1312 }
1313
1314 skb_queue_reverse_walk(&agg->queue, iter) {
1315 qseq = carl9170_get_seq(iter);
1316
1317 if (BAW_WITHIN(qseq, CARL9170_BAW_BITS, seq)) {
1318 __skb_queue_after(&agg->queue, iter, skb);
1319 goto queued;
1320 }
1321 }
1322
1323 __skb_queue_head(&agg->queue, skb);
1324queued:
1325
1326 if (unlikely(agg->state != CARL9170_TID_STATE_XMIT)) {
1327 if (agg->snx == carl9170_get_seq(skb_peek(&agg->queue))) {
1328 agg->state = CARL9170_TID_STATE_XMIT;
1329 run = true;
1330 }
1331 }
1332
1333 spin_unlock_bh(&agg->lock);
1334 rcu_read_unlock();
1335
1336 return run;
1337
1338err_unlock:
1339 spin_unlock_bh(&agg->lock);
1340
1341err_unlock_rcu:
1342 rcu_read_unlock();
1343 super->f.mac_control &= ~cpu_to_le16(AR9170_TX_MAC_AGGR);
1344 carl9170_tx_status(ar, skb, false);
1345 ar->tx_dropped++;
1346 return false;
1347}
1348
1349void carl9170_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1350{
1351 struct ar9170 *ar = hw->priv;
1352 struct ieee80211_tx_info *info;
1353 struct ieee80211_sta *sta;
1354 bool run;
1355
1356 if (unlikely(!IS_STARTED(ar)))
1357 goto err_free;
1358
1359 info = IEEE80211_SKB_CB(skb);
1360 sta = info->control.sta;
1361
1362 if (unlikely(carl9170_tx_prepare(ar, skb)))
1363 goto err_free;
1364
1365 carl9170_tx_accounting(ar, skb);
1366
1367
1368
1369
1370
1371 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
1372 run = carl9170_tx_ampdu_queue(ar, sta, skb);
1373 if (run)
1374 carl9170_tx_ampdu(ar);
1375
1376 } else {
1377 unsigned int queue = skb_get_queue_mapping(skb);
1378
1379 skb_queue_tail(&ar->tx_pending[queue], skb);
1380 }
1381
1382 carl9170_tx(ar);
1383 return;
1384
1385err_free:
1386 ar->tx_dropped++;
1387 dev_kfree_skb_any(skb);
1388}
1389
1390void carl9170_tx_scheduler(struct ar9170 *ar)
1391{
1392
1393 if (ar->tx_ampdu_schedule)
1394 carl9170_tx_ampdu(ar);
1395
1396 if (ar->tx_schedule)
1397 carl9170_tx(ar);
1398}
1399