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45#ifdef __linux__
46#include "aic7xxx_osm.h"
47#include "aic7xxx_inline.h"
48#include "aic7xxx_93cx6.h"
49#else
50#include <dev/aic7xxx/aic7xxx_osm.h>
51#include <dev/aic7xxx/aic7xxx_inline.h>
52#include <dev/aic7xxx/aic7xxx_93cx6.h>
53#endif
54
55#define ID_AIC7770 0x04907770
56#define ID_AHA_274x 0x04907771
57#define ID_AHA_284xB 0x04907756
58#define ID_AHA_284x 0x04907757
59#define ID_OLV_274x 0x04907782
60#define ID_OLV_274xD 0x04907783
61
62static int aic7770_chip_init(struct ahc_softc *ahc);
63static int aha2840_load_seeprom(struct ahc_softc *ahc);
64static ahc_device_setup_t ahc_aic7770_VL_setup;
65static ahc_device_setup_t ahc_aic7770_EISA_setup;
66static ahc_device_setup_t ahc_aic7770_setup;
67
68struct aic7770_identity aic7770_ident_table[] =
69{
70 {
71 ID_AHA_274x,
72 0xFFFFFFFF,
73 "Adaptec 274X SCSI adapter",
74 ahc_aic7770_EISA_setup
75 },
76 {
77 ID_AHA_284xB,
78 0xFFFFFFFE,
79 "Adaptec 284X SCSI adapter",
80 ahc_aic7770_VL_setup
81 },
82 {
83 ID_AHA_284x,
84 0xFFFFFFFE,
85 "Adaptec 284X SCSI adapter (BIOS Disabled)",
86 ahc_aic7770_VL_setup
87 },
88 {
89 ID_OLV_274x,
90 0xFFFFFFFF,
91 "Adaptec (Olivetti OEM) 274X SCSI adapter",
92 ahc_aic7770_EISA_setup
93 },
94 {
95 ID_OLV_274xD,
96 0xFFFFFFFF,
97 "Adaptec (Olivetti OEM) 274X Differential SCSI adapter",
98 ahc_aic7770_EISA_setup
99 },
100
101 {
102 ID_AIC7770,
103 0xFFFFFFFF,
104 "Adaptec aic7770 SCSI adapter",
105 ahc_aic7770_EISA_setup
106 }
107};
108const int ahc_num_aic7770_devs = ARRAY_SIZE(aic7770_ident_table);
109
110struct aic7770_identity *
111aic7770_find_device(uint32_t id)
112{
113 struct aic7770_identity *entry;
114 int i;
115
116 for (i = 0; i < ahc_num_aic7770_devs; i++) {
117 entry = &aic7770_ident_table[i];
118 if (entry->full_id == (id & entry->id_mask))
119 return (entry);
120 }
121 return (NULL);
122}
123
124int
125aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io)
126{
127 int error;
128 int have_seeprom;
129 u_int hostconf;
130 u_int irq;
131 u_int intdef;
132
133 error = entry->setup(ahc);
134 have_seeprom = 0;
135 if (error != 0)
136 return (error);
137
138 error = aic7770_map_registers(ahc, io);
139 if (error != 0)
140 return (error);
141
142
143
144
145
146
147
148 ahc_intr_enable(ahc, FALSE);
149
150 ahc->description = entry->name;
151 error = ahc_softc_init(ahc);
152 if (error != 0)
153 return (error);
154
155 ahc->bus_chip_init = aic7770_chip_init;
156
157 error = ahc_reset(ahc, FALSE);
158 if (error != 0)
159 return (error);
160
161
162 intdef = ahc_inb(ahc, INTDEF);
163 irq = intdef & VECTOR;
164 switch (irq) {
165 case 9:
166 case 10:
167 case 11:
168 case 12:
169 case 14:
170 case 15:
171 break;
172 default:
173 printk("aic7770_config: invalid irq setting %d\n", intdef);
174 return (ENXIO);
175 }
176
177 if ((intdef & EDGE_TRIG) != 0)
178 ahc->flags |= AHC_EDGE_INTERRUPT;
179
180 switch (ahc->chip & (AHC_EISA|AHC_VL)) {
181 case AHC_EISA:
182 {
183 u_int biosctrl;
184 u_int scsiconf;
185 u_int scsiconf1;
186
187 biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
188 scsiconf = ahc_inb(ahc, SCSICONF);
189 scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
190
191
192 if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
193 ahc->flags |= 1;
194
195 if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
196 ahc->flags |= AHC_USEDEFAULTS;
197 } else {
198 if ((ahc->features & AHC_WIDE) != 0) {
199 ahc->our_id = scsiconf1 & HWSCSIID;
200 if (scsiconf & TERM_ENB)
201 ahc->flags |= AHC_TERM_ENB_A;
202 } else {
203 ahc->our_id = scsiconf & HSCSIID;
204 ahc->our_id_b = scsiconf1 & HSCSIID;
205 if (scsiconf & TERM_ENB)
206 ahc->flags |= AHC_TERM_ENB_A;
207 if (scsiconf1 & TERM_ENB)
208 ahc->flags |= AHC_TERM_ENB_B;
209 }
210 }
211 if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS))
212 ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
213 break;
214 }
215 case AHC_VL:
216 {
217 have_seeprom = aha2840_load_seeprom(ahc);
218 break;
219 }
220 default:
221 break;
222 }
223 if (have_seeprom == 0) {
224 kfree(ahc->seep_config);
225 ahc->seep_config = NULL;
226 }
227
228
229
230
231 ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
232
233
234 hostconf = ahc_inb(ahc, HOSTCONF);
235 ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
236 ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
237
238 ahc->bus_softc.aic7770_softc.busspd = hostconf & DFTHRSH;
239 ahc->bus_softc.aic7770_softc.bustime = (hostconf << 2) & BOFF;
240
241
242
243
244 error = ahc_init(ahc);
245 if (error != 0)
246 return (error);
247
248 error = aic7770_map_int(ahc, irq);
249 if (error != 0)
250 return (error);
251
252 ahc->init_level++;
253
254
255
256
257 ahc_outb(ahc, BCTL, ENABLE);
258 return (0);
259}
260
261static int
262aic7770_chip_init(struct ahc_softc *ahc)
263{
264 ahc_outb(ahc, BUSSPD, ahc->bus_softc.aic7770_softc.busspd);
265 ahc_outb(ahc, BUSTIME, ahc->bus_softc.aic7770_softc.bustime);
266 ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
267 ahc_outb(ahc, BCTL, ENABLE);
268 return (ahc_chip_init(ahc));
269}
270
271
272
273
274static int
275aha2840_load_seeprom(struct ahc_softc *ahc)
276{
277 struct seeprom_descriptor sd;
278 struct seeprom_config *sc;
279 int have_seeprom;
280 uint8_t scsi_conf;
281
282 sd.sd_ahc = ahc;
283 sd.sd_control_offset = SEECTL_2840;
284 sd.sd_status_offset = STATUS_2840;
285 sd.sd_dataout_offset = STATUS_2840;
286 sd.sd_chip = C46;
287 sd.sd_MS = 0;
288 sd.sd_RDY = EEPROM_TF;
289 sd.sd_CS = CS_2840;
290 sd.sd_CK = CK_2840;
291 sd.sd_DO = DO_2840;
292 sd.sd_DI = DI_2840;
293 sc = ahc->seep_config;
294
295 if (bootverbose)
296 printk("%s: Reading SEEPROM...", ahc_name(ahc));
297 have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)sc,
298 0, sizeof(*sc)/2);
299
300 if (have_seeprom) {
301
302 if (ahc_verify_cksum(sc) == 0) {
303 if(bootverbose)
304 printk ("checksum error\n");
305 have_seeprom = 0;
306 } else if (bootverbose) {
307 printk("done.\n");
308 }
309 }
310
311 if (!have_seeprom) {
312 if (bootverbose)
313 printk("%s: No SEEPROM available\n", ahc_name(ahc));
314 ahc->flags |= AHC_USEDEFAULTS;
315 } else {
316
317
318
319
320 int i;
321 int max_targ;
322 uint16_t discenable;
323
324 max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
325 discenable = 0;
326 for (i = 0; i < max_targ; i++){
327 uint8_t target_settings;
328
329 target_settings = (sc->device_flags[i] & CFXFER) << 4;
330 if (sc->device_flags[i] & CFSYNCH)
331 target_settings |= SOFS;
332 if (sc->device_flags[i] & CFWIDEB)
333 target_settings |= WIDEXFER;
334 if (sc->device_flags[i] & CFDISC)
335 discenable |= (0x01 << i);
336 ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
337 }
338 ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
339 ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
340
341 ahc->our_id = sc->brtime_id & CFSCSIID;
342
343 scsi_conf = (ahc->our_id & 0x7);
344 if (sc->adapter_control & CFSPARITY)
345 scsi_conf |= ENSPCHK;
346 if (sc->adapter_control & CFRESETB)
347 scsi_conf |= RESET_SCSI;
348
349 if (sc->bios_control & CF284XEXTEND)
350 ahc->flags |= AHC_EXTENDED_TRANS_A;
351
352 ahc_outb(ahc, SCSICONF, scsi_conf);
353
354 if (sc->adapter_control & CF284XSTERM)
355 ahc->flags |= AHC_TERM_ENB_A;
356 }
357 return (have_seeprom);
358}
359
360static int
361ahc_aic7770_VL_setup(struct ahc_softc *ahc)
362{
363 int error;
364
365 error = ahc_aic7770_setup(ahc);
366 ahc->chip |= AHC_VL;
367 return (error);
368}
369
370static int
371ahc_aic7770_EISA_setup(struct ahc_softc *ahc)
372{
373 int error;
374
375 error = ahc_aic7770_setup(ahc);
376 ahc->chip |= AHC_EISA;
377 return (error);
378}
379
380static int
381ahc_aic7770_setup(struct ahc_softc *ahc)
382{
383 ahc->channel = 'A';
384 ahc->channel_b = 'B';
385 ahc->chip = AHC_AIC7770;
386 ahc->features = AHC_AIC7770_FE;
387 ahc->bugs |= AHC_TMODE_WIDEODD_BUG;
388 ahc->flags |= AHC_PAGESCBS;
389 ahc->instruction_ram_size = 448;
390 return (0);
391}
392
