1// ------------------------------------------------------------------ 2// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. 3// 4// 5// Permission to use, copy, modify, and/or distribute this software for any 6// purpose with or without fee is hereby granted, provided that the above 7// copyright notice and this permission notice appear in all copies. 8// 9// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16// 17// 18// ------------------------------------------------------------------ 19//=================================================================== 20// Author(s): ="Atheros" 21//=================================================================== 22 23 24#ifndef _RTC_WLAN_REG_REG_H_ 25#define _RTC_WLAN_REG_REG_H_ 26 27#define WLAN_RESET_CONTROL_ADDRESS 0x00000000 28#define WLAN_RESET_CONTROL_OFFSET 0x00000000 29#define WLAN_RESET_CONTROL_DEBUG_UART_RST_MSB 14 30#define WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB 14 31#define WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK 0x00004000 32#define WLAN_RESET_CONTROL_DEBUG_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK) >> WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB) 33#define WLAN_RESET_CONTROL_DEBUG_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_DEBUG_UART_RST_LSB) & WLAN_RESET_CONTROL_DEBUG_UART_RST_MASK) 34#define WLAN_RESET_CONTROL_BB_COLD_RST_MSB 13 35#define WLAN_RESET_CONTROL_BB_COLD_RST_LSB 13 36#define WLAN_RESET_CONTROL_BB_COLD_RST_MASK 0x00002000 37#define WLAN_RESET_CONTROL_BB_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_COLD_RST_MASK) >> WLAN_RESET_CONTROL_BB_COLD_RST_LSB) 38#define WLAN_RESET_CONTROL_BB_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_COLD_RST_LSB) & WLAN_RESET_CONTROL_BB_COLD_RST_MASK) 39#define WLAN_RESET_CONTROL_BB_WARM_RST_MSB 12 40#define WLAN_RESET_CONTROL_BB_WARM_RST_LSB 12 41#define WLAN_RESET_CONTROL_BB_WARM_RST_MASK 0x00001000 42#define WLAN_RESET_CONTROL_BB_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_BB_WARM_RST_MASK) >> WLAN_RESET_CONTROL_BB_WARM_RST_LSB) 43#define WLAN_RESET_CONTROL_BB_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_BB_WARM_RST_LSB) & WLAN_RESET_CONTROL_BB_WARM_RST_MASK) 44#define WLAN_RESET_CONTROL_CPU_INIT_RESET_MSB 11 45#define WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB 11 46#define WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK 0x00000800 47#define WLAN_RESET_CONTROL_CPU_INIT_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK) >> WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB) 48#define WLAN_RESET_CONTROL_CPU_INIT_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_CPU_INIT_RESET_LSB) & WLAN_RESET_CONTROL_CPU_INIT_RESET_MASK) 49#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MSB 10 50#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB 10 51#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK 0x00000400 52#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_GET(x) (((x) & WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK) >> WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB) 53#define WLAN_RESET_CONTROL_VMC_REMAP_RESET_SET(x) (((x) << WLAN_RESET_CONTROL_VMC_REMAP_RESET_LSB) & WLAN_RESET_CONTROL_VMC_REMAP_RESET_MASK) 54#define WLAN_RESET_CONTROL_RST_OUT_MSB 9 55#define WLAN_RESET_CONTROL_RST_OUT_LSB 9 56#define WLAN_RESET_CONTROL_RST_OUT_MASK 0x00000200 57#define WLAN_RESET_CONTROL_RST_OUT_GET(x) (((x) & WLAN_RESET_CONTROL_RST_OUT_MASK) >> WLAN_RESET_CONTROL_RST_OUT_LSB) 58#define WLAN_RESET_CONTROL_RST_OUT_SET(x) (((x) << WLAN_RESET_CONTROL_RST_OUT_LSB) & WLAN_RESET_CONTROL_RST_OUT_MASK) 59#define WLAN_RESET_CONTROL_COLD_RST_MSB 8 60#define WLAN_RESET_CONTROL_COLD_RST_LSB 8 61#define WLAN_RESET_CONTROL_COLD_RST_MASK 0x00000100 62#define WLAN_RESET_CONTROL_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_COLD_RST_MASK) >> WLAN_RESET_CONTROL_COLD_RST_LSB) 63#define WLAN_RESET_CONTROL_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_COLD_RST_LSB) & WLAN_RESET_CONTROL_COLD_RST_MASK) 64#define WLAN_RESET_CONTROL_WARM_RST_MSB 7 65#define WLAN_RESET_CONTROL_WARM_RST_LSB 7 66#define WLAN_RESET_CONTROL_WARM_RST_MASK 0x00000080 67#define WLAN_RESET_CONTROL_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_WARM_RST_MASK) >> WLAN_RESET_CONTROL_WARM_RST_LSB) 68#define WLAN_RESET_CONTROL_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_WARM_RST_LSB) & WLAN_RESET_CONTROL_WARM_RST_MASK) 69#define WLAN_RESET_CONTROL_CPU_WARM_RST_MSB 6 70#define WLAN_RESET_CONTROL_CPU_WARM_RST_LSB 6 71#define WLAN_RESET_CONTROL_CPU_WARM_RST_MASK 0x00000040 72#define WLAN_RESET_CONTROL_CPU_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_CPU_WARM_RST_MASK) >> WLAN_RESET_CONTROL_CPU_WARM_RST_LSB) 73#define WLAN_RESET_CONTROL_CPU_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_CPU_WARM_RST_LSB) & WLAN_RESET_CONTROL_CPU_WARM_RST_MASK) 74#define WLAN_RESET_CONTROL_MAC_COLD_RST_MSB 5 75#define WLAN_RESET_CONTROL_MAC_COLD_RST_LSB 5 76#define WLAN_RESET_CONTROL_MAC_COLD_RST_MASK 0x00000020 77#define WLAN_RESET_CONTROL_MAC_COLD_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_COLD_RST_MASK) >> WLAN_RESET_CONTROL_MAC_COLD_RST_LSB) 78#define WLAN_RESET_CONTROL_MAC_COLD_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC_COLD_RST_LSB) & WLAN_RESET_CONTROL_MAC_COLD_RST_MASK) 79#define WLAN_RESET_CONTROL_MAC_WARM_RST_MSB 4 80#define WLAN_RESET_CONTROL_MAC_WARM_RST_LSB 4 81#define WLAN_RESET_CONTROL_MAC_WARM_RST_MASK 0x00000010 82#define WLAN_RESET_CONTROL_MAC_WARM_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MAC_WARM_RST_MASK) >> WLAN_RESET_CONTROL_MAC_WARM_RST_LSB) 83#define WLAN_RESET_CONTROL_MAC_WARM_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MAC_WARM_RST_LSB) & WLAN_RESET_CONTROL_MAC_WARM_RST_MASK) 84#define WLAN_RESET_CONTROL_MBOX_RST_MSB 2 85#define WLAN_RESET_CONTROL_MBOX_RST_LSB 2 86#define WLAN_RESET_CONTROL_MBOX_RST_MASK 0x00000004 87#define WLAN_RESET_CONTROL_MBOX_RST_GET(x) (((x) & WLAN_RESET_CONTROL_MBOX_RST_MASK) >> WLAN_RESET_CONTROL_MBOX_RST_LSB) 88#define WLAN_RESET_CONTROL_MBOX_RST_SET(x) (((x) << WLAN_RESET_CONTROL_MBOX_RST_LSB) & WLAN_RESET_CONTROL_MBOX_RST_MASK) 89#define WLAN_RESET_CONTROL_UART_RST_MSB 1 90#define WLAN_RESET_CONTROL_UART_RST_LSB 1 91#define WLAN_RESET_CONTROL_UART_RST_MASK 0x00000002 92#define WLAN_RESET_CONTROL_UART_RST_GET(x) (((x) & WLAN_RESET_CONTROL_UART_RST_MASK) >> WLAN_RESET_CONTROL_UART_RST_LSB) 93#define WLAN_RESET_CONTROL_UART_RST_SET(x) (((x) << WLAN_RESET_CONTROL_UART_RST_LSB) & WLAN_RESET_CONTROL_UART_RST_MASK) 94#define WLAN_RESET_CONTROL_SI0_RST_MSB 0 95#define WLAN_RESET_CONTROL_SI0_RST_LSB 0 96#define WLAN_RESET_CONTROL_SI0_RST_MASK 0x00000001 97#define WLAN_RESET_CONTROL_SI0_RST_GET(x) (((x) & WLAN_RESET_CONTROL_SI0_RST_MASK) >> WLAN_RESET_CONTROL_SI0_RST_LSB) 98#define WLAN_RESET_CONTROL_SI0_RST_SET(x) (((x) << WLAN_RESET_CONTROL_SI0_RST_LSB) & WLAN_RESET_CONTROL_SI0_RST_MASK) 99 100#define WLAN_XTAL_CONTROL_ADDRESS 0x00000004 101#define WLAN_XTAL_CONTROL_OFFSET 0x00000004 102#define WLAN_XTAL_CONTROL_TCXO_MSB 0 103#define WLAN_XTAL_CONTROL_TCXO_LSB 0 104#define WLAN_XTAL_CONTROL_TCXO_MASK 0x00000001 105#define WLAN_XTAL_CONTROL_TCXO_GET(x) (((x) & WLAN_XTAL_CONTROL_TCXO_MASK) >> WLAN_XTAL_CONTROL_TCXO_LSB) 106#define WLAN_XTAL_CONTROL_TCXO_SET(x) (((x) << WLAN_XTAL_CONTROL_TCXO_LSB) & WLAN_XTAL_CONTROL_TCXO_MASK) 107 108#define WLAN_TCXO_DETECT_ADDRESS 0x00000008 109#define WLAN_TCXO_DETECT_OFFSET 0x00000008 110#define WLAN_TCXO_DETECT_PRESENT_MSB 0 111#define WLAN_TCXO_DETECT_PRESENT_LSB 0 112#define WLAN_TCXO_DETECT_PRESENT_MASK 0x00000001 113#define WLAN_TCXO_DETECT_PRESENT_GET(x) (((x) & WLAN_TCXO_DETECT_PRESENT_MASK) >> WLAN_TCXO_DETECT_PRESENT_LSB) 114#define WLAN_TCXO_DETECT_PRESENT_SET(x) (((x) << WLAN_TCXO_DETECT_PRESENT_LSB) & WLAN_TCXO_DETECT_PRESENT_MASK) 115 116#define WLAN_XTAL_TEST_ADDRESS 0x0000000c 117#define WLAN_XTAL_TEST_OFFSET 0x0000000c 118#define WLAN_XTAL_TEST_NOTCXODET_MSB 0 119#define WLAN_XTAL_TEST_NOTCXODET_LSB 0 120#define WLAN_XTAL_TEST_NOTCXODET_MASK 0x00000001 121#define WLAN_XTAL_TEST_NOTCXODET_GET(x) (((x) & WLAN_XTAL_TEST_NOTCXODET_MASK) >> WLAN_XTAL_TEST_NOTCXODET_LSB) 122#define WLAN_XTAL_TEST_NOTCXODET_SET(x) (((x) << WLAN_XTAL_TEST_NOTCXODET_LSB) & WLAN_XTAL_TEST_NOTCXODET_MASK) 123 124#define WLAN_QUADRATURE_ADDRESS 0x00000010 125#define WLAN_QUADRATURE_OFFSET 0x00000010 126#define WLAN_QUADRATURE_ADC_MSB 7 127#define WLAN_QUADRATURE_ADC_LSB 4 128#define WLAN_QUADRATURE_ADC_MASK 0x000000f0 129#define WLAN_QUADRATURE_ADC_GET(x) (((x) & WLAN_QUADRATURE_ADC_MASK) >> WLAN_QUADRATURE_ADC_LSB) 130#define WLAN_QUADRATURE_ADC_SET(x) (((x) << WLAN_QUADRATURE_ADC_LSB) & WLAN_QUADRATURE_ADC_MASK) 131#define WLAN_QUADRATURE_SEL_MSB 2 132#define WLAN_QUADRATURE_SEL_LSB 2 133#define WLAN_QUADRATURE_SEL_MASK 0x00000004 134#define WLAN_QUADRATURE_SEL_GET(x) (((x) & WLAN_QUADRATURE_SEL_MASK) >> WLAN_QUADRATURE_SEL_LSB) 135#define WLAN_QUADRATURE_SEL_SET(x) (((x) << WLAN_QUADRATURE_SEL_LSB) & WLAN_QUADRATURE_SEL_MASK) 136#define WLAN_QUADRATURE_DAC_MSB 1 137#define WLAN_QUADRATURE_DAC_LSB 0 138#define WLAN_QUADRATURE_DAC_MASK 0x00000003 139#define WLAN_QUADRATURE_DAC_GET(x) (((x) & WLAN_QUADRATURE_DAC_MASK) >> WLAN_QUADRATURE_DAC_LSB) 140#define WLAN_QUADRATURE_DAC_SET(x) (((x) << WLAN_QUADRATURE_DAC_LSB) & WLAN_QUADRATURE_DAC_MASK) 141 142#define WLAN_PLL_CONTROL_ADDRESS 0x00000014 143#define WLAN_PLL_CONTROL_OFFSET 0x00000014 144#define WLAN_PLL_CONTROL_DIG_TEST_CLK_MSB 20 145#define WLAN_PLL_CONTROL_DIG_TEST_CLK_LSB 20 146#define WLAN_PLL_CONTROL_DIG_TEST_CLK_MASK 0x00100000 147#define WLAN_PLL_CONTROL_DIG_TEST_CLK_GET(x) (((x) & WLAN_PLL_CONTROL_DIG_TEST_CLK_MASK) >> WLAN_PLL_CONTROL_DIG_TEST_CLK_LSB) 148#define WLAN_PLL_CONTROL_DIG_TEST_CLK_SET(x) (((x) << WLAN_PLL_CONTROL_DIG_TEST_CLK_LSB) & WLAN_PLL_CONTROL_DIG_TEST_CLK_MASK) 149#define WLAN_PLL_CONTROL_MAC_OVERRIDE_MSB 19 150#define WLAN_PLL_CONTROL_MAC_OVERRIDE_LSB 19 151#define WLAN_PLL_CONTROL_MAC_OVERRIDE_MASK 0x00080000 152#define WLAN_PLL_CONTROL_MAC_OVERRIDE_GET(x) (((x) & WLAN_PLL_CONTROL_MAC_OVERRIDE_MASK) >> WLAN_PLL_CONTROL_MAC_OVERRIDE_LSB) 153#define WLAN_PLL_CONTROL_MAC_OVERRIDE_SET(x) (((x) << WLAN_PLL_CONTROL_MAC_OVERRIDE_LSB) & WLAN_PLL_CONTROL_MAC_OVERRIDE_MASK) 154#define WLAN_PLL_CONTROL_NOPWD_MSB 18 155#define WLAN_PLL_CONTROL_NOPWD_LSB 18 156#define WLAN_PLL_CONTROL_NOPWD_MASK 0x00040000 157#define WLAN_PLL_CONTROL_NOPWD_GET(x) (((x) & WLAN_PLL_CONTROL_NOPWD_MASK) >> WLAN_PLL_CONTROL_NOPWD_LSB) 158#define WLAN_PLL_CONTROL_NOPWD_SET(x) (((x) << WLAN_PLL_CONTROL_NOPWD_LSB) & WLAN_PLL_CONTROL_NOPWD_MASK) 159#define WLAN_PLL_CONTROL_UPDATING_MSB 17 160#define WLAN_PLL_CONTROL_UPDATING_LSB 17 161#define WLAN_PLL_CONTROL_UPDATING_MASK 0x00020000 162#define WLAN_PLL_CONTROL_UPDATING_GET(x) (((x) & WLAN_PLL_CONTROL_UPDATING_MASK) >> WLAN_PLL_CONTROL_UPDATING_LSB) 163#define WLAN_PLL_CONTROL_UPDATING_SET(x) (((x) << WLAN_PLL_CONTROL_UPDATING_LSB) & WLAN_PLL_CONTROL_UPDATING_MASK) 164#define WLAN_PLL_CONTROL_BYPASS_MSB 16 165#define WLAN_PLL_CONTROL_BYPASS_LSB 16 166#define WLAN_PLL_CONTROL_BYPASS_MASK 0x00010000 167#define WLAN_PLL_CONTROL_BYPASS_GET(x) (((x) & WLAN_PLL_CONTROL_BYPASS_MASK) >> WLAN_PLL_CONTROL_BYPASS_LSB) 168#define WLAN_PLL_CONTROL_BYPASS_SET(x) (((x) << WLAN_PLL_CONTROL_BYPASS_LSB) & WLAN_PLL_CONTROL_BYPASS_MASK) 169#define WLAN_PLL_CONTROL_REFDIV_MSB 15 170#define WLAN_PLL_CONTROL_REFDIV_LSB 12 171#define WLAN_PLL_CONTROL_REFDIV_MASK 0x0000f000 172#define WLAN_PLL_CONTROL_REFDIV_GET(x) (((x) & WLAN_PLL_CONTROL_REFDIV_MASK) >> WLAN_PLL_CONTROL_REFDIV_LSB) 173#define WLAN_PLL_CONTROL_REFDIV_SET(x) (((x) << WLAN_PLL_CONTROL_REFDIV_LSB) & WLAN_PLL_CONTROL_REFDIV_MASK) 174#define WLAN_PLL_CONTROL_DIV_MSB 9 175#define WLAN_PLL_CONTROL_DIV_LSB 0 176#define WLAN_PLL_CONTROL_DIV_MASK 0x000003ff 177#define WLAN_PLL_CONTROL_DIV_GET(x) (((x) & WLAN_PLL_CONTROL_DIV_MASK) >> WLAN_PLL_CONTROL_DIV_LSB) 178#define WLAN_PLL_CONTROL_DIV_SET(x) (((x) << WLAN_PLL_CONTROL_DIV_LSB) & WLAN_PLL_CONTROL_DIV_MASK) 179 180#define WLAN_PLL_SETTLE_ADDRESS 0x00000018 181#define WLAN_PLL_SETTLE_OFFSET 0x00000018 182#define WLAN_PLL_SETTLE_TIME_MSB 11 183#define WLAN_PLL_SETTLE_TIME_LSB 0 184#define WLAN_PLL_SETTLE_TIME_MASK 0x00000fff 185#define WLAN_PLL_SETTLE_TIME_GET(x) (((x) & WLAN_PLL_SETTLE_TIME_MASK) >> WLAN_PLL_SETTLE_TIME_LSB) 186#define WLAN_PLL_SETTLE_TIME_SET(x) (((x) << WLAN_PLL_SETTLE_TIME_LSB) & WLAN_PLL_SETTLE_TIME_MASK) 187 188#define WLAN_XTAL_SETTLE_ADDRESS 0x0000001c 189#define WLAN_XTAL_SETTLE_OFFSET 0x0000001c 190#define WLAN_XTAL_SETTLE_TIME_MSB 7 191#define WLAN_XTAL_SETTLE_TIME_LSB 0 192#define WLAN_XTAL_SETTLE_TIME_MASK 0x000000ff 193#define WLAN_XTAL_SETTLE_TIME_GET(x) (((x) & WLAN_XTAL_SETTLE_TIME_MASK) >> WLAN_XTAL_SETTLE_TIME_LSB) 194#define WLAN_XTAL_SETTLE_TIME_SET(x) (((x) << WLAN_XTAL_SETTLE_TIME_LSB) & WLAN_XTAL_SETTLE_TIME_MASK) 195 196#define WLAN_CPU_CLOCK_ADDRESS 0x00000020 197#define WLAN_CPU_CLOCK_OFFSET 0x00000020 198#define WLAN_CPU_CLOCK_STANDARD_MSB 1 199#define WLAN_CPU_CLOCK_STANDARD_LSB 0 200#define WLAN_CPU_CLOCK_STANDARD_MASK 0x00000003 201#define WLAN_CPU_CLOCK_STANDARD_GET(x) (((x) & WLAN_CPU_CLOCK_STANDARD_MASK) >> WLAN_CPU_CLOCK_STANDARD_LSB) 202#define WLAN_CPU_CLOCK_STANDARD_SET(x) (((x) << WLAN_CPU_CLOCK_STANDARD_LSB) & WLAN_CPU_CLOCK_STANDARD_MASK) 203 204#define WLAN_CLOCK_OUT_ADDRESS 0x00000024 205#define WLAN_CLOCK_OUT_OFFSET 0x00000024 206#define WLAN_CLOCK_OUT_SELECT_MSB 3 207#define WLAN_CLOCK_OUT_SELECT_LSB 0 208#define WLAN_CLOCK_OUT_SELECT_MASK 0x0000000f 209#define WLAN_CLOCK_OUT_SELECT_GET(x) (((x) & WLAN_CLOCK_OUT_SELECT_MASK) >> WLAN_CLOCK_OUT_SELECT_LSB) 210#define WLAN_CLOCK_OUT_SELECT_SET(x) (((x) << WLAN_CLOCK_OUT_SELECT_LSB) & WLAN_CLOCK_OUT_SELECT_MASK) 211 212#define WLAN_CLOCK_CONTROL_ADDRESS 0x00000028 213#define WLAN_CLOCK_CONTROL_OFFSET 0x00000028 214#define WLAN_CLOCK_CONTROL_LF_CLK32_MSB 2 215#define WLAN_CLOCK_CONTROL_LF_CLK32_LSB 2 216#define WLAN_CLOCK_CONTROL_LF_CLK32_MASK 0x00000004 217#define WLAN_CLOCK_CONTROL_LF_CLK32_GET(x) (((x) & WLAN_CLOCK_CONTROL_LF_CLK32_MASK) >> WLAN_CLOCK_CONTROL_LF_CLK32_LSB) 218#define WLAN_CLOCK_CONTROL_LF_CLK32_SET(x) (((x) << WLAN_CLOCK_CONTROL_LF_CLK32_LSB) & WLAN_CLOCK_CONTROL_LF_CLK32_MASK) 219#define WLAN_CLOCK_CONTROL_SI0_CLK_MSB 0 220#define WLAN_CLOCK_CONTROL_SI0_CLK_LSB 0 221#define WLAN_CLOCK_CONTROL_SI0_CLK_MASK 0x00000001 222#define WLAN_CLOCK_CONTROL_SI0_CLK_GET(x) (((x) & WLAN_CLOCK_CONTROL_SI0_CLK_MASK) >> WLAN_CLOCK_CONTROL_SI0_CLK_LSB) 223#define WLAN_CLOCK_CONTROL_SI0_CLK_SET(x) (((x) << WLAN_CLOCK_CONTROL_SI0_CLK_LSB) & WLAN_CLOCK_CONTROL_SI0_CLK_MASK) 224 225#define WLAN_BIAS_OVERRIDE_ADDRESS 0x0000002c 226#define WLAN_BIAS_OVERRIDE_OFFSET 0x0000002c 227#define WLAN_BIAS_OVERRIDE_ON_MSB 0 228#define WLAN_BIAS_OVERRIDE_ON_LSB 0 229#define WLAN_BIAS_OVERRIDE_ON_MASK 0x00000001 230#define WLAN_BIAS_OVERRIDE_ON_GET(x) (((x) & WLAN_BIAS_OVERRIDE_ON_MASK) >> WLAN_BIAS_OVERRIDE_ON_LSB) 231#define WLAN_BIAS_OVERRIDE_ON_SET(x) (((x) << WLAN_BIAS_OVERRIDE_ON_LSB) & WLAN_BIAS_OVERRIDE_ON_MASK) 232 233#define WLAN_WDT_CONTROL_ADDRESS 0x00000030 234#define WLAN_WDT_CONTROL_OFFSET 0x00000030 235#define WLAN_WDT_CONTROL_ACTION_MSB 2 236#define WLAN_WDT_CONTROL_ACTION_LSB 0 237#define WLAN_WDT_CONTROL_ACTION_MASK 0x00000007 238#define WLAN_WDT_CONTROL_ACTION_GET(x) (((x) & WLAN_WDT_CONTROL_ACTION_MASK) >> WLAN_WDT_CONTROL_ACTION_LSB) 239#define WLAN_WDT_CONTROL_ACTION_SET(x) (((x) << WLAN_WDT_CONTROL_ACTION_LSB) & WLAN_WDT_CONTROL_ACTION_MASK) 240 241#define WLAN_WDT_STATUS_ADDRESS 0x00000034 242#define WLAN_WDT_STATUS_OFFSET 0x00000034 243#define WLAN_WDT_STATUS_INTERRUPT_MSB 0 244#define WLAN_WDT_STATUS_INTERRUPT_LSB 0 245#define WLAN_WDT_STATUS_INTERRUPT_MASK 0x00000001 246#define WLAN_WDT_STATUS_INTERRUPT_GET(x) (((x) & WLAN_WDT_STATUS_INTERRUPT_MASK) >> WLAN_WDT_STATUS_INTERRUPT_LSB) 247#define WLAN_WDT_STATUS_INTERRUPT_SET(x) (((x) << WLAN_WDT_STATUS_INTERRUPT_LSB) & WLAN_WDT_STATUS_INTERRUPT_MASK) 248 249#define WLAN_WDT_ADDRESS 0x00000038 250#define WLAN_WDT_OFFSET 0x00000038 251#define WLAN_WDT_TARGET_MSB 21 252#define WLAN_WDT_TARGET_LSB 0 253#define WLAN_WDT_TARGET_MASK 0x003fffff 254#define WLAN_WDT_TARGET_GET(x) (((x) & WLAN_WDT_TARGET_MASK) >> WLAN_WDT_TARGET_LSB) 255#define WLAN_WDT_TARGET_SET(x) (((x) << WLAN_WDT_TARGET_LSB) & WLAN_WDT_TARGET_MASK) 256 257#define WLAN_WDT_COUNT_ADDRESS 0x0000003c 258#define WLAN_WDT_COUNT_OFFSET 0x0000003c 259#define WLAN_WDT_COUNT_VALUE_MSB 21 260#define WLAN_WDT_COUNT_VALUE_LSB 0 261#define WLAN_WDT_COUNT_VALUE_MASK 0x003fffff 262#define WLAN_WDT_COUNT_VALUE_GET(x) (((x) & WLAN_WDT_COUNT_VALUE_MASK) >> WLAN_WDT_COUNT_VALUE_LSB) 263#define WLAN_WDT_COUNT_VALUE_SET(x) (((x) << WLAN_WDT_COUNT_VALUE_LSB) & WLAN_WDT_COUNT_VALUE_MASK) 264 265#define WLAN_WDT_RESET_ADDRESS 0x00000040 266#define WLAN_WDT_RESET_OFFSET 0x00000040 267#define WLAN_WDT_RESET_VALUE_MSB 0 268#define WLAN_WDT_RESET_VALUE_LSB 0 269#define WLAN_WDT_RESET_VALUE_MASK 0x00000001 270#define WLAN_WDT_RESET_VALUE_GET(x) (((x) & WLAN_WDT_RESET_VALUE_MASK) >> WLAN_WDT_RESET_VALUE_LSB) 271#define WLAN_WDT_RESET_VALUE_SET(x) (((x) << WLAN_WDT_RESET_VALUE_LSB) & WLAN_WDT_RESET_VALUE_MASK) 272 273#define WLAN_INT_STATUS_ADDRESS 0x00000044 274#define WLAN_INT_STATUS_OFFSET 0x00000044 275#define WLAN_INT_STATUS_HCI_UART_MSB 21 276#define WLAN_INT_STATUS_HCI_UART_LSB 21 277#define WLAN_INT_STATUS_HCI_UART_MASK 0x00200000 278#define WLAN_INT_STATUS_HCI_UART_GET(x) (((x) & WLAN_INT_STATUS_HCI_UART_MASK) >> WLAN_INT_STATUS_HCI_UART_LSB) 279#define WLAN_INT_STATUS_HCI_UART_SET(x) (((x) << WLAN_INT_STATUS_HCI_UART_LSB) & WLAN_INT_STATUS_HCI_UART_MASK) 280#define WLAN_INT_STATUS_THERM_MSB 20 281#define WLAN_INT_STATUS_THERM_LSB 20 282#define WLAN_INT_STATUS_THERM_MASK 0x00100000 283#define WLAN_INT_STATUS_THERM_GET(x) (((x) & WLAN_INT_STATUS_THERM_MASK) >> WLAN_INT_STATUS_THERM_LSB) 284#define WLAN_INT_STATUS_THERM_SET(x) (((x) << WLAN_INT_STATUS_THERM_LSB) & WLAN_INT_STATUS_THERM_MASK) 285#define WLAN_INT_STATUS_EFUSE_OVERWRITE_MSB 19 286#define WLAN_INT_STATUS_EFUSE_OVERWRITE_LSB 19 287#define WLAN_INT_STATUS_EFUSE_OVERWRITE_MASK 0x00080000 288#define WLAN_INT_STATUS_EFUSE_OVERWRITE_GET(x) (((x) & WLAN_INT_STATUS_EFUSE_OVERWRITE_MASK) >> WLAN_INT_STATUS_EFUSE_OVERWRITE_LSB) 289#define WLAN_INT_STATUS_EFUSE_OVERWRITE_SET(x) (((x) << WLAN_INT_STATUS_EFUSE_OVERWRITE_LSB) & WLAN_INT_STATUS_EFUSE_OVERWRITE_MASK) 290#define WLAN_INT_STATUS_UART_MBOX_MSB 18 291#define WLAN_INT_STATUS_UART_MBOX_LSB 18 292#define WLAN_INT_STATUS_UART_MBOX_MASK 0x00040000 293#define WLAN_INT_STATUS_UART_MBOX_GET(x) (((x) & WLAN_INT_STATUS_UART_MBOX_MASK) >> WLAN_INT_STATUS_UART_MBOX_LSB) 294#define WLAN_INT_STATUS_UART_MBOX_SET(x) (((x) << WLAN_INT_STATUS_UART_MBOX_LSB) & WLAN_INT_STATUS_UART_MBOX_MASK) 295#define WLAN_INT_STATUS_GENERIC_MBOX_MSB 17 296#define WLAN_INT_STATUS_GENERIC_MBOX_LSB 17 297#define WLAN_INT_STATUS_GENERIC_MBOX_MASK 0x00020000 298#define WLAN_INT_STATUS_GENERIC_MBOX_GET(x) (((x) & WLAN_INT_STATUS_GENERIC_MBOX_MASK) >> WLAN_INT_STATUS_GENERIC_MBOX_LSB) 299#define WLAN_INT_STATUS_GENERIC_MBOX_SET(x) (((x) << WLAN_INT_STATUS_GENERIC_MBOX_LSB) & WLAN_INT_STATUS_GENERIC_MBOX_MASK) 300#define WLAN_INT_STATUS_RDMA_MSB 16 301#define WLAN_INT_STATUS_RDMA_LSB 16 302#define WLAN_INT_STATUS_RDMA_MASK 0x00010000 303#define WLAN_INT_STATUS_RDMA_GET(x) (((x) & WLAN_INT_STATUS_RDMA_MASK) >> WLAN_INT_STATUS_RDMA_LSB) 304#define WLAN_INT_STATUS_RDMA_SET(x) (((x) << WLAN_INT_STATUS_RDMA_LSB) & WLAN_INT_STATUS_RDMA_MASK) 305#define WLAN_INT_STATUS_BTCOEX_MSB 15 306#define WLAN_INT_STATUS_BTCOEX_LSB 15 307#define WLAN_INT_STATUS_BTCOEX_MASK 0x00008000 308#define WLAN_INT_STATUS_BTCOEX_GET(x) (((x) & WLAN_INT_STATUS_BTCOEX_MASK) >> WLAN_INT_STATUS_BTCOEX_LSB) 309#define WLAN_INT_STATUS_BTCOEX_SET(x) (((x) << WLAN_INT_STATUS_BTCOEX_LSB) & WLAN_INT_STATUS_BTCOEX_MASK) 310#define WLAN_INT_STATUS_RTC_POWER_MSB 14 311#define WLAN_INT_STATUS_RTC_POWER_LSB 14 312#define WLAN_INT_STATUS_RTC_POWER_MASK 0x00004000 313#define WLAN_INT_STATUS_RTC_POWER_GET(x) (((x) & WLAN_INT_STATUS_RTC_POWER_MASK) >> WLAN_INT_STATUS_RTC_POWER_LSB) 314#define WLAN_INT_STATUS_RTC_POWER_SET(x) (((x) << WLAN_INT_STATUS_RTC_POWER_LSB) & WLAN_INT_STATUS_RTC_POWER_MASK) 315#define WLAN_INT_STATUS_MAC_MSB 13 316#define WLAN_INT_STATUS_MAC_LSB 13 317#define WLAN_INT_STATUS_MAC_MASK 0x00002000 318#define WLAN_INT_STATUS_MAC_GET(x) (((x) & WLAN_INT_STATUS_MAC_MASK) >> WLAN_INT_STATUS_MAC_LSB) 319#define WLAN_INT_STATUS_MAC_SET(x) (((x) << WLAN_INT_STATUS_MAC_LSB) & WLAN_INT_STATUS_MAC_MASK) 320#define WLAN_INT_STATUS_MAILBOX_MSB 12 321#define WLAN_INT_STATUS_MAILBOX_LSB 12 322#define WLAN_INT_STATUS_MAILBOX_MASK 0x00001000 323#define WLAN_INT_STATUS_MAILBOX_GET(x) (((x) & WLAN_INT_STATUS_MAILBOX_MASK) >> WLAN_INT_STATUS_MAILBOX_LSB) 324#define WLAN_INT_STATUS_MAILBOX_SET(x) (((x) << WLAN_INT_STATUS_MAILBOX_LSB) & WLAN_INT_STATUS_MAILBOX_MASK) 325#define WLAN_INT_STATUS_RTC_ALARM_MSB 11 326#define WLAN_INT_STATUS_RTC_ALARM_LSB 11 327#define WLAN_INT_STATUS_RTC_ALARM_MASK 0x00000800 328#define WLAN_INT_STATUS_RTC_ALARM_GET(x) (((x) & WLAN_INT_STATUS_RTC_ALARM_MASK) >> WLAN_INT_STATUS_RTC_ALARM_LSB) 329#define WLAN_INT_STATUS_RTC_ALARM_SET(x) (((x) << WLAN_INT_STATUS_RTC_ALARM_LSB) & WLAN_INT_STATUS_RTC_ALARM_MASK) 330#define WLAN_INT_STATUS_HF_TIMER_MSB 10 331#define WLAN_INT_STATUS_HF_TIMER_LSB 10 332#define WLAN_INT_STATUS_HF_TIMER_MASK 0x00000400 333#define WLAN_INT_STATUS_HF_TIMER_GET(x) (((x) & WLAN_INT_STATUS_HF_TIMER_MASK) >> WLAN_INT_STATUS_HF_TIMER_LSB) 334#define WLAN_INT_STATUS_HF_TIMER_SET(x) (((x) << WLAN_INT_STATUS_HF_TIMER_LSB) & WLAN_INT_STATUS_HF_TIMER_MASK) 335#define WLAN_INT_STATUS_LF_TIMER3_MSB 9 336#define WLAN_INT_STATUS_LF_TIMER3_LSB 9 337#define WLAN_INT_STATUS_LF_TIMER3_MASK 0x00000200 338#define WLAN_INT_STATUS_LF_TIMER3_GET(x) (((x) & WLAN_INT_STATUS_LF_TIMER3_MASK) >> WLAN_INT_STATUS_LF_TIMER3_LSB) 339#define WLAN_INT_STATUS_LF_TIMER3_SET(x) (((x) << WLAN_INT_STATUS_LF_TIMER3_LSB) & WLAN_INT_STATUS_LF_TIMER3_MASK) 340#define WLAN_INT_STATUS_LF_TIMER2_MSB 8 341#define WLAN_INT_STATUS_LF_TIMER2_LSB 8 342#define WLAN_INT_STATUS_LF_TIMER2_MASK 0x00000100 343#define WLAN_INT_STATUS_LF_TIMER2_GET(x) (((x) & WLAN_INT_STATUS_LF_TIMER2_MASK) >> WLAN_INT_STATUS_LF_TIMER2_LSB) 344#define WLAN_INT_STATUS_LF_TIMER2_SET(x) (((x) << WLAN_INT_STATUS_LF_TIMER2_LSB) & WLAN_INT_STATUS_LF_TIMER2_MASK) 345#define WLAN_INT_STATUS_LF_TIMER1_MSB 7 346#define WLAN_INT_STATUS_LF_TIMER1_LSB 7 347#define WLAN_INT_STATUS_LF_TIMER1_MASK 0x00000080 348#define WLAN_INT_STATUS_LF_TIMER1_GET(x) (((x) & WLAN_INT_STATUS_LF_TIMER1_MASK) >> WLAN_INT_STATUS_LF_TIMER1_LSB) 349#define WLAN_INT_STATUS_LF_TIMER1_SET(x) (((x) << WLAN_INT_STATUS_LF_TIMER1_LSB) & WLAN_INT_STATUS_LF_TIMER1_MASK) 350#define WLAN_INT_STATUS_LF_TIMER0_MSB 6 351#define WLAN_INT_STATUS_LF_TIMER0_LSB 6 352#define WLAN_INT_STATUS_LF_TIMER0_MASK 0x00000040 353#define WLAN_INT_STATUS_LF_TIMER0_GET(x) (((x) & WLAN_INT_STATUS_LF_TIMER0_MASK) >> WLAN_INT_STATUS_LF_TIMER0_LSB) 354#define WLAN_INT_STATUS_LF_TIMER0_SET(x) (((x) << WLAN_INT_STATUS_LF_TIMER0_LSB) & WLAN_INT_STATUS_LF_TIMER0_MASK) 355#define WLAN_INT_STATUS_KEYPAD_MSB 5 356#define WLAN_INT_STATUS_KEYPAD_LSB 5 357#define WLAN_INT_STATUS_KEYPAD_MASK 0x00000020 358#define WLAN_INT_STATUS_KEYPAD_GET(x) (((x) & WLAN_INT_STATUS_KEYPAD_MASK) >> WLAN_INT_STATUS_KEYPAD_LSB) 359#define WLAN_INT_STATUS_KEYPAD_SET(x) (((x) << WLAN_INT_STATUS_KEYPAD_LSB) & WLAN_INT_STATUS_KEYPAD_MASK) 360#define WLAN_INT_STATUS_SI_MSB 4 361#define WLAN_INT_STATUS_SI_LSB 4 362#define WLAN_INT_STATUS_SI_MASK 0x00000010 363#define WLAN_INT_STATUS_SI_GET(x) (((x) & WLAN_INT_STATUS_SI_MASK) >> WLAN_INT_STATUS_SI_LSB) 364#define WLAN_INT_STATUS_SI_SET(x) (((x) << WLAN_INT_STATUS_SI_LSB) & WLAN_INT_STATUS_SI_MASK) 365#define WLAN_INT_STATUS_GPIO_MSB 3 366#define WLAN_INT_STATUS_GPIO_LSB 3 367#define WLAN_INT_STATUS_GPIO_MASK 0x00000008 368#define WLAN_INT_STATUS_GPIO_GET(x) (((x) & WLAN_INT_STATUS_GPIO_MASK) >> WLAN_INT_STATUS_GPIO_LSB) 369#define WLAN_INT_STATUS_GPIO_SET(x) (((x) << WLAN_INT_STATUS_GPIO_LSB) & WLAN_INT_STATUS_GPIO_MASK) 370#define WLAN_INT_STATUS_UART_MSB 2 371#define WLAN_INT_STATUS_UART_LSB 2 372#define WLAN_INT_STATUS_UART_MASK 0x00000004 373#define WLAN_INT_STATUS_UART_GET(x) (((x) & WLAN_INT_STATUS_UART_MASK) >> WLAN_INT_STATUS_UART_LSB) 374#define WLAN_INT_STATUS_UART_SET(x) (((x) << WLAN_INT_STATUS_UART_LSB) & WLAN_INT_STATUS_UART_MASK) 375#define WLAN_INT_STATUS_ERROR_MSB 1 376#define WLAN_INT_STATUS_ERROR_LSB 1 377#define WLAN_INT_STATUS_ERROR_MASK 0x00000002 378#define WLAN_INT_STATUS_ERROR_GET(x) (((x) & WLAN_INT_STATUS_ERROR_MASK) >> WLAN_INT_STATUS_ERROR_LSB) 379#define WLAN_INT_STATUS_ERROR_SET(x) (((x) << WLAN_INT_STATUS_ERROR_LSB) & WLAN_INT_STATUS_ERROR_MASK) 380#define WLAN_INT_STATUS_WDT_INT_MSB 0 381#define WLAN_INT_STATUS_WDT_INT_LSB 0 382#define WLAN_INT_STATUS_WDT_INT_MASK 0x00000001 383#define WLAN_INT_STATUS_WDT_INT_GET(x) (((x) & WLAN_INT_STATUS_WDT_INT_MASK) >> WLAN_INT_STATUS_WDT_INT_LSB) 384#define WLAN_INT_STATUS_WDT_INT_SET(x) (((x) << WLAN_INT_STATUS_WDT_INT_LSB) & WLAN_INT_STATUS_WDT_INT_MASK) 385 386#define WLAN_LF_TIMER0_ADDRESS 0x00000048 387#define WLAN_LF_TIMER0_OFFSET 0x00000048 388#define WLAN_LF_TIMER0_TARGET_MSB 31 389#define WLAN_LF_TIMER0_TARGET_LSB 0 390#define WLAN_LF_TIMER0_TARGET_MASK 0xffffffff 391#define WLAN_LF_TIMER0_TARGET_GET(x) (((x) & WLAN_LF_TIMER0_TARGET_MASK) >> WLAN_LF_TIMER0_TARGET_LSB) 392#define WLAN_LF_TIMER0_TARGET_SET(x) (((x) << WLAN_LF_TIMER0_TARGET_LSB) & WLAN_LF_TIMER0_TARGET_MASK) 393 394#define WLAN_LF_TIMER_COUNT0_ADDRESS 0x0000004c 395#define WLAN_LF_TIMER_COUNT0_OFFSET 0x0000004c 396#define WLAN_LF_TIMER_COUNT0_VALUE_MSB 31 397#define WLAN_LF_TIMER_COUNT0_VALUE_LSB 0 398#define WLAN_LF_TIMER_COUNT0_VALUE_MASK 0xffffffff 399#define WLAN_LF_TIMER_COUNT0_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT0_VALUE_MASK) >> WLAN_LF_TIMER_COUNT0_VALUE_LSB) 400#define WLAN_LF_TIMER_COUNT0_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT0_VALUE_LSB) & WLAN_LF_TIMER_COUNT0_VALUE_MASK) 401 402#define WLAN_LF_TIMER_CONTROL0_ADDRESS 0x00000050 403#define WLAN_LF_TIMER_CONTROL0_OFFSET 0x00000050 404#define WLAN_LF_TIMER_CONTROL0_ENABLE_MSB 2 405#define WLAN_LF_TIMER_CONTROL0_ENABLE_LSB 2 406#define WLAN_LF_TIMER_CONTROL0_ENABLE_MASK 0x00000004 407#define WLAN_LF_TIMER_CONTROL0_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL0_ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL0_ENABLE_LSB) 408#define WLAN_LF_TIMER_CONTROL0_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL0_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL0_ENABLE_MASK) 409#define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MSB 1 410#define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_LSB 1 411#define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MASK 0x00000002 412#define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_LSB) 413#define WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL0_AUTO_RESTART_MASK) 414#define WLAN_LF_TIMER_CONTROL0_RESET_MSB 0 415#define WLAN_LF_TIMER_CONTROL0_RESET_LSB 0 416#define WLAN_LF_TIMER_CONTROL0_RESET_MASK 0x00000001 417#define WLAN_LF_TIMER_CONTROL0_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL0_RESET_MASK) >> WLAN_LF_TIMER_CONTROL0_RESET_LSB) 418#define WLAN_LF_TIMER_CONTROL0_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL0_RESET_LSB) & WLAN_LF_TIMER_CONTROL0_RESET_MASK) 419 420#define WLAN_LF_TIMER_STATUS0_ADDRESS 0x00000054 421#define WLAN_LF_TIMER_STATUS0_OFFSET 0x00000054 422#define WLAN_LF_TIMER_STATUS0_INTERRUPT_MSB 0 423#define WLAN_LF_TIMER_STATUS0_INTERRUPT_LSB 0 424#define WLAN_LF_TIMER_STATUS0_INTERRUPT_MASK 0x00000001 425#define WLAN_LF_TIMER_STATUS0_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS0_INTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS0_INTERRUPT_LSB) 426#define WLAN_LF_TIMER_STATUS0_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS0_INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS0_INTERRUPT_MASK) 427 428#define WLAN_LF_TIMER1_ADDRESS 0x00000058 429#define WLAN_LF_TIMER1_OFFSET 0x00000058 430#define WLAN_LF_TIMER1_TARGET_MSB 31 431#define WLAN_LF_TIMER1_TARGET_LSB 0 432#define WLAN_LF_TIMER1_TARGET_MASK 0xffffffff 433#define WLAN_LF_TIMER1_TARGET_GET(x) (((x) & WLAN_LF_TIMER1_TARGET_MASK) >> WLAN_LF_TIMER1_TARGET_LSB) 434#define WLAN_LF_TIMER1_TARGET_SET(x) (((x) << WLAN_LF_TIMER1_TARGET_LSB) & WLAN_LF_TIMER1_TARGET_MASK) 435 436#define WLAN_LF_TIMER_COUNT1_ADDRESS 0x0000005c 437#define WLAN_LF_TIMER_COUNT1_OFFSET 0x0000005c 438#define WLAN_LF_TIMER_COUNT1_VALUE_MSB 31 439#define WLAN_LF_TIMER_COUNT1_VALUE_LSB 0 440#define WLAN_LF_TIMER_COUNT1_VALUE_MASK 0xffffffff 441#define WLAN_LF_TIMER_COUNT1_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT1_VALUE_MASK) >> WLAN_LF_TIMER_COUNT1_VALUE_LSB) 442#define WLAN_LF_TIMER_COUNT1_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT1_VALUE_LSB) & WLAN_LF_TIMER_COUNT1_VALUE_MASK) 443 444#define WLAN_LF_TIMER_CONTROL1_ADDRESS 0x00000060 445#define WLAN_LF_TIMER_CONTROL1_OFFSET 0x00000060 446#define WLAN_LF_TIMER_CONTROL1_ENABLE_MSB 2 447#define WLAN_LF_TIMER_CONTROL1_ENABLE_LSB 2 448#define WLAN_LF_TIMER_CONTROL1_ENABLE_MASK 0x00000004 449#define WLAN_LF_TIMER_CONTROL1_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL1_ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL1_ENABLE_LSB) 450#define WLAN_LF_TIMER_CONTROL1_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL1_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL1_ENABLE_MASK) 451#define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MSB 1 452#define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_LSB 1 453#define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MASK 0x00000002 454#define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_LSB) 455#define WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL1_AUTO_RESTART_MASK) 456#define WLAN_LF_TIMER_CONTROL1_RESET_MSB 0 457#define WLAN_LF_TIMER_CONTROL1_RESET_LSB 0 458#define WLAN_LF_TIMER_CONTROL1_RESET_MASK 0x00000001 459#define WLAN_LF_TIMER_CONTROL1_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL1_RESET_MASK) >> WLAN_LF_TIMER_CONTROL1_RESET_LSB) 460#define WLAN_LF_TIMER_CONTROL1_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL1_RESET_LSB) & WLAN_LF_TIMER_CONTROL1_RESET_MASK) 461 462#define WLAN_LF_TIMER_STATUS1_ADDRESS 0x00000064 463#define WLAN_LF_TIMER_STATUS1_OFFSET 0x00000064 464#define WLAN_LF_TIMER_STATUS1_INTERRUPT_MSB 0 465#define WLAN_LF_TIMER_STATUS1_INTERRUPT_LSB 0 466#define WLAN_LF_TIMER_STATUS1_INTERRUPT_MASK 0x00000001 467#define WLAN_LF_TIMER_STATUS1_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS1_INTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS1_INTERRUPT_LSB) 468#define WLAN_LF_TIMER_STATUS1_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS1_INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS1_INTERRUPT_MASK) 469 470#define WLAN_LF_TIMER2_ADDRESS 0x00000068 471#define WLAN_LF_TIMER2_OFFSET 0x00000068 472#define WLAN_LF_TIMER2_TARGET_MSB 31 473#define WLAN_LF_TIMER2_TARGET_LSB 0 474#define WLAN_LF_TIMER2_TARGET_MASK 0xffffffff 475#define WLAN_LF_TIMER2_TARGET_GET(x) (((x) & WLAN_LF_TIMER2_TARGET_MASK) >> WLAN_LF_TIMER2_TARGET_LSB) 476#define WLAN_LF_TIMER2_TARGET_SET(x) (((x) << WLAN_LF_TIMER2_TARGET_LSB) & WLAN_LF_TIMER2_TARGET_MASK) 477 478#define WLAN_LF_TIMER_COUNT2_ADDRESS 0x0000006c 479#define WLAN_LF_TIMER_COUNT2_OFFSET 0x0000006c 480#define WLAN_LF_TIMER_COUNT2_VALUE_MSB 31 481#define WLAN_LF_TIMER_COUNT2_VALUE_LSB 0 482#define WLAN_LF_TIMER_COUNT2_VALUE_MASK 0xffffffff 483#define WLAN_LF_TIMER_COUNT2_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT2_VALUE_MASK) >> WLAN_LF_TIMER_COUNT2_VALUE_LSB) 484#define WLAN_LF_TIMER_COUNT2_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT2_VALUE_LSB) & WLAN_LF_TIMER_COUNT2_VALUE_MASK) 485 486#define WLAN_LF_TIMER_CONTROL2_ADDRESS 0x00000070 487#define WLAN_LF_TIMER_CONTROL2_OFFSET 0x00000070 488#define WLAN_LF_TIMER_CONTROL2_ENABLE_MSB 2 489#define WLAN_LF_TIMER_CONTROL2_ENABLE_LSB 2 490#define WLAN_LF_TIMER_CONTROL2_ENABLE_MASK 0x00000004 491#define WLAN_LF_TIMER_CONTROL2_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL2_ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL2_ENABLE_LSB) 492#define WLAN_LF_TIMER_CONTROL2_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL2_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL2_ENABLE_MASK) 493#define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MSB 1 494#define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_LSB 1 495#define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MASK 0x00000002 496#define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_LSB) 497#define WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL2_AUTO_RESTART_MASK) 498#define WLAN_LF_TIMER_CONTROL2_RESET_MSB 0 499#define WLAN_LF_TIMER_CONTROL2_RESET_LSB 0 500#define WLAN_LF_TIMER_CONTROL2_RESET_MASK 0x00000001 501#define WLAN_LF_TIMER_CONTROL2_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL2_RESET_MASK) >> WLAN_LF_TIMER_CONTROL2_RESET_LSB) 502#define WLAN_LF_TIMER_CONTROL2_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL2_RESET_LSB) & WLAN_LF_TIMER_CONTROL2_RESET_MASK) 503 504#define WLAN_LF_TIMER_STATUS2_ADDRESS 0x00000074 505#define WLAN_LF_TIMER_STATUS2_OFFSET 0x00000074 506#define WLAN_LF_TIMER_STATUS2_INTERRUPT_MSB 0 507#define WLAN_LF_TIMER_STATUS2_INTERRUPT_LSB 0 508#define WLAN_LF_TIMER_STATUS2_INTERRUPT_MASK 0x00000001 509#define WLAN_LF_TIMER_STATUS2_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS2_INTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS2_INTERRUPT_LSB) 510#define WLAN_LF_TIMER_STATUS2_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS2_INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS2_INTERRUPT_MASK) 511 512#define WLAN_LF_TIMER3_ADDRESS 0x00000078 513#define WLAN_LF_TIMER3_OFFSET 0x00000078 514#define WLAN_LF_TIMER3_TARGET_MSB 31 515#define WLAN_LF_TIMER3_TARGET_LSB 0 516#define WLAN_LF_TIMER3_TARGET_MASK 0xffffffff 517#define WLAN_LF_TIMER3_TARGET_GET(x) (((x) & WLAN_LF_TIMER3_TARGET_MASK) >> WLAN_LF_TIMER3_TARGET_LSB) 518#define WLAN_LF_TIMER3_TARGET_SET(x) (((x) << WLAN_LF_TIMER3_TARGET_LSB) & WLAN_LF_TIMER3_TARGET_MASK) 519 520#define WLAN_LF_TIMER_COUNT3_ADDRESS 0x0000007c 521#define WLAN_LF_TIMER_COUNT3_OFFSET 0x0000007c 522#define WLAN_LF_TIMER_COUNT3_VALUE_MSB 31 523#define WLAN_LF_TIMER_COUNT3_VALUE_LSB 0 524#define WLAN_LF_TIMER_COUNT3_VALUE_MASK 0xffffffff 525#define WLAN_LF_TIMER_COUNT3_VALUE_GET(x) (((x) & WLAN_LF_TIMER_COUNT3_VALUE_MASK) >> WLAN_LF_TIMER_COUNT3_VALUE_LSB) 526#define WLAN_LF_TIMER_COUNT3_VALUE_SET(x) (((x) << WLAN_LF_TIMER_COUNT3_VALUE_LSB) & WLAN_LF_TIMER_COUNT3_VALUE_MASK) 527 528#define WLAN_LF_TIMER_CONTROL3_ADDRESS 0x00000080 529#define WLAN_LF_TIMER_CONTROL3_OFFSET 0x00000080 530#define WLAN_LF_TIMER_CONTROL3_ENABLE_MSB 2 531#define WLAN_LF_TIMER_CONTROL3_ENABLE_LSB 2 532#define WLAN_LF_TIMER_CONTROL3_ENABLE_MASK 0x00000004 533#define WLAN_LF_TIMER_CONTROL3_ENABLE_GET(x) (((x) & WLAN_LF_TIMER_CONTROL3_ENABLE_MASK) >> WLAN_LF_TIMER_CONTROL3_ENABLE_LSB) 534#define WLAN_LF_TIMER_CONTROL3_ENABLE_SET(x) (((x) << WLAN_LF_TIMER_CONTROL3_ENABLE_LSB) & WLAN_LF_TIMER_CONTROL3_ENABLE_MASK) 535#define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MSB 1 536#define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_LSB 1 537#define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MASK 0x00000002 538#define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_GET(x) (((x) & WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MASK) >> WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_LSB) 539#define WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_SET(x) (((x) << WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_LSB) & WLAN_LF_TIMER_CONTROL3_AUTO_RESTART_MASK) 540#define WLAN_LF_TIMER_CONTROL3_RESET_MSB 0 541#define WLAN_LF_TIMER_CONTROL3_RESET_LSB 0 542#define WLAN_LF_TIMER_CONTROL3_RESET_MASK 0x00000001 543#define WLAN_LF_TIMER_CONTROL3_RESET_GET(x) (((x) & WLAN_LF_TIMER_CONTROL3_RESET_MASK) >> WLAN_LF_TIMER_CONTROL3_RESET_LSB) 544#define WLAN_LF_TIMER_CONTROL3_RESET_SET(x) (((x) << WLAN_LF_TIMER_CONTROL3_RESET_LSB) & WLAN_LF_TIMER_CONTROL3_RESET_MASK) 545 546#define WLAN_LF_TIMER_STATUS3_ADDRESS 0x00000084 547#define WLAN_LF_TIMER_STATUS3_OFFSET 0x00000084 548#define WLAN_LF_TIMER_STATUS3_INTERRUPT_MSB 0 549#define WLAN_LF_TIMER_STATUS3_INTERRUPT_LSB 0 550#define WLAN_LF_TIMER_STATUS3_INTERRUPT_MASK 0x00000001 551#define WLAN_LF_TIMER_STATUS3_INTERRUPT_GET(x) (((x) & WLAN_LF_TIMER_STATUS3_INTERRUPT_MASK) >> WLAN_LF_TIMER_STATUS3_INTERRUPT_LSB) 552#define WLAN_LF_TIMER_STATUS3_INTERRUPT_SET(x) (((x) << WLAN_LF_TIMER_STATUS3_INTERRUPT_LSB) & WLAN_LF_TIMER_STATUS3_INTERRUPT_MASK) 553 554#define WLAN_HF_TIMER_ADDRESS 0x00000088 555#define WLAN_HF_TIMER_OFFSET 0x00000088 556#define WLAN_HF_TIMER_TARGET_MSB 31 557#define WLAN_HF_TIMER_TARGET_LSB 12 558#define WLAN_HF_TIMER_TARGET_MASK 0xfffff000 559#define WLAN_HF_TIMER_TARGET_GET(x) (((x) & WLAN_HF_TIMER_TARGET_MASK) >> WLAN_HF_TIMER_TARGET_LSB) 560#define WLAN_HF_TIMER_TARGET_SET(x) (((x) << WLAN_HF_TIMER_TARGET_LSB) & WLAN_HF_TIMER_TARGET_MASK) 561 562#define WLAN_HF_TIMER_COUNT_ADDRESS 0x0000008c 563#define WLAN_HF_TIMER_COUNT_OFFSET 0x0000008c 564#define WLAN_HF_TIMER_COUNT_VALUE_MSB 31 565#define WLAN_HF_TIMER_COUNT_VALUE_LSB 12 566#define WLAN_HF_TIMER_COUNT_VALUE_MASK 0xfffff000 567#define WLAN_HF_TIMER_COUNT_VALUE_GET(x) (((x) & WLAN_HF_TIMER_COUNT_VALUE_MASK) >> WLAN_HF_TIMER_COUNT_VALUE_LSB) 568#define WLAN_HF_TIMER_COUNT_VALUE_SET(x) (((x) << WLAN_HF_TIMER_COUNT_VALUE_LSB) & WLAN_HF_TIMER_COUNT_VALUE_MASK) 569 570#define WLAN_HF_LF_COUNT_ADDRESS 0x00000090 571#define WLAN_HF_LF_COUNT_OFFSET 0x00000090 572#define WLAN_HF_LF_COUNT_VALUE_MSB 31 573#define WLAN_HF_LF_COUNT_VALUE_LSB 0 574#define WLAN_HF_LF_COUNT_VALUE_MASK 0xffffffff 575#define WLAN_HF_LF_COUNT_VALUE_GET(x) (((x) & WLAN_HF_LF_COUNT_VALUE_MASK) >> WLAN_HF_LF_COUNT_VALUE_LSB) 576#define WLAN_HF_LF_COUNT_VALUE_SET(x) (((x) << WLAN_HF_LF_COUNT_VALUE_LSB) & WLAN_HF_LF_COUNT_VALUE_MASK) 577 578#define WLAN_HF_TIMER_CONTROL_ADDRESS 0x00000094 579#define WLAN_HF_TIMER_CONTROL_OFFSET 0x00000094 580#define WLAN_HF_TIMER_CONTROL_ENABLE_MSB 3 581#define WLAN_HF_TIMER_CONTROL_ENABLE_LSB 3 582#define WLAN_HF_TIMER_CONTROL_ENABLE_MASK 0x00000008 583#define WLAN_HF_TIMER_CONTROL_ENABLE_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_ENABLE_MASK) >> WLAN_HF_TIMER_CONTROL_ENABLE_LSB) 584#define WLAN_HF_TIMER_CONTROL_ENABLE_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_ENABLE_LSB) & WLAN_HF_TIMER_CONTROL_ENABLE_MASK) 585#define WLAN_HF_TIMER_CONTROL_ON_MSB 2 586#define WLAN_HF_TIMER_CONTROL_ON_LSB 2 587#define WLAN_HF_TIMER_CONTROL_ON_MASK 0x00000004 588#define WLAN_HF_TIMER_CONTROL_ON_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_ON_MASK) >> WLAN_HF_TIMER_CONTROL_ON_LSB) 589#define WLAN_HF_TIMER_CONTROL_ON_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_ON_LSB) & WLAN_HF_TIMER_CONTROL_ON_MASK) 590#define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MSB 1 591#define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_LSB 1 592#define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MASK 0x00000002 593#define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MASK) >> WLAN_HF_TIMER_CONTROL_AUTO_RESTART_LSB) 594#define WLAN_HF_TIMER_CONTROL_AUTO_RESTART_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_AUTO_RESTART_LSB) & WLAN_HF_TIMER_CONTROL_AUTO_RESTART_MASK) 595#define WLAN_HF_TIMER_CONTROL_RESET_MSB 0 596#define WLAN_HF_TIMER_CONTROL_RESET_LSB 0 597#define WLAN_HF_TIMER_CONTROL_RESET_MASK 0x00000001 598#define WLAN_HF_TIMER_CONTROL_RESET_GET(x) (((x) & WLAN_HF_TIMER_CONTROL_RESET_MASK) >> WLAN_HF_TIMER_CONTROL_RESET_LSB) 599#define WLAN_HF_TIMER_CONTROL_RESET_SET(x) (((x) << WLAN_HF_TIMER_CONTROL_RESET_LSB) & WLAN_HF_TIMER_CONTROL_RESET_MASK) 600 601#define WLAN_HF_TIMER_STATUS_ADDRESS 0x00000098 602#define WLAN_HF_TIMER_STATUS_OFFSET 0x00000098 603#define WLAN_HF_TIMER_STATUS_INTERRUPT_MSB 0 604#define WLAN_HF_TIMER_STATUS_INTERRUPT_LSB 0 605#define WLAN_HF_TIMER_STATUS_INTERRUPT_MASK 0x00000001 606#define WLAN_HF_TIMER_STATUS_INTERRUPT_GET(x) (((x) & WLAN_HF_TIMER_STATUS_INTERRUPT_MASK) >> WLAN_HF_TIMER_STATUS_INTERRUPT_LSB) 607#define WLAN_HF_TIMER_STATUS_INTERRUPT_SET(x) (((x) << WLAN_HF_TIMER_STATUS_INTERRUPT_LSB) & WLAN_HF_TIMER_STATUS_INTERRUPT_MASK) 608 609#define WLAN_RTC_CONTROL_ADDRESS 0x0000009c 610#define WLAN_RTC_CONTROL_OFFSET 0x0000009c 611#define WLAN_RTC_CONTROL_ENABLE_MSB 2 612#define WLAN_RTC_CONTROL_ENABLE_LSB 2 613#define WLAN_RTC_CONTROL_ENABLE_MASK 0x00000004 614#define WLAN_RTC_CONTROL_ENABLE_GET(x) (((x) & WLAN_RTC_CONTROL_ENABLE_MASK) >> WLAN_RTC_CONTROL_ENABLE_LSB) 615#define WLAN_RTC_CONTROL_ENABLE_SET(x) (((x) << WLAN_RTC_CONTROL_ENABLE_LSB) & WLAN_RTC_CONTROL_ENABLE_MASK) 616#define WLAN_RTC_CONTROL_LOAD_RTC_MSB 1 617#define WLAN_RTC_CONTROL_LOAD_RTC_LSB 1 618#define WLAN_RTC_CONTROL_LOAD_RTC_MASK 0x00000002 619#define WLAN_RTC_CONTROL_LOAD_RTC_GET(x) (((x) & WLAN_RTC_CONTROL_LOAD_RTC_MASK) >> WLAN_RTC_CONTROL_LOAD_RTC_LSB) 620#define WLAN_RTC_CONTROL_LOAD_RTC_SET(x) (((x) << WLAN_RTC_CONTROL_LOAD_RTC_LSB) & WLAN_RTC_CONTROL_LOAD_RTC_MASK) 621#define WLAN_RTC_CONTROL_LOAD_ALARM_MSB 0 622#define WLAN_RTC_CONTROL_LOAD_ALARM_LSB 0 623#define WLAN_RTC_CONTROL_LOAD_ALARM_MASK 0x00000001 624#define WLAN_RTC_CONTROL_LOAD_ALARM_GET(x) (((x) & WLAN_RTC_CONTROL_LOAD_ALARM_MASK) >> WLAN_RTC_CONTROL_LOAD_ALARM_LSB) 625#define WLAN_RTC_CONTROL_LOAD_ALARM_SET(x) (((x) << WLAN_RTC_CONTROL_LOAD_ALARM_LSB) & WLAN_RTC_CONTROL_LOAD_ALARM_MASK) 626 627#define WLAN_RTC_TIME_ADDRESS 0x000000a0 628#define WLAN_RTC_TIME_OFFSET 0x000000a0 629#define WLAN_RTC_TIME_WEEK_DAY_MSB 26 630#define WLAN_RTC_TIME_WEEK_DAY_LSB 24 631#define WLAN_RTC_TIME_WEEK_DAY_MASK 0x07000000 632#define WLAN_RTC_TIME_WEEK_DAY_GET(x) (((x) & WLAN_RTC_TIME_WEEK_DAY_MASK) >> WLAN_RTC_TIME_WEEK_DAY_LSB) 633#define WLAN_RTC_TIME_WEEK_DAY_SET(x) (((x) << WLAN_RTC_TIME_WEEK_DAY_LSB) & WLAN_RTC_TIME_WEEK_DAY_MASK) 634#define WLAN_RTC_TIME_HOUR_MSB 21 635#define WLAN_RTC_TIME_HOUR_LSB 16 636#define WLAN_RTC_TIME_HOUR_MASK 0x003f0000 637#define WLAN_RTC_TIME_HOUR_GET(x) (((x) & WLAN_RTC_TIME_HOUR_MASK) >> WLAN_RTC_TIME_HOUR_LSB) 638#define WLAN_RTC_TIME_HOUR_SET(x) (((x) << WLAN_RTC_TIME_HOUR_LSB) & WLAN_RTC_TIME_HOUR_MASK) 639#define WLAN_RTC_TIME_MINUTE_MSB 14 640#define WLAN_RTC_TIME_MINUTE_LSB 8 641#define WLAN_RTC_TIME_MINUTE_MASK 0x00007f00 642#define WLAN_RTC_TIME_MINUTE_GET(x) (((x) & WLAN_RTC_TIME_MINUTE_MASK) >> WLAN_RTC_TIME_MINUTE_LSB) 643#define WLAN_RTC_TIME_MINUTE_SET(x) (((x) << WLAN_RTC_TIME_MINUTE_LSB) & WLAN_RTC_TIME_MINUTE_MASK) 644#define WLAN_RTC_TIME_SECOND_MSB 6 645#define WLAN_RTC_TIME_SECOND_LSB 0 646#define WLAN_RTC_TIME_SECOND_MASK 0x0000007f 647#define WLAN_RTC_TIME_SECOND_GET(x) (((x) & WLAN_RTC_TIME_SECOND_MASK) >> WLAN_RTC_TIME_SECOND_LSB) 648#define WLAN_RTC_TIME_SECOND_SET(x) (((x) << WLAN_RTC_TIME_SECOND_LSB) & WLAN_RTC_TIME_SECOND_MASK) 649 650#define WLAN_RTC_DATE_ADDRESS 0x000000a4 651#define WLAN_RTC_DATE_OFFSET 0x000000a4 652#define WLAN_RTC_DATE_YEAR_MSB 23 653#define WLAN_RTC_DATE_YEAR_LSB 16 654#define WLAN_RTC_DATE_YEAR_MASK 0x00ff0000 655#define WLAN_RTC_DATE_YEAR_GET(x) (((x) & WLAN_RTC_DATE_YEAR_MASK) >> WLAN_RTC_DATE_YEAR_LSB) 656#define WLAN_RTC_DATE_YEAR_SET(x) (((x) << WLAN_RTC_DATE_YEAR_LSB) & WLAN_RTC_DATE_YEAR_MASK) 657#define WLAN_RTC_DATE_MONTH_MSB 12 658#define WLAN_RTC_DATE_MONTH_LSB 8 659#define WLAN_RTC_DATE_MONTH_MASK 0x00001f00 660#define WLAN_RTC_DATE_MONTH_GET(x) (((x) & WLAN_RTC_DATE_MONTH_MASK) >> WLAN_RTC_DATE_MONTH_LSB) 661#define WLAN_RTC_DATE_MONTH_SET(x) (((x) << WLAN_RTC_DATE_MONTH_LSB) & WLAN_RTC_DATE_MONTH_MASK) 662#define WLAN_RTC_DATE_MONTH_DAY_MSB 5 663#define WLAN_RTC_DATE_MONTH_DAY_LSB 0 664#define WLAN_RTC_DATE_MONTH_DAY_MASK 0x0000003f 665#define WLAN_RTC_DATE_MONTH_DAY_GET(x) (((x) & WLAN_RTC_DATE_MONTH_DAY_MASK) >> WLAN_RTC_DATE_MONTH_DAY_LSB) 666#define WLAN_RTC_DATE_MONTH_DAY_SET(x) (((x) << WLAN_RTC_DATE_MONTH_DAY_LSB) & WLAN_RTC_DATE_MONTH_DAY_MASK) 667 668#define WLAN_RTC_SET_TIME_ADDRESS 0x000000a8 669#define WLAN_RTC_SET_TIME_OFFSET 0x000000a8 670#define WLAN_RTC_SET_TIME_WEEK_DAY_MSB 26 671#define WLAN_RTC_SET_TIME_WEEK_DAY_LSB 24 672#define WLAN_RTC_SET_TIME_WEEK_DAY_MASK 0x07000000 673#define WLAN_RTC_SET_TIME_WEEK_DAY_GET(x) (((x) & WLAN_RTC_SET_TIME_WEEK_DAY_MASK) >> WLAN_RTC_SET_TIME_WEEK_DAY_LSB) 674#define WLAN_RTC_SET_TIME_WEEK_DAY_SET(x) (((x) << WLAN_RTC_SET_TIME_WEEK_DAY_LSB) & WLAN_RTC_SET_TIME_WEEK_DAY_MASK) 675#define WLAN_RTC_SET_TIME_HOUR_MSB 21 676#define WLAN_RTC_SET_TIME_HOUR_LSB 16 677#define WLAN_RTC_SET_TIME_HOUR_MASK 0x003f0000 678#define WLAN_RTC_SET_TIME_HOUR_GET(x) (((x) & WLAN_RTC_SET_TIME_HOUR_MASK) >> WLAN_RTC_SET_TIME_HOUR_LSB) 679#define WLAN_RTC_SET_TIME_HOUR_SET(x) (((x) << WLAN_RTC_SET_TIME_HOUR_LSB) & WLAN_RTC_SET_TIME_HOUR_MASK) 680#define WLAN_RTC_SET_TIME_MINUTE_MSB 14 681#define WLAN_RTC_SET_TIME_MINUTE_LSB 8 682#define WLAN_RTC_SET_TIME_MINUTE_MASK 0x00007f00 683#define WLAN_RTC_SET_TIME_MINUTE_GET(x) (((x) & WLAN_RTC_SET_TIME_MINUTE_MASK) >> WLAN_RTC_SET_TIME_MINUTE_LSB) 684#define WLAN_RTC_SET_TIME_MINUTE_SET(x) (((x) << WLAN_RTC_SET_TIME_MINUTE_LSB) & WLAN_RTC_SET_TIME_MINUTE_MASK) 685#define WLAN_RTC_SET_TIME_SECOND_MSB 6 686#define WLAN_RTC_SET_TIME_SECOND_LSB 0 687#define WLAN_RTC_SET_TIME_SECOND_MASK 0x0000007f 688#define WLAN_RTC_SET_TIME_SECOND_GET(x) (((x) & WLAN_RTC_SET_TIME_SECOND_MASK) >> WLAN_RTC_SET_TIME_SECOND_LSB) 689#define WLAN_RTC_SET_TIME_SECOND_SET(x) (((x) << WLAN_RTC_SET_TIME_SECOND_LSB) & WLAN_RTC_SET_TIME_SECOND_MASK) 690 691#define WLAN_RTC_SET_DATE_ADDRESS 0x000000ac 692#define WLAN_RTC_SET_DATE_OFFSET 0x000000ac 693#define WLAN_RTC_SET_DATE_YEAR_MSB 23 694#define WLAN_RTC_SET_DATE_YEAR_LSB 16 695#define WLAN_RTC_SET_DATE_YEAR_MASK 0x00ff0000 696#define WLAN_RTC_SET_DATE_YEAR_GET(x) (((x) & WLAN_RTC_SET_DATE_YEAR_MASK) >> WLAN_RTC_SET_DATE_YEAR_LSB) 697#define WLAN_RTC_SET_DATE_YEAR_SET(x) (((x) << WLAN_RTC_SET_DATE_YEAR_LSB) & WLAN_RTC_SET_DATE_YEAR_MASK) 698#define WLAN_RTC_SET_DATE_MONTH_MSB 12 699#define WLAN_RTC_SET_DATE_MONTH_LSB 8 700#define WLAN_RTC_SET_DATE_MONTH_MASK 0x00001f00 701#define WLAN_RTC_SET_DATE_MONTH_GET(x) (((x) & WLAN_RTC_SET_DATE_MONTH_MASK) >> WLAN_RTC_SET_DATE_MONTH_LSB) 702#define WLAN_RTC_SET_DATE_MONTH_SET(x) (((x) << WLAN_RTC_SET_DATE_MONTH_LSB) & WLAN_RTC_SET_DATE_MONTH_MASK) 703#define WLAN_RTC_SET_DATE_MONTH_DAY_MSB 5 704#define WLAN_RTC_SET_DATE_MONTH_DAY_LSB 0 705#define WLAN_RTC_SET_DATE_MONTH_DAY_MASK 0x0000003f 706#define WLAN_RTC_SET_DATE_MONTH_DAY_GET(x) (((x) & WLAN_RTC_SET_DATE_MONTH_DAY_MASK) >> WLAN_RTC_SET_DATE_MONTH_DAY_LSB) 707#define WLAN_RTC_SET_DATE_MONTH_DAY_SET(x) (((x) << WLAN_RTC_SET_DATE_MONTH_DAY_LSB) & WLAN_RTC_SET_DATE_MONTH_DAY_MASK) 708 709#define WLAN_RTC_SET_ALARM_ADDRESS 0x000000b0 710#define WLAN_RTC_SET_ALARM_OFFSET 0x000000b0 711#define WLAN_RTC_SET_ALARM_HOUR_MSB 21 712#define WLAN_RTC_SET_ALARM_HOUR_LSB 16 713#define WLAN_RTC_SET_ALARM_HOUR_MASK 0x003f0000 714#define WLAN_RTC_SET_ALARM_HOUR_GET(x) (((x) & WLAN_RTC_SET_ALARM_HOUR_MASK) >> WLAN_RTC_SET_ALARM_HOUR_LSB) 715#define WLAN_RTC_SET_ALARM_HOUR_SET(x) (((x) << WLAN_RTC_SET_ALARM_HOUR_LSB) & WLAN_RTC_SET_ALARM_HOUR_MASK) 716#define WLAN_RTC_SET_ALARM_MINUTE_MSB 14 717#define WLAN_RTC_SET_ALARM_MINUTE_LSB 8 718#define WLAN_RTC_SET_ALARM_MINUTE_MASK 0x00007f00 719#define WLAN_RTC_SET_ALARM_MINUTE_GET(x) (((x) & WLAN_RTC_SET_ALARM_MINUTE_MASK) >> WLAN_RTC_SET_ALARM_MINUTE_LSB) 720#define WLAN_RTC_SET_ALARM_MINUTE_SET(x) (((x) << WLAN_RTC_SET_ALARM_MINUTE_LSB) & WLAN_RTC_SET_ALARM_MINUTE_MASK) 721#define WLAN_RTC_SET_ALARM_SECOND_MSB 6 722#define WLAN_RTC_SET_ALARM_SECOND_LSB 0 723#define WLAN_RTC_SET_ALARM_SECOND_MASK 0x0000007f 724#define WLAN_RTC_SET_ALARM_SECOND_GET(x) (((x) & WLAN_RTC_SET_ALARM_SECOND_MASK) >> WLAN_RTC_SET_ALARM_SECOND_LSB) 725#define WLAN_RTC_SET_ALARM_SECOND_SET(x) (((x) << WLAN_RTC_SET_ALARM_SECOND_LSB) & WLAN_RTC_SET_ALARM_SECOND_MASK) 726 727#define WLAN_RTC_CONFIG_ADDRESS 0x000000b4 728#define WLAN_RTC_CONFIG_OFFSET 0x000000b4 729#define WLAN_RTC_CONFIG_BCD_MSB 2 730#define WLAN_RTC_CONFIG_BCD_LSB 2 731#define WLAN_RTC_CONFIG_BCD_MASK 0x00000004 732#define WLAN_RTC_CONFIG_BCD_GET(x) (((x) & WLAN_RTC_CONFIG_BCD_MASK) >> WLAN_RTC_CONFIG_BCD_LSB) 733#define WLAN_RTC_CONFIG_BCD_SET(x) (((x) << WLAN_RTC_CONFIG_BCD_LSB) & WLAN_RTC_CONFIG_BCD_MASK) 734#define WLAN_RTC_CONFIG_TWELVE_HOUR_MSB 1 735#define WLAN_RTC_CONFIG_TWELVE_HOUR_LSB 1 736#define WLAN_RTC_CONFIG_TWELVE_HOUR_MASK 0x00000002 737#define WLAN_RTC_CONFIG_TWELVE_HOUR_GET(x) (((x) & WLAN_RTC_CONFIG_TWELVE_HOUR_MASK) >> WLAN_RTC_CONFIG_TWELVE_HOUR_LSB) 738#define WLAN_RTC_CONFIG_TWELVE_HOUR_SET(x) (((x) << WLAN_RTC_CONFIG_TWELVE_HOUR_LSB) & WLAN_RTC_CONFIG_TWELVE_HOUR_MASK) 739#define WLAN_RTC_CONFIG_DSE_MSB 0 740#define WLAN_RTC_CONFIG_DSE_LSB 0 741#define WLAN_RTC_CONFIG_DSE_MASK 0x00000001 742#define WLAN_RTC_CONFIG_DSE_GET(x) (((x) & WLAN_RTC_CONFIG_DSE_MASK) >> WLAN_RTC_CONFIG_DSE_LSB) 743#define WLAN_RTC_CONFIG_DSE_SET(x) (((x) << WLAN_RTC_CONFIG_DSE_LSB) & WLAN_RTC_CONFIG_DSE_MASK) 744 745#define WLAN_RTC_ALARM_STATUS_ADDRESS 0x000000b8 746#define WLAN_RTC_ALARM_STATUS_OFFSET 0x000000b8 747#define WLAN_RTC_ALARM_STATUS_ENABLE_MSB 1 748#define WLAN_RTC_ALARM_STATUS_ENABLE_LSB 1 749#define WLAN_RTC_ALARM_STATUS_ENABLE_MASK 0x00000002 750#define WLAN_RTC_ALARM_STATUS_ENABLE_GET(x) (((x) & WLAN_RTC_ALARM_STATUS_ENABLE_MASK) >> WLAN_RTC_ALARM_STATUS_ENABLE_LSB) 751#define WLAN_RTC_ALARM_STATUS_ENABLE_SET(x) (((x) << WLAN_RTC_ALARM_STATUS_ENABLE_LSB) & WLAN_RTC_ALARM_STATUS_ENABLE_MASK) 752#define WLAN_RTC_ALARM_STATUS_INTERRUPT_MSB 0 753#define WLAN_RTC_ALARM_STATUS_INTERRUPT_LSB 0 754#define WLAN_RTC_ALARM_STATUS_INTERRUPT_MASK 0x00000001 755#define WLAN_RTC_ALARM_STATUS_INTERRUPT_GET(x) (((x) & WLAN_RTC_ALARM_STATUS_INTERRUPT_MASK) >> WLAN_RTC_ALARM_STATUS_INTERRUPT_LSB) 756#define WLAN_RTC_ALARM_STATUS_INTERRUPT_SET(x) (((x) << WLAN_RTC_ALARM_STATUS_INTERRUPT_LSB) & WLAN_RTC_ALARM_STATUS_INTERRUPT_MASK) 757 758#define WLAN_UART_WAKEUP_ADDRESS 0x000000bc 759#define WLAN_UART_WAKEUP_OFFSET 0x000000bc 760#define WLAN_UART_WAKEUP_ENABLE_MSB 0 761#define WLAN_UART_WAKEUP_ENABLE_LSB 0 762#define WLAN_UART_WAKEUP_ENABLE_MASK 0x00000001 763#define WLAN_UART_WAKEUP_ENABLE_GET(x) (((x) & WLAN_UART_WAKEUP_ENABLE_MASK) >> WLAN_UART_WAKEUP_ENABLE_LSB) 764#define WLAN_UART_WAKEUP_ENABLE_SET(x) (((x) << WLAN_UART_WAKEUP_ENABLE_LSB) & WLAN_UART_WAKEUP_ENABLE_MASK) 765 766#define WLAN_RESET_CAUSE_ADDRESS 0x000000c0 767#define WLAN_RESET_CAUSE_OFFSET 0x000000c0 768#define WLAN_RESET_CAUSE_LAST_MSB 2 769#define WLAN_RESET_CAUSE_LAST_LSB 0 770#define WLAN_RESET_CAUSE_LAST_MASK 0x00000007 771#define WLAN_RESET_CAUSE_LAST_GET(x) (((x) & WLAN_RESET_CAUSE_LAST_MASK) >> WLAN_RESET_CAUSE_LAST_LSB) 772#define WLAN_RESET_CAUSE_LAST_SET(x) (((x) << WLAN_RESET_CAUSE_LAST_LSB) & WLAN_RESET_CAUSE_LAST_MASK) 773 774#define WLAN_SYSTEM_SLEEP_ADDRESS 0x000000c4 775#define WLAN_SYSTEM_SLEEP_OFFSET 0x000000c4 776#define WLAN_SYSTEM_SLEEP_HOST_IF_MSB 4 777#define WLAN_SYSTEM_SLEEP_HOST_IF_LSB 4 778#define WLAN_SYSTEM_SLEEP_HOST_IF_MASK 0x00000010 779#define WLAN_SYSTEM_SLEEP_HOST_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_HOST_IF_MASK) >> WLAN_SYSTEM_SLEEP_HOST_IF_LSB) 780#define WLAN_SYSTEM_SLEEP_HOST_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_HOST_IF_LSB) & WLAN_SYSTEM_SLEEP_HOST_IF_MASK) 781#define WLAN_SYSTEM_SLEEP_MBOX_MSB 3 782#define WLAN_SYSTEM_SLEEP_MBOX_LSB 3 783#define WLAN_SYSTEM_SLEEP_MBOX_MASK 0x00000008 784#define WLAN_SYSTEM_SLEEP_MBOX_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MBOX_MASK) >> WLAN_SYSTEM_SLEEP_MBOX_LSB) 785#define WLAN_SYSTEM_SLEEP_MBOX_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MBOX_LSB) & WLAN_SYSTEM_SLEEP_MBOX_MASK) 786#define WLAN_SYSTEM_SLEEP_MAC_IF_MSB 2 787#define WLAN_SYSTEM_SLEEP_MAC_IF_LSB 2 788#define WLAN_SYSTEM_SLEEP_MAC_IF_MASK 0x00000004 789#define WLAN_SYSTEM_SLEEP_MAC_IF_GET(x) (((x) & WLAN_SYSTEM_SLEEP_MAC_IF_MASK) >> WLAN_SYSTEM_SLEEP_MAC_IF_LSB) 790#define WLAN_SYSTEM_SLEEP_MAC_IF_SET(x) (((x) << WLAN_SYSTEM_SLEEP_MAC_IF_LSB) & WLAN_SYSTEM_SLEEP_MAC_IF_MASK) 791#define WLAN_SYSTEM_SLEEP_LIGHT_MSB 1 792#define WLAN_SYSTEM_SLEEP_LIGHT_LSB 1 793#define WLAN_SYSTEM_SLEEP_LIGHT_MASK 0x00000002 794#define WLAN_SYSTEM_SLEEP_LIGHT_GET(x) (((x) & WLAN_SYSTEM_SLEEP_LIGHT_MASK) >> WLAN_SYSTEM_SLEEP_LIGHT_LSB) 795#define WLAN_SYSTEM_SLEEP_LIGHT_SET(x) (((x) << WLAN_SYSTEM_SLEEP_LIGHT_LSB) & WLAN_SYSTEM_SLEEP_LIGHT_MASK) 796#define WLAN_SYSTEM_SLEEP_DISABLE_MSB 0 797#define WLAN_SYSTEM_SLEEP_DISABLE_LSB 0 798#define WLAN_SYSTEM_SLEEP_DISABLE_MASK 0x00000001 799#define WLAN_SYSTEM_SLEEP_DISABLE_GET(x) (((x) & WLAN_SYSTEM_SLEEP_DISABLE_MASK) >> WLAN_SYSTEM_SLEEP_DISABLE_LSB) 800#define WLAN_SYSTEM_SLEEP_DISABLE_SET(x) (((x) << WLAN_SYSTEM_SLEEP_DISABLE_LSB) & WLAN_SYSTEM_SLEEP_DISABLE_MASK) 801 802#define WLAN_SDIO_WRAPPER_ADDRESS 0x000000c8 803#define WLAN_SDIO_WRAPPER_OFFSET 0x000000c8 804#define WLAN_SDIO_WRAPPER_SLEEP_MSB 3 805#define WLAN_SDIO_WRAPPER_SLEEP_LSB 3 806#define WLAN_SDIO_WRAPPER_SLEEP_MASK 0x00000008 807#define WLAN_SDIO_WRAPPER_SLEEP_GET(x) (((x) & WLAN_SDIO_WRAPPER_SLEEP_MASK) >> WLAN_SDIO_WRAPPER_SLEEP_LSB) 808#define WLAN_SDIO_WRAPPER_SLEEP_SET(x) (((x) << WLAN_SDIO_WRAPPER_SLEEP_LSB) & WLAN_SDIO_WRAPPER_SLEEP_MASK) 809#define WLAN_SDIO_WRAPPER_WAKEUP_MSB 2 810#define WLAN_SDIO_WRAPPER_WAKEUP_LSB 2 811#define WLAN_SDIO_WRAPPER_WAKEUP_MASK 0x00000004 812#define WLAN_SDIO_WRAPPER_WAKEUP_GET(x) (((x) & WLAN_SDIO_WRAPPER_WAKEUP_MASK) >> WLAN_SDIO_WRAPPER_WAKEUP_LSB) 813#define WLAN_SDIO_WRAPPER_WAKEUP_SET(x) (((x) << WLAN_SDIO_WRAPPER_WAKEUP_LSB) & WLAN_SDIO_WRAPPER_WAKEUP_MASK) 814#define WLAN_SDIO_WRAPPER_SOC_ON_MSB 1 815#define WLAN_SDIO_WRAPPER_SOC_ON_LSB 1 816#define WLAN_SDIO_WRAPPER_SOC_ON_MASK 0x00000002 817#define WLAN_SDIO_WRAPPER_SOC_ON_GET(x) (((x) & WLAN_SDIO_WRAPPER_SOC_ON_MASK) >> WLAN_SDIO_WRAPPER_SOC_ON_LSB) 818#define WLAN_SDIO_WRAPPER_SOC_ON_SET(x) (((x) << WLAN_SDIO_WRAPPER_SOC_ON_LSB) & WLAN_SDIO_WRAPPER_SOC_ON_MASK) 819#define WLAN_SDIO_WRAPPER_ON_MSB 0 820#define WLAN_SDIO_WRAPPER_ON_LSB 0 821#define WLAN_SDIO_WRAPPER_ON_MASK 0x00000001 822#define WLAN_SDIO_WRAPPER_ON_GET(x) (((x) & WLAN_SDIO_WRAPPER_ON_MASK) >> WLAN_SDIO_WRAPPER_ON_LSB) 823#define WLAN_SDIO_WRAPPER_ON_SET(x) (((x) << WLAN_SDIO_WRAPPER_ON_LSB) & WLAN_SDIO_WRAPPER_ON_MASK) 824 825#define WLAN_MAC_SLEEP_CONTROL_ADDRESS 0x000000cc 826#define WLAN_MAC_SLEEP_CONTROL_OFFSET 0x000000cc 827#define WLAN_MAC_SLEEP_CONTROL_ENABLE_MSB 1 828#define WLAN_MAC_SLEEP_CONTROL_ENABLE_LSB 0 829#define WLAN_MAC_SLEEP_CONTROL_ENABLE_MASK 0x00000003 830#define WLAN_MAC_SLEEP_CONTROL_ENABLE_GET(x) (((x) & WLAN_MAC_SLEEP_CONTROL_ENABLE_MASK) >> WLAN_MAC_SLEEP_CONTROL_ENABLE_LSB) 831#define WLAN_MAC_SLEEP_CONTROL_ENABLE_SET(x) (((x) << WLAN_MAC_SLEEP_CONTROL_ENABLE_LSB) & WLAN_MAC_SLEEP_CONTROL_ENABLE_MASK) 832 833#define WLAN_KEEP_AWAKE_ADDRESS 0x000000d0 834#define WLAN_KEEP_AWAKE_OFFSET 0x000000d0 835#define WLAN_KEEP_AWAKE_COUNT_MSB 7 836#define WLAN_KEEP_AWAKE_COUNT_LSB 0 837#define WLAN_KEEP_AWAKE_COUNT_MASK 0x000000ff 838#define WLAN_KEEP_AWAKE_COUNT_GET(x) (((x) & WLAN_KEEP_AWAKE_COUNT_MASK) >> WLAN_KEEP_AWAKE_COUNT_LSB) 839#define WLAN_KEEP_AWAKE_COUNT_SET(x) (((x) << WLAN_KEEP_AWAKE_COUNT_LSB) & WLAN_KEEP_AWAKE_COUNT_MASK) 840 841#define WLAN_LPO_CAL_TIME_ADDRESS 0x000000d4 842#define WLAN_LPO_CAL_TIME_OFFSET 0x000000d4 843#define WLAN_LPO_CAL_TIME_LENGTH_MSB 13 844#define WLAN_LPO_CAL_TIME_LENGTH_LSB 0 845#define WLAN_LPO_CAL_TIME_LENGTH_MASK 0x00003fff 846#define WLAN_LPO_CAL_TIME_LENGTH_GET(x) (((x) & WLAN_LPO_CAL_TIME_LENGTH_MASK) >> WLAN_LPO_CAL_TIME_LENGTH_LSB) 847#define WLAN_LPO_CAL_TIME_LENGTH_SET(x) (((x) << WLAN_LPO_CAL_TIME_LENGTH_LSB) & WLAN_LPO_CAL_TIME_LENGTH_MASK) 848 849#define WLAN_LPO_INIT_DIVIDEND_INT_ADDRESS 0x000000d8 850#define WLAN_LPO_INIT_DIVIDEND_INT_OFFSET 0x000000d8 851#define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MSB 23 852#define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB 0 853#define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK 0x00ffffff 854#define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_GET(x) (((x) & WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK) >> WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB) 855#define WLAN_LPO_INIT_DIVIDEND_INT_VALUE_SET(x) (((x) << WLAN_LPO_INIT_DIVIDEND_INT_VALUE_LSB) & WLAN_LPO_INIT_DIVIDEND_INT_VALUE_MASK) 856 857#define WLAN_LPO_INIT_DIVIDEND_FRACTION_ADDRESS 0x000000dc 858#define WLAN_LPO_INIT_DIVIDEND_FRACTION_OFFSET 0x000000dc 859#define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MSB 10 860#define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB 0 861#define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK 0x000007ff 862#define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_GET(x) (((x) & WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK) >> WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB) 863#define WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_SET(x) (((x) << WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_LSB) & WLAN_LPO_INIT_DIVIDEND_FRACTION_VALUE_MASK) 864 865#define WLAN_LPO_CAL_ADDRESS 0x000000e0 866#define WLAN_LPO_CAL_OFFSET 0x000000e0 867#define WLAN_LPO_CAL_ENABLE_MSB 20 868#define WLAN_LPO_CAL_ENABLE_LSB 20 869#define WLAN_LPO_CAL_ENABLE_MASK 0x00100000 870#define WLAN_LPO_CAL_ENABLE_GET(x) (((x) & WLAN_LPO_CAL_ENABLE_MASK) >> WLAN_LPO_CAL_ENABLE_LSB) 871#define WLAN_LPO_CAL_ENABLE_SET(x) (((x) << WLAN_LPO_CAL_ENABLE_LSB) & WLAN_LPO_CAL_ENABLE_MASK) 872#define WLAN_LPO_CAL_COUNT_MSB 19 873#define WLAN_LPO_CAL_COUNT_LSB 0 874#define WLAN_LPO_CAL_COUNT_MASK 0x000fffff 875#define WLAN_LPO_CAL_COUNT_GET(x) (((x) & WLAN_LPO_CAL_COUNT_MASK) >> WLAN_LPO_CAL_COUNT_LSB) 876#define WLAN_LPO_CAL_COUNT_SET(x) (((x) << WLAN_LPO_CAL_COUNT_LSB) & WLAN_LPO_CAL_COUNT_MASK) 877 878#define WLAN_LPO_CAL_TEST_CONTROL_ADDRESS 0x000000e4 879#define WLAN_LPO_CAL_TEST_CONTROL_OFFSET 0x000000e4 880#define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MSB 5 881#define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_LSB 5 882#define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MASK 0x00000020 883#define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_GET(x) (((x) & WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MASK) >> WLAN_LPO_CAL_TEST_CONTROL_ENABLE_LSB) 884#define WLAN_LPO_CAL_TEST_CONTROL_ENABLE_SET(x) (((x) << WLAN_LPO_CAL_TEST_CONTROL_ENABLE_LSB) & WLAN_LPO_CAL_TEST_CONTROL_ENABLE_MASK) 885#define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MSB 4 886#define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB 0 887#define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK 0x0000001f 888#define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_GET(x) (((x) & WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK) >> WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB) 889#define WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_SET(x) (((x) << WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_LSB) & WLAN_LPO_CAL_TEST_CONTROL_RTC_CYCLES_MASK) 890 891#define WLAN_LPO_CAL_TEST_STATUS_ADDRESS 0x000000e8 892#define WLAN_LPO_CAL_TEST_STATUS_OFFSET 0x000000e8 893#define WLAN_LPO_CAL_TEST_STATUS_READY_MSB 16 894#define WLAN_LPO_CAL_TEST_STATUS_READY_LSB 16 895#define WLAN_LPO_CAL_TEST_STATUS_READY_MASK 0x00010000 896#define WLAN_LPO_CAL_TEST_STATUS_READY_GET(x) (((x) & WLAN_LPO_CAL_TEST_STATUS_READY_MASK) >> WLAN_LPO_CAL_TEST_STATUS_READY_LSB) 897#define WLAN_LPO_CAL_TEST_STATUS_READY_SET(x) (((x) << WLAN_LPO_CAL_TEST_STATUS_READY_LSB) & WLAN_LPO_CAL_TEST_STATUS_READY_MASK) 898#define WLAN_LPO_CAL_TEST_STATUS_COUNT_MSB 15 899#define WLAN_LPO_CAL_TEST_STATUS_COUNT_LSB 0 900#define WLAN_LPO_CAL_TEST_STATUS_COUNT_MASK 0x0000ffff 901#define WLAN_LPO_CAL_TEST_STATUS_COUNT_GET(x) (((x) & WLAN_LPO_CAL_TEST_STATUS_COUNT_MASK) >> WLAN_LPO_CAL_TEST_STATUS_COUNT_LSB) 902#define WLAN_LPO_CAL_TEST_STATUS_COUNT_SET(x) (((x) << WLAN_LPO_CAL_TEST_STATUS_COUNT_LSB) & WLAN_LPO_CAL_TEST_STATUS_COUNT_MASK) 903 904#define WLAN_CHIP_ID_ADDRESS 0x000000ec 905#define WLAN_CHIP_ID_OFFSET 0x000000ec 906#define WLAN_CHIP_ID_DEVICE_ID_MSB 31 907#define WLAN_CHIP_ID_DEVICE_ID_LSB 16 908#define WLAN_CHIP_ID_DEVICE_ID_MASK 0xffff0000 909#define WLAN_CHIP_ID_DEVICE_ID_GET(x) (((x) & WLAN_CHIP_ID_DEVICE_ID_MASK) >> WLAN_CHIP_ID_DEVICE_ID_LSB) 910#define WLAN_CHIP_ID_DEVICE_ID_SET(x) (((x) << WLAN_CHIP_ID_DEVICE_ID_LSB) & WLAN_CHIP_ID_DEVICE_ID_MASK) 911#define WLAN_CHIP_ID_CONFIG_ID_MSB 15 912#define WLAN_CHIP_ID_CONFIG_ID_LSB 4 913#define WLAN_CHIP_ID_CONFIG_ID_MASK 0x0000fff0 914#define WLAN_CHIP_ID_CONFIG_ID_GET(x) (((x) & WLAN_CHIP_ID_CONFIG_ID_MASK) >> WLAN_CHIP_ID_CONFIG_ID_LSB) 915#define WLAN_CHIP_ID_CONFIG_ID_SET(x) (((x) << WLAN_CHIP_ID_CONFIG_ID_LSB) & WLAN_CHIP_ID_CONFIG_ID_MASK) 916#define WLAN_CHIP_ID_VERSION_ID_MSB 3 917#define WLAN_CHIP_ID_VERSION_ID_LSB 0 918#define WLAN_CHIP_ID_VERSION_ID_MASK 0x0000000f 919#define WLAN_CHIP_ID_VERSION_ID_GET(x) (((x) & WLAN_CHIP_ID_VERSION_ID_MASK) >> WLAN_CHIP_ID_VERSION_ID_LSB) 920#define WLAN_CHIP_ID_VERSION_ID_SET(x) (((x) << WLAN_CHIP_ID_VERSION_ID_LSB) & WLAN_CHIP_ID_VERSION_ID_MASK) 921 922#define WLAN_DERIVED_RTC_CLK_ADDRESS 0x000000f0 923#define WLAN_DERIVED_RTC_CLK_OFFSET 0x000000f0 924#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MSB 20 925#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_LSB 20 926#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MASK 0x00100000 927#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MASK) >> WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_LSB) 928#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_LSB) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_EN_MASK) 929#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MSB 18 930#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_LSB 18 931#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MASK 0x00040000 932#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MASK) >> WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_LSB) 933#define WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_LSB) & WLAN_DERIVED_RTC_CLK_EXTERNAL_DETECT_MASK) 934#define WLAN_DERIVED_RTC_CLK_FORCE_MSB 17 935#define WLAN_DERIVED_RTC_CLK_FORCE_LSB 16 936#define WLAN_DERIVED_RTC_CLK_FORCE_MASK 0x00030000 937#define WLAN_DERIVED_RTC_CLK_FORCE_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_FORCE_MASK) >> WLAN_DERIVED_RTC_CLK_FORCE_LSB) 938#define WLAN_DERIVED_RTC_CLK_FORCE_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_FORCE_LSB) & WLAN_DERIVED_RTC_CLK_FORCE_MASK) 939#define WLAN_DERIVED_RTC_CLK_PERIOD_MSB 15 940#define WLAN_DERIVED_RTC_CLK_PERIOD_LSB 1 941#define WLAN_DERIVED_RTC_CLK_PERIOD_MASK 0x0000fffe 942#define WLAN_DERIVED_RTC_CLK_PERIOD_GET(x) (((x) & WLAN_DERIVED_RTC_CLK_PERIOD_MASK) >> WLAN_DERIVED_RTC_CLK_PERIOD_LSB) 943#define WLAN_DERIVED_RTC_CLK_PERIOD_SET(x) (((x) << WLAN_DERIVED_RTC_CLK_PERIOD_LSB) & WLAN_DERIVED_RTC_CLK_PERIOD_MASK) 944 945#define MAC_PCU_SLP32_MODE_ADDRESS 0x000000f4 946#define MAC_PCU_SLP32_MODE_OFFSET 0x000000f4 947#define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MSB 24 948#define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_LSB 24 949#define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MASK 0x01000000 950#define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_GET(x) (((x) & MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MASK) >> MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_LSB) 951#define MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_SET(x) (((x) << MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_LSB) & MAC_PCU_SLP32_MODE_TSF2_WRITE_STATUS_MASK) 952#define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MSB 23 953#define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_LSB 23 954#define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MASK 0x00800000 955#define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_GET(x) (((x) & MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MASK) >> MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_LSB) 956#define MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_SET(x) (((x) << MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_LSB) & MAC_PCU_SLP32_MODE_FORCE_BIAS_BLOCK_ON_MASK) 957#define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MSB 22 958#define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_LSB 22 959#define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MASK 0x00400000 960#define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_GET(x) (((x) & MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MASK) >> MAC_PCU_SLP32_MODE_DISABLE_32KHZ_LSB) 961#define MAC_PCU_SLP32_MODE_DISABLE_32KHZ_SET(x) (((x) << MAC_PCU_SLP32_MODE_DISABLE_32KHZ_LSB) & MAC_PCU_SLP32_MODE_DISABLE_32KHZ_MASK) 962#define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MSB 21 963#define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_LSB 21 964#define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MASK 0x00200000 965#define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_GET(x) (((x) & MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MASK) >> MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_LSB) 966#define MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_SET(x) (((x) << MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_LSB) & MAC_PCU_SLP32_MODE_TSF_WRITE_STATUS_MASK) 967#define MAC_PCU_SLP32_MODE_ENABLE_MSB 20 968#define MAC_PCU_SLP32_MODE_ENABLE_LSB 20 969#define MAC_PCU_SLP32_MODE_ENABLE_MASK 0x00100000 970#define MAC_PCU_SLP32_MODE_ENABLE_GET(x) (((x) & MAC_PCU_SLP32_MODE_ENABLE_MASK) >> MAC_PCU_SLP32_MODE_ENABLE_LSB) 971#define MAC_PCU_SLP32_MODE_ENABLE_SET(x) (((x) << MAC_PCU_SLP32_MODE_ENABLE_LSB) & MAC_PCU_SLP32_MODE_ENABLE_MASK) 972#define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MSB 19 973#define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_LSB 0 974#define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MASK 0x000fffff 975#define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_GET(x) (((x) & MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MASK) >> MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_LSB) 976#define MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_SET(x) (((x) << MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_LSB) & MAC_PCU_SLP32_MODE_HALF_CLK_LATENCY_MASK) 977 978#define MAC_PCU_SLP32_WAKE_ADDRESS 0x000000f8 979#define MAC_PCU_SLP32_WAKE_OFFSET 0x000000f8 980#define MAC_PCU_SLP32_WAKE_XTL_TIME_MSB 15 981#define MAC_PCU_SLP32_WAKE_XTL_TIME_LSB 0 982#define MAC_PCU_SLP32_WAKE_XTL_TIME_MASK 0x0000ffff 983#define MAC_PCU_SLP32_WAKE_XTL_TIME_GET(x) (((x) & MAC_PCU_SLP32_WAKE_XTL_TIME_MASK) >> MAC_PCU_SLP32_WAKE_XTL_TIME_LSB) 984#define MAC_PCU_SLP32_WAKE_XTL_TIME_SET(x) (((x) << MAC_PCU_SLP32_WAKE_XTL_TIME_LSB) & MAC_PCU_SLP32_WAKE_XTL_TIME_MASK) 985 986#define MAC_PCU_SLP32_INC_ADDRESS 0x000000fc 987#define MAC_PCU_SLP32_INC_OFFSET 0x000000fc 988#define MAC_PCU_SLP32_INC_TSF_INC_MSB 19 989#define MAC_PCU_SLP32_INC_TSF_INC_LSB 0 990#define MAC_PCU_SLP32_INC_TSF_INC_MASK 0x000fffff 991#define MAC_PCU_SLP32_INC_TSF_INC_GET(x) (((x) & MAC_PCU_SLP32_INC_TSF_INC_MASK) >> MAC_PCU_SLP32_INC_TSF_INC_LSB) 992#define MAC_PCU_SLP32_INC_TSF_INC_SET(x) (((x) << MAC_PCU_SLP32_INC_TSF_INC_LSB) & MAC_PCU_SLP32_INC_TSF_INC_MASK) 993 994#define MAC_PCU_SLP_MIB1_ADDRESS 0x00000100 995#define MAC_PCU_SLP_MIB1_OFFSET 0x00000100 996#define MAC_PCU_SLP_MIB1_SLEEP_CNT_MSB 31 997#define MAC_PCU_SLP_MIB1_SLEEP_CNT_LSB 0 998#define MAC_PCU_SLP_MIB1_SLEEP_CNT_MASK 0xffffffff 999#define MAC_PCU_SLP_MIB1_SLEEP_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB1_SLEEP_CNT_MASK) >> MAC_PCU_SLP_MIB1_SLEEP_CNT_LSB) 1000#define MAC_PCU_SLP_MIB1_SLEEP_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB1_SLEEP_CNT_LSB) & MAC_PCU_SLP_MIB1_SLEEP_CNT_MASK)
1001 1002#define MAC_PCU_SLP_MIB2_ADDRESS 0x00000104 1003#define MAC_PCU_SLP_MIB2_OFFSET 0x00000104 1004#define MAC_PCU_SLP_MIB2_CYCLE_CNT_MSB 31 1005#define MAC_PCU_SLP_MIB2_CYCLE_CNT_LSB 0 1006#define MAC_PCU_SLP_MIB2_CYCLE_CNT_MASK 0xffffffff 1007#define MAC_PCU_SLP_MIB2_CYCLE_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB2_CYCLE_CNT_MASK) >> MAC_PCU_SLP_MIB2_CYCLE_CNT_LSB) 1008#define MAC_PCU_SLP_MIB2_CYCLE_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB2_CYCLE_CNT_LSB) & MAC_PCU_SLP_MIB2_CYCLE_CNT_MASK) 1009 1010#define MAC_PCU_SLP_MIB3_ADDRESS 0x00000108 1011#define MAC_PCU_SLP_MIB3_OFFSET 0x00000108 1012#define MAC_PCU_SLP_MIB3_PENDING_MSB 1 1013#define MAC_PCU_SLP_MIB3_PENDING_LSB 1 1014#define MAC_PCU_SLP_MIB3_PENDING_MASK 0x00000002 1015#define MAC_PCU_SLP_MIB3_PENDING_GET(x) (((x) & MAC_PCU_SLP_MIB3_PENDING_MASK) >> MAC_PCU_SLP_MIB3_PENDING_LSB) 1016#define MAC_PCU_SLP_MIB3_PENDING_SET(x) (((x) << MAC_PCU_SLP_MIB3_PENDING_LSB) & MAC_PCU_SLP_MIB3_PENDING_MASK) 1017#define MAC_PCU_SLP_MIB3_CLR_CNT_MSB 0 1018#define MAC_PCU_SLP_MIB3_CLR_CNT_LSB 0 1019#define MAC_PCU_SLP_MIB3_CLR_CNT_MASK 0x00000001 1020#define MAC_PCU_SLP_MIB3_CLR_CNT_GET(x) (((x) & MAC_PCU_SLP_MIB3_CLR_CNT_MASK) >> MAC_PCU_SLP_MIB3_CLR_CNT_LSB) 1021#define MAC_PCU_SLP_MIB3_CLR_CNT_SET(x) (((x) << MAC_PCU_SLP_MIB3_CLR_CNT_LSB) & MAC_PCU_SLP_MIB3_CLR_CNT_MASK) 1022 1023#define WLAN_POWER_REG_ADDRESS 0x0000010c 1024#define WLAN_POWER_REG_OFFSET 0x0000010c 1025#define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MSB 15 1026#define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_LSB 15 1027#define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MASK 0x00008000 1028#define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_GET(x) (((x) & WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MASK) >> WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_LSB) 1029#define WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_SET(x) (((x) << WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_LSB) & WLAN_POWER_REG_SLEEP_MAKE_N_BREAK_EN_MASK) 1030#define WLAN_POWER_REG_DEBUG_EN_MSB 14 1031#define WLAN_POWER_REG_DEBUG_EN_LSB 14 1032#define WLAN_POWER_REG_DEBUG_EN_MASK 0x00004000 1033#define WLAN_POWER_REG_DEBUG_EN_GET(x) (((x) & WLAN_POWER_REG_DEBUG_EN_MASK) >> WLAN_POWER_REG_DEBUG_EN_LSB) 1034#define WLAN_POWER_REG_DEBUG_EN_SET(x) (((x) << WLAN_POWER_REG_DEBUG_EN_LSB) & WLAN_POWER_REG_DEBUG_EN_MASK) 1035#define WLAN_POWER_REG_WLAN_BB_PWD_EN_MSB 13 1036#define WLAN_POWER_REG_WLAN_BB_PWD_EN_LSB 13 1037#define WLAN_POWER_REG_WLAN_BB_PWD_EN_MASK 0x00002000 1038#define WLAN_POWER_REG_WLAN_BB_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_BB_PWD_EN_MASK) >> WLAN_POWER_REG_WLAN_BB_PWD_EN_LSB) 1039#define WLAN_POWER_REG_WLAN_BB_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_BB_PWD_EN_LSB) & WLAN_POWER_REG_WLAN_BB_PWD_EN_MASK) 1040#define WLAN_POWER_REG_WLAN_MAC_PWD_EN_MSB 12 1041#define WLAN_POWER_REG_WLAN_MAC_PWD_EN_LSB 12 1042#define WLAN_POWER_REG_WLAN_MAC_PWD_EN_MASK 0x00001000 1043#define WLAN_POWER_REG_WLAN_MAC_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_MAC_PWD_EN_MASK) >> WLAN_POWER_REG_WLAN_MAC_PWD_EN_LSB) 1044#define WLAN_POWER_REG_WLAN_MAC_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_MAC_PWD_EN_LSB) & WLAN_POWER_REG_WLAN_MAC_PWD_EN_MASK) 1045#define WLAN_POWER_REG_VLVL_MSB 11 1046#define WLAN_POWER_REG_VLVL_LSB 8 1047#define WLAN_POWER_REG_VLVL_MASK 0x00000f00 1048#define WLAN_POWER_REG_VLVL_GET(x) (((x) & WLAN_POWER_REG_VLVL_MASK) >> WLAN_POWER_REG_VLVL_LSB) 1049#define WLAN_POWER_REG_VLVL_SET(x) (((x) << WLAN_POWER_REG_VLVL_LSB) & WLAN_POWER_REG_VLVL_MASK) 1050#define WLAN_POWER_REG_CPU_INT_ENABLE_MSB 7 1051#define WLAN_POWER_REG_CPU_INT_ENABLE_LSB 7 1052#define WLAN_POWER_REG_CPU_INT_ENABLE_MASK 0x00000080 1053#define WLAN_POWER_REG_CPU_INT_ENABLE_GET(x) (((x) & WLAN_POWER_REG_CPU_INT_ENABLE_MASK) >> WLAN_POWER_REG_CPU_INT_ENABLE_LSB) 1054#define WLAN_POWER_REG_CPU_INT_ENABLE_SET(x) (((x) << WLAN_POWER_REG_CPU_INT_ENABLE_LSB) & WLAN_POWER_REG_CPU_INT_ENABLE_MASK) 1055#define WLAN_POWER_REG_WLAN_ISO_DIS_MSB 6 1056#define WLAN_POWER_REG_WLAN_ISO_DIS_LSB 6 1057#define WLAN_POWER_REG_WLAN_ISO_DIS_MASK 0x00000040 1058#define WLAN_POWER_REG_WLAN_ISO_DIS_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO_DIS_MASK) >> WLAN_POWER_REG_WLAN_ISO_DIS_LSB) 1059#define WLAN_POWER_REG_WLAN_ISO_DIS_SET(x) (((x) << WLAN_POWER_REG_WLAN_ISO_DIS_LSB) & WLAN_POWER_REG_WLAN_ISO_DIS_MASK) 1060#define WLAN_POWER_REG_WLAN_ISO_CNTL_MSB 5 1061#define WLAN_POWER_REG_WLAN_ISO_CNTL_LSB 5 1062#define WLAN_POWER_REG_WLAN_ISO_CNTL_MASK 0x00000020 1063#define WLAN_POWER_REG_WLAN_ISO_CNTL_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO_CNTL_MASK) >> WLAN_POWER_REG_WLAN_ISO_CNTL_LSB) 1064#define WLAN_POWER_REG_WLAN_ISO_CNTL_SET(x) (((x) << WLAN_POWER_REG_WLAN_ISO_CNTL_LSB) & WLAN_POWER_REG_WLAN_ISO_CNTL_MASK) 1065#define WLAN_POWER_REG_RADIO_PWD_EN_MSB 4 1066#define WLAN_POWER_REG_RADIO_PWD_EN_LSB 4 1067#define WLAN_POWER_REG_RADIO_PWD_EN_MASK 0x00000010 1068#define WLAN_POWER_REG_RADIO_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_RADIO_PWD_EN_MASK) >> WLAN_POWER_REG_RADIO_PWD_EN_LSB) 1069#define WLAN_POWER_REG_RADIO_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_RADIO_PWD_EN_LSB) & WLAN_POWER_REG_RADIO_PWD_EN_MASK) 1070#define WLAN_POWER_REG_SOC_ISO_EN_MSB 3 1071#define WLAN_POWER_REG_SOC_ISO_EN_LSB 3 1072#define WLAN_POWER_REG_SOC_ISO_EN_MASK 0x00000008 1073#define WLAN_POWER_REG_SOC_ISO_EN_GET(x) (((x) & WLAN_POWER_REG_SOC_ISO_EN_MASK) >> WLAN_POWER_REG_SOC_ISO_EN_LSB) 1074#define WLAN_POWER_REG_SOC_ISO_EN_SET(x) (((x) << WLAN_POWER_REG_SOC_ISO_EN_LSB) & WLAN_POWER_REG_SOC_ISO_EN_MASK) 1075#define WLAN_POWER_REG_WLAN_ISO_EN_MSB 2 1076#define WLAN_POWER_REG_WLAN_ISO_EN_LSB 2 1077#define WLAN_POWER_REG_WLAN_ISO_EN_MASK 0x00000004 1078#define WLAN_POWER_REG_WLAN_ISO_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_ISO_EN_MASK) >> WLAN_POWER_REG_WLAN_ISO_EN_LSB) 1079#define WLAN_POWER_REG_WLAN_ISO_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_ISO_EN_LSB) & WLAN_POWER_REG_WLAN_ISO_EN_MASK) 1080#define WLAN_POWER_REG_WLAN_PWD_EN_MSB 1 1081#define WLAN_POWER_REG_WLAN_PWD_EN_LSB 1 1082#define WLAN_POWER_REG_WLAN_PWD_EN_MASK 0x00000002 1083#define WLAN_POWER_REG_WLAN_PWD_EN_GET(x) (((x) & WLAN_POWER_REG_WLAN_PWD_EN_MASK) >> WLAN_POWER_REG_WLAN_PWD_EN_LSB) 1084#define WLAN_POWER_REG_WLAN_PWD_EN_SET(x) (((x) << WLAN_POWER_REG_WLAN_PWD_EN_LSB) & WLAN_POWER_REG_WLAN_PWD_EN_MASK) 1085#define WLAN_POWER_REG_POWER_EN_MSB 0 1086#define WLAN_POWER_REG_POWER_EN_LSB 0 1087#define WLAN_POWER_REG_POWER_EN_MASK 0x00000001 1088#define WLAN_POWER_REG_POWER_EN_GET(x) (((x) & WLAN_POWER_REG_POWER_EN_MASK) >> WLAN_POWER_REG_POWER_EN_LSB) 1089#define WLAN_POWER_REG_POWER_EN_SET(x) (((x) << WLAN_POWER_REG_POWER_EN_LSB) & WLAN_POWER_REG_POWER_EN_MASK) 1090 1091#define WLAN_CORE_CLK_CTRL_ADDRESS 0x00000110 1092#define WLAN_CORE_CLK_CTRL_OFFSET 0x00000110 1093#define WLAN_CORE_CLK_CTRL_DIV_MSB 2 1094#define WLAN_CORE_CLK_CTRL_DIV_LSB 0 1095#define WLAN_CORE_CLK_CTRL_DIV_MASK 0x00000007 1096#define WLAN_CORE_CLK_CTRL_DIV_GET(x) (((x) & WLAN_CORE_CLK_CTRL_DIV_MASK) >> WLAN_CORE_CLK_CTRL_DIV_LSB) 1097#define WLAN_CORE_CLK_CTRL_DIV_SET(x) (((x) << WLAN_CORE_CLK_CTRL_DIV_LSB) & WLAN_CORE_CLK_CTRL_DIV_MASK) 1098 1099#define WLAN_GPIO_WAKEUP_CONTROL_ADDRESS 0x00000114 1100#define WLAN_GPIO_WAKEUP_CONTROL_OFFSET 0x00000114 1101#define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MSB 0 1102#define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_LSB 0 1103#define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MASK 0x00000001 1104#define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_GET(x) (((x) & WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MASK) >> WLAN_GPIO_WAKEUP_CONTROL_ENABLE_LSB) 1105#define WLAN_GPIO_WAKEUP_CONTROL_ENABLE_SET(x) (((x) << WLAN_GPIO_WAKEUP_CONTROL_ENABLE_LSB) & WLAN_GPIO_WAKEUP_CONTROL_ENABLE_MASK) 1106 1107#define HT_ADDRESS 0x00000118 1108#define HT_OFFSET 0x00000118 1109#define HT_MODE_MSB 0 1110#define HT_MODE_LSB 0 1111#define HT_MODE_MASK 0x00000001 1112#define HT_MODE_GET(x) (((x) & HT_MODE_MASK) >> HT_MODE_LSB) 1113#define HT_MODE_SET(x) (((x) << HT_MODE_LSB) & HT_MODE_MASK) 1114 1115#define MAC_PCU_TSF_L32_ADDRESS 0x0000011c 1116#define MAC_PCU_TSF_L32_OFFSET 0x0000011c 1117#define MAC_PCU_TSF_L32_VALUE_MSB 31 1118#define MAC_PCU_TSF_L32_VALUE_LSB 0 1119#define MAC_PCU_TSF_L32_VALUE_MASK 0xffffffff 1120#define MAC_PCU_TSF_L32_VALUE_GET(x) (((x) & MAC_PCU_TSF_L32_VALUE_MASK) >> MAC_PCU_TSF_L32_VALUE_LSB) 1121#define MAC_PCU_TSF_L32_VALUE_SET(x) (((x) << MAC_PCU_TSF_L32_VALUE_LSB) & MAC_PCU_TSF_L32_VALUE_MASK) 1122 1123#define MAC_PCU_TSF_U32_ADDRESS 0x00000120 1124#define MAC_PCU_TSF_U32_OFFSET 0x00000120 1125#define MAC_PCU_TSF_U32_VALUE_MSB 31 1126#define MAC_PCU_TSF_U32_VALUE_LSB 0 1127#define MAC_PCU_TSF_U32_VALUE_MASK 0xffffffff 1128#define MAC_PCU_TSF_U32_VALUE_GET(x) (((x) & MAC_PCU_TSF_U32_VALUE_MASK) >> MAC_PCU_TSF_U32_VALUE_LSB) 1129#define MAC_PCU_TSF_U32_VALUE_SET(x) (((x) << MAC_PCU_TSF_U32_VALUE_LSB) & MAC_PCU_TSF_U32_VALUE_MASK) 1130 1131#define MAC_PCU_WBTIMER_ADDRESS 0x00000124 1132#define MAC_PCU_WBTIMER_OFFSET 0x00000124 1133#define MAC_PCU_WBTIMER_VALUE_MSB 31 1134#define MAC_PCU_WBTIMER_VALUE_LSB 0 1135#define MAC_PCU_WBTIMER_VALUE_MASK 0xffffffff 1136#define MAC_PCU_WBTIMER_VALUE_GET(x) (((x) & MAC_PCU_WBTIMER_VALUE_MASK) >> MAC_PCU_WBTIMER_VALUE_LSB) 1137#define MAC_PCU_WBTIMER_VALUE_SET(x) (((x) << MAC_PCU_WBTIMER_VALUE_LSB) & MAC_PCU_WBTIMER_VALUE_MASK) 1138 1139#define MAC_PCU_GENERIC_TIMERS_ADDRESS 0x00000140 1140#define MAC_PCU_GENERIC_TIMERS_OFFSET 0x00000140 1141#define MAC_PCU_GENERIC_TIMERS_DATA_MSB 31 1142#define MAC_PCU_GENERIC_TIMERS_DATA_LSB 0 1143#define MAC_PCU_GENERIC_TIMERS_DATA_MASK 0xffffffff 1144#define MAC_PCU_GENERIC_TIMERS_DATA_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_DATA_MASK) >> MAC_PCU_GENERIC_TIMERS_DATA_LSB) 1145#define MAC_PCU_GENERIC_TIMERS_DATA_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS_DATA_LSB) & MAC_PCU_GENERIC_TIMERS_DATA_MASK) 1146 1147#define MAC_PCU_GENERIC_TIMERS_MODE_ADDRESS 0x00000180 1148#define MAC_PCU_GENERIC_TIMERS_MODE_OFFSET 0x00000180 1149#define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MSB 15 1150#define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_LSB 0 1151#define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MASK 0x0000ffff 1152#define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_LSB) 1153#define MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_LSB) & MAC_PCU_GENERIC_TIMERS_MODE_ENABLE_MASK) 1154 1155#define MAC_PCU_GENERIC_TIMERS2_ADDRESS 0x000001c0 1156#define MAC_PCU_GENERIC_TIMERS2_OFFSET 0x000001c0 1157#define MAC_PCU_GENERIC_TIMERS2_DATA_MSB 31 1158#define MAC_PCU_GENERIC_TIMERS2_DATA_LSB 0 1159#define MAC_PCU_GENERIC_TIMERS2_DATA_MASK 0xffffffff 1160#define MAC_PCU_GENERIC_TIMERS2_DATA_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS2_DATA_MASK) >> MAC_PCU_GENERIC_TIMERS2_DATA_LSB) 1161#define MAC_PCU_GENERIC_TIMERS2_DATA_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS2_DATA_LSB) & MAC_PCU_GENERIC_TIMERS2_DATA_MASK) 1162 1163#define MAC_PCU_GENERIC_TIMERS_MODE2_ADDRESS 0x00000200 1164#define MAC_PCU_GENERIC_TIMERS_MODE2_OFFSET 0x00000200 1165#define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MSB 15 1166#define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_LSB 0 1167#define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MASK 0x0000ffff 1168#define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_LSB) 1169#define MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_LSB) & MAC_PCU_GENERIC_TIMERS_MODE2_ENABLE_MASK) 1170 1171#define MAC_PCU_SLP1_ADDRESS 0x00000204 1172#define MAC_PCU_SLP1_OFFSET 0x00000204 1173#define MAC_PCU_SLP1_ASSUME_DTIM_MSB 19 1174#define MAC_PCU_SLP1_ASSUME_DTIM_LSB 19 1175#define MAC_PCU_SLP1_ASSUME_DTIM_MASK 0x00080000 1176#define MAC_PCU_SLP1_ASSUME_DTIM_GET(x) (((x) & MAC_PCU_SLP1_ASSUME_DTIM_MASK) >> MAC_PCU_SLP1_ASSUME_DTIM_LSB) 1177#define MAC_PCU_SLP1_ASSUME_DTIM_SET(x) (((x) << MAC_PCU_SLP1_ASSUME_DTIM_LSB) & MAC_PCU_SLP1_ASSUME_DTIM_MASK) 1178#define MAC_PCU_SLP1_CAB_TIMEOUT_MSB 15 1179#define MAC_PCU_SLP1_CAB_TIMEOUT_LSB 0 1180#define MAC_PCU_SLP1_CAB_TIMEOUT_MASK 0x0000ffff 1181#define MAC_PCU_SLP1_CAB_TIMEOUT_GET(x) (((x) & MAC_PCU_SLP1_CAB_TIMEOUT_MASK) >> MAC_PCU_SLP1_CAB_TIMEOUT_LSB) 1182#define MAC_PCU_SLP1_CAB_TIMEOUT_SET(x) (((x) << MAC_PCU_SLP1_CAB_TIMEOUT_LSB) & MAC_PCU_SLP1_CAB_TIMEOUT_MASK) 1183 1184#define MAC_PCU_SLP2_ADDRESS 0x00000208 1185#define MAC_PCU_SLP2_OFFSET 0x00000208 1186#define MAC_PCU_SLP2_BEACON_TIMEOUT_MSB 15 1187#define MAC_PCU_SLP2_BEACON_TIMEOUT_LSB 0 1188#define MAC_PCU_SLP2_BEACON_TIMEOUT_MASK 0x0000ffff 1189#define MAC_PCU_SLP2_BEACON_TIMEOUT_GET(x) (((x) & MAC_PCU_SLP2_BEACON_TIMEOUT_MASK) >> MAC_PCU_SLP2_BEACON_TIMEOUT_LSB) 1190#define MAC_PCU_SLP2_BEACON_TIMEOUT_SET(x) (((x) << MAC_PCU_SLP2_BEACON_TIMEOUT_LSB) & MAC_PCU_SLP2_BEACON_TIMEOUT_MASK) 1191 1192#define MAC_PCU_RESET_TSF_ADDRESS 0x0000020c 1193#define MAC_PCU_RESET_TSF_OFFSET 0x0000020c 1194#define MAC_PCU_RESET_TSF_ONE_SHOT2_MSB 25 1195#define MAC_PCU_RESET_TSF_ONE_SHOT2_LSB 25 1196#define MAC_PCU_RESET_TSF_ONE_SHOT2_MASK 0x02000000 1197#define MAC_PCU_RESET_TSF_ONE_SHOT2_GET(x) (((x) & MAC_PCU_RESET_TSF_ONE_SHOT2_MASK) >> MAC_PCU_RESET_TSF_ONE_SHOT2_LSB) 1198#define MAC_PCU_RESET_TSF_ONE_SHOT2_SET(x) (((x) << MAC_PCU_RESET_TSF_ONE_SHOT2_LSB) & MAC_PCU_RESET_TSF_ONE_SHOT2_MASK) 1199#define MAC_PCU_RESET_TSF_ONE_SHOT_MSB 24 1200#define MAC_PCU_RESET_TSF_ONE_SHOT_LSB 24 1201#define MAC_PCU_RESET_TSF_ONE_SHOT_MASK 0x01000000 1202#define MAC_PCU_RESET_TSF_ONE_SHOT_GET(x) (((x) & MAC_PCU_RESET_TSF_ONE_SHOT_MASK) >> MAC_PCU_RESET_TSF_ONE_SHOT_LSB) 1203#define MAC_PCU_RESET_TSF_ONE_SHOT_SET(x) (((x) << MAC_PCU_RESET_TSF_ONE_SHOT_LSB) & MAC_PCU_RESET_TSF_ONE_SHOT_MASK) 1204 1205#define MAC_PCU_TSF_ADD_PLL_ADDRESS 0x00000210 1206#define MAC_PCU_TSF_ADD_PLL_OFFSET 0x00000210 1207#define MAC_PCU_TSF_ADD_PLL_VALUE_MSB 7 1208#define MAC_PCU_TSF_ADD_PLL_VALUE_LSB 0 1209#define MAC_PCU_TSF_ADD_PLL_VALUE_MASK 0x000000ff 1210#define MAC_PCU_TSF_ADD_PLL_VALUE_GET(x) (((x) & MAC_PCU_TSF_ADD_PLL_VALUE_MASK) >> MAC_PCU_TSF_ADD_PLL_VALUE_LSB) 1211#define MAC_PCU_TSF_ADD_PLL_VALUE_SET(x) (((x) << MAC_PCU_TSF_ADD_PLL_VALUE_LSB) & MAC_PCU_TSF_ADD_PLL_VALUE_MASK) 1212 1213#define SLEEP_RETENTION_ADDRESS 0x00000214 1214#define SLEEP_RETENTION_OFFSET 0x00000214 1215#define SLEEP_RETENTION_TIME_MSB 9 1216#define SLEEP_RETENTION_TIME_LSB 2 1217#define SLEEP_RETENTION_TIME_MASK 0x000003fc 1218#define SLEEP_RETENTION_TIME_GET(x) (((x) & SLEEP_RETENTION_TIME_MASK) >> SLEEP_RETENTION_TIME_LSB) 1219#define SLEEP_RETENTION_TIME_SET(x) (((x) << SLEEP_RETENTION_TIME_LSB) & SLEEP_RETENTION_TIME_MASK) 1220#define SLEEP_RETENTION_MODE_MSB 1 1221#define SLEEP_RETENTION_MODE_LSB 1 1222#define SLEEP_RETENTION_MODE_MASK 0x00000002 1223#define SLEEP_RETENTION_MODE_GET(x) (((x) & SLEEP_RETENTION_MODE_MASK) >> SLEEP_RETENTION_MODE_LSB) 1224#define SLEEP_RETENTION_MODE_SET(x) (((x) << SLEEP_RETENTION_MODE_LSB) & SLEEP_RETENTION_MODE_MASK) 1225#define SLEEP_RETENTION_ENABLE_MSB 0 1226#define SLEEP_RETENTION_ENABLE_LSB 0 1227#define SLEEP_RETENTION_ENABLE_MASK 0x00000001 1228#define SLEEP_RETENTION_ENABLE_GET(x) (((x) & SLEEP_RETENTION_ENABLE_MASK) >> SLEEP_RETENTION_ENABLE_LSB) 1229#define SLEEP_RETENTION_ENABLE_SET(x) (((x) << SLEEP_RETENTION_ENABLE_LSB) & SLEEP_RETENTION_ENABLE_MASK) 1230 1231#define BTCOEXCTRL_ADDRESS 0x00000218 1232#define BTCOEXCTRL_OFFSET 0x00000218 1233#define BTCOEXCTRL_WBTIMER_ENABLE_MSB 26 1234#define BTCOEXCTRL_WBTIMER_ENABLE_LSB 26 1235#define BTCOEXCTRL_WBTIMER_ENABLE_MASK 0x04000000 1236#define BTCOEXCTRL_WBTIMER_ENABLE_GET(x) (((x) & BTCOEXCTRL_WBTIMER_ENABLE_MASK) >> BTCOEXCTRL_WBTIMER_ENABLE_LSB) 1237#define BTCOEXCTRL_WBTIMER_ENABLE_SET(x) (((x) << BTCOEXCTRL_WBTIMER_ENABLE_LSB) & BTCOEXCTRL_WBTIMER_ENABLE_MASK) 1238#define BTCOEXCTRL_WBSYNC_ON_BEACON_MSB 25 1239#define BTCOEXCTRL_WBSYNC_ON_BEACON_LSB 25 1240#define BTCOEXCTRL_WBSYNC_ON_BEACON_MASK 0x02000000 1241#define BTCOEXCTRL_WBSYNC_ON_BEACON_GET(x) (((x) & BTCOEXCTRL_WBSYNC_ON_BEACON_MASK) >> BTCOEXCTRL_WBSYNC_ON_BEACON_LSB) 1242#define BTCOEXCTRL_WBSYNC_ON_BEACON_SET(x) (((x) << BTCOEXCTRL_WBSYNC_ON_BEACON_LSB) & BTCOEXCTRL_WBSYNC_ON_BEACON_MASK) 1243#define BTCOEXCTRL_PTA_MODE_MSB 24 1244#define BTCOEXCTRL_PTA_MODE_LSB 23 1245#define BTCOEXCTRL_PTA_MODE_MASK 0x01800000 1246#define BTCOEXCTRL_PTA_MODE_GET(x) (((x) & BTCOEXCTRL_PTA_MODE_MASK) >> BTCOEXCTRL_PTA_MODE_LSB) 1247#define BTCOEXCTRL_PTA_MODE_SET(x) (((x) << BTCOEXCTRL_PTA_MODE_LSB) & BTCOEXCTRL_PTA_MODE_MASK) 1248#define BTCOEXCTRL_FREQ_TIME_MSB 22 1249#define BTCOEXCTRL_FREQ_TIME_LSB 18 1250#define BTCOEXCTRL_FREQ_TIME_MASK 0x007c0000 1251#define BTCOEXCTRL_FREQ_TIME_GET(x) (((x) & BTCOEXCTRL_FREQ_TIME_MASK) >> BTCOEXCTRL_FREQ_TIME_LSB) 1252#define BTCOEXCTRL_FREQ_TIME_SET(x) (((x) << BTCOEXCTRL_FREQ_TIME_LSB) & BTCOEXCTRL_FREQ_TIME_MASK) 1253#define BTCOEXCTRL_PRIORITY_TIME_MSB 17 1254#define BTCOEXCTRL_PRIORITY_TIME_LSB 12 1255#define BTCOEXCTRL_PRIORITY_TIME_MASK 0x0003f000 1256#define BTCOEXCTRL_PRIORITY_TIME_GET(x) (((x) & BTCOEXCTRL_PRIORITY_TIME_MASK) >> BTCOEXCTRL_PRIORITY_TIME_LSB) 1257#define BTCOEXCTRL_PRIORITY_TIME_SET(x) (((x) << BTCOEXCTRL_PRIORITY_TIME_LSB) & BTCOEXCTRL_PRIORITY_TIME_MASK) 1258#define BTCOEXCTRL_SYNC_DET_EN_MSB 11 1259#define BTCOEXCTRL_SYNC_DET_EN_LSB 11 1260#define BTCOEXCTRL_SYNC_DET_EN_MASK 0x00000800 1261#define BTCOEXCTRL_SYNC_DET_EN_GET(x) (((x) & BTCOEXCTRL_SYNC_DET_EN_MASK) >> BTCOEXCTRL_SYNC_DET_EN_LSB) 1262#define BTCOEXCTRL_SYNC_DET_EN_SET(x) (((x) << BTCOEXCTRL_SYNC_DET_EN_LSB) & BTCOEXCTRL_SYNC_DET_EN_MASK) 1263#define BTCOEXCTRL_IDLE_CNT_EN_MSB 10 1264#define BTCOEXCTRL_IDLE_CNT_EN_LSB 10 1265#define BTCOEXCTRL_IDLE_CNT_EN_MASK 0x00000400 1266#define BTCOEXCTRL_IDLE_CNT_EN_GET(x) (((x) & BTCOEXCTRL_IDLE_CNT_EN_MASK) >> BTCOEXCTRL_IDLE_CNT_EN_LSB) 1267#define BTCOEXCTRL_IDLE_CNT_EN_SET(x) (((x) << BTCOEXCTRL_IDLE_CNT_EN_LSB) & BTCOEXCTRL_IDLE_CNT_EN_MASK) 1268#define BTCOEXCTRL_FRAME_CNT_EN_MSB 9 1269#define BTCOEXCTRL_FRAME_CNT_EN_LSB 9 1270#define BTCOEXCTRL_FRAME_CNT_EN_MASK 0x00000200 1271#define BTCOEXCTRL_FRAME_CNT_EN_GET(x) (((x) & BTCOEXCTRL_FRAME_CNT_EN_MASK) >> BTCOEXCTRL_FRAME_CNT_EN_LSB) 1272#define BTCOEXCTRL_FRAME_CNT_EN_SET(x) (((x) << BTCOEXCTRL_FRAME_CNT_EN_LSB) & BTCOEXCTRL_FRAME_CNT_EN_MASK) 1273#define BTCOEXCTRL_CLK_CNT_EN_MSB 8 1274#define BTCOEXCTRL_CLK_CNT_EN_LSB 8 1275#define BTCOEXCTRL_CLK_CNT_EN_MASK 0x00000100 1276#define BTCOEXCTRL_CLK_CNT_EN_GET(x) (((x) & BTCOEXCTRL_CLK_CNT_EN_MASK) >> BTCOEXCTRL_CLK_CNT_EN_LSB) 1277#define BTCOEXCTRL_CLK_CNT_EN_SET(x) (((x) << BTCOEXCTRL_CLK_CNT_EN_LSB) & BTCOEXCTRL_CLK_CNT_EN_MASK) 1278#define BTCOEXCTRL_GAP_MSB 7 1279#define BTCOEXCTRL_GAP_LSB 0 1280#define BTCOEXCTRL_GAP_MASK 0x000000ff 1281#define BTCOEXCTRL_GAP_GET(x) (((x) & BTCOEXCTRL_GAP_MASK) >> BTCOEXCTRL_GAP_LSB) 1282#define BTCOEXCTRL_GAP_SET(x) (((x) << BTCOEXCTRL_GAP_LSB) & BTCOEXCTRL_GAP_MASK) 1283 1284#define WBSYNC_PRIORITY1_ADDRESS 0x0000021c 1285#define WBSYNC_PRIORITY1_OFFSET 0x0000021c 1286#define WBSYNC_PRIORITY1_BITMAP_MSB 31 1287#define WBSYNC_PRIORITY1_BITMAP_LSB 0 1288#define WBSYNC_PRIORITY1_BITMAP_MASK 0xffffffff 1289#define WBSYNC_PRIORITY1_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY1_BITMAP_MASK) >> WBSYNC_PRIORITY1_BITMAP_LSB) 1290#define WBSYNC_PRIORITY1_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY1_BITMAP_LSB) & WBSYNC_PRIORITY1_BITMAP_MASK) 1291 1292#define WBSYNC_PRIORITY2_ADDRESS 0x00000220 1293#define WBSYNC_PRIORITY2_OFFSET 0x00000220 1294#define WBSYNC_PRIORITY2_BITMAP_MSB 31 1295#define WBSYNC_PRIORITY2_BITMAP_LSB 0 1296#define WBSYNC_PRIORITY2_BITMAP_MASK 0xffffffff 1297#define WBSYNC_PRIORITY2_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY2_BITMAP_MASK) >> WBSYNC_PRIORITY2_BITMAP_LSB) 1298#define WBSYNC_PRIORITY2_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY2_BITMAP_LSB) & WBSYNC_PRIORITY2_BITMAP_MASK) 1299 1300#define WBSYNC_PRIORITY3_ADDRESS 0x00000224 1301#define WBSYNC_PRIORITY3_OFFSET 0x00000224 1302#define WBSYNC_PRIORITY3_BITMAP_MSB 31 1303#define WBSYNC_PRIORITY3_BITMAP_LSB 0 1304#define WBSYNC_PRIORITY3_BITMAP_MASK 0xffffffff 1305#define WBSYNC_PRIORITY3_BITMAP_GET(x) (((x) & WBSYNC_PRIORITY3_BITMAP_MASK) >> WBSYNC_PRIORITY3_BITMAP_LSB) 1306#define WBSYNC_PRIORITY3_BITMAP_SET(x) (((x) << WBSYNC_PRIORITY3_BITMAP_LSB) & WBSYNC_PRIORITY3_BITMAP_MASK) 1307 1308#define BTCOEX0_ADDRESS 0x00000228 1309#define BTCOEX0_OFFSET 0x00000228 1310#define BTCOEX0_SYNC_DUR_MSB 7 1311#define BTCOEX0_SYNC_DUR_LSB 0 1312#define BTCOEX0_SYNC_DUR_MASK 0x000000ff 1313#define BTCOEX0_SYNC_DUR_GET(x) (((x) & BTCOEX0_SYNC_DUR_MASK) >> BTCOEX0_SYNC_DUR_LSB) 1314#define BTCOEX0_SYNC_DUR_SET(x) (((x) << BTCOEX0_SYNC_DUR_LSB) & BTCOEX0_SYNC_DUR_MASK) 1315 1316#define BTCOEX1_ADDRESS 0x0000022c 1317#define BTCOEX1_OFFSET 0x0000022c 1318#define BTCOEX1_CLK_THRES_MSB 20 1319#define BTCOEX1_CLK_THRES_LSB 0 1320#define BTCOEX1_CLK_THRES_MASK 0x001fffff 1321#define BTCOEX1_CLK_THRES_GET(x) (((x) & BTCOEX1_CLK_THRES_MASK) >> BTCOEX1_CLK_THRES_LSB) 1322#define BTCOEX1_CLK_THRES_SET(x) (((x) << BTCOEX1_CLK_THRES_LSB) & BTCOEX1_CLK_THRES_MASK) 1323 1324#define BTCOEX2_ADDRESS 0x00000230 1325#define BTCOEX2_OFFSET 0x00000230 1326#define BTCOEX2_FRAME_THRES_MSB 7 1327#define BTCOEX2_FRAME_THRES_LSB 0 1328#define BTCOEX2_FRAME_THRES_MASK 0x000000ff 1329#define BTCOEX2_FRAME_THRES_GET(x) (((x) & BTCOEX2_FRAME_THRES_MASK) >> BTCOEX2_FRAME_THRES_LSB) 1330#define BTCOEX2_FRAME_THRES_SET(x) (((x) << BTCOEX2_FRAME_THRES_LSB) & BTCOEX2_FRAME_THRES_MASK) 1331 1332#define BTCOEX3_ADDRESS 0x00000234 1333#define BTCOEX3_OFFSET 0x00000234 1334#define BTCOEX3_CLK_CNT_MSB 20 1335#define BTCOEX3_CLK_CNT_LSB 0 1336#define BTCOEX3_CLK_CNT_MASK 0x001fffff 1337#define BTCOEX3_CLK_CNT_GET(x) (((x) & BTCOEX3_CLK_CNT_MASK) >> BTCOEX3_CLK_CNT_LSB) 1338#define BTCOEX3_CLK_CNT_SET(x) (((x) << BTCOEX3_CLK_CNT_LSB) & BTCOEX3_CLK_CNT_MASK) 1339 1340#define BTCOEX4_ADDRESS 0x00000238 1341#define BTCOEX4_OFFSET 0x00000238 1342#define BTCOEX4_FRAME_CNT_MSB 7 1343#define BTCOEX4_FRAME_CNT_LSB 0 1344#define BTCOEX4_FRAME_CNT_MASK 0x000000ff 1345#define BTCOEX4_FRAME_CNT_GET(x) (((x) & BTCOEX4_FRAME_CNT_MASK) >> BTCOEX4_FRAME_CNT_LSB) 1346#define BTCOEX4_FRAME_CNT_SET(x) (((x) << BTCOEX4_FRAME_CNT_LSB) & BTCOEX4_FRAME_CNT_MASK) 1347 1348#define BTCOEX5_ADDRESS 0x0000023c 1349#define BTCOEX5_OFFSET 0x0000023c 1350#define BTCOEX5_IDLE_CNT_MSB 15 1351#define BTCOEX5_IDLE_CNT_LSB 0 1352#define BTCOEX5_IDLE_CNT_MASK 0x0000ffff 1353#define BTCOEX5_IDLE_CNT_GET(x) (((x) & BTCOEX5_IDLE_CNT_MASK) >> BTCOEX5_IDLE_CNT_LSB) 1354#define BTCOEX5_IDLE_CNT_SET(x) (((x) << BTCOEX5_IDLE_CNT_LSB) & BTCOEX5_IDLE_CNT_MASK) 1355 1356#define BTCOEX6_ADDRESS 0x00000240 1357#define BTCOEX6_OFFSET 0x00000240 1358#define BTCOEX6_IDLE_RESET_LVL_BITMAP_MSB 31 1359#define BTCOEX6_IDLE_RESET_LVL_BITMAP_LSB 0 1360#define BTCOEX6_IDLE_RESET_LVL_BITMAP_MASK 0xffffffff 1361#define BTCOEX6_IDLE_RESET_LVL_BITMAP_GET(x) (((x) & BTCOEX6_IDLE_RESET_LVL_BITMAP_MASK) >> BTCOEX6_IDLE_RESET_LVL_BITMAP_LSB) 1362#define BTCOEX6_IDLE_RESET_LVL_BITMAP_SET(x) (((x) << BTCOEX6_IDLE_RESET_LVL_BITMAP_LSB) & BTCOEX6_IDLE_RESET_LVL_BITMAP_MASK) 1363 1364#define LOCK_ADDRESS 0x00000244 1365#define LOCK_OFFSET 0x00000244 1366#define LOCK_TLOCK_SLAVE_MSB 31 1367#define LOCK_TLOCK_SLAVE_LSB 24 1368#define LOCK_TLOCK_SLAVE_MASK 0xff000000 1369#define LOCK_TLOCK_SLAVE_GET(x) (((x) & LOCK_TLOCK_SLAVE_MASK) >> LOCK_TLOCK_SLAVE_LSB) 1370#define LOCK_TLOCK_SLAVE_SET(x) (((x) << LOCK_TLOCK_SLAVE_LSB) & LOCK_TLOCK_SLAVE_MASK) 1371#define LOCK_TUNLOCK_SLAVE_MSB 23 1372#define LOCK_TUNLOCK_SLAVE_LSB 16 1373#define LOCK_TUNLOCK_SLAVE_MASK 0x00ff0000 1374#define LOCK_TUNLOCK_SLAVE_GET(x) (((x) & LOCK_TUNLOCK_SLAVE_MASK) >> LOCK_TUNLOCK_SLAVE_LSB) 1375#define LOCK_TUNLOCK_SLAVE_SET(x) (((x) << LOCK_TUNLOCK_SLAVE_LSB) & LOCK_TUNLOCK_SLAVE_MASK) 1376#define LOCK_TLOCK_MASTER_MSB 15 1377#define LOCK_TLOCK_MASTER_LSB 8 1378#define LOCK_TLOCK_MASTER_MASK 0x0000ff00 1379#define LOCK_TLOCK_MASTER_GET(x) (((x) & LOCK_TLOCK_MASTER_MASK) >> LOCK_TLOCK_MASTER_LSB) 1380#define LOCK_TLOCK_MASTER_SET(x) (((x) << LOCK_TLOCK_MASTER_LSB) & LOCK_TLOCK_MASTER_MASK) 1381#define LOCK_TUNLOCK_MASTER_MSB 7 1382#define LOCK_TUNLOCK_MASTER_LSB 0 1383#define LOCK_TUNLOCK_MASTER_MASK 0x000000ff 1384#define LOCK_TUNLOCK_MASTER_GET(x) (((x) & LOCK_TUNLOCK_MASTER_MASK) >> LOCK_TUNLOCK_MASTER_LSB) 1385#define LOCK_TUNLOCK_MASTER_SET(x) (((x) << LOCK_TUNLOCK_MASTER_LSB) & LOCK_TUNLOCK_MASTER_MASK) 1386 1387#define NOLOCK_PRIORITY_ADDRESS 0x00000248 1388#define NOLOCK_PRIORITY_OFFSET 0x00000248 1389#define NOLOCK_PRIORITY_BITMAP_MSB 31 1390#define NOLOCK_PRIORITY_BITMAP_LSB 0 1391#define NOLOCK_PRIORITY_BITMAP_MASK 0xffffffff 1392#define NOLOCK_PRIORITY_BITMAP_GET(x) (((x) & NOLOCK_PRIORITY_BITMAP_MASK) >> NOLOCK_PRIORITY_BITMAP_LSB) 1393#define NOLOCK_PRIORITY_BITMAP_SET(x) (((x) << NOLOCK_PRIORITY_BITMAP_LSB) & NOLOCK_PRIORITY_BITMAP_MASK) 1394 1395#define WBSYNC_ADDRESS 0x0000024c 1396#define WBSYNC_OFFSET 0x0000024c 1397#define WBSYNC_BTCLOCK_MSB 31 1398#define WBSYNC_BTCLOCK_LSB 0 1399#define WBSYNC_BTCLOCK_MASK 0xffffffff 1400#define WBSYNC_BTCLOCK_GET(x) (((x) & WBSYNC_BTCLOCK_MASK) >> WBSYNC_BTCLOCK_LSB) 1401#define WBSYNC_BTCLOCK_SET(x) (((x) << WBSYNC_BTCLOCK_LSB) & WBSYNC_BTCLOCK_MASK) 1402 1403#define WBSYNC1_ADDRESS 0x00000250 1404#define WBSYNC1_OFFSET 0x00000250 1405#define WBSYNC1_BTCLOCK_MSB 31 1406#define WBSYNC1_BTCLOCK_LSB 0 1407#define WBSYNC1_BTCLOCK_MASK 0xffffffff 1408#define WBSYNC1_BTCLOCK_GET(x) (((x) & WBSYNC1_BTCLOCK_MASK) >> WBSYNC1_BTCLOCK_LSB) 1409#define WBSYNC1_BTCLOCK_SET(x) (((x) << WBSYNC1_BTCLOCK_LSB) & WBSYNC1_BTCLOCK_MASK) 1410 1411#define WBSYNC2_ADDRESS 0x00000254 1412#define WBSYNC2_OFFSET 0x00000254 1413#define WBSYNC2_BTCLOCK_MSB 31 1414#define WBSYNC2_BTCLOCK_LSB 0 1415#define WBSYNC2_BTCLOCK_MASK 0xffffffff 1416#define WBSYNC2_BTCLOCK_GET(x) (((x) & WBSYNC2_BTCLOCK_MASK) >> WBSYNC2_BTCLOCK_LSB) 1417#define WBSYNC2_BTCLOCK_SET(x) (((x) << WBSYNC2_BTCLOCK_LSB) & WBSYNC2_BTCLOCK_MASK) 1418 1419#define WBSYNC3_ADDRESS 0x00000258 1420#define WBSYNC3_OFFSET 0x00000258 1421#define WBSYNC3_BTCLOCK_MSB 31 1422#define WBSYNC3_BTCLOCK_LSB 0 1423#define WBSYNC3_BTCLOCK_MASK 0xffffffff 1424#define WBSYNC3_BTCLOCK_GET(x) (((x) & WBSYNC3_BTCLOCK_MASK) >> WBSYNC3_BTCLOCK_LSB) 1425#define WBSYNC3_BTCLOCK_SET(x) (((x) << WBSYNC3_BTCLOCK_LSB) & WBSYNC3_BTCLOCK_MASK) 1426 1427#define WB_TIMER_TARGET_ADDRESS 0x0000025c 1428#define WB_TIMER_TARGET_OFFSET 0x0000025c 1429#define WB_TIMER_TARGET_VALUE_MSB 31 1430#define WB_TIMER_TARGET_VALUE_LSB 0 1431#define WB_TIMER_TARGET_VALUE_MASK 0xffffffff 1432#define WB_TIMER_TARGET_VALUE_GET(x) (((x) & WB_TIMER_TARGET_VALUE_MASK) >> WB_TIMER_TARGET_VALUE_LSB) 1433#define WB_TIMER_TARGET_VALUE_SET(x) (((x) << WB_TIMER_TARGET_VALUE_LSB) & WB_TIMER_TARGET_VALUE_MASK) 1434 1435#define WB_TIMER_SLOP_ADDRESS 0x00000260 1436#define WB_TIMER_SLOP_OFFSET 0x00000260 1437#define WB_TIMER_SLOP_VALUE_MSB 9 1438#define WB_TIMER_SLOP_VALUE_LSB 0 1439#define WB_TIMER_SLOP_VALUE_MASK 0x000003ff 1440#define WB_TIMER_SLOP_VALUE_GET(x) (((x) & WB_TIMER_SLOP_VALUE_MASK) >> WB_TIMER_SLOP_VALUE_LSB) 1441#define WB_TIMER_SLOP_VALUE_SET(x) (((x) << WB_TIMER_SLOP_VALUE_LSB) & WB_TIMER_SLOP_VALUE_MASK) 1442 1443#define BTCOEX_INT_EN_ADDRESS 0x00000264 1444#define BTCOEX_INT_EN_OFFSET 0x00000264 1445#define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MSB 11 1446#define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_LSB 11 1447#define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MASK 0x00000800 1448#define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_GET(x) (((x) & BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MASK) >> BTCOEX_INT_EN_I2C_RECV_OVERFLOW_LSB) 1449#define BTCOEX_INT_EN_I2C_RECV_OVERFLOW_SET(x) (((x) << BTCOEX_INT_EN_I2C_RECV_OVERFLOW_LSB) & BTCOEX_INT_EN_I2C_RECV_OVERFLOW_MASK) 1450#define BTCOEX_INT_EN_I2C_TX_FAILED_MSB 10 1451#define BTCOEX_INT_EN_I2C_TX_FAILED_LSB 10 1452#define BTCOEX_INT_EN_I2C_TX_FAILED_MASK 0x00000400 1453#define BTCOEX_INT_EN_I2C_TX_FAILED_GET(x) (((x) & BTCOEX_INT_EN_I2C_TX_FAILED_MASK) >> BTCOEX_INT_EN_I2C_TX_FAILED_LSB) 1454#define BTCOEX_INT_EN_I2C_TX_FAILED_SET(x) (((x) << BTCOEX_INT_EN_I2C_TX_FAILED_LSB) & BTCOEX_INT_EN_I2C_TX_FAILED_MASK) 1455#define BTCOEX_INT_EN_I2C_MESG_SENT_MSB 9 1456#define BTCOEX_INT_EN_I2C_MESG_SENT_LSB 9 1457#define BTCOEX_INT_EN_I2C_MESG_SENT_MASK 0x00000200 1458#define BTCOEX_INT_EN_I2C_MESG_SENT_GET(x) (((x) & BTCOEX_INT_EN_I2C_MESG_SENT_MASK) >> BTCOEX_INT_EN_I2C_MESG_SENT_LSB) 1459#define BTCOEX_INT_EN_I2C_MESG_SENT_SET(x) (((x) << BTCOEX_INT_EN_I2C_MESG_SENT_LSB) & BTCOEX_INT_EN_I2C_MESG_SENT_MASK) 1460#define BTCOEX_INT_EN_ST_MESG_RECV_MSB 8 1461#define BTCOEX_INT_EN_ST_MESG_RECV_LSB 8 1462#define BTCOEX_INT_EN_ST_MESG_RECV_MASK 0x00000100 1463#define BTCOEX_INT_EN_ST_MESG_RECV_GET(x) (((x) & BTCOEX_INT_EN_ST_MESG_RECV_MASK) >> BTCOEX_INT_EN_ST_MESG_RECV_LSB) 1464#define BTCOEX_INT_EN_ST_MESG_RECV_SET(x) (((x) << BTCOEX_INT_EN_ST_MESG_RECV_LSB) & BTCOEX_INT_EN_ST_MESG_RECV_MASK) 1465#define BTCOEX_INT_EN_WB_TIMER_MSB 7 1466#define BTCOEX_INT_EN_WB_TIMER_LSB 7 1467#define BTCOEX_INT_EN_WB_TIMER_MASK 0x00000080 1468#define BTCOEX_INT_EN_WB_TIMER_GET(x) (((x) & BTCOEX_INT_EN_WB_TIMER_MASK) >> BTCOEX_INT_EN_WB_TIMER_LSB) 1469#define BTCOEX_INT_EN_WB_TIMER_SET(x) (((x) << BTCOEX_INT_EN_WB_TIMER_LSB) & BTCOEX_INT_EN_WB_TIMER_MASK) 1470#define BTCOEX_INT_EN_NOSYNC_MSB 4 1471#define BTCOEX_INT_EN_NOSYNC_LSB 4 1472#define BTCOEX_INT_EN_NOSYNC_MASK 0x00000010 1473#define BTCOEX_INT_EN_NOSYNC_GET(x) (((x) & BTCOEX_INT_EN_NOSYNC_MASK) >> BTCOEX_INT_EN_NOSYNC_LSB) 1474#define BTCOEX_INT_EN_NOSYNC_SET(x) (((x) << BTCOEX_INT_EN_NOSYNC_LSB) & BTCOEX_INT_EN_NOSYNC_MASK) 1475#define BTCOEX_INT_EN_SYNC_MSB 3 1476#define BTCOEX_INT_EN_SYNC_LSB 3 1477#define BTCOEX_INT_EN_SYNC_MASK 0x00000008 1478#define BTCOEX_INT_EN_SYNC_GET(x) (((x) & BTCOEX_INT_EN_SYNC_MASK) >> BTCOEX_INT_EN_SYNC_LSB) 1479#define BTCOEX_INT_EN_SYNC_SET(x) (((x) << BTCOEX_INT_EN_SYNC_LSB) & BTCOEX_INT_EN_SYNC_MASK) 1480#define BTCOEX_INT_EN_END_MSB 2 1481#define BTCOEX_INT_EN_END_LSB 2 1482#define BTCOEX_INT_EN_END_MASK 0x00000004 1483#define BTCOEX_INT_EN_END_GET(x) (((x) & BTCOEX_INT_EN_END_MASK) >> BTCOEX_INT_EN_END_LSB) 1484#define BTCOEX_INT_EN_END_SET(x) (((x) << BTCOEX_INT_EN_END_LSB) & BTCOEX_INT_EN_END_MASK) 1485#define BTCOEX_INT_EN_FRAME_CNT_MSB 1 1486#define BTCOEX_INT_EN_FRAME_CNT_LSB 1 1487#define BTCOEX_INT_EN_FRAME_CNT_MASK 0x00000002 1488#define BTCOEX_INT_EN_FRAME_CNT_GET(x) (((x) & BTCOEX_INT_EN_FRAME_CNT_MASK) >> BTCOEX_INT_EN_FRAME_CNT_LSB) 1489#define BTCOEX_INT_EN_FRAME_CNT_SET(x) (((x) << BTCOEX_INT_EN_FRAME_CNT_LSB) & BTCOEX_INT_EN_FRAME_CNT_MASK) 1490#define BTCOEX_INT_EN_CLK_CNT_MSB 0 1491#define BTCOEX_INT_EN_CLK_CNT_LSB 0 1492#define BTCOEX_INT_EN_CLK_CNT_MASK 0x00000001 1493#define BTCOEX_INT_EN_CLK_CNT_GET(x) (((x) & BTCOEX_INT_EN_CLK_CNT_MASK) >> BTCOEX_INT_EN_CLK_CNT_LSB) 1494#define BTCOEX_INT_EN_CLK_CNT_SET(x) (((x) << BTCOEX_INT_EN_CLK_CNT_LSB) & BTCOEX_INT_EN_CLK_CNT_MASK) 1495 1496#define BTCOEX_INT_STAT_ADDRESS 0x00000268 1497#define BTCOEX_INT_STAT_OFFSET 0x00000268 1498#define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MSB 11 1499#define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_LSB 11 1500#define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MASK 0x00000800 1501#define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_GET(x) (((x) & BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MASK) >> BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_LSB) 1502#define BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_SET(x) (((x) << BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_LSB) & BTCOEX_INT_STAT_I2C_RECV_OVERFLOW_MASK) 1503#define BTCOEX_INT_STAT_I2C_TX_FAILED_MSB 10 1504#define BTCOEX_INT_STAT_I2C_TX_FAILED_LSB 10 1505#define BTCOEX_INT_STAT_I2C_TX_FAILED_MASK 0x00000400 1506#define BTCOEX_INT_STAT_I2C_TX_FAILED_GET(x) (((x) & BTCOEX_INT_STAT_I2C_TX_FAILED_MASK) >> BTCOEX_INT_STAT_I2C_TX_FAILED_LSB) 1507#define BTCOEX_INT_STAT_I2C_TX_FAILED_SET(x) (((x) << BTCOEX_INT_STAT_I2C_TX_FAILED_LSB) & BTCOEX_INT_STAT_I2C_TX_FAILED_MASK) 1508#define BTCOEX_INT_STAT_I2C_MESG_SENT_MSB 9 1509#define BTCOEX_INT_STAT_I2C_MESG_SENT_LSB 9 1510#define BTCOEX_INT_STAT_I2C_MESG_SENT_MASK 0x00000200 1511#define BTCOEX_INT_STAT_I2C_MESG_SENT_GET(x) (((x) & BTCOEX_INT_STAT_I2C_MESG_SENT_MASK) >> BTCOEX_INT_STAT_I2C_MESG_SENT_LSB) 1512#define BTCOEX_INT_STAT_I2C_MESG_SENT_SET(x) (((x) << BTCOEX_INT_STAT_I2C_MESG_SENT_LSB) & BTCOEX_INT_STAT_I2C_MESG_SENT_MASK) 1513#define BTCOEX_INT_STAT_I2C_MESG_RECV_MSB 8 1514#define BTCOEX_INT_STAT_I2C_MESG_RECV_LSB 8 1515#define BTCOEX_INT_STAT_I2C_MESG_RECV_MASK 0x00000100 1516#define BTCOEX_INT_STAT_I2C_MESG_RECV_GET(x) (((x) & BTCOEX_INT_STAT_I2C_MESG_RECV_MASK) >> BTCOEX_INT_STAT_I2C_MESG_RECV_LSB) 1517#define BTCOEX_INT_STAT_I2C_MESG_RECV_SET(x) (((x) << BTCOEX_INT_STAT_I2C_MESG_RECV_LSB) & BTCOEX_INT_STAT_I2C_MESG_RECV_MASK) 1518#define BTCOEX_INT_STAT_WB_TIMER_MSB 7 1519#define BTCOEX_INT_STAT_WB_TIMER_LSB 7 1520#define BTCOEX_INT_STAT_WB_TIMER_MASK 0x00000080 1521#define BTCOEX_INT_STAT_WB_TIMER_GET(x) (((x) & BTCOEX_INT_STAT_WB_TIMER_MASK) >> BTCOEX_INT_STAT_WB_TIMER_LSB) 1522#define BTCOEX_INT_STAT_WB_TIMER_SET(x) (((x) << BTCOEX_INT_STAT_WB_TIMER_LSB) & BTCOEX_INT_STAT_WB_TIMER_MASK) 1523#define BTCOEX_INT_STAT_BTPRIORITY_STOMP_MSB 6 1524#define BTCOEX_INT_STAT_BTPRIORITY_STOMP_LSB 6 1525#define BTCOEX_INT_STAT_BTPRIORITY_STOMP_MASK 0x00000040 1526#define BTCOEX_INT_STAT_BTPRIORITY_STOMP_GET(x) (((x) & BTCOEX_INT_STAT_BTPRIORITY_STOMP_MASK) >> BTCOEX_INT_STAT_BTPRIORITY_STOMP_LSB) 1527#define BTCOEX_INT_STAT_BTPRIORITY_STOMP_SET(x) (((x) << BTCOEX_INT_STAT_BTPRIORITY_STOMP_LSB) & BTCOEX_INT_STAT_BTPRIORITY_STOMP_MASK) 1528#define BTCOEX_INT_STAT_BTPRIORITY_MSB 5 1529#define BTCOEX_INT_STAT_BTPRIORITY_LSB 5 1530#define BTCOEX_INT_STAT_BTPRIORITY_MASK 0x00000020 1531#define BTCOEX_INT_STAT_BTPRIORITY_GET(x) (((x) & BTCOEX_INT_STAT_BTPRIORITY_MASK) >> BTCOEX_INT_STAT_BTPRIORITY_LSB) 1532#define BTCOEX_INT_STAT_BTPRIORITY_SET(x) (((x) << BTCOEX_INT_STAT_BTPRIORITY_LSB) & BTCOEX_INT_STAT_BTPRIORITY_MASK) 1533#define BTCOEX_INT_STAT_NOSYNC_MSB 4 1534#define BTCOEX_INT_STAT_NOSYNC_LSB 4 1535#define BTCOEX_INT_STAT_NOSYNC_MASK 0x00000010 1536#define BTCOEX_INT_STAT_NOSYNC_GET(x) (((x) & BTCOEX_INT_STAT_NOSYNC_MASK) >> BTCOEX_INT_STAT_NOSYNC_LSB) 1537#define BTCOEX_INT_STAT_NOSYNC_SET(x) (((x) << BTCOEX_INT_STAT_NOSYNC_LSB) & BTCOEX_INT_STAT_NOSYNC_MASK) 1538#define BTCOEX_INT_STAT_SYNC_MSB 3 1539#define BTCOEX_INT_STAT_SYNC_LSB 3 1540#define BTCOEX_INT_STAT_SYNC_MASK 0x00000008 1541#define BTCOEX_INT_STAT_SYNC_GET(x) (((x) & BTCOEX_INT_STAT_SYNC_MASK) >> BTCOEX_INT_STAT_SYNC_LSB) 1542#define BTCOEX_INT_STAT_SYNC_SET(x) (((x) << BTCOEX_INT_STAT_SYNC_LSB) & BTCOEX_INT_STAT_SYNC_MASK) 1543#define BTCOEX_INT_STAT_END_MSB 2 1544#define BTCOEX_INT_STAT_END_LSB 2 1545#define BTCOEX_INT_STAT_END_MASK 0x00000004 1546#define BTCOEX_INT_STAT_END_GET(x) (((x) & BTCOEX_INT_STAT_END_MASK) >> BTCOEX_INT_STAT_END_LSB) 1547#define BTCOEX_INT_STAT_END_SET(x) (((x) << BTCOEX_INT_STAT_END_LSB) & BTCOEX_INT_STAT_END_MASK) 1548#define BTCOEX_INT_STAT_FRAME_CNT_MSB 1 1549#define BTCOEX_INT_STAT_FRAME_CNT_LSB 1 1550#define BTCOEX_INT_STAT_FRAME_CNT_MASK 0x00000002 1551#define BTCOEX_INT_STAT_FRAME_CNT_GET(x) (((x) & BTCOEX_INT_STAT_FRAME_CNT_MASK) >> BTCOEX_INT_STAT_FRAME_CNT_LSB) 1552#define BTCOEX_INT_STAT_FRAME_CNT_SET(x) (((x) << BTCOEX_INT_STAT_FRAME_CNT_LSB) & BTCOEX_INT_STAT_FRAME_CNT_MASK) 1553#define BTCOEX_INT_STAT_CLK_CNT_MSB 0 1554#define BTCOEX_INT_STAT_CLK_CNT_LSB 0 1555#define BTCOEX_INT_STAT_CLK_CNT_MASK 0x00000001 1556#define BTCOEX_INT_STAT_CLK_CNT_GET(x) (((x) & BTCOEX_INT_STAT_CLK_CNT_MASK) >> BTCOEX_INT_STAT_CLK_CNT_LSB) 1557#define BTCOEX_INT_STAT_CLK_CNT_SET(x) (((x) << BTCOEX_INT_STAT_CLK_CNT_LSB) & BTCOEX_INT_STAT_CLK_CNT_MASK) 1558 1559#define BTPRIORITY_INT_EN_ADDRESS 0x0000026c 1560#define BTPRIORITY_INT_EN_OFFSET 0x0000026c 1561#define BTPRIORITY_INT_EN_BITMAP_MSB 31 1562#define BTPRIORITY_INT_EN_BITMAP_LSB 0 1563#define BTPRIORITY_INT_EN_BITMAP_MASK 0xffffffff 1564#define BTPRIORITY_INT_EN_BITMAP_GET(x) (((x) & BTPRIORITY_INT_EN_BITMAP_MASK) >> BTPRIORITY_INT_EN_BITMAP_LSB) 1565#define BTPRIORITY_INT_EN_BITMAP_SET(x) (((x) << BTPRIORITY_INT_EN_BITMAP_LSB) & BTPRIORITY_INT_EN_BITMAP_MASK) 1566 1567#define BTPRIORITY_INT_STAT_ADDRESS 0x00000270 1568#define BTPRIORITY_INT_STAT_OFFSET 0x00000270 1569#define BTPRIORITY_INT_STAT_BITMAP_MSB 31 1570#define BTPRIORITY_INT_STAT_BITMAP_LSB 0 1571#define BTPRIORITY_INT_STAT_BITMAP_MASK 0xffffffff 1572#define BTPRIORITY_INT_STAT_BITMAP_GET(x) (((x) & BTPRIORITY_INT_STAT_BITMAP_MASK) >> BTPRIORITY_INT_STAT_BITMAP_LSB) 1573#define BTPRIORITY_INT_STAT_BITMAP_SET(x) (((x) << BTPRIORITY_INT_STAT_BITMAP_LSB) & BTPRIORITY_INT_STAT_BITMAP_MASK) 1574 1575#define BTPRIORITY_STOMP_INT_EN_ADDRESS 0x00000274 1576#define BTPRIORITY_STOMP_INT_EN_OFFSET 0x00000274 1577#define BTPRIORITY_STOMP_INT_EN_BITMAP_MSB 31 1578#define BTPRIORITY_STOMP_INT_EN_BITMAP_LSB 0 1579#define BTPRIORITY_STOMP_INT_EN_BITMAP_MASK 0xffffffff 1580#define BTPRIORITY_STOMP_INT_EN_BITMAP_GET(x) (((x) & BTPRIORITY_STOMP_INT_EN_BITMAP_MASK) >> BTPRIORITY_STOMP_INT_EN_BITMAP_LSB) 1581#define BTPRIORITY_STOMP_INT_EN_BITMAP_SET(x) (((x) << BTPRIORITY_STOMP_INT_EN_BITMAP_LSB) & BTPRIORITY_STOMP_INT_EN_BITMAP_MASK) 1582 1583#define BTPRIORITY_STOMP_INT_STAT_ADDRESS 0x00000278 1584#define BTPRIORITY_STOMP_INT_STAT_OFFSET 0x00000278 1585#define BTPRIORITY_STOMP_INT_STAT_BITMAP_MSB 31 1586#define BTPRIORITY_STOMP_INT_STAT_BITMAP_LSB 0 1587#define BTPRIORITY_STOMP_INT_STAT_BITMAP_MASK 0xffffffff 1588#define BTPRIORITY_STOMP_INT_STAT_BITMAP_GET(x) (((x) & BTPRIORITY_STOMP_INT_STAT_BITMAP_MASK) >> BTPRIORITY_STOMP_INT_STAT_BITMAP_LSB) 1589#define BTPRIORITY_STOMP_INT_STAT_BITMAP_SET(x) (((x) << BTPRIORITY_STOMP_INT_STAT_BITMAP_LSB) & BTPRIORITY_STOMP_INT_STAT_BITMAP_MASK) 1590 1591#define MAC_PCU_BMISS_TIMEOUT_ADDRESS 0x0000027c 1592#define MAC_PCU_BMISS_TIMEOUT_OFFSET 0x0000027c 1593#define MAC_PCU_BMISS_TIMEOUT_ENABLE_MSB 24 1594#define MAC_PCU_BMISS_TIMEOUT_ENABLE_LSB 24 1595#define MAC_PCU_BMISS_TIMEOUT_ENABLE_MASK 0x01000000 1596#define MAC_PCU_BMISS_TIMEOUT_ENABLE_GET(x) (((x) & MAC_PCU_BMISS_TIMEOUT_ENABLE_MASK) >> MAC_PCU_BMISS_TIMEOUT_ENABLE_LSB) 1597#define MAC_PCU_BMISS_TIMEOUT_ENABLE_SET(x) (((x) << MAC_PCU_BMISS_TIMEOUT_ENABLE_LSB) & MAC_PCU_BMISS_TIMEOUT_ENABLE_MASK) 1598#define MAC_PCU_BMISS_TIMEOUT_VALUE_MSB 23 1599#define MAC_PCU_BMISS_TIMEOUT_VALUE_LSB 0 1600#define MAC_PCU_BMISS_TIMEOUT_VALUE_MASK 0x00ffffff 1601#define MAC_PCU_BMISS_TIMEOUT_VALUE_GET(x) (((x) & MAC_PCU_BMISS_TIMEOUT_VALUE_MASK) >> MAC_PCU_BMISS_TIMEOUT_VALUE_LSB) 1602#define MAC_PCU_BMISS_TIMEOUT_VALUE_SET(x) (((x) << MAC_PCU_BMISS_TIMEOUT_VALUE_LSB) & MAC_PCU_BMISS_TIMEOUT_VALUE_MASK) 1603 1604#define MAC_PCU_CAB_AWAKE_ADDRESS 0x00000280 1605#define MAC_PCU_CAB_AWAKE_OFFSET 0x00000280 1606#define MAC_PCU_CAB_AWAKE_ENABLE_MSB 16 1607#define MAC_PCU_CAB_AWAKE_ENABLE_LSB 16 1608#define MAC_PCU_CAB_AWAKE_ENABLE_MASK 0x00010000 1609#define MAC_PCU_CAB_AWAKE_ENABLE_GET(x) (((x) & MAC_PCU_CAB_AWAKE_ENABLE_MASK) >> MAC_PCU_CAB_AWAKE_ENABLE_LSB) 1610#define MAC_PCU_CAB_AWAKE_ENABLE_SET(x) (((x) << MAC_PCU_CAB_AWAKE_ENABLE_LSB) & MAC_PCU_CAB_AWAKE_ENABLE_MASK) 1611#define MAC_PCU_CAB_AWAKE_DURATION_MSB 15 1612#define MAC_PCU_CAB_AWAKE_DURATION_LSB 0 1613#define MAC_PCU_CAB_AWAKE_DURATION_MASK 0x0000ffff 1614#define MAC_PCU_CAB_AWAKE_DURATION_GET(x) (((x) & MAC_PCU_CAB_AWAKE_DURATION_MASK) >> MAC_PCU_CAB_AWAKE_DURATION_LSB) 1615#define MAC_PCU_CAB_AWAKE_DURATION_SET(x) (((x) << MAC_PCU_CAB_AWAKE_DURATION_LSB) & MAC_PCU_CAB_AWAKE_DURATION_MASK) 1616 1617#define LP_PERF_COUNTER_ADDRESS 0x00000284 1618#define LP_PERF_COUNTER_OFFSET 0x00000284 1619#define LP_PERF_COUNTER_EN_MSB 0 1620#define LP_PERF_COUNTER_EN_LSB 0 1621#define LP_PERF_COUNTER_EN_MASK 0x00000001 1622#define LP_PERF_COUNTER_EN_GET(x) (((x) & LP_PERF_COUNTER_EN_MASK) >> LP_PERF_COUNTER_EN_LSB) 1623#define LP_PERF_COUNTER_EN_SET(x) (((x) << LP_PERF_COUNTER_EN_LSB) & LP_PERF_COUNTER_EN_MASK) 1624 1625#define LP_PERF_LIGHT_SLEEP_ADDRESS 0x00000288 1626#define LP_PERF_LIGHT_SLEEP_OFFSET 0x00000288 1627#define LP_PERF_LIGHT_SLEEP_CNT_MSB 31 1628#define LP_PERF_LIGHT_SLEEP_CNT_LSB 0 1629#define LP_PERF_LIGHT_SLEEP_CNT_MASK 0xffffffff 1630#define LP_PERF_LIGHT_SLEEP_CNT_GET(x) (((x) & LP_PERF_LIGHT_SLEEP_CNT_MASK) >> LP_PERF_LIGHT_SLEEP_CNT_LSB) 1631#define LP_PERF_LIGHT_SLEEP_CNT_SET(x) (((x) << LP_PERF_LIGHT_SLEEP_CNT_LSB) & LP_PERF_LIGHT_SLEEP_CNT_MASK) 1632 1633#define LP_PERF_DEEP_SLEEP_ADDRESS 0x0000028c 1634#define LP_PERF_DEEP_SLEEP_OFFSET 0x0000028c 1635#define LP_PERF_DEEP_SLEEP_CNT_MSB 31 1636#define LP_PERF_DEEP_SLEEP_CNT_LSB 0 1637#define LP_PERF_DEEP_SLEEP_CNT_MASK 0xffffffff 1638#define LP_PERF_DEEP_SLEEP_CNT_GET(x) (((x) & LP_PERF_DEEP_SLEEP_CNT_MASK) >> LP_PERF_DEEP_SLEEP_CNT_LSB) 1639#define LP_PERF_DEEP_SLEEP_CNT_SET(x) (((x) << LP_PERF_DEEP_SLEEP_CNT_LSB) & LP_PERF_DEEP_SLEEP_CNT_MASK) 1640 1641#define LP_PERF_ON_ADDRESS 0x00000290 1642#define LP_PERF_ON_OFFSET 0x00000290 1643#define LP_PERF_ON_CNT_MSB 31 1644#define LP_PERF_ON_CNT_LSB 0 1645#define LP_PERF_ON_CNT_MASK 0xffffffff 1646#define LP_PERF_ON_CNT_GET(x) (((x) & LP_PERF_ON_CNT_MASK) >> LP_PERF_ON_CNT_LSB) 1647#define LP_PERF_ON_CNT_SET(x) (((x) << LP_PERF_ON_CNT_LSB) & LP_PERF_ON_CNT_MASK) 1648 1649#define ST_64_BIT_ADDRESS 0x00000294 1650#define ST_64_BIT_OFFSET 0x00000294 1651#define ST_64_BIT_TIMEOUT_MSB 26 1652#define ST_64_BIT_TIMEOUT_LSB 9 1653#define ST_64_BIT_TIMEOUT_MASK 0x07fffe00 1654#define ST_64_BIT_TIMEOUT_GET(x) (((x) & ST_64_BIT_TIMEOUT_MASK) >> ST_64_BIT_TIMEOUT_LSB) 1655#define ST_64_BIT_TIMEOUT_SET(x) (((x) << ST_64_BIT_TIMEOUT_LSB) & ST_64_BIT_TIMEOUT_MASK) 1656#define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MSB 8 1657#define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_LSB 8 1658#define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MASK 0x00000100 1659#define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_GET(x) (((x) & ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MASK) >> ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_LSB) 1660#define ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_SET(x) (((x) << ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_LSB) & ST_64_BIT_REQ_ACK_NOT_PULLED_DOWN_MASK) 1661#define ST_64_BIT_DRIVE_MODE_MSB 7 1662#define ST_64_BIT_DRIVE_MODE_LSB 7 1663#define ST_64_BIT_DRIVE_MODE_MASK 0x00000080 1664#define ST_64_BIT_DRIVE_MODE_GET(x) (((x) & ST_64_BIT_DRIVE_MODE_MASK) >> ST_64_BIT_DRIVE_MODE_LSB) 1665#define ST_64_BIT_DRIVE_MODE_SET(x) (((x) << ST_64_BIT_DRIVE_MODE_LSB) & ST_64_BIT_DRIVE_MODE_MASK) 1666#define ST_64_BIT_CLOCK_GATE_MSB 6 1667#define ST_64_BIT_CLOCK_GATE_LSB 6 1668#define ST_64_BIT_CLOCK_GATE_MASK 0x00000040 1669#define ST_64_BIT_CLOCK_GATE_GET(x) (((x) & ST_64_BIT_CLOCK_GATE_MASK) >> ST_64_BIT_CLOCK_GATE_LSB) 1670#define ST_64_BIT_CLOCK_GATE_SET(x) (((x) << ST_64_BIT_CLOCK_GATE_LSB) & ST_64_BIT_CLOCK_GATE_MASK) 1671#define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MSB 5 1672#define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_LSB 1 1673#define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MASK 0x0000003e 1674#define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_GET(x) (((x) & ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MASK) >> ST_64_BIT_SOC_CLK_DIVIDE_RATIO_LSB) 1675#define ST_64_BIT_SOC_CLK_DIVIDE_RATIO_SET(x) (((x) << ST_64_BIT_SOC_CLK_DIVIDE_RATIO_LSB) & ST_64_BIT_SOC_CLK_DIVIDE_RATIO_MASK) 1676#define ST_64_BIT_MODE_MSB 0 1677#define ST_64_BIT_MODE_LSB 0 1678#define ST_64_BIT_MODE_MASK 0x00000001 1679#define ST_64_BIT_MODE_GET(x) (((x) & ST_64_BIT_MODE_MASK) >> ST_64_BIT_MODE_LSB) 1680#define ST_64_BIT_MODE_SET(x) (((x) << ST_64_BIT_MODE_LSB) & ST_64_BIT_MODE_MASK) 1681 1682#define MESSAGE_WR_ADDRESS 0x00000298 1683#define MESSAGE_WR_OFFSET 0x00000298 1684#define MESSAGE_WR_TYPE_MSB 31 1685#define MESSAGE_WR_TYPE_LSB 0 1686#define MESSAGE_WR_TYPE_MASK 0xffffffff 1687#define MESSAGE_WR_TYPE_GET(x) (((x) & MESSAGE_WR_TYPE_MASK) >> MESSAGE_WR_TYPE_LSB) 1688#define MESSAGE_WR_TYPE_SET(x) (((x) << MESSAGE_WR_TYPE_LSB) & MESSAGE_WR_TYPE_MASK) 1689 1690#define MESSAGE_WR_P_ADDRESS 0x0000029c 1691#define MESSAGE_WR_P_OFFSET 0x0000029c 1692#define MESSAGE_WR_P_PARAMETER_MSB 31 1693#define MESSAGE_WR_P_PARAMETER_LSB 0 1694#define MESSAGE_WR_P_PARAMETER_MASK 0xffffffff 1695#define MESSAGE_WR_P_PARAMETER_GET(x) (((x) & MESSAGE_WR_P_PARAMETER_MASK) >> MESSAGE_WR_P_PARAMETER_LSB) 1696#define MESSAGE_WR_P_PARAMETER_SET(x) (((x) << MESSAGE_WR_P_PARAMETER_LSB) & MESSAGE_WR_P_PARAMETER_MASK) 1697 1698#define MESSAGE_RD_ADDRESS 0x000002a0 1699#define MESSAGE_RD_OFFSET 0x000002a0 1700#define MESSAGE_RD_TYPE_MSB 31 1701#define MESSAGE_RD_TYPE_LSB 0 1702#define MESSAGE_RD_TYPE_MASK 0xffffffff 1703#define MESSAGE_RD_TYPE_GET(x) (((x) & MESSAGE_RD_TYPE_MASK) >> MESSAGE_RD_TYPE_LSB) 1704#define MESSAGE_RD_TYPE_SET(x) (((x) << MESSAGE_RD_TYPE_LSB) & MESSAGE_RD_TYPE_MASK) 1705 1706#define MESSAGE_RD_P_ADDRESS 0x000002a4 1707#define MESSAGE_RD_P_OFFSET 0x000002a4 1708#define MESSAGE_RD_P_PARAMETER_MSB 31 1709#define MESSAGE_RD_P_PARAMETER_LSB 0 1710#define MESSAGE_RD_P_PARAMETER_MASK 0xffffffff 1711#define MESSAGE_RD_P_PARAMETER_GET(x) (((x) & MESSAGE_RD_P_PARAMETER_MASK) >> MESSAGE_RD_P_PARAMETER_LSB) 1712#define MESSAGE_RD_P_PARAMETER_SET(x) (((x) << MESSAGE_RD_P_PARAMETER_LSB) & MESSAGE_RD_P_PARAMETER_MASK) 1713 1714#define CHIP_MODE_ADDRESS 0x000002a8 1715#define CHIP_MODE_OFFSET 0x000002a8 1716#define CHIP_MODE_BIT_MSB 1 1717#define CHIP_MODE_BIT_LSB 0 1718#define CHIP_MODE_BIT_MASK 0x00000003 1719#define CHIP_MODE_BIT_GET(x) (((x) & CHIP_MODE_BIT_MASK) >> CHIP_MODE_BIT_LSB) 1720#define CHIP_MODE_BIT_SET(x) (((x) << CHIP_MODE_BIT_LSB) & CHIP_MODE_BIT_MASK) 1721 1722#define CLK_REQ_FALL_EDGE_ADDRESS 0x000002ac 1723#define CLK_REQ_FALL_EDGE_OFFSET 0x000002ac 1724#define CLK_REQ_FALL_EDGE_EN_MSB 31 1725#define CLK_REQ_FALL_EDGE_EN_LSB 31 1726#define CLK_REQ_FALL_EDGE_EN_MASK 0x80000000 1727#define CLK_REQ_FALL_EDGE_EN_GET(x) (((x) & CLK_REQ_FALL_EDGE_EN_MASK) >> CLK_REQ_FALL_EDGE_EN_LSB) 1728#define CLK_REQ_FALL_EDGE_EN_SET(x) (((x) << CLK_REQ_FALL_EDGE_EN_LSB) & CLK_REQ_FALL_EDGE_EN_MASK) 1729#define CLK_REQ_FALL_EDGE_DELAY_MSB 7 1730#define CLK_REQ_FALL_EDGE_DELAY_LSB 0 1731#define CLK_REQ_FALL_EDGE_DELAY_MASK 0x000000ff 1732#define CLK_REQ_FALL_EDGE_DELAY_GET(x) (((x) & CLK_REQ_FALL_EDGE_DELAY_MASK) >> CLK_REQ_FALL_EDGE_DELAY_LSB) 1733#define CLK_REQ_FALL_EDGE_DELAY_SET(x) (((x) << CLK_REQ_FALL_EDGE_DELAY_LSB) & CLK_REQ_FALL_EDGE_DELAY_MASK) 1734 1735#define OTP_ADDRESS 0x000002b0 1736#define OTP_OFFSET 0x000002b0 1737#define OTP_LDO25_EN_MSB 1 1738#define OTP_LDO25_EN_LSB 1 1739#define OTP_LDO25_EN_MASK 0x00000002 1740#define OTP_LDO25_EN_GET(x) (((x) & OTP_LDO25_EN_MASK) >> OTP_LDO25_EN_LSB) 1741#define OTP_LDO25_EN_SET(x) (((x) << OTP_LDO25_EN_LSB) & OTP_LDO25_EN_MASK) 1742#define OTP_VDD12_EN_MSB 0 1743#define OTP_VDD12_EN_LSB 0 1744#define OTP_VDD12_EN_MASK 0x00000001 1745#define OTP_VDD12_EN_GET(x) (((x) & OTP_VDD12_EN_MASK) >> OTP_VDD12_EN_LSB) 1746#define OTP_VDD12_EN_SET(x) (((x) << OTP_VDD12_EN_LSB) & OTP_VDD12_EN_MASK) 1747 1748#define OTP_STATUS_ADDRESS 0x000002b4 1749#define OTP_STATUS_OFFSET 0x000002b4 1750#define OTP_STATUS_LDO25_EN_READY_MSB 1 1751#define OTP_STATUS_LDO25_EN_READY_LSB 1 1752#define OTP_STATUS_LDO25_EN_READY_MASK 0x00000002 1753#define OTP_STATUS_LDO25_EN_READY_GET(x) (((x) & OTP_STATUS_LDO25_EN_READY_MASK) >> OTP_STATUS_LDO25_EN_READY_LSB) 1754#define OTP_STATUS_LDO25_EN_READY_SET(x) (((x) << OTP_STATUS_LDO25_EN_READY_LSB) & OTP_STATUS_LDO25_EN_READY_MASK) 1755#define OTP_STATUS_VDD12_EN_READY_MSB 0 1756#define OTP_STATUS_VDD12_EN_READY_LSB 0 1757#define OTP_STATUS_VDD12_EN_READY_MASK 0x00000001 1758#define OTP_STATUS_VDD12_EN_READY_GET(x) (((x) & OTP_STATUS_VDD12_EN_READY_MASK) >> OTP_STATUS_VDD12_EN_READY_LSB) 1759#define OTP_STATUS_VDD12_EN_READY_SET(x) (((x) << OTP_STATUS_VDD12_EN_READY_LSB) & OTP_STATUS_VDD12_EN_READY_MASK) 1760 1761#define PMU_ADDRESS 0x000002b8 1762#define PMU_OFFSET 0x000002b8 1763#define PMU_REG_WAKEUP_TIME_SEL_MSB 1 1764#define PMU_REG_WAKEUP_TIME_SEL_LSB 0 1765#define PMU_REG_WAKEUP_TIME_SEL_MASK 0x00000003 1766#define PMU_REG_WAKEUP_TIME_SEL_GET(x) (((x) & PMU_REG_WAKEUP_TIME_SEL_MASK) >> PMU_REG_WAKEUP_TIME_SEL_LSB) 1767#define PMU_REG_WAKEUP_TIME_SEL_SET(x) (((x) << PMU_REG_WAKEUP_TIME_SEL_LSB) & PMU_REG_WAKEUP_TIME_SEL_MASK) 1768 1769#define PMU_CONFIG_ADDRESS 0x000002c0 1770#define PMU_CONFIG_OFFSET 0x000002c0 1771#define PMU_CONFIG_VALUE_MSB 15 1772#define PMU_CONFIG_VALUE_LSB 0 1773#define PMU_CONFIG_VALUE_MASK 0x0000ffff 1774#define PMU_CONFIG_VALUE_GET(x) (((x) & PMU_CONFIG_VALUE_MASK) >> PMU_CONFIG_VALUE_LSB) 1775#define PMU_CONFIG_VALUE_SET(x) (((x) << PMU_CONFIG_VALUE_LSB) & PMU_CONFIG_VALUE_MASK) 1776 1777#define PMU_BYPASS_ADDRESS 0x000002c8 1778#define PMU_BYPASS_OFFSET 0x000002c8 1779#define PMU_BYPASS_SWREG_MSB 2 1780#define PMU_BYPASS_SWREG_LSB 2 1781#define PMU_BYPASS_SWREG_MASK 0x00000004 1782#define PMU_BYPASS_SWREG_GET(x) (((x) & PMU_BYPASS_SWREG_MASK) >> PMU_BYPASS_SWREG_LSB) 1783#define PMU_BYPASS_SWREG_SET(x) (((x) << PMU_BYPASS_SWREG_LSB) & PMU_BYPASS_SWREG_MASK) 1784#define PMU_BYPASS_DREG_MSB 1 1785#define PMU_BYPASS_DREG_LSB 1 1786#define PMU_BYPASS_DREG_MASK 0x00000002 1787#define PMU_BYPASS_DREG_GET(x) (((x) & PMU_BYPASS_DREG_MASK) >> PMU_BYPASS_DREG_LSB) 1788#define PMU_BYPASS_DREG_SET(x) (((x) << PMU_BYPASS_DREG_LSB) & PMU_BYPASS_DREG_MASK) 1789#define PMU_BYPASS_PAREG_MSB 0 1790#define PMU_BYPASS_PAREG_LSB 0 1791#define PMU_BYPASS_PAREG_MASK 0x00000001 1792#define PMU_BYPASS_PAREG_GET(x) (((x) & PMU_BYPASS_PAREG_MASK) >> PMU_BYPASS_PAREG_LSB) 1793#define PMU_BYPASS_PAREG_SET(x) (((x) << PMU_BYPASS_PAREG_LSB) & PMU_BYPASS_PAREG_MASK) 1794 1795#define MAC_PCU_TSF2_L32_ADDRESS 0x000002cc 1796#define MAC_PCU_TSF2_L32_OFFSET 0x000002cc 1797#define MAC_PCU_TSF2_L32_VALUE_MSB 31 1798#define MAC_PCU_TSF2_L32_VALUE_LSB 0 1799#define MAC_PCU_TSF2_L32_VALUE_MASK 0xffffffff 1800#define MAC_PCU_TSF2_L32_VALUE_GET(x) (((x) & MAC_PCU_TSF2_L32_VALUE_MASK) >> MAC_PCU_TSF2_L32_VALUE_LSB) 1801#define MAC_PCU_TSF2_L32_VALUE_SET(x) (((x) << MAC_PCU_TSF2_L32_VALUE_LSB) & MAC_PCU_TSF2_L32_VALUE_MASK) 1802 1803#define MAC_PCU_TSF2_U32_ADDRESS 0x000002d0 1804#define MAC_PCU_TSF2_U32_OFFSET 0x000002d0 1805#define MAC_PCU_TSF2_U32_VALUE_MSB 31 1806#define MAC_PCU_TSF2_U32_VALUE_LSB 0 1807#define MAC_PCU_TSF2_U32_VALUE_MASK 0xffffffff 1808#define MAC_PCU_TSF2_U32_VALUE_GET(x) (((x) & MAC_PCU_TSF2_U32_VALUE_MASK) >> MAC_PCU_TSF2_U32_VALUE_LSB) 1809#define MAC_PCU_TSF2_U32_VALUE_SET(x) (((x) << MAC_PCU_TSF2_U32_VALUE_LSB) & MAC_PCU_TSF2_U32_VALUE_MASK) 1810 1811#define MAC_PCU_GENERIC_TIMERS_MODE3_ADDRESS 0x000002d4 1812#define MAC_PCU_GENERIC_TIMERS_MODE3_OFFSET 0x000002d4 1813#define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MSB 27 1814#define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_LSB 24 1815#define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MASK 0x0f000000 1816#define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_LSB) 1817#define MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_LSB) & MAC_PCU_GENERIC_TIMERS_MODE3_OVERFLOW_INDEX_MASK) 1818#define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MSB 19 1819#define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_LSB 0 1820#define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MASK 0x000fffff 1821#define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_GET(x) (((x) & MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MASK) >> MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_LSB) 1822#define MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_SET(x) (((x) << MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_LSB) & MAC_PCU_GENERIC_TIMERS_MODE3_THRESH_MASK) 1823 1824#define MAC_PCU_DIRECT_CONNECT_ADDRESS 0x000002d8 1825#define MAC_PCU_DIRECT_CONNECT_OFFSET 0x000002d8 1826#define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MSB 2 1827#define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_LSB 2 1828#define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MASK 0x00000004 1829#define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_GET(x) (((x) & MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MASK) >> MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_LSB) 1830#define MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_SET(x) (((x) << MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_LSB) & MAC_PCU_DIRECT_CONNECT_STA_TSF_1_2_SEL_MASK) 1831#define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MSB 1 1832#define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_LSB 1 1833#define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MASK 0x00000002 1834#define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_GET(x) (((x) & MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MASK) >> MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_LSB) 1835#define MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_SET(x) (((x) << MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_LSB) & MAC_PCU_DIRECT_CONNECT_AP_TSF_1_2_SEL_MASK) 1836#define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MSB 0 1837#define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_LSB 0 1838#define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MASK 0x00000001 1839#define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_GET(x) (((x) & MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MASK) >> MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_LSB) 1840#define MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_SET(x) (((x) << MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_LSB) & MAC_PCU_DIRECT_CONNECT_AP_STA_ENABLE_MASK) 1841 1842#define THERM_CTRL1_ADDRESS 0x000002dc 1843#define THERM_CTRL1_OFFSET 0x000002dc 1844#define THERM_CTRL1_BYPASS_MSB 16 1845#define THERM_CTRL1_BYPASS_LSB 16 1846#define THERM_CTRL1_BYPASS_MASK 0x00010000 1847#define THERM_CTRL1_BYPASS_GET(x) (((x) & THERM_CTRL1_BYPASS_MASK) >> THERM_CTRL1_BYPASS_LSB) 1848#define THERM_CTRL1_BYPASS_SET(x) (((x) << THERM_CTRL1_BYPASS_LSB) & THERM_CTRL1_BYPASS_MASK) 1849#define THERM_CTRL1_WIDTH_ARBITOR_MSB 15 1850#define THERM_CTRL1_WIDTH_ARBITOR_LSB 12 1851#define THERM_CTRL1_WIDTH_ARBITOR_MASK 0x0000f000 1852#define THERM_CTRL1_WIDTH_ARBITOR_GET(x) (((x) & THERM_CTRL1_WIDTH_ARBITOR_MASK) >> THERM_CTRL1_WIDTH_ARBITOR_LSB) 1853#define THERM_CTRL1_WIDTH_ARBITOR_SET(x) (((x) << THERM_CTRL1_WIDTH_ARBITOR_LSB) & THERM_CTRL1_WIDTH_ARBITOR_MASK) 1854#define THERM_CTRL1_WIDTH_MSB 11 1855#define THERM_CTRL1_WIDTH_LSB 5 1856#define THERM_CTRL1_WIDTH_MASK 0x00000fe0 1857#define THERM_CTRL1_WIDTH_GET(x) (((x) & THERM_CTRL1_WIDTH_MASK) >> THERM_CTRL1_WIDTH_LSB) 1858#define THERM_CTRL1_WIDTH_SET(x) (((x) << THERM_CTRL1_WIDTH_LSB) & THERM_CTRL1_WIDTH_MASK) 1859#define THERM_CTRL1_TYPE_MSB 4 1860#define THERM_CTRL1_TYPE_LSB 3 1861#define THERM_CTRL1_TYPE_MASK 0x00000018 1862#define THERM_CTRL1_TYPE_GET(x) (((x) & THERM_CTRL1_TYPE_MASK) >> THERM_CTRL1_TYPE_LSB) 1863#define THERM_CTRL1_TYPE_SET(x) (((x) << THERM_CTRL1_TYPE_LSB) & THERM_CTRL1_TYPE_MASK) 1864#define THERM_CTRL1_MEASURE_MSB 2 1865#define THERM_CTRL1_MEASURE_LSB 2 1866#define THERM_CTRL1_MEASURE_MASK 0x00000004 1867#define THERM_CTRL1_MEASURE_GET(x) (((x) & THERM_CTRL1_MEASURE_MASK) >> THERM_CTRL1_MEASURE_LSB) 1868#define THERM_CTRL1_MEASURE_SET(x) (((x) << THERM_CTRL1_MEASURE_LSB) & THERM_CTRL1_MEASURE_MASK) 1869#define THERM_CTRL1_INT_EN_MSB 1 1870#define THERM_CTRL1_INT_EN_LSB 1 1871#define THERM_CTRL1_INT_EN_MASK 0x00000002 1872#define THERM_CTRL1_INT_EN_GET(x) (((x) & THERM_CTRL1_INT_EN_MASK) >> THERM_CTRL1_INT_EN_LSB) 1873#define THERM_CTRL1_INT_EN_SET(x) (((x) << THERM_CTRL1_INT_EN_LSB) & THERM_CTRL1_INT_EN_MASK) 1874#define THERM_CTRL1_INT_STATUS_MSB 0 1875#define THERM_CTRL1_INT_STATUS_LSB 0 1876#define THERM_CTRL1_INT_STATUS_MASK 0x00000001 1877#define THERM_CTRL1_INT_STATUS_GET(x) (((x) & THERM_CTRL1_INT_STATUS_MASK) >> THERM_CTRL1_INT_STATUS_LSB) 1878#define THERM_CTRL1_INT_STATUS_SET(x) (((x) << THERM_CTRL1_INT_STATUS_LSB) & THERM_CTRL1_INT_STATUS_MASK) 1879 1880#define THERM_CTRL2_ADDRESS 0x000002e0 1881#define THERM_CTRL2_OFFSET 0x000002e0 1882#define THERM_CTRL2_ADC_OFF_MSB 25 1883#define THERM_CTRL2_ADC_OFF_LSB 25 1884#define THERM_CTRL2_ADC_OFF_MASK 0x02000000 1885#define THERM_CTRL2_ADC_OFF_GET(x) (((x) & THERM_CTRL2_ADC_OFF_MASK) >> THERM_CTRL2_ADC_OFF_LSB) 1886#define THERM_CTRL2_ADC_OFF_SET(x) (((x) << THERM_CTRL2_ADC_OFF_LSB) & THERM_CTRL2_ADC_OFF_MASK) 1887#define THERM_CTRL2_ADC_ON_MSB 24 1888#define THERM_CTRL2_ADC_ON_LSB 24 1889#define THERM_CTRL2_ADC_ON_MASK 0x01000000 1890#define THERM_CTRL2_ADC_ON_GET(x) (((x) & THERM_CTRL2_ADC_ON_MASK) >> THERM_CTRL2_ADC_ON_LSB) 1891#define THERM_CTRL2_ADC_ON_SET(x) (((x) << THERM_CTRL2_ADC_ON_LSB) & THERM_CTRL2_ADC_ON_MASK) 1892#define THERM_CTRL2_SAMPLE_MSB 23 1893#define THERM_CTRL2_SAMPLE_LSB 16 1894#define THERM_CTRL2_SAMPLE_MASK 0x00ff0000 1895#define THERM_CTRL2_SAMPLE_GET(x) (((x) & THERM_CTRL2_SAMPLE_MASK) >> THERM_CTRL2_SAMPLE_LSB) 1896#define THERM_CTRL2_SAMPLE_SET(x) (((x) << THERM_CTRL2_SAMPLE_LSB) & THERM_CTRL2_SAMPLE_MASK) 1897#define THERM_CTRL2_HIGH_MSB 15 1898#define THERM_CTRL2_HIGH_LSB 8 1899#define THERM_CTRL2_HIGH_MASK 0x0000ff00 1900#define THERM_CTRL2_HIGH_GET(x) (((x) & THERM_CTRL2_HIGH_MASK) >> THERM_CTRL2_HIGH_LSB) 1901#define THERM_CTRL2_HIGH_SET(x) (((x) << THERM_CTRL2_HIGH_LSB) & THERM_CTRL2_HIGH_MASK) 1902#define THERM_CTRL2_LOW_MSB 7 1903#define THERM_CTRL2_LOW_LSB 0 1904#define THERM_CTRL2_LOW_MASK 0x000000ff 1905#define THERM_CTRL2_LOW_GET(x) (((x) & THERM_CTRL2_LOW_MASK) >> THERM_CTRL2_LOW_LSB) 1906#define THERM_CTRL2_LOW_SET(x) (((x) << THERM_CTRL2_LOW_LSB) & THERM_CTRL2_LOW_MASK) 1907 1908#define THERM_CTRL3_ADDRESS 0x000002e4 1909#define THERM_CTRL3_OFFSET 0x000002e4 1910#define THERM_CTRL3_ADC_GAIN_MSB 16 1911#define THERM_CTRL3_ADC_GAIN_LSB 8 1912#define THERM_CTRL3_ADC_GAIN_MASK 0x0001ff00 1913#define THERM_CTRL3_ADC_GAIN_GET(x) (((x) & THERM_CTRL3_ADC_GAIN_MASK) >> THERM_CTRL3_ADC_GAIN_LSB) 1914#define THERM_CTRL3_ADC_GAIN_SET(x) (((x) << THERM_CTRL3_ADC_GAIN_LSB) & THERM_CTRL3_ADC_GAIN_MASK) 1915#define THERM_CTRL3_ADC_OFFSET_MSB 7 1916#define THERM_CTRL3_ADC_OFFSET_LSB 0 1917#define THERM_CTRL3_ADC_OFFSET_MASK 0x000000ff 1918#define THERM_CTRL3_ADC_OFFSET_GET(x) (((x) & THERM_CTRL3_ADC_OFFSET_MASK) >> THERM_CTRL3_ADC_OFFSET_LSB) 1919#define THERM_CTRL3_ADC_OFFSET_SET(x) (((x) << THERM_CTRL3_ADC_OFFSET_LSB) & THERM_CTRL3_ADC_OFFSET_MASK) 1920 1921 1922#ifndef __ASSEMBLER__ 1923 1924typedef struct rtc_wlan_reg_reg_s { 1925 volatile unsigned int wlan_reset_control; 1926 volatile unsigned int wlan_xtal_control; 1927 volatile unsigned int wlan_tcxo_detect; 1928 volatile unsigned int wlan_xtal_test; 1929 volatile unsigned int wlan_quadrature; 1930 volatile unsigned int wlan_pll_control; 1931 volatile unsigned int wlan_pll_settle; 1932 volatile unsigned int wlan_xtal_settle; 1933 volatile unsigned int wlan_cpu_clock; 1934 volatile unsigned int wlan_clock_out; 1935 volatile unsigned int wlan_clock_control; 1936 volatile unsigned int wlan_bias_override; 1937 volatile unsigned int wlan_wdt_control; 1938 volatile unsigned int wlan_wdt_status; 1939 volatile unsigned int wlan_wdt; 1940 volatile unsigned int wlan_wdt_count; 1941 volatile unsigned int wlan_wdt_reset; 1942 volatile unsigned int wlan_int_status; 1943 volatile unsigned int wlan_lf_timer0; 1944 volatile unsigned int wlan_lf_timer_count0; 1945 volatile unsigned int wlan_lf_timer_control0; 1946 volatile unsigned int wlan_lf_timer_status0; 1947 volatile unsigned int wlan_lf_timer1; 1948 volatile unsigned int wlan_lf_timer_count1; 1949 volatile unsigned int wlan_lf_timer_control1; 1950 volatile unsigned int wlan_lf_timer_status1; 1951 volatile unsigned int wlan_lf_timer2; 1952 volatile unsigned int wlan_lf_timer_count2; 1953 volatile unsigned int wlan_lf_timer_control2; 1954 volatile unsigned int wlan_lf_timer_status2; 1955 volatile unsigned int wlan_lf_timer3; 1956 volatile unsigned int wlan_lf_timer_count3; 1957 volatile unsigned int wlan_lf_timer_control3; 1958 volatile unsigned int wlan_lf_timer_status3; 1959 volatile unsigned int wlan_hf_timer; 1960 volatile unsigned int wlan_hf_timer_count; 1961 volatile unsigned int wlan_hf_lf_count; 1962 volatile unsigned int wlan_hf_timer_control; 1963 volatile unsigned int wlan_hf_timer_status; 1964 volatile unsigned int wlan_rtc_control; 1965 volatile unsigned int wlan_rtc_time; 1966 volatile unsigned int wlan_rtc_date; 1967 volatile unsigned int wlan_rtc_set_time; 1968 volatile unsigned int wlan_rtc_set_date; 1969 volatile unsigned int wlan_rtc_set_alarm; 1970 volatile unsigned int wlan_rtc_config; 1971 volatile unsigned int wlan_rtc_alarm_status; 1972 volatile unsigned int wlan_uart_wakeup; 1973 volatile unsigned int wlan_reset_cause; 1974 volatile unsigned int wlan_system_sleep; 1975 volatile unsigned int wlan_sdio_wrapper; 1976 volatile unsigned int wlan_mac_sleep_control; 1977 volatile unsigned int wlan_keep_awake; 1978 volatile unsigned int wlan_lpo_cal_time; 1979 volatile unsigned int wlan_lpo_init_dividend_int; 1980 volatile unsigned int wlan_lpo_init_dividend_fraction; 1981 volatile unsigned int wlan_lpo_cal; 1982 volatile unsigned int wlan_lpo_cal_test_control; 1983 volatile unsigned int wlan_lpo_cal_test_status; 1984 volatile unsigned int wlan_chip_id; 1985 volatile unsigned int wlan_derived_rtc_clk; 1986 volatile unsigned int mac_pcu_slp32_mode; 1987 volatile unsigned int mac_pcu_slp32_wake; 1988 volatile unsigned int mac_pcu_slp32_inc; 1989 volatile unsigned int mac_pcu_slp_mib1; 1990 volatile unsigned int mac_pcu_slp_mib2; 1991 volatile unsigned int mac_pcu_slp_mib3; 1992 volatile unsigned int wlan_power_reg; 1993 volatile unsigned int wlan_core_clk_ctrl; 1994 volatile unsigned int wlan_gpio_wakeup_control; 1995 volatile unsigned int ht; 1996 volatile unsigned int mac_pcu_tsf_l32; 1997 volatile unsigned int mac_pcu_tsf_u32; 1998 volatile unsigned int mac_pcu_wbtimer; 1999 unsigned char pad0[24]; /* pad to 0x140 */ 2000 volatile unsigned int mac_pcu_generic_timers[16];
2001 volatile unsigned int mac_pcu_generic_timers_mode; 2002 unsigned char pad1[60]; /* pad to 0x1c0 */ 2003 volatile unsigned int mac_pcu_generic_timers2[16]; 2004 volatile unsigned int mac_pcu_generic_timers_mode2; 2005 volatile unsigned int mac_pcu_slp1; 2006 volatile unsigned int mac_pcu_slp2; 2007 volatile unsigned int mac_pcu_reset_tsf; 2008 volatile unsigned int mac_pcu_tsf_add_pll; 2009 volatile unsigned int sleep_retention; 2010 volatile unsigned int btcoexctrl; 2011 volatile unsigned int wbsync_priority1; 2012 volatile unsigned int wbsync_priority2; 2013 volatile unsigned int wbsync_priority3; 2014 volatile unsigned int btcoex0; 2015 volatile unsigned int btcoex1; 2016 volatile unsigned int btcoex2; 2017 volatile unsigned int btcoex3; 2018 volatile unsigned int btcoex4; 2019 volatile unsigned int btcoex5; 2020 volatile unsigned int btcoex6; 2021 volatile unsigned int lock; 2022 volatile unsigned int nolock_priority; 2023 volatile unsigned int wbsync; 2024 volatile unsigned int wbsync1; 2025 volatile unsigned int wbsync2; 2026 volatile unsigned int wbsync3; 2027 volatile unsigned int wb_timer_target; 2028 volatile unsigned int wb_timer_slop; 2029 volatile unsigned int btcoex_int_en; 2030 volatile unsigned int btcoex_int_stat; 2031 volatile unsigned int btpriority_int_en; 2032 volatile unsigned int btpriority_int_stat; 2033 volatile unsigned int btpriority_stomp_int_en; 2034 volatile unsigned int btpriority_stomp_int_stat; 2035 volatile unsigned int mac_pcu_bmiss_timeout; 2036 volatile unsigned int mac_pcu_cab_awake; 2037 volatile unsigned int lp_perf_counter; 2038 volatile unsigned int lp_perf_light_sleep; 2039 volatile unsigned int lp_perf_deep_sleep; 2040 volatile unsigned int lp_perf_on; 2041 volatile unsigned int st_64_bit; 2042 volatile unsigned int message_wr; 2043 volatile unsigned int message_wr_p; 2044 volatile unsigned int message_rd; 2045 volatile unsigned int message_rd_p; 2046 volatile unsigned int chip_mode; 2047 volatile unsigned int clk_req_fall_edge; 2048 volatile unsigned int otp; 2049 volatile unsigned int otp_status; 2050 volatile unsigned int pmu; 2051 unsigned char pad2[4]; /* pad to 0x2c0 */ 2052 volatile unsigned int pmu_config[2]; 2053 volatile unsigned int pmu_bypass; 2054 volatile unsigned int mac_pcu_tsf2_l32; 2055 volatile unsigned int mac_pcu_tsf2_u32; 2056 volatile unsigned int mac_pcu_generic_timers_mode3; 2057 volatile unsigned int mac_pcu_direct_connect; 2058 volatile unsigned int therm_ctrl1; 2059 volatile unsigned int therm_ctrl2; 2060 volatile unsigned int therm_ctrl3; 2061} rtc_wlan_reg_reg_t; 2062 2063#endif /* __ASSEMBLER__ */ 2064 2065#endif /* _RTC_WLAN_REG_H_ */ 2066