1#ifndef _IP22_ZILOG_H
2#define _IP22_ZILOG_H
3
4#include <asm/byteorder.h>
5
6struct zilog_channel {
7#ifdef __BIG_ENDIAN
8 volatile unsigned char unused0[3];
9 volatile unsigned char control;
10 volatile unsigned char unused1[3];
11 volatile unsigned char data;
12#else
13 volatile unsigned char control;
14 volatile unsigned char unused0[3];
15 volatile unsigned char data;
16 volatile unsigned char unused1[3];
17#endif
18};
19
20struct zilog_layout {
21 struct zilog_channel channelB;
22 struct zilog_channel channelA;
23};
24
25#define NUM_ZSREGS 16
26
27
28
29
30#define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2))
31#define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
32
33
34
35#define FLAG 0x7e
36
37
38#define R0 0
39#define R1 1
40#define R2 2
41#define R3 3
42#define R4 4
43#define R5 5
44#define R6 6
45#define R7 7
46#define R8 8
47#define R9 9
48#define R10 10
49#define R11 11
50#define R12 12
51#define R13 13
52#define R14 14
53#define R15 15
54
55#define NULLCODE 0
56#define POINT_HIGH 0x8
57#define RES_EXT_INT 0x10
58#define SEND_ABORT 0x18
59#define RES_RxINT_FC 0x20
60#define RES_Tx_P 0x28
61#define ERR_RES 0x30
62#define RES_H_IUS 0x38
63
64#define RES_Rx_CRC 0x40
65#define RES_Tx_CRC 0x80
66#define RES_EOM_L 0xC0
67
68
69
70#define EXT_INT_ENAB 0x1
71#define TxINT_ENAB 0x2
72#define PAR_SPEC 0x4
73
74#define RxINT_DISAB 0
75#define RxINT_FCERR 0x8
76#define INT_ALL_Rx 0x10
77#define INT_ERR_Rx 0x18
78#define RxINT_MASK 0x18
79
80#define WT_RDY_RT 0x20
81#define WT_FN_RDYFN 0x40
82#define WT_RDY_ENAB 0x80
83
84
85
86
87
88#define RxENAB 0x1
89#define SYNC_L_INH 0x2
90#define ADD_SM 0x4
91#define RxCRC_ENAB 0x8
92#define ENT_HM 0x10
93#define AUTO_ENAB 0x20
94#define Rx5 0x0
95#define Rx7 0x40
96#define Rx6 0x80
97#define Rx8 0xc0
98#define RxN_MASK 0xc0
99
100
101
102#define PAR_ENAB 0x1
103#define PAR_EVEN 0x2
104
105#define SYNC_ENAB 0
106#define SB1 0x4
107#define SB15 0x8
108#define SB2 0xc
109
110#define MONSYNC 0
111#define BISYNC 0x10
112#define SDLC 0x20
113#define EXTSYNC 0x30
114
115#define X1CLK 0x0
116#define X16CLK 0x40
117#define X32CLK 0x80
118#define X64CLK 0xC0
119#define XCLK_MASK 0xC0
120
121
122
123#define TxCRC_ENAB 0x1
124#define RTS 0x2
125#define SDLC_CRC 0x4
126#define TxENAB 0x8
127#define SND_BRK 0x10
128#define Tx5 0x0
129#define Tx7 0x20
130#define Tx6 0x40
131#define Tx8 0x60
132#define TxN_MASK 0x60
133#define DTR 0x80
134
135
136
137
138
139
140
141
142#define VIS 1
143#define NV 2
144#define DLC 4
145#define MIE 8
146#define STATHI 0x10
147#define NORESET 0
148#define CHRB 0x40
149#define CHRA 0x80
150#define FHWRES 0xc0
151
152
153#define BIT6 1
154#define LOOPMODE 2
155#define ABUNDER 4
156#define MARKIDLE 8
157#define GAOP 0x10
158#define NRZ 0
159#define NRZI 0x20
160#define FM1 0x40
161#define FM0 0x60
162#define CRCPS 0x80
163
164
165#define TRxCXT 0
166#define TRxCTC 1
167#define TRxCBR 2
168#define TRxCDP 3
169#define TRxCOI 4
170#define TCRTxCP 0
171#define TCTRxCP 8
172#define TCBR 0x10
173#define TCDPLL 0x18
174#define RCRTxCP 0
175#define RCTRxCP 0x20
176#define RCBR 0x40
177#define RCDPLL 0x60
178#define RTxCX 0x80
179
180
181
182
183
184
185#define BRENAB 1
186#define BRSRC 2
187#define DTRREQ 4
188#define AUTOECHO 8
189#define LOOPBAK 0x10
190#define SEARCH 0x20
191#define RMC 0x40
192#define DISDPLL 0x60
193#define SSBR 0x80
194#define SSRTxC 0xa0
195#define SFMM 0xc0
196#define SNRZI 0xe0
197
198
199#define ZCIE 2
200#define DCDIE 8
201#define SYNCIE 0x10
202#define CTSIE 0x20
203#define TxUIE 0x40
204#define BRKIE 0x80
205
206
207
208#define Rx_CH_AV 0x1
209#define ZCOUNT 0x2
210#define Tx_BUF_EMP 0x4
211#define DCD 0x8
212#define SYNC 0x10
213#define CTS 0x20
214#define TxEOM 0x40
215#define BRK_ABRT 0x80
216
217
218#define ALL_SNT 0x1
219
220#define RES3 0x8
221#define RES4 0x4
222#define RES5 0xc
223#define RES6 0x2
224#define RES7 0xa
225#define RES8 0x6
226#define RES18 0xe
227#define RES28 0x0
228
229#define PAR_ERR 0x10
230#define Rx_OVR 0x20
231#define CRC_ERR 0x40
232#define END_FR 0x80
233
234
235#define CHB_Tx_EMPTY 0x00
236#define CHB_EXT_STAT 0x02
237#define CHB_Rx_AVAIL 0x04
238#define CHB_SPECIAL 0x06
239#define CHA_Tx_EMPTY 0x08
240#define CHA_EXT_STAT 0x0a
241#define CHA_Rx_AVAIL 0x0c
242#define CHA_SPECIAL 0x0e
243#define STATUS_MASK 0x0e
244
245
246#define CHBEXT 0x1
247#define CHBTxIP 0x2
248#define CHBRxIP 0x4
249#define CHAEXT 0x8
250#define CHATxIP 0x10
251#define CHARxIP 0x20
252
253
254
255
256#define ONLOOP 2
257#define LOOPSEND 0x10
258#define CLK2MIS 0x40
259#define CLK1MIS 0x80
260
261
262
263
264
265
266
267
268#define ZS_CLEARERR(channel) do { writeb(ERR_RES, &channel->control); \
269 udelay(5); } while(0)
270
271#define ZS_CLEARSTAT(channel) do { writeb(RES_EXT_INT, &channel->control); \
272 udelay(5); } while(0)
273
274#define ZS_CLEARFIFO(channel) do { readb(&channel->data); \
275 udelay(2); \
276 readb(&channel->data); \
277 udelay(2); \
278 readb(&channel->data); \
279 udelay(2); } while(0)
280
281#endif
282