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15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/string.h>
19#include <linux/mm.h>
20#include <linux/vmalloc.h>
21#include <linux/delay.h>
22#include <linux/of.h>
23#include <linux/of_address.h>
24#include <linux/interrupt.h>
25#include <linux/fb.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
28#include <linux/pci.h>
29#include <asm/io.h>
30
31#ifdef CONFIG_PPC64
32#include <asm/pci-bridge.h>
33#endif
34
35#ifdef CONFIG_PPC32
36#include <asm/bootx.h>
37#endif
38
39#include "macmodes.h"
40
41
42enum {
43 cmap_unknown,
44 cmap_m64,
45 cmap_r128,
46 cmap_M3A,
47 cmap_M3B,
48 cmap_radeon,
49 cmap_gxt2000,
50 cmap_avivo,
51};
52
53struct offb_par {
54 volatile void __iomem *cmap_adr;
55 volatile void __iomem *cmap_data;
56 int cmap_type;
57 int blanked;
58};
59
60struct offb_par default_par;
61
62#ifdef CONFIG_PPC32
63extern boot_infos_t *boot_infos;
64#endif
65
66
67#define AVIVO_DC_LUT_RW_SELECT 0x6480
68#define AVIVO_DC_LUT_RW_MODE 0x6484
69#define AVIVO_DC_LUT_RW_INDEX 0x6488
70#define AVIVO_DC_LUT_SEQ_COLOR 0x648c
71#define AVIVO_DC_LUT_PWL_DATA 0x6490
72#define AVIVO_DC_LUT_30_COLOR 0x6494
73#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498
74#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c
75#define AVIVO_DC_LUT_AUTOFILL 0x64a0
76
77#define AVIVO_DC_LUTA_CONTROL 0x64c0
78#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4
79#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8
80#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc
81#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0
82#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4
83#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8
84
85#define AVIVO_DC_LUTB_CONTROL 0x6cc0
86#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4
87#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8
88#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc
89#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0
90#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4
91#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8
92
93
94
95
96
97
98
99static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
100 u_int transp, struct fb_info *info)
101{
102 struct offb_par *par = (struct offb_par *) info->par;
103 int i, depth;
104 u32 *pal = info->pseudo_palette;
105
106 depth = info->var.bits_per_pixel;
107 if (depth == 16)
108 depth = (info->var.green.length == 5) ? 15 : 16;
109
110 if (regno > 255 ||
111 (depth == 16 && regno > 63) ||
112 (depth == 15 && regno > 31))
113 return 1;
114
115 if (regno < 16) {
116 switch (depth) {
117 case 15:
118 pal[regno] = (regno << 10) | (regno << 5) | regno;
119 break;
120 case 16:
121 pal[regno] = (regno << 11) | (regno << 5) | regno;
122 break;
123 case 24:
124 pal[regno] = (regno << 16) | (regno << 8) | regno;
125 break;
126 case 32:
127 i = (regno << 8) | regno;
128 pal[regno] = (i << 16) | i;
129 break;
130 }
131 }
132
133 red >>= 8;
134 green >>= 8;
135 blue >>= 8;
136
137 if (!par->cmap_adr)
138 return 0;
139
140 switch (par->cmap_type) {
141 case cmap_m64:
142 writeb(regno, par->cmap_adr);
143 writeb(red, par->cmap_data);
144 writeb(green, par->cmap_data);
145 writeb(blue, par->cmap_data);
146 break;
147 case cmap_M3A:
148
149 out_le32(par->cmap_adr + 0x58,
150 in_le32(par->cmap_adr + 0x58) & ~0x20);
151 case cmap_r128:
152
153 out_8(par->cmap_adr + 0xb0, regno);
154 out_le32(par->cmap_adr + 0xb4,
155 (red << 16 | green << 8 | blue));
156 break;
157 case cmap_M3B:
158
159 out_le32(par->cmap_adr + 0x58,
160 in_le32(par->cmap_adr + 0x58) | 0x20);
161
162 out_8(par->cmap_adr + 0xb0, regno);
163 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
164 break;
165 case cmap_radeon:
166
167 out_8(par->cmap_adr + 0xb0, regno);
168 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
169 break;
170 case cmap_gxt2000:
171 out_le32(((unsigned __iomem *) par->cmap_adr) + regno,
172 (red << 16 | green << 8 | blue));
173 break;
174 case cmap_avivo:
175
176 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
177 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
178 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
179 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
180 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
181 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
182 writel(((red) << 22) | ((green) << 12) | ((blue) << 2),
183 par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
184 break;
185 }
186
187 return 0;
188}
189
190
191
192
193
194static int offb_blank(int blank, struct fb_info *info)
195{
196 struct offb_par *par = (struct offb_par *) info->par;
197 int i, j;
198
199 if (!par->cmap_adr)
200 return 0;
201
202 if (!par->blanked)
203 if (!blank)
204 return 0;
205
206 par->blanked = blank;
207
208 if (blank)
209 for (i = 0; i < 256; i++) {
210 switch (par->cmap_type) {
211 case cmap_m64:
212 writeb(i, par->cmap_adr);
213 for (j = 0; j < 3; j++)
214 writeb(0, par->cmap_data);
215 break;
216 case cmap_M3A:
217
218 out_le32(par->cmap_adr + 0x58,
219 in_le32(par->cmap_adr + 0x58) & ~0x20);
220 case cmap_r128:
221
222 out_8(par->cmap_adr + 0xb0, i);
223 out_le32(par->cmap_adr + 0xb4, 0);
224 break;
225 case cmap_M3B:
226
227 out_le32(par->cmap_adr + 0x58,
228 in_le32(par->cmap_adr + 0x58) | 0x20);
229
230 out_8(par->cmap_adr + 0xb0, i);
231 out_le32(par->cmap_adr + 0xb4, 0);
232 break;
233 case cmap_radeon:
234 out_8(par->cmap_adr + 0xb0, i);
235 out_le32(par->cmap_adr + 0xb4, 0);
236 break;
237 case cmap_gxt2000:
238 out_le32(((unsigned __iomem *) par->cmap_adr) + i,
239 0);
240 break;
241 case cmap_avivo:
242 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
243 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
244 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
245 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
246 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX);
247 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR);
248 break;
249 }
250 } else
251 fb_set_cmap(&info->cmap, info);
252 return 0;
253}
254
255static int offb_set_par(struct fb_info *info)
256{
257 struct offb_par *par = (struct offb_par *) info->par;
258
259
260 if (par->cmap_type == cmap_avivo) {
261 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL);
262 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE);
263 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN);
264 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED);
265 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE);
266 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN);
267 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED);
268 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL);
269 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE);
270 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN);
271 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED);
272 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE);
273 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN);
274 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED);
275 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
276 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
277 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
278 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT);
279 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE);
280 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK);
281 }
282 return 0;
283}
284
285static void offb_destroy(struct fb_info *info)
286{
287 if (info->screen_base)
288 iounmap(info->screen_base);
289 release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size);
290 framebuffer_release(info);
291}
292
293static struct fb_ops offb_ops = {
294 .owner = THIS_MODULE,
295 .fb_destroy = offb_destroy,
296 .fb_setcolreg = offb_setcolreg,
297 .fb_set_par = offb_set_par,
298 .fb_blank = offb_blank,
299 .fb_fillrect = cfb_fillrect,
300 .fb_copyarea = cfb_copyarea,
301 .fb_imageblit = cfb_imageblit,
302};
303
304static void __iomem *offb_map_reg(struct device_node *np, int index,
305 unsigned long offset, unsigned long size)
306{
307 const u32 *addrp;
308 u64 asize, taddr;
309 unsigned int flags;
310
311 addrp = of_get_pci_address(np, index, &asize, &flags);
312 if (addrp == NULL)
313 addrp = of_get_address(np, index, &asize, &flags);
314 if (addrp == NULL)
315 return NULL;
316 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
317 return NULL;
318 if ((offset + size) > asize)
319 return NULL;
320 taddr = of_translate_address(np, addrp);
321 if (taddr == OF_BAD_ADDR)
322 return NULL;
323 return ioremap(taddr + offset, size);
324}
325
326static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp,
327 const char *name, unsigned long address)
328{
329 struct offb_par *par = (struct offb_par *) info->par;
330
331 if (dp && !strncmp(name, "ATY,Rage128", 11)) {
332 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
333 if (par->cmap_adr)
334 par->cmap_type = cmap_r128;
335 } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
336 || !strncmp(name, "ATY,RageM3p12A", 14))) {
337 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
338 if (par->cmap_adr)
339 par->cmap_type = cmap_M3A;
340 } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
341 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff);
342 if (par->cmap_adr)
343 par->cmap_type = cmap_M3B;
344 } else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
345 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff);
346 if (par->cmap_adr)
347 par->cmap_type = cmap_radeon;
348 } else if (!strncmp(name, "ATY,", 4)) {
349 unsigned long base = address & 0xff000000UL;
350 par->cmap_adr =
351 ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
352 par->cmap_data = par->cmap_adr + 1;
353 par->cmap_type = cmap_m64;
354 } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") ||
355 of_device_is_compatible(dp, "pci1014,21c"))) {
356 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000);
357 if (par->cmap_adr)
358 par->cmap_type = cmap_gxt2000;
359 } else if (dp && !strncmp(name, "vga,Display-", 12)) {
360
361 struct device_node *pciparent = of_get_parent(dp);
362 const u32 *vid, *did;
363 vid = of_get_property(pciparent, "vendor-id", NULL);
364 did = of_get_property(pciparent, "device-id", NULL);
365
366 if (vid && did && *vid == 0x1002 &&
367 ((*did >= 0x7100 && *did < 0x7800) ||
368 (*did >= 0x9400))) {
369 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000);
370 if (par->cmap_adr)
371 par->cmap_type = cmap_avivo;
372 }
373 of_node_put(pciparent);
374 }
375 info->fix.visual = (par->cmap_type != cmap_unknown) ?
376 FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR;
377}
378
379static void __init offb_init_fb(const char *name, const char *full_name,
380 int width, int height, int depth,
381 int pitch, unsigned long address,
382 int foreign_endian, struct device_node *dp)
383{
384 unsigned long res_size = pitch * height * (depth + 7) / 8;
385 struct offb_par *par = &default_par;
386 unsigned long res_start = address;
387 struct fb_fix_screeninfo *fix;
388 struct fb_var_screeninfo *var;
389 struct fb_info *info;
390
391 if (!request_mem_region(res_start, res_size, "offb"))
392 return;
393
394 printk(KERN_INFO
395 "Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
396 width, height, name, address, depth, pitch);
397 if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
398 printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
399 depth);
400 release_mem_region(res_start, res_size);
401 return;
402 }
403
404 info = framebuffer_alloc(sizeof(u32) * 16, NULL);
405
406 if (info == 0) {
407 release_mem_region(res_start, res_size);
408 return;
409 }
410
411 fix = &info->fix;
412 var = &info->var;
413 info->par = par;
414
415 strcpy(fix->id, "OFfb ");
416 strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
417 fix->id[sizeof(fix->id) - 1] = '\0';
418
419 var->xres = var->xres_virtual = width;
420 var->yres = var->yres_virtual = height;
421 fix->line_length = pitch;
422
423 fix->smem_start = address;
424 fix->smem_len = pitch * height;
425 fix->type = FB_TYPE_PACKED_PIXELS;
426 fix->type_aux = 0;
427
428 par->cmap_type = cmap_unknown;
429 if (depth == 8)
430 offb_init_palette_hacks(info, dp, name, address);
431 else
432 fix->visual = FB_VISUAL_TRUECOLOR;
433
434 var->xoffset = var->yoffset = 0;
435 switch (depth) {
436 case 8:
437 var->bits_per_pixel = 8;
438 var->red.offset = 0;
439 var->red.length = 8;
440 var->green.offset = 0;
441 var->green.length = 8;
442 var->blue.offset = 0;
443 var->blue.length = 8;
444 var->transp.offset = 0;
445 var->transp.length = 0;
446 break;
447 case 15:
448 var->bits_per_pixel = 16;
449 var->red.offset = 10;
450 var->red.length = 5;
451 var->green.offset = 5;
452 var->green.length = 5;
453 var->blue.offset = 0;
454 var->blue.length = 5;
455 var->transp.offset = 0;
456 var->transp.length = 0;
457 break;
458 case 16:
459 var->bits_per_pixel = 16;
460 var->red.offset = 11;
461 var->red.length = 5;
462 var->green.offset = 5;
463 var->green.length = 6;
464 var->blue.offset = 0;
465 var->blue.length = 5;
466 var->transp.offset = 0;
467 var->transp.length = 0;
468 break;
469 case 32:
470 var->bits_per_pixel = 32;
471 var->red.offset = 16;
472 var->red.length = 8;
473 var->green.offset = 8;
474 var->green.length = 8;
475 var->blue.offset = 0;
476 var->blue.length = 8;
477 var->transp.offset = 24;
478 var->transp.length = 8;
479 break;
480 }
481 var->red.msb_right = var->green.msb_right = var->blue.msb_right =
482 var->transp.msb_right = 0;
483 var->grayscale = 0;
484 var->nonstd = 0;
485 var->activate = 0;
486 var->height = var->width = -1;
487 var->pixclock = 10000;
488 var->left_margin = var->right_margin = 16;
489 var->upper_margin = var->lower_margin = 16;
490 var->hsync_len = var->vsync_len = 8;
491 var->sync = 0;
492 var->vmode = FB_VMODE_NONINTERLACED;
493
494
495 info->apertures = alloc_apertures(1);
496 if (!info->apertures)
497 goto out_aper;
498 info->apertures->ranges[0].base = address;
499 info->apertures->ranges[0].size = fix->smem_len;
500
501 info->fbops = &offb_ops;
502 info->screen_base = ioremap(address, fix->smem_len);
503 info->pseudo_palette = (void *) (info + 1);
504 info->flags = FBINFO_DEFAULT | FBINFO_MISC_FIRMWARE | foreign_endian;
505
506 fb_alloc_cmap(&info->cmap, 256, 0);
507
508 if (register_framebuffer(info) < 0)
509 goto out_err;
510
511 printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
512 info->node, full_name);
513 return;
514
515out_err:
516 iounmap(info->screen_base);
517out_aper:
518 iounmap(par->cmap_adr);
519 par->cmap_adr = NULL;
520 framebuffer_release(info);
521 release_mem_region(res_start, res_size);
522}
523
524
525static void __init offb_init_nodriver(struct device_node *dp, int no_real_node)
526{
527 unsigned int len;
528 int i, width = 640, height = 480, depth = 8, pitch = 640;
529 unsigned int flags, rsize, addr_prop = 0;
530 unsigned long max_size = 0;
531 u64 rstart, address = OF_BAD_ADDR;
532 const u32 *pp, *addrp, *up;
533 u64 asize;
534 int foreign_endian = 0;
535
536#ifdef __BIG_ENDIAN
537 if (of_get_property(dp, "little-endian", NULL))
538 foreign_endian = FBINFO_FOREIGN_ENDIAN;
539#else
540 if (of_get_property(dp, "big-endian", NULL))
541 foreign_endian = FBINFO_FOREIGN_ENDIAN;
542#endif
543
544 pp = of_get_property(dp, "linux,bootx-depth", &len);
545 if (pp == NULL)
546 pp = of_get_property(dp, "depth", &len);
547 if (pp && len == sizeof(u32))
548 depth = *pp;
549
550 pp = of_get_property(dp, "linux,bootx-width", &len);
551 if (pp == NULL)
552 pp = of_get_property(dp, "width", &len);
553 if (pp && len == sizeof(u32))
554 width = *pp;
555
556 pp = of_get_property(dp, "linux,bootx-height", &len);
557 if (pp == NULL)
558 pp = of_get_property(dp, "height", &len);
559 if (pp && len == sizeof(u32))
560 height = *pp;
561
562 pp = of_get_property(dp, "linux,bootx-linebytes", &len);
563 if (pp == NULL)
564 pp = of_get_property(dp, "linebytes", &len);
565 if (pp && len == sizeof(u32) && (*pp != 0xffffffffu))
566 pitch = *pp;
567 else
568 pitch = width * ((depth + 7) / 8);
569
570 rsize = (unsigned long)pitch * (unsigned long)height;
571
572
573
574
575
576
577
578
579
580
581
582 up = of_get_property(dp, "linux,bootx-addr", &len);
583 if (up == NULL)
584 up = of_get_property(dp, "address", &len);
585 if (up && len == sizeof(u32))
586 addr_prop = *up;
587
588
589 if (no_real_node)
590 goto skip_addr;
591
592 for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
593 != NULL; i++) {
594 int match_addrp = 0;
595
596 if (!(flags & IORESOURCE_MEM))
597 continue;
598 if (asize < rsize)
599 continue;
600 rstart = of_translate_address(dp, addrp);
601 if (rstart == OF_BAD_ADDR)
602 continue;
603 if (addr_prop && (rstart <= addr_prop) &&
604 ((rstart + asize) >= (addr_prop + rsize)))
605 match_addrp = 1;
606 if (match_addrp) {
607 address = addr_prop;
608 break;
609 }
610 if (rsize > max_size) {
611 max_size = rsize;
612 address = OF_BAD_ADDR;
613 }
614
615 if (address == OF_BAD_ADDR)
616 address = rstart;
617 }
618 skip_addr:
619 if (address == OF_BAD_ADDR && addr_prop)
620 address = (u64)addr_prop;
621 if (address != OF_BAD_ADDR) {
622
623 if (strcmp(dp->name, "valkyrie") == 0)
624 address += 0x1000;
625 offb_init_fb(no_real_node ? "bootx" : dp->name,
626 no_real_node ? "display" : dp->full_name,
627 width, height, depth, pitch, address,
628 foreign_endian, no_real_node ? NULL : dp);
629 }
630}
631
632static int __init offb_init(void)
633{
634 struct device_node *dp = NULL, *boot_disp = NULL;
635
636 if (fb_get_options("offb", NULL))
637 return -ENODEV;
638
639
640 if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL) != NULL) {
641
642
643
644
645
646
647 offb_init_nodriver(of_chosen, 1);
648 }
649
650 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
651 if (of_get_property(dp, "linux,opened", NULL) &&
652 of_get_property(dp, "linux,boot-display", NULL)) {
653 boot_disp = dp;
654 offb_init_nodriver(dp, 0);
655 }
656 }
657 for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
658 if (of_get_property(dp, "linux,opened", NULL) &&
659 dp != boot_disp)
660 offb_init_nodriver(dp, 0);
661 }
662
663 return 0;
664}
665
666
667module_init(offb_init);
668MODULE_LICENSE("GPL");
669
