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23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
26#include <linux/types.h>
27
28#ifdef __KERNEL__
29#include <linux/ioctl.h>
30#include <linux/time.h>
31#include <asm/byteorder.h>
32
33#ifdef __LITTLE_ENDIAN
34#define SNDRV_LITTLE_ENDIAN
35#else
36#ifdef __BIG_ENDIAN
37#define SNDRV_BIG_ENDIAN
38#else
39#error "Unsupported endian..."
40#endif
41#endif
42
43#endif
44
45
46
47
48
49#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
50#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
51#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
52#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
53#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
54 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
55 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
56 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
57
58
59
60
61
62
63
64struct snd_aes_iec958 {
65 unsigned char status[24];
66 unsigned char subcode[147];
67 unsigned char pad;
68 unsigned char dig_subframe[4];
69};
70
71
72
73
74
75
76
77#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
78
79enum {
80 SNDRV_HWDEP_IFACE_OPL2 = 0,
81 SNDRV_HWDEP_IFACE_OPL3,
82 SNDRV_HWDEP_IFACE_OPL4,
83 SNDRV_HWDEP_IFACE_SB16CSP,
84 SNDRV_HWDEP_IFACE_EMU10K1,
85 SNDRV_HWDEP_IFACE_YSS225,
86 SNDRV_HWDEP_IFACE_ICS2115,
87 SNDRV_HWDEP_IFACE_SSCAPE,
88 SNDRV_HWDEP_IFACE_VX,
89 SNDRV_HWDEP_IFACE_MIXART,
90 SNDRV_HWDEP_IFACE_USX2Y,
91 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE,
92 SNDRV_HWDEP_IFACE_BLUETOOTH,
93 SNDRV_HWDEP_IFACE_USX2Y_PCM,
94 SNDRV_HWDEP_IFACE_PCXHR,
95 SNDRV_HWDEP_IFACE_SB_RC,
96 SNDRV_HWDEP_IFACE_HDA,
97 SNDRV_HWDEP_IFACE_USB_STREAM,
98
99
100 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM
101};
102
103struct snd_hwdep_info {
104 unsigned int device;
105 int card;
106 unsigned char id[64];
107 unsigned char name[80];
108 int iface;
109 unsigned char reserved[64];
110};
111
112
113struct snd_hwdep_dsp_status {
114 unsigned int version;
115 unsigned char id[32];
116 unsigned int num_dsps;
117 unsigned int dsp_loaded;
118 unsigned int chip_ready;
119 unsigned char reserved[16];
120};
121
122struct snd_hwdep_dsp_image {
123 unsigned int index;
124 unsigned char name[64];
125 unsigned char __user *image;
126 size_t length;
127 unsigned long driver_data;
128};
129
130#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
131#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
132#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
133#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
134
135
136
137
138
139
140
141#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 10)
142
143typedef unsigned long snd_pcm_uframes_t;
144typedef signed long snd_pcm_sframes_t;
145
146enum {
147 SNDRV_PCM_CLASS_GENERIC = 0,
148 SNDRV_PCM_CLASS_MULTI,
149 SNDRV_PCM_CLASS_MODEM,
150 SNDRV_PCM_CLASS_DIGITIZER,
151
152 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
153};
154
155enum {
156 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0,
157 SNDRV_PCM_SUBCLASS_MULTI_MIX,
158
159 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
160};
161
162enum {
163 SNDRV_PCM_STREAM_PLAYBACK = 0,
164 SNDRV_PCM_STREAM_CAPTURE,
165 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
166};
167
168typedef int __bitwise snd_pcm_access_t;
169#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0)
170#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1)
171#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2)
172#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3)
173#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4)
174#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
175
176typedef int __bitwise snd_pcm_format_t;
177#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
178#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
179#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
180#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
181#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
182#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
183#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6)
184#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7)
185#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8)
186#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9)
187#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
188#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
189#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
190#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
191#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14)
192#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15)
193#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16)
194#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17)
195#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18)
196#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19)
197#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
198#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
199#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
200#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
201#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
202#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
203#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32)
204#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33)
205#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34)
206#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35)
207#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36)
208#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37)
209#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38)
210#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39)
211#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40)
212#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41)
213#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42)
214#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43)
215#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44)
216#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45)
217#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46)
218#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47)
219#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_G723_40_1B
220
221#ifdef SNDRV_LITTLE_ENDIAN
222#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
223#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
224#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
225#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
226#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
227#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
228#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
229#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
230#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
231#endif
232#ifdef SNDRV_BIG_ENDIAN
233#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
234#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
235#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
236#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
237#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
238#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
239#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
240#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
241#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
242#endif
243
244typedef int __bitwise snd_pcm_subformat_t;
245#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
246#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
247
248#define SNDRV_PCM_INFO_MMAP 0x00000001
249#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002
250#define SNDRV_PCM_INFO_DOUBLE 0x00000004
251#define SNDRV_PCM_INFO_BATCH 0x00000010
252#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100
253#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200
254#define SNDRV_PCM_INFO_COMPLEX 0x00000400
255#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000
256#define SNDRV_PCM_INFO_OVERRANGE 0x00020000
257#define SNDRV_PCM_INFO_RESUME 0x00040000
258#define SNDRV_PCM_INFO_PAUSE 0x00080000
259#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000
260#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000
261#define SNDRV_PCM_INFO_SYNC_START 0x00400000
262#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000
263#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000
264
265typedef int __bitwise snd_pcm_state_t;
266#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0)
267#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1)
268#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2)
269#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3)
270#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4)
271#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5)
272#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6)
273#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7)
274#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8)
275#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
276
277enum {
278 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
279 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
280 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
281};
282
283union snd_pcm_sync_id {
284 unsigned char id[16];
285 unsigned short id16[8];
286 unsigned int id32[4];
287};
288
289struct snd_pcm_info {
290 unsigned int device;
291 unsigned int subdevice;
292 int stream;
293 int card;
294 unsigned char id[64];
295 unsigned char name[80];
296 unsigned char subname[32];
297 int dev_class;
298 int dev_subclass;
299 unsigned int subdevices_count;
300 unsigned int subdevices_avail;
301 union snd_pcm_sync_id sync;
302 unsigned char reserved[64];
303};
304
305typedef int snd_pcm_hw_param_t;
306#define SNDRV_PCM_HW_PARAM_ACCESS 0
307#define SNDRV_PCM_HW_PARAM_FORMAT 1
308#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2
309#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
310#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
311
312#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8
313#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9
314#define SNDRV_PCM_HW_PARAM_CHANNELS 10
315#define SNDRV_PCM_HW_PARAM_RATE 11
316#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12
317
318
319#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13
320
321
322#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14
323
324
325#define SNDRV_PCM_HW_PARAM_PERIODS 15
326
327
328#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16
329
330
331#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17
332#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18
333#define SNDRV_PCM_HW_PARAM_TICK_TIME 19
334#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
335#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
336
337#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0)
338#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1)
339#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2)
340
341struct snd_interval {
342 unsigned int min, max;
343 unsigned int openmin:1,
344 openmax:1,
345 integer:1,
346 empty:1;
347};
348
349#define SNDRV_MASK_MAX 256
350
351struct snd_mask {
352 __u32 bits[(SNDRV_MASK_MAX+31)/32];
353};
354
355struct snd_pcm_hw_params {
356 unsigned int flags;
357 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
358 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
359 struct snd_mask mres[5];
360 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
361 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
362 struct snd_interval ires[9];
363 unsigned int rmask;
364 unsigned int cmask;
365 unsigned int info;
366 unsigned int msbits;
367 unsigned int rate_num;
368 unsigned int rate_den;
369 snd_pcm_uframes_t fifo_size;
370 unsigned char reserved[64];
371};
372
373enum {
374 SNDRV_PCM_TSTAMP_NONE = 0,
375 SNDRV_PCM_TSTAMP_ENABLE,
376 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
377};
378
379struct snd_pcm_sw_params {
380 int tstamp_mode;
381 unsigned int period_step;
382 unsigned int sleep_min;
383 snd_pcm_uframes_t avail_min;
384 snd_pcm_uframes_t xfer_align;
385 snd_pcm_uframes_t start_threshold;
386 snd_pcm_uframes_t stop_threshold;
387 snd_pcm_uframes_t silence_threshold;
388 snd_pcm_uframes_t silence_size;
389 snd_pcm_uframes_t boundary;
390 unsigned char reserved[64];
391};
392
393struct snd_pcm_channel_info {
394 unsigned int channel;
395 __kernel_off_t offset;
396 unsigned int first;
397 unsigned int step;
398};
399
400struct snd_pcm_status {
401 snd_pcm_state_t state;
402 struct timespec trigger_tstamp;
403 struct timespec tstamp;
404 snd_pcm_uframes_t appl_ptr;
405 snd_pcm_uframes_t hw_ptr;
406 snd_pcm_sframes_t delay;
407 snd_pcm_uframes_t avail;
408 snd_pcm_uframes_t avail_max;
409 snd_pcm_uframes_t overrange;
410 snd_pcm_state_t suspended_state;
411 unsigned char reserved[60];
412};
413
414struct snd_pcm_mmap_status {
415 snd_pcm_state_t state;
416 int pad1;
417 snd_pcm_uframes_t hw_ptr;
418 struct timespec tstamp;
419 snd_pcm_state_t suspended_state;
420};
421
422struct snd_pcm_mmap_control {
423 snd_pcm_uframes_t appl_ptr;
424 snd_pcm_uframes_t avail_min;
425};
426
427#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0)
428#define SNDRV_PCM_SYNC_PTR_APPL (1<<1)
429#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2)
430
431struct snd_pcm_sync_ptr {
432 unsigned int flags;
433 union {
434 struct snd_pcm_mmap_status status;
435 unsigned char reserved[64];
436 } s;
437 union {
438 struct snd_pcm_mmap_control control;
439 unsigned char reserved[64];
440 } c;
441};
442
443struct snd_xferi {
444 snd_pcm_sframes_t result;
445 void __user *buf;
446 snd_pcm_uframes_t frames;
447};
448
449struct snd_xfern {
450 snd_pcm_sframes_t result;
451 void __user * __user *bufs;
452 snd_pcm_uframes_t frames;
453};
454
455enum {
456 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0,
457 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
458 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
459};
460
461#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
462#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
463#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
464#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
465#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
466#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
467#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
468#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
469#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
470#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
471#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
472#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
473#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
474#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
475#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
476#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
477#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
478#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
479#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
480#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
481#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
482#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
483#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
484#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
485#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
486#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
487#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
488#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
489#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
490
491
492
493
494
495
496
497
498
499
500
501#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
502
503enum {
504 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
505 SNDRV_RAWMIDI_STREAM_INPUT,
506 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
507};
508
509#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
510#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
511#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
512
513struct snd_rawmidi_info {
514 unsigned int device;
515 unsigned int subdevice;
516 int stream;
517 int card;
518 unsigned int flags;
519 unsigned char id[64];
520 unsigned char name[80];
521 unsigned char subname[32];
522 unsigned int subdevices_count;
523 unsigned int subdevices_avail;
524 unsigned char reserved[64];
525};
526
527struct snd_rawmidi_params {
528 int stream;
529 size_t buffer_size;
530 size_t avail_min;
531 unsigned int no_active_sensing: 1;
532 unsigned char reserved[16];
533};
534
535struct snd_rawmidi_status {
536 int stream;
537 struct timespec tstamp;
538 size_t avail;
539 size_t xruns;
540 unsigned char reserved[16];
541};
542
543#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
544#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
545#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
546#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
547#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
548#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
549
550
551
552
553
554#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
555
556enum {
557 SNDRV_TIMER_CLASS_NONE = -1,
558 SNDRV_TIMER_CLASS_SLAVE = 0,
559 SNDRV_TIMER_CLASS_GLOBAL,
560 SNDRV_TIMER_CLASS_CARD,
561 SNDRV_TIMER_CLASS_PCM,
562 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
563};
564
565
566enum {
567 SNDRV_TIMER_SCLASS_NONE = 0,
568 SNDRV_TIMER_SCLASS_APPLICATION,
569 SNDRV_TIMER_SCLASS_SEQUENCER,
570 SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
571 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
572};
573
574
575#define SNDRV_TIMER_GLOBAL_SYSTEM 0
576#define SNDRV_TIMER_GLOBAL_RTC 1
577#define SNDRV_TIMER_GLOBAL_HPET 2
578#define SNDRV_TIMER_GLOBAL_HRTIMER 3
579
580
581#define SNDRV_TIMER_FLG_SLAVE (1<<0)
582
583struct snd_timer_id {
584 int dev_class;
585 int dev_sclass;
586 int card;
587 int device;
588 int subdevice;
589};
590
591struct snd_timer_ginfo {
592 struct snd_timer_id tid;
593 unsigned int flags;
594 int card;
595 unsigned char id[64];
596 unsigned char name[80];
597 unsigned long reserved0;
598 unsigned long resolution;
599 unsigned long resolution_min;
600 unsigned long resolution_max;
601 unsigned int clients;
602 unsigned char reserved[32];
603};
604
605struct snd_timer_gparams {
606 struct snd_timer_id tid;
607 unsigned long period_num;
608 unsigned long period_den;
609 unsigned char reserved[32];
610};
611
612struct snd_timer_gstatus {
613 struct snd_timer_id tid;
614 unsigned long resolution;
615 unsigned long resolution_num;
616 unsigned long resolution_den;
617 unsigned char reserved[32];
618};
619
620struct snd_timer_select {
621 struct snd_timer_id id;
622 unsigned char reserved[32];
623};
624
625struct snd_timer_info {
626 unsigned int flags;
627 int card;
628 unsigned char id[64];
629 unsigned char name[80];
630 unsigned long reserved0;
631 unsigned long resolution;
632 unsigned char reserved[64];
633};
634
635#define SNDRV_TIMER_PSFLG_AUTO (1<<0)
636#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1)
637#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2)
638
639struct snd_timer_params {
640 unsigned int flags;
641 unsigned int ticks;
642 unsigned int queue_size;
643 unsigned int reserved0;
644 unsigned int filter;
645 unsigned char reserved[60];
646};
647
648struct snd_timer_status {
649 struct timespec tstamp;
650 unsigned int resolution;
651 unsigned int lost;
652 unsigned int overrun;
653 unsigned int queue;
654 unsigned char reserved[64];
655};
656
657#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
658#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
659#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
660#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
661#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
662#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
663#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
664#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
665#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
666#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
667
668#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
669#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
670#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
671#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
672
673struct snd_timer_read {
674 unsigned int resolution;
675 unsigned int ticks;
676};
677
678enum {
679 SNDRV_TIMER_EVENT_RESOLUTION = 0,
680 SNDRV_TIMER_EVENT_TICK,
681 SNDRV_TIMER_EVENT_START,
682 SNDRV_TIMER_EVENT_STOP,
683 SNDRV_TIMER_EVENT_CONTINUE,
684 SNDRV_TIMER_EVENT_PAUSE,
685 SNDRV_TIMER_EVENT_EARLY,
686 SNDRV_TIMER_EVENT_SUSPEND,
687 SNDRV_TIMER_EVENT_RESUME,
688
689 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
690 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
691 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
692 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
693 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
694 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
695};
696
697struct snd_timer_tread {
698 int event;
699 struct timespec tstamp;
700 unsigned int val;
701};
702
703
704
705
706
707
708
709#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
710
711struct snd_ctl_card_info {
712 int card;
713 int pad;
714 unsigned char id[16];
715 unsigned char driver[16];
716 unsigned char name[32];
717 unsigned char longname[80];
718 unsigned char reserved_[16];
719 unsigned char mixername[80];
720 unsigned char components[128];
721};
722
723typedef int __bitwise snd_ctl_elem_type_t;
724#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0)
725#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1)
726#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2)
727#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3)
728#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4)
729#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5)
730#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6)
731#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
732
733typedef int __bitwise snd_ctl_elem_iface_t;
734#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0)
735#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1)
736#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2)
737#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3)
738#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4)
739#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5)
740#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6)
741#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
742
743#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
744#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
745#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
746#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2)
747#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3)
748#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4)
749#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5)
750#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
751#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6)
752#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8)
753#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9)
754#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10)
755#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28)
756#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29)
757
758
759
760#define SNDRV_CTL_POWER_D0 0x0000
761#define SNDRV_CTL_POWER_D1 0x0100
762#define SNDRV_CTL_POWER_D2 0x0200
763#define SNDRV_CTL_POWER_D3 0x0300
764#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000)
765#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001)
766
767struct snd_ctl_elem_id {
768 unsigned int numid;
769 snd_ctl_elem_iface_t iface;
770 unsigned int device;
771 unsigned int subdevice;
772 unsigned char name[44];
773 unsigned int index;
774};
775
776struct snd_ctl_elem_list {
777 unsigned int offset;
778 unsigned int space;
779 unsigned int used;
780 unsigned int count;
781 struct snd_ctl_elem_id __user *pids;
782 unsigned char reserved[50];
783};
784
785struct snd_ctl_elem_info {
786 struct snd_ctl_elem_id id;
787 snd_ctl_elem_type_t type;
788 unsigned int access;
789 unsigned int count;
790 __kernel_pid_t owner;
791 union {
792 struct {
793 long min;
794 long max;
795 long step;
796 } integer;
797 struct {
798 long long min;
799 long long max;
800 long long step;
801 } integer64;
802 struct {
803 unsigned int items;
804 unsigned int item;
805 char name[64];
806 } enumerated;
807 unsigned char reserved[128];
808 } value;
809 union {
810 unsigned short d[4];
811 unsigned short *d_ptr;
812 } dimen;
813 unsigned char reserved[64-4*sizeof(unsigned short)];
814};
815
816struct snd_ctl_elem_value {
817 struct snd_ctl_elem_id id;
818 unsigned int indirect: 1;
819 union {
820 union {
821 long value[128];
822 long *value_ptr;
823 } integer;
824 union {
825 long long value[64];
826 long long *value_ptr;
827 } integer64;
828 union {
829 unsigned int item[128];
830 unsigned int *item_ptr;
831 } enumerated;
832 union {
833 unsigned char data[512];
834 unsigned char *data_ptr;
835 } bytes;
836 struct snd_aes_iec958 iec958;
837 } value;
838 struct timespec tstamp;
839 unsigned char reserved[128-sizeof(struct timespec)];
840};
841
842struct snd_ctl_tlv {
843 unsigned int numid;
844 unsigned int length;
845 unsigned int tlv[0];
846};
847
848#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
849#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
850#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
851#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
852#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
853#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
854#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
855#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
856#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
857#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
858#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
859#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
860#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
861#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
862#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
863#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
864#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
865#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
866#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
867#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
868#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
869#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
870#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
871#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
872#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
873
874
875
876
877
878enum sndrv_ctl_event_type {
879 SNDRV_CTL_EVENT_ELEM = 0,
880 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
881};
882
883#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0)
884#define SNDRV_CTL_EVENT_MASK_INFO (1<<1)
885#define SNDRV_CTL_EVENT_MASK_ADD (1<<2)
886#define SNDRV_CTL_EVENT_MASK_TLV (1<<3)
887#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U)
888
889struct snd_ctl_event {
890 int type;
891 union {
892 struct {
893 unsigned int mask;
894 struct snd_ctl_elem_id id;
895 } elem;
896 unsigned char data8[60];
897 } data;
898};
899
900
901
902
903
904#define SNDRV_CTL_NAME_NONE ""
905#define SNDRV_CTL_NAME_PLAYBACK "Playback "
906#define SNDRV_CTL_NAME_CAPTURE "Capture "
907
908#define SNDRV_CTL_NAME_IEC958_NONE ""
909#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
910#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
911#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
912#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
913#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
914#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
915#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
916#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
917
918#endif
919