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22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/amba/pl061.h>
27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h>
29#include <linux/io.h>
30
31#include <mach/hardware.h>
32#include <asm/irq.h>
33#include <asm/leds.h>
34#include <asm/mach-types.h>
35#include <asm/pmu.h>
36#include <asm/pgtable.h>
37#include <asm/hardware/gic.h>
38#include <asm/hardware/cache-l2x0.h>
39#include <asm/localtimer.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach/map.h>
43#include <asm/mach/time.h>
44
45#include <mach/board-eb.h>
46#include <mach/irqs.h>
47
48#include "core.h"
49
50static struct map_desc realview_eb_io_desc[] __initdata = {
51 {
52 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
53 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
54 .length = SZ_4K,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE),
58 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE),
59 .length = SZ_4K,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE),
63 .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE),
64 .length = SZ_4K,
65 .type = MT_DEVICE,
66 }, {
67 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
68 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
69 .length = SZ_4K,
70 .type = MT_DEVICE,
71 }, {
72 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
73 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
78 .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
79 .length = SZ_4K,
80 .type = MT_DEVICE,
81 },
82#ifdef CONFIG_DEBUG_LL
83 {
84 .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE),
85 .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE),
86 .length = SZ_4K,
87 .type = MT_DEVICE,
88 }
89#endif
90};
91
92static struct map_desc realview_eb11mp_io_desc[] __initdata = {
93 {
94 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
96 .length = SZ_4K,
97 .type = MT_DEVICE,
98 }, {
99 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
100 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
101 .length = SZ_4K,
102 .type = MT_DEVICE,
103 }, {
104 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
105 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
106 .length = SZ_8K,
107 .type = MT_DEVICE,
108 }
109};
110
111static void __init realview_eb_map_io(void)
112{
113 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
114 if (core_tile_eb11mp() || core_tile_a9mp())
115 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
116}
117
118static struct pl061_platform_data gpio0_plat_data = {
119 .gpio_base = 0,
120 .irq_base = -1,
121};
122
123static struct pl061_platform_data gpio1_plat_data = {
124 .gpio_base = 8,
125 .irq_base = -1,
126};
127
128static struct pl061_platform_data gpio2_plat_data = {
129 .gpio_base = 16,
130 .irq_base = -1,
131};
132
133static struct pl022_ssp_controller ssp0_plat_data = {
134 .bus_id = 0,
135 .enable_dma = 0,
136 .num_chipselect = 1,
137};
138
139
140
141
142
143
144
145
146#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
147#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
148
149#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
150#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
151#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
152#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
153
154
155
156
157#define EB_SMC_IRQ { NO_IRQ, NO_IRQ }
158#define MPMC_IRQ { NO_IRQ, NO_IRQ }
159#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
160#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
161
162
163
164
165#define SCTL_IRQ { NO_IRQ, NO_IRQ }
166#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
167#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
168#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
169#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
170
171
172
173
174#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
175#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
176#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
177#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
178#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
179#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
180
181
182AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL);
183AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
184AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
185AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
186AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
187
188
189AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL);
190AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
191AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL);
192AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL);
193AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
194AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
195AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
196AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
197AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
198AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL);
199AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
200AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
201AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
202AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
203
204static struct amba_device *amba_devs[] __initdata = {
205 &dmac_device,
206 &uart0_device,
207 &uart1_device,
208 &uart2_device,
209 &uart3_device,
210 &smc_device,
211 &clcd_device,
212 &sctl_device,
213 &wdog_device,
214 &gpio0_device,
215 &gpio1_device,
216 &gpio2_device,
217 &rtc_device,
218 &sci0_device,
219 &ssp0_device,
220 &aaci_device,
221 &mmc0_device,
222 &kmi0_device,
223 &kmi1_device,
224};
225
226
227
228
229static struct resource realview_eb_flash_resource = {
230 .start = REALVIEW_EB_FLASH_BASE,
231 .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1,
232 .flags = IORESOURCE_MEM,
233};
234
235static struct resource realview_eb_eth_resources[] = {
236 [0] = {
237 .start = REALVIEW_EB_ETH_BASE,
238 .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1,
239 .flags = IORESOURCE_MEM,
240 },
241 [1] = {
242 .start = IRQ_EB_ETH,
243 .end = IRQ_EB_ETH,
244 .flags = IORESOURCE_IRQ,
245 },
246};
247
248
249
250
251
252static int eth_device_register(void)
253{
254 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K);
255 const char *name = NULL;
256 u32 idrev;
257
258 if (!eth_addr)
259 return -ENOMEM;
260
261 idrev = readl(eth_addr + 0x50);
262 if ((idrev & 0xFFFF0000) != 0x01180000)
263
264 name = "smc91x";
265
266 iounmap(eth_addr);
267 return realview_eth_register(name, realview_eb_eth_resources);
268}
269
270static struct resource realview_eb_isp1761_resources[] = {
271 [0] = {
272 .start = REALVIEW_EB_USB_BASE,
273 .end = REALVIEW_EB_USB_BASE + SZ_128K - 1,
274 .flags = IORESOURCE_MEM,
275 },
276 [1] = {
277 .start = IRQ_EB_USB,
278 .end = IRQ_EB_USB,
279 .flags = IORESOURCE_IRQ,
280 },
281};
282
283static struct resource pmu_resources[] = {
284 [0] = {
285 .start = IRQ_EB11MP_PMU_CPU0,
286 .end = IRQ_EB11MP_PMU_CPU0,
287 .flags = IORESOURCE_IRQ,
288 },
289 [1] = {
290 .start = IRQ_EB11MP_PMU_CPU1,
291 .end = IRQ_EB11MP_PMU_CPU1,
292 .flags = IORESOURCE_IRQ,
293 },
294 [2] = {
295 .start = IRQ_EB11MP_PMU_CPU2,
296 .end = IRQ_EB11MP_PMU_CPU2,
297 .flags = IORESOURCE_IRQ,
298 },
299 [3] = {
300 .start = IRQ_EB11MP_PMU_CPU3,
301 .end = IRQ_EB11MP_PMU_CPU3,
302 .flags = IORESOURCE_IRQ,
303 },
304};
305
306static struct platform_device pmu_device = {
307 .name = "arm-pmu",
308 .id = ARM_PMU_DEVICE_CPU,
309 .num_resources = ARRAY_SIZE(pmu_resources),
310 .resource = pmu_resources,
311};
312
313static struct resource char_lcd_resources[] = {
314 {
315 .start = REALVIEW_CHAR_LCD_BASE,
316 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
317 .flags = IORESOURCE_MEM,
318 },
319 {
320 .start = IRQ_EB_CHARLCD,
321 .end = IRQ_EB_CHARLCD,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326static struct platform_device char_lcd_device = {
327 .name = "arm-charlcd",
328 .id = -1,
329 .num_resources = ARRAY_SIZE(char_lcd_resources),
330 .resource = char_lcd_resources,
331};
332
333static void __init gic_init_irq(void)
334{
335 if (core_tile_eb11mp() || core_tile_a9mp()) {
336 unsigned int pldctrl;
337
338
339 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
340 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
341 pldctrl |= 0x00800000;
342 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
343 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
344
345
346 gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
347 __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
348
349#ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
350
351 gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE),
352 __io_address(REALVIEW_EB_GIC_CPU_BASE));
353 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
354#endif
355 } else {
356
357 gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
358 __io_address(REALVIEW_EB_GIC_CPU_BASE));
359 }
360}
361
362
363
364
365static void realview_eb11mp_fixup(void)
366{
367
368 dmac_device.irq[0] = IRQ_EB11MP_DMA;
369 uart0_device.irq[0] = IRQ_EB11MP_UART0;
370 uart1_device.irq[0] = IRQ_EB11MP_UART1;
371 uart2_device.irq[0] = IRQ_EB11MP_UART2;
372 uart3_device.irq[0] = IRQ_EB11MP_UART3;
373 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
374 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
375 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
376 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
377 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
378 rtc_device.irq[0] = IRQ_EB11MP_RTC;
379 sci0_device.irq[0] = IRQ_EB11MP_SCI;
380 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
381 aaci_device.irq[0] = IRQ_EB11MP_AACI;
382 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
383 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
384 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
385 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
386
387
388 realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH;
389 realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH;
390 realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB;
391 realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB;
392}
393
394static void __init realview_eb_timer_init(void)
395{
396 unsigned int timer_irq;
397
398 timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
399 timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
400 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
401 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
402
403 if (core_tile_eb11mp() || core_tile_a9mp()) {
404#ifdef CONFIG_LOCAL_TIMERS
405 twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE);
406#endif
407 timer_irq = IRQ_EB11MP_TIMER0_1;
408 } else
409 timer_irq = IRQ_EB_TIMER0_1;
410
411 realview_timer_init(timer_irq);
412}
413
414static struct sys_timer realview_eb_timer = {
415 .init = realview_eb_timer_init,
416};
417
418static void realview_eb_reset(char mode)
419{
420 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
421 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
422
423
424
425
426
427 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
428 if (core_tile_eb11mp())
429 __raw_writel(0x0008, reset_ctrl);
430}
431
432static void __init realview_eb_init(void)
433{
434 int i;
435
436 if (core_tile_eb11mp() || core_tile_a9mp()) {
437 realview_eb11mp_fixup();
438
439#ifdef CONFIG_CACHE_L2X0
440
441
442 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
443#endif
444 platform_device_register(&pmu_device);
445 }
446
447 realview_flash_register(&realview_eb_flash_resource, 1);
448 platform_device_register(&realview_i2c_device);
449 platform_device_register(&char_lcd_device);
450 eth_device_register();
451 realview_usb_register(realview_eb_isp1761_resources);
452
453 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
454 struct amba_device *d = amba_devs[i];
455 amba_device_register(d, &iomem_resource);
456 }
457
458#ifdef CONFIG_LEDS
459 leds_event = realview_leds_event;
460#endif
461 realview_reset = realview_eb_reset;
462}
463
464MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
465
466 .boot_params = PLAT_PHYS_OFFSET + 0x00000100,
467 .fixup = realview_fixup,
468 .map_io = realview_eb_map_io,
469 .init_early = realview_init_early,
470 .init_irq = gic_init_irq,
471 .timer = &realview_eb_timer,
472 .init_machine = realview_eb_init,
473MACHINE_END
474
