1#ifndef _M68K_DMA_H
2#define _M68K_DMA_H 1
3
4#ifdef CONFIG_COLDFIRE
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28#include <asm/coldfire.h>
29#include <asm/mcfsim.h>
30#include <asm/mcfdma.h>
31
32
33
34
35#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \
36 defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
37#define MAX_M68K_DMA_CHANNELS 4
38#elif defined(CONFIG_M5272)
39#define MAX_M68K_DMA_CHANNELS 1
40#elif defined(CONFIG_M532x)
41#define MAX_M68K_DMA_CHANNELS 0
42#else
43#define MAX_M68K_DMA_CHANNELS 2
44#endif
45
46extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS];
47extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
48
49#if !defined(CONFIG_M5272)
50#define DMA_MODE_WRITE_BIT 0x01
51#define DMA_MODE_WORD_BIT 0x02
52#define DMA_MODE_LONG_BIT 0x04
53#define DMA_MODE_SINGLE_BIT 0x08
54
55
56#define DMA_MODE_READ 0
57
58#define DMA_MODE_WRITE 1
59
60#define DMA_MODE_READ_WORD 2
61
62#define DMA_MODE_WRITE_WORD 3
63
64#define DMA_MODE_READ_LONG 4
65
66#define DMA_MODE_WRITE_LONG 5
67
68#define DMA_MODE_READ_SINGLE 8
69
70#define DMA_MODE_WRITE_SINGLE 9
71
72#define DMA_MODE_READ_WORD_SINGLE 10
73
74#define DMA_MODE_WRITE_WORD_SINGLE 11
75
76#define DMA_MODE_READ_LONG_SINGLE 12
77
78#define DMA_MODE_WRITE_LONG_SINGLE 13
79
80#else
81
82
83#define DMA_MODE_SRC_SA_BIT 0x01
84
85#define DMA_MODE_SSIZE_MASK 0x06
86
87#define DMA_MODE_SSIZE_OFF 0x01
88
89#define DMA_MODE_DES_SA_BIT 0x10
90
91#define DMA_MODE_DSIZE_MASK 0x60
92
93#define DMA_MODE_DSIZE_OFF 0x05
94
95#define DMA_MODE_SIZE_LONG 0x00
96#define DMA_MODE_SIZE_BYTE 0x01
97#define DMA_MODE_SIZE_WORD 0x02
98#define DMA_MODE_SIZE_LINE 0x03
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106
107#define DMA_MODE_READ ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
108
109#define DMA_MODE_WRITE ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
110
111#define DMA_MODE_READ_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
112
113#define DMA_MODE_WRITE_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
114
115#define DMA_MODE_READ_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT)
116
117#define DMA_MODE_WRITE_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT)
118
119#endif
120
121#if !defined(CONFIG_M5272)
122
123static __inline__ void enable_dma(unsigned int dmanr)
124{
125 volatile unsigned short *dmawp;
126
127#ifdef DMA_DEBUG
128 printk("enable_dma(dmanr=%d)\n", dmanr);
129#endif
130
131 dmawp = (unsigned short *) dma_base_addr[dmanr];
132 dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT;
133}
134
135static __inline__ void disable_dma(unsigned int dmanr)
136{
137 volatile unsigned short *dmawp;
138 volatile unsigned char *dmapb;
139
140#ifdef DMA_DEBUG
141 printk("disable_dma(dmanr=%d)\n", dmanr);
142#endif
143
144 dmawp = (unsigned short *) dma_base_addr[dmanr];
145 dmapb = (unsigned char *) dma_base_addr[dmanr];
146
147
148 dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT;
149 dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE;
150}
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161
162static __inline__ void clear_dma_ff(unsigned int dmanr)
163{
164}
165
166
167static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
168{
169
170 volatile unsigned char *dmabp;
171 volatile unsigned short *dmawp;
172
173#ifdef DMA_DEBUG
174 printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
175#endif
176
177 dmabp = (unsigned char *) dma_base_addr[dmanr];
178 dmawp = (unsigned short *) dma_base_addr[dmanr];
179
180
181 dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE;
182
183
184 dmawp[MCFDMA_DCR] =
185 MCFDMA_DCR_INT |
186 MCFDMA_DCR_CS |
187 MCFDMA_DCR_AA |
188
189 ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) |
190
191 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) |
192
193 ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) |
194
195 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_SSIZE_WORD :
196 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG :
197 MCFDMA_DCR_SSIZE_BYTE)) |
198 ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_DSIZE_WORD :
199 ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG :
200 MCFDMA_DCR_DSIZE_BYTE));
201
202#ifdef DEBUG_DMA
203 printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__,
204 dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR],
205 (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]);
206#endif
207}
208
209
210static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
211{
212 volatile unsigned short *dmawp;
213 volatile unsigned int *dmalp;
214
215#ifdef DMA_DEBUG
216 printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
217#endif
218
219 dmawp = (unsigned short *) dma_base_addr[dmanr];
220 dmalp = (unsigned int *) dma_base_addr[dmanr];
221
222
223 if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) {
224
225 dmalp[MCFDMA_SAR] = a;
226
227 dmalp[MCFDMA_DAR] = dma_device_address[dmanr];
228 } else {
229
230 dmalp[MCFDMA_DAR] = a;
231
232 dmalp[MCFDMA_SAR] = dma_device_address[dmanr];
233 }
234
235#ifdef DEBUG_DMA
236 printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
237 __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR],
238 (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR],
239 (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]);
240#endif
241}
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246
247static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
248{
249#ifdef DMA_DEBUG
250 printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
251#endif
252
253 dma_device_address[dmanr] = a;
254}
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258
259static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
260{
261 volatile unsigned short *dmawp;
262
263#ifdef DMA_DEBUG
264 printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
265#endif
266
267 dmawp = (unsigned short *) dma_base_addr[dmanr];
268 dmawp[MCFDMA_BCR] = (unsigned short)count;
269}
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277static __inline__ int get_dma_residue(unsigned int dmanr)
278{
279 volatile unsigned short *dmawp;
280 unsigned short count;
281
282#ifdef DMA_DEBUG
283 printk("get_dma_residue(dmanr=%d)\n", dmanr);
284#endif
285
286 dmawp = (unsigned short *) dma_base_addr[dmanr];
287 count = dmawp[MCFDMA_BCR];
288 return((int) count);
289}
290#else
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316static __inline__ void enable_dma(unsigned int dmanr)
317{
318 volatile unsigned int *dmalp;
319
320#ifdef DMA_DEBUG
321 printk("enable_dma(dmanr=%d)\n", dmanr);
322#endif
323
324 dmalp = (unsigned int *) dma_base_addr[dmanr];
325 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN;
326}
327
328static __inline__ void disable_dma(unsigned int dmanr)
329{
330 volatile unsigned int *dmalp;
331
332#ifdef DMA_DEBUG
333 printk("disable_dma(dmanr=%d)\n", dmanr);
334#endif
335
336 dmalp = (unsigned int *) dma_base_addr[dmanr];
337
338
339 dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN;
340 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
341}
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352
353static __inline__ void clear_dma_ff(unsigned int dmanr)
354{
355}
356
357
358static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
359{
360
361 volatile unsigned int *dmalp;
362 volatile unsigned short *dmawp;
363
364#ifdef DMA_DEBUG
365 printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode);
366#endif
367 dmalp = (unsigned int *) dma_base_addr[dmanr];
368 dmawp = (unsigned short *) dma_base_addr[dmanr];
369
370
371 dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET;
372
373
374 dmalp[MCFDMA_DMR] =
375 MCFDMA_DMR_RQM_DUAL |
376 MCFDMA_DMR_DSTT_SD |
377 MCFDMA_DMR_SRCT_SD |
378
379 ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) |
380
381 ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) |
382
383 (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) |
384 (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF);
385
386 dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN;
387
388#ifdef DEBUG_DMA
389 printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__,
390 dmanr, (int) &dmalp[MCFDMA_DMR], dmabp[MCFDMA_DMR],
391 (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]);
392#endif
393}
394
395
396static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
397{
398 volatile unsigned int *dmalp;
399
400#ifdef DMA_DEBUG
401 printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a);
402#endif
403
404 dmalp = (unsigned int *) dma_base_addr[dmanr];
405
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407 if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) {
408
409 dmalp[MCFDMA_DSAR] = a;
410
411 dmalp[MCFDMA_DDAR] = dma_device_address[dmanr];
412 } else {
413
414 dmalp[MCFDMA_DDAR] = a;
415
416 dmalp[MCFDMA_DSAR] = dma_device_address[dmanr];
417 }
418
419#ifdef DEBUG_DMA
420 printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n",
421 __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DMR], dmawp[MCFDMA_DMR],
422 (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR],
423 (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]);
424#endif
425}
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431static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a)
432{
433#ifdef DMA_DEBUG
434 printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a);
435#endif
436
437 dma_device_address[dmanr] = a;
438}
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444
445static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
446{
447 volatile unsigned int *dmalp;
448
449#ifdef DMA_DEBUG
450 printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count);
451#endif
452
453 dmalp = (unsigned int *) dma_base_addr[dmanr];
454 dmalp[MCFDMA_DBCR] = count;
455}
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461
462
463static __inline__ int get_dma_residue(unsigned int dmanr)
464{
465 volatile unsigned int *dmalp;
466 unsigned int count;
467
468#ifdef DMA_DEBUG
469 printk("get_dma_residue(dmanr=%d)\n", dmanr);
470#endif
471
472 dmalp = (unsigned int *) dma_base_addr[dmanr];
473 count = dmalp[MCFDMA_DBCR];
474 return(count);
475}
476
477#endif
478#endif
479
480
481
482#define MAX_DMA_ADDRESS PAGE_OFFSET
483
484#define MAX_DMA_CHANNELS 8
485
486extern int request_dma(unsigned int dmanr, const char * device_id);
487extern void free_dma(unsigned int dmanr);
488
489#define isa_dma_bridge_buggy (0)
490
491#endif
492