linux/arch/sparc/kernel/time_64.c
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   1/* time.c: UltraSparc timer and TOD clock support.
   2 *
   3 * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
   4 * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   5 *
   6 * Based largely on code which is:
   7 *
   8 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
   9 */
  10
  11#include <linux/errno.h>
  12#include <linux/module.h>
  13#include <linux/sched.h>
  14#include <linux/kernel.h>
  15#include <linux/param.h>
  16#include <linux/string.h>
  17#include <linux/mm.h>
  18#include <linux/interrupt.h>
  19#include <linux/time.h>
  20#include <linux/timex.h>
  21#include <linux/init.h>
  22#include <linux/ioport.h>
  23#include <linux/mc146818rtc.h>
  24#include <linux/delay.h>
  25#include <linux/profile.h>
  26#include <linux/bcd.h>
  27#include <linux/jiffies.h>
  28#include <linux/cpufreq.h>
  29#include <linux/percpu.h>
  30#include <linux/miscdevice.h>
  31#include <linux/rtc.h>
  32#include <linux/rtc/m48t59.h>
  33#include <linux/kernel_stat.h>
  34#include <linux/clockchips.h>
  35#include <linux/clocksource.h>
  36#include <linux/of_device.h>
  37#include <linux/platform_device.h>
  38#include <linux/ftrace.h>
  39
  40#include <asm/oplib.h>
  41#include <asm/timer.h>
  42#include <asm/irq.h>
  43#include <asm/io.h>
  44#include <asm/prom.h>
  45#include <asm/starfire.h>
  46#include <asm/smp.h>
  47#include <asm/sections.h>
  48#include <asm/cpudata.h>
  49#include <asm/uaccess.h>
  50#include <asm/irq_regs.h>
  51
  52#include "entry.h"
  53
  54DEFINE_SPINLOCK(rtc_lock);
  55
  56#define TICK_PRIV_BIT   (1UL << 63)
  57#define TICKCMP_IRQ_BIT (1UL << 63)
  58
  59#ifdef CONFIG_SMP
  60unsigned long profile_pc(struct pt_regs *regs)
  61{
  62        unsigned long pc = instruction_pointer(regs);
  63
  64        if (in_lock_functions(pc))
  65                return regs->u_regs[UREG_RETPC];
  66        return pc;
  67}
  68EXPORT_SYMBOL(profile_pc);
  69#endif
  70
  71static void tick_disable_protection(void)
  72{
  73        /* Set things up so user can access tick register for profiling
  74         * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  75         * read back of %tick after writing it.
  76         */
  77        __asm__ __volatile__(
  78        "       ba,pt   %%xcc, 1f\n"
  79        "        nop\n"
  80        "       .align  64\n"
  81        "1:     rd      %%tick, %%g2\n"
  82        "       add     %%g2, 6, %%g2\n"
  83        "       andn    %%g2, %0, %%g2\n"
  84        "       wrpr    %%g2, 0, %%tick\n"
  85        "       rdpr    %%tick, %%g0"
  86        : /* no outputs */
  87        : "r" (TICK_PRIV_BIT)
  88        : "g2");
  89}
  90
  91static void tick_disable_irq(void)
  92{
  93        __asm__ __volatile__(
  94        "       ba,pt   %%xcc, 1f\n"
  95        "        nop\n"
  96        "       .align  64\n"
  97        "1:     wr      %0, 0x0, %%tick_cmpr\n"
  98        "       rd      %%tick_cmpr, %%g0"
  99        : /* no outputs */
 100        : "r" (TICKCMP_IRQ_BIT));
 101}
 102
 103static void tick_init_tick(void)
 104{
 105        tick_disable_protection();
 106        tick_disable_irq();
 107}
 108
 109static unsigned long long tick_get_tick(void)
 110{
 111        unsigned long ret;
 112
 113        __asm__ __volatile__("rd        %%tick, %0\n\t"
 114                             "mov       %0, %0"
 115                             : "=r" (ret));
 116
 117        return ret & ~TICK_PRIV_BIT;
 118}
 119
 120static int tick_add_compare(unsigned long adj)
 121{
 122        unsigned long orig_tick, new_tick, new_compare;
 123
 124        __asm__ __volatile__("rd        %%tick, %0"
 125                             : "=r" (orig_tick));
 126
 127        orig_tick &= ~TICKCMP_IRQ_BIT;
 128
 129        /* Workaround for Spitfire Errata (#54 I think??), I discovered
 130         * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 131         * number 103640.
 132         *
 133         * On Blackbird writes to %tick_cmpr can fail, the
 134         * workaround seems to be to execute the wr instruction
 135         * at the start of an I-cache line, and perform a dummy
 136         * read back from %tick_cmpr right after writing to it. -DaveM
 137         */
 138        __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
 139                             " add      %1, %2, %0\n\t"
 140                             ".align    64\n"
 141                             "1:\n\t"
 142                             "wr        %0, 0, %%tick_cmpr\n\t"
 143                             "rd        %%tick_cmpr, %%g0\n\t"
 144                             : "=r" (new_compare)
 145                             : "r" (orig_tick), "r" (adj));
 146
 147        __asm__ __volatile__("rd        %%tick, %0"
 148                             : "=r" (new_tick));
 149        new_tick &= ~TICKCMP_IRQ_BIT;
 150
 151        return ((long)(new_tick - (orig_tick+adj))) > 0L;
 152}
 153
 154static unsigned long tick_add_tick(unsigned long adj)
 155{
 156        unsigned long new_tick;
 157
 158        /* Also need to handle Blackbird bug here too. */
 159        __asm__ __volatile__("rd        %%tick, %0\n\t"
 160                             "add       %0, %1, %0\n\t"
 161                             "wrpr      %0, 0, %%tick\n\t"
 162                             : "=&r" (new_tick)
 163                             : "r" (adj));
 164
 165        return new_tick;
 166}
 167
 168static struct sparc64_tick_ops tick_operations __read_mostly = {
 169        .name           =       "tick",
 170        .init_tick      =       tick_init_tick,
 171        .disable_irq    =       tick_disable_irq,
 172        .get_tick       =       tick_get_tick,
 173        .add_tick       =       tick_add_tick,
 174        .add_compare    =       tick_add_compare,
 175        .softint_mask   =       1UL << 0,
 176};
 177
 178struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
 179EXPORT_SYMBOL(tick_ops);
 180
 181static void stick_disable_irq(void)
 182{
 183        __asm__ __volatile__(
 184        "wr     %0, 0x0, %%asr25"
 185        : /* no outputs */
 186        : "r" (TICKCMP_IRQ_BIT));
 187}
 188
 189static void stick_init_tick(void)
 190{
 191        /* Writes to the %tick and %stick register are not
 192         * allowed on sun4v.  The Hypervisor controls that
 193         * bit, per-strand.
 194         */
 195        if (tlb_type != hypervisor) {
 196                tick_disable_protection();
 197                tick_disable_irq();
 198
 199                /* Let the user get at STICK too. */
 200                __asm__ __volatile__(
 201                "       rd      %%asr24, %%g2\n"
 202                "       andn    %%g2, %0, %%g2\n"
 203                "       wr      %%g2, 0, %%asr24"
 204                : /* no outputs */
 205                : "r" (TICK_PRIV_BIT)
 206                : "g1", "g2");
 207        }
 208
 209        stick_disable_irq();
 210}
 211
 212static unsigned long long stick_get_tick(void)
 213{
 214        unsigned long ret;
 215
 216        __asm__ __volatile__("rd        %%asr24, %0"
 217                             : "=r" (ret));
 218
 219        return ret & ~TICK_PRIV_BIT;
 220}
 221
 222static unsigned long stick_add_tick(unsigned long adj)
 223{
 224        unsigned long new_tick;
 225
 226        __asm__ __volatile__("rd        %%asr24, %0\n\t"
 227                             "add       %0, %1, %0\n\t"
 228                             "wr        %0, 0, %%asr24\n\t"
 229                             : "=&r" (new_tick)
 230                             : "r" (adj));
 231
 232        return new_tick;
 233}
 234
 235static int stick_add_compare(unsigned long adj)
 236{
 237        unsigned long orig_tick, new_tick;
 238
 239        __asm__ __volatile__("rd        %%asr24, %0"
 240                             : "=r" (orig_tick));
 241        orig_tick &= ~TICKCMP_IRQ_BIT;
 242
 243        __asm__ __volatile__("wr        %0, 0, %%asr25"
 244                             : /* no outputs */
 245                             : "r" (orig_tick + adj));
 246
 247        __asm__ __volatile__("rd        %%asr24, %0"
 248                             : "=r" (new_tick));
 249        new_tick &= ~TICKCMP_IRQ_BIT;
 250
 251        return ((long)(new_tick - (orig_tick+adj))) > 0L;
 252}
 253
 254static struct sparc64_tick_ops stick_operations __read_mostly = {
 255        .name           =       "stick",
 256        .init_tick      =       stick_init_tick,
 257        .disable_irq    =       stick_disable_irq,
 258        .get_tick       =       stick_get_tick,
 259        .add_tick       =       stick_add_tick,
 260        .add_compare    =       stick_add_compare,
 261        .softint_mask   =       1UL << 16,
 262};
 263
 264/* On Hummingbird the STICK/STICK_CMPR register is implemented
 265 * in I/O space.  There are two 64-bit registers each, the
 266 * first holds the low 32-bits of the value and the second holds
 267 * the high 32-bits.
 268 *
 269 * Since STICK is constantly updating, we have to access it carefully.
 270 *
 271 * The sequence we use to read is:
 272 * 1) read high
 273 * 2) read low
 274 * 3) read high again, if it rolled re-read both low and high again.
 275 *
 276 * Writing STICK safely is also tricky:
 277 * 1) write low to zero
 278 * 2) write high
 279 * 3) write low
 280 */
 281#define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 282#define HBIRD_STICK_ADDR        0x1fe0000f070UL
 283
 284static unsigned long __hbird_read_stick(void)
 285{
 286        unsigned long ret, tmp1, tmp2, tmp3;
 287        unsigned long addr = HBIRD_STICK_ADDR+8;
 288
 289        __asm__ __volatile__("ldxa      [%1] %5, %2\n"
 290                             "1:\n\t"
 291                             "sub       %1, 0x8, %1\n\t"
 292                             "ldxa      [%1] %5, %3\n\t"
 293                             "add       %1, 0x8, %1\n\t"
 294                             "ldxa      [%1] %5, %4\n\t"
 295                             "cmp       %4, %2\n\t"
 296                             "bne,a,pn  %%xcc, 1b\n\t"
 297                             " mov      %4, %2\n\t"
 298                             "sllx      %4, 32, %4\n\t"
 299                             "or        %3, %4, %0\n\t"
 300                             : "=&r" (ret), "=&r" (addr),
 301                               "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 302                             : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 303
 304        return ret;
 305}
 306
 307static void __hbird_write_stick(unsigned long val)
 308{
 309        unsigned long low = (val & 0xffffffffUL);
 310        unsigned long high = (val >> 32UL);
 311        unsigned long addr = HBIRD_STICK_ADDR;
 312
 313        __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 314                             "add       %0, 0x8, %0\n\t"
 315                             "stxa      %3, [%0] %4\n\t"
 316                             "sub       %0, 0x8, %0\n\t"
 317                             "stxa      %2, [%0] %4"
 318                             : "=&r" (addr)
 319                             : "0" (addr), "r" (low), "r" (high),
 320                               "i" (ASI_PHYS_BYPASS_EC_E));
 321}
 322
 323static void __hbird_write_compare(unsigned long val)
 324{
 325        unsigned long low = (val & 0xffffffffUL);
 326        unsigned long high = (val >> 32UL);
 327        unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 328
 329        __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 330                             "sub       %0, 0x8, %0\n\t"
 331                             "stxa      %2, [%0] %4"
 332                             : "=&r" (addr)
 333                             : "0" (addr), "r" (low), "r" (high),
 334                               "i" (ASI_PHYS_BYPASS_EC_E));
 335}
 336
 337static void hbtick_disable_irq(void)
 338{
 339        __hbird_write_compare(TICKCMP_IRQ_BIT);
 340}
 341
 342static void hbtick_init_tick(void)
 343{
 344        tick_disable_protection();
 345
 346        /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 347         * XXX into actually sending STICK interrupts.  I think because
 348         * XXX of how we store %tick_cmpr in head.S this somehow resets the
 349         * XXX {TICK + STICK} interrupt mux.  -DaveM
 350         */
 351        __hbird_write_stick(__hbird_read_stick());
 352
 353        hbtick_disable_irq();
 354}
 355
 356static unsigned long long hbtick_get_tick(void)
 357{
 358        return __hbird_read_stick() & ~TICK_PRIV_BIT;
 359}
 360
 361static unsigned long hbtick_add_tick(unsigned long adj)
 362{
 363        unsigned long val;
 364
 365        val = __hbird_read_stick() + adj;
 366        __hbird_write_stick(val);
 367
 368        return val;
 369}
 370
 371static int hbtick_add_compare(unsigned long adj)
 372{
 373        unsigned long val = __hbird_read_stick();
 374        unsigned long val2;
 375
 376        val &= ~TICKCMP_IRQ_BIT;
 377        val += adj;
 378        __hbird_write_compare(val);
 379
 380        val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
 381
 382        return ((long)(val2 - val)) > 0L;
 383}
 384
 385static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 386        .name           =       "hbtick",
 387        .init_tick      =       hbtick_init_tick,
 388        .disable_irq    =       hbtick_disable_irq,
 389        .get_tick       =       hbtick_get_tick,
 390        .add_tick       =       hbtick_add_tick,
 391        .add_compare    =       hbtick_add_compare,
 392        .softint_mask   =       1UL << 0,
 393};
 394
 395static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 396
 397int update_persistent_clock(struct timespec now)
 398{
 399        struct rtc_device *rtc = rtc_class_open("rtc0");
 400        int err = -1;
 401
 402        if (rtc) {
 403                err = rtc_set_mmss(rtc, now.tv_sec);
 404                rtc_class_close(rtc);
 405        }
 406
 407        return err;
 408}
 409
 410unsigned long cmos_regs;
 411EXPORT_SYMBOL(cmos_regs);
 412
 413static struct resource rtc_cmos_resource;
 414
 415static struct platform_device rtc_cmos_device = {
 416        .name           = "rtc_cmos",
 417        .id             = -1,
 418        .resource       = &rtc_cmos_resource,
 419        .num_resources  = 1,
 420};
 421
 422static int __devinit rtc_probe(struct platform_device *op)
 423{
 424        struct resource *r;
 425
 426        printk(KERN_INFO "%s: RTC regs at 0x%llx\n",
 427               op->dev.of_node->full_name, op->resource[0].start);
 428
 429        /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons
 430         * up a fake resource so that the probe works for all cases.
 431         * When the RTC is behind an ISA bus it will have IORESOURCE_IO
 432         * already, whereas when it's behind EBUS is will be IORESOURCE_MEM.
 433         */
 434
 435        r = &rtc_cmos_resource;
 436        r->flags = IORESOURCE_IO;
 437        r->name = op->resource[0].name;
 438        r->start = op->resource[0].start;
 439        r->end = op->resource[0].end;
 440
 441        cmos_regs = op->resource[0].start;
 442        return platform_device_register(&rtc_cmos_device);
 443}
 444
 445static const struct of_device_id rtc_match[] = {
 446        {
 447                .name = "rtc",
 448                .compatible = "m5819",
 449        },
 450        {
 451                .name = "rtc",
 452                .compatible = "isa-m5819p",
 453        },
 454        {
 455                .name = "rtc",
 456                .compatible = "isa-m5823p",
 457        },
 458        {
 459                .name = "rtc",
 460                .compatible = "ds1287",
 461        },
 462        {},
 463};
 464
 465static struct platform_driver rtc_driver = {
 466        .probe          = rtc_probe,
 467        .driver = {
 468                .name = "rtc",
 469                .owner = THIS_MODULE,
 470                .of_match_table = rtc_match,
 471        },
 472};
 473
 474static struct platform_device rtc_bq4802_device = {
 475        .name           = "rtc-bq4802",
 476        .id             = -1,
 477        .num_resources  = 1,
 478};
 479
 480static int __devinit bq4802_probe(struct platform_device *op)
 481{
 482
 483        printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n",
 484               op->dev.of_node->full_name, op->resource[0].start);
 485
 486        rtc_bq4802_device.resource = &op->resource[0];
 487        return platform_device_register(&rtc_bq4802_device);
 488}
 489
 490static const struct of_device_id bq4802_match[] = {
 491        {
 492                .name = "rtc",
 493                .compatible = "bq4802",
 494        },
 495        {},
 496};
 497
 498static struct platform_driver bq4802_driver = {
 499        .probe          = bq4802_probe,
 500        .driver = {
 501                .name = "bq4802",
 502                .owner = THIS_MODULE,
 503                .of_match_table = bq4802_match,
 504        },
 505};
 506
 507static unsigned char mostek_read_byte(struct device *dev, u32 ofs)
 508{
 509        struct platform_device *pdev = to_platform_device(dev);
 510        void __iomem *regs = (void __iomem *) pdev->resource[0].start;
 511
 512        return readb(regs + ofs);
 513}
 514
 515static void mostek_write_byte(struct device *dev, u32 ofs, u8 val)
 516{
 517        struct platform_device *pdev = to_platform_device(dev);
 518        void __iomem *regs = (void __iomem *) pdev->resource[0].start;
 519
 520        writeb(val, regs + ofs);
 521}
 522
 523static struct m48t59_plat_data m48t59_data = {
 524        .read_byte      = mostek_read_byte,
 525        .write_byte     = mostek_write_byte,
 526};
 527
 528static struct platform_device m48t59_rtc = {
 529        .name           = "rtc-m48t59",
 530        .id             = 0,
 531        .num_resources  = 1,
 532        .dev    = {
 533                .platform_data = &m48t59_data,
 534        },
 535};
 536
 537static int __devinit mostek_probe(struct platform_device *op)
 538{
 539        struct device_node *dp = op->dev.of_node;
 540
 541        /* On an Enterprise system there can be multiple mostek clocks.
 542         * We should only match the one that is on the central FHC bus.
 543         */
 544        if (!strcmp(dp->parent->name, "fhc") &&
 545            strcmp(dp->parent->parent->name, "central") != 0)
 546                return -ENODEV;
 547
 548        printk(KERN_INFO "%s: Mostek regs at 0x%llx\n",
 549               dp->full_name, op->resource[0].start);
 550
 551        m48t59_rtc.resource = &op->resource[0];
 552        return platform_device_register(&m48t59_rtc);
 553}
 554
 555static const struct of_device_id mostek_match[] = {
 556        {
 557                .name = "eeprom",
 558        },
 559        {},
 560};
 561
 562static struct platform_driver mostek_driver = {
 563        .probe          = mostek_probe,
 564        .driver = {
 565                .name = "mostek",
 566                .owner = THIS_MODULE,
 567                .of_match_table = mostek_match,
 568        },
 569};
 570
 571static struct platform_device rtc_sun4v_device = {
 572        .name           = "rtc-sun4v",
 573        .id             = -1,
 574};
 575
 576static struct platform_device rtc_starfire_device = {
 577        .name           = "rtc-starfire",
 578        .id             = -1,
 579};
 580
 581static int __init clock_init(void)
 582{
 583        if (this_is_starfire)
 584                return platform_device_register(&rtc_starfire_device);
 585
 586        if (tlb_type == hypervisor)
 587                return platform_device_register(&rtc_sun4v_device);
 588
 589        (void) platform_driver_register(&rtc_driver);
 590        (void) platform_driver_register(&mostek_driver);
 591        (void) platform_driver_register(&bq4802_driver);
 592
 593        return 0;
 594}
 595
 596/* Must be after subsys_initcall() so that busses are probed.  Must
 597 * be before device_initcall() because things like the RTC driver
 598 * need to see the clock registers.
 599 */
 600fs_initcall(clock_init);
 601
 602/* This is gets the master TICK_INT timer going. */
 603static unsigned long sparc64_init_timers(void)
 604{
 605        struct device_node *dp;
 606        unsigned long freq;
 607
 608        dp = of_find_node_by_path("/");
 609        if (tlb_type == spitfire) {
 610                unsigned long ver, manuf, impl;
 611
 612                __asm__ __volatile__ ("rdpr %%ver, %0"
 613                                      : "=&r" (ver));
 614                manuf = ((ver >> 48) & 0xffff);
 615                impl = ((ver >> 32) & 0xffff);
 616                if (manuf == 0x17 && impl == 0x13) {
 617                        /* Hummingbird, aka Ultra-IIe */
 618                        tick_ops = &hbtick_operations;
 619                        freq = of_getintprop_default(dp, "stick-frequency", 0);
 620                } else {
 621                        tick_ops = &tick_operations;
 622                        freq = local_cpu_data().clock_tick;
 623                }
 624        } else {
 625                tick_ops = &stick_operations;
 626                freq = of_getintprop_default(dp, "stick-frequency", 0);
 627        }
 628
 629        return freq;
 630}
 631
 632struct freq_table {
 633        unsigned long clock_tick_ref;
 634        unsigned int ref_freq;
 635};
 636static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
 637
 638unsigned long sparc64_get_clock_tick(unsigned int cpu)
 639{
 640        struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 641
 642        if (ft->clock_tick_ref)
 643                return ft->clock_tick_ref;
 644        return cpu_data(cpu).clock_tick;
 645}
 646EXPORT_SYMBOL(sparc64_get_clock_tick);
 647
 648#ifdef CONFIG_CPU_FREQ
 649
 650static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
 651                                    void *data)
 652{
 653        struct cpufreq_freqs *freq = data;
 654        unsigned int cpu = freq->cpu;
 655        struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 656
 657        if (!ft->ref_freq) {
 658                ft->ref_freq = freq->old;
 659                ft->clock_tick_ref = cpu_data(cpu).clock_tick;
 660        }
 661        if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
 662            (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
 663            (val == CPUFREQ_RESUMECHANGE)) {
 664                cpu_data(cpu).clock_tick =
 665                        cpufreq_scale(ft->clock_tick_ref,
 666                                      ft->ref_freq,
 667                                      freq->new);
 668        }
 669
 670        return 0;
 671}
 672
 673static struct notifier_block sparc64_cpufreq_notifier_block = {
 674        .notifier_call  = sparc64_cpufreq_notifier
 675};
 676
 677static int __init register_sparc64_cpufreq_notifier(void)
 678{
 679
 680        cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
 681                                  CPUFREQ_TRANSITION_NOTIFIER);
 682        return 0;
 683}
 684
 685core_initcall(register_sparc64_cpufreq_notifier);
 686
 687#endif /* CONFIG_CPU_FREQ */
 688
 689static int sparc64_next_event(unsigned long delta,
 690                              struct clock_event_device *evt)
 691{
 692        return tick_ops->add_compare(delta) ? -ETIME : 0;
 693}
 694
 695static void sparc64_timer_setup(enum clock_event_mode mode,
 696                                struct clock_event_device *evt)
 697{
 698        switch (mode) {
 699        case CLOCK_EVT_MODE_ONESHOT:
 700        case CLOCK_EVT_MODE_RESUME:
 701                break;
 702
 703        case CLOCK_EVT_MODE_SHUTDOWN:
 704                tick_ops->disable_irq();
 705                break;
 706
 707        case CLOCK_EVT_MODE_PERIODIC:
 708        case CLOCK_EVT_MODE_UNUSED:
 709                WARN_ON(1);
 710                break;
 711        }
 712}
 713
 714static struct clock_event_device sparc64_clockevent = {
 715        .features       = CLOCK_EVT_FEAT_ONESHOT,
 716        .set_mode       = sparc64_timer_setup,
 717        .set_next_event = sparc64_next_event,
 718        .rating         = 100,
 719        .shift          = 30,
 720        .irq            = -1,
 721};
 722static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
 723
 724void __irq_entry timer_interrupt(int irq, struct pt_regs *regs)
 725{
 726        struct pt_regs *old_regs = set_irq_regs(regs);
 727        unsigned long tick_mask = tick_ops->softint_mask;
 728        int cpu = smp_processor_id();
 729        struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
 730
 731        clear_softint(tick_mask);
 732
 733        irq_enter();
 734
 735        local_cpu_data().irq0_irqs++;
 736        kstat_incr_irqs_this_cpu(0, irq_to_desc(0));
 737
 738        if (unlikely(!evt->event_handler)) {
 739                printk(KERN_WARNING
 740                       "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
 741        } else
 742                evt->event_handler(evt);
 743
 744        irq_exit();
 745
 746        set_irq_regs(old_regs);
 747}
 748
 749void __devinit setup_sparc64_timer(void)
 750{
 751        struct clock_event_device *sevt;
 752        unsigned long pstate;
 753
 754        /* Guarantee that the following sequences execute
 755         * uninterrupted.
 756         */
 757        __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 758                             "wrpr      %0, %1, %%pstate"
 759                             : "=r" (pstate)
 760                             : "i" (PSTATE_IE));
 761
 762        tick_ops->init_tick();
 763
 764        /* Restore PSTATE_IE. */
 765        __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 766                             : /* no outputs */
 767                             : "r" (pstate));
 768
 769        sevt = &__get_cpu_var(sparc64_events);
 770
 771        memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
 772        sevt->cpumask = cpumask_of(smp_processor_id());
 773
 774        clockevents_register_device(sevt);
 775}
 776
 777#define SPARC64_NSEC_PER_CYC_SHIFT      10UL
 778
 779static struct clocksource clocksource_tick = {
 780        .rating         = 100,
 781        .mask           = CLOCKSOURCE_MASK(64),
 782        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 783};
 784
 785static unsigned long tb_ticks_per_usec __read_mostly;
 786
 787void __delay(unsigned long loops)
 788{
 789        unsigned long bclock, now;
 790
 791        bclock = tick_ops->get_tick();
 792        do {
 793                now = tick_ops->get_tick();
 794        } while ((now-bclock) < loops);
 795}
 796EXPORT_SYMBOL(__delay);
 797
 798void udelay(unsigned long usecs)
 799{
 800        __delay(tb_ticks_per_usec * usecs);
 801}
 802EXPORT_SYMBOL(udelay);
 803
 804static cycle_t clocksource_tick_read(struct clocksource *cs)
 805{
 806        return tick_ops->get_tick();
 807}
 808
 809void __init time_init(void)
 810{
 811        unsigned long freq = sparc64_init_timers();
 812
 813        tb_ticks_per_usec = freq / USEC_PER_SEC;
 814
 815        timer_ticks_per_nsec_quotient =
 816                clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT);
 817
 818        clocksource_tick.name = tick_ops->name;
 819        clocksource_tick.read = clocksource_tick_read;
 820
 821        clocksource_register_hz(&clocksource_tick, freq);
 822        printk("clocksource: mult[%x] shift[%d]\n",
 823               clocksource_tick.mult, clocksource_tick.shift);
 824
 825        sparc64_clockevent.name = tick_ops->name;
 826        clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4);
 827
 828        sparc64_clockevent.max_delta_ns =
 829                clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
 830        sparc64_clockevent.min_delta_ns =
 831                clockevent_delta2ns(0xF, &sparc64_clockevent);
 832
 833        printk("clockevent: mult[%x] shift[%d]\n",
 834               sparc64_clockevent.mult, sparc64_clockevent.shift);
 835
 836        setup_sparc64_timer();
 837}
 838
 839unsigned long long sched_clock(void)
 840{
 841        unsigned long ticks = tick_ops->get_tick();
 842
 843        return (ticks * timer_ticks_per_nsec_quotient)
 844                >> SPARC64_NSEC_PER_CYC_SHIFT;
 845}
 846
 847int __devinit read_current_timer(unsigned long *timer_val)
 848{
 849        *timer_val = tick_ops->get_tick();
 850        return 0;
 851}
 852