1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48#ifndef MPTCTL_H_INCLUDED
49#define MPTCTL_H_INCLUDED
50
51
52
53
54
55
56
57
58#define MPT_MISCDEV_BASENAME "mptctl"
59#define MPT_MISCDEV_PATHNAME "/dev/" MPT_MISCDEV_BASENAME
60
61#define MPT_PRODUCT_LENGTH 12
62
63
64
65
66#define MPT_MAGIC_NUMBER 'm'
67
68#define MPTRWPERF _IOWR(MPT_MAGIC_NUMBER,0,struct mpt_raw_r_w)
69
70#define MPTFWDOWNLOAD _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer)
71#define MPTCOMMAND _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command)
72
73#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
74#define MPTFWDOWNLOAD32 _IOWR(MPT_MAGIC_NUMBER,15,struct mpt_fw_xfer32)
75#define MPTCOMMAND32 _IOWR(MPT_MAGIC_NUMBER,20,struct mpt_ioctl_command32)
76#endif
77
78#define MPTIOCINFO _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo)
79#define MPTIOCINFO1 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev0)
80#define MPTIOCINFO2 _IOWR(MPT_MAGIC_NUMBER,17,struct mpt_ioctl_iocinfo_rev1)
81#define MPTTARGETINFO _IOWR(MPT_MAGIC_NUMBER,18,struct mpt_ioctl_targetinfo)
82#define MPTTEST _IOWR(MPT_MAGIC_NUMBER,19,struct mpt_ioctl_test)
83#define MPTEVENTQUERY _IOWR(MPT_MAGIC_NUMBER,21,struct mpt_ioctl_eventquery)
84#define MPTEVENTENABLE _IOWR(MPT_MAGIC_NUMBER,22,struct mpt_ioctl_eventenable)
85#define MPTEVENTREPORT _IOWR(MPT_MAGIC_NUMBER,23,struct mpt_ioctl_eventreport)
86#define MPTHARDRESET _IOWR(MPT_MAGIC_NUMBER,24,struct mpt_ioctl_diag_reset)
87#define MPTFWREPLACE _IOWR(MPT_MAGIC_NUMBER,25,struct mpt_ioctl_replace_fw)
88
89
90
91
92
93
94
95
96
97
98
99
100
101struct mpt_fw_xfer {
102 unsigned int iocnum;
103 unsigned int fwlen;
104 void __user *bufp;
105};
106
107#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
108struct mpt_fw_xfer32 {
109 unsigned int iocnum;
110 unsigned int fwlen;
111 u32 bufp;
112};
113#endif
114
115
116
117
118
119
120
121
122
123
124
125
126
127typedef struct _mpt_ioctl_header {
128 unsigned int iocnum;
129 unsigned int port;
130 int maxDataSize;
131} mpt_ioctl_header;
132
133
134
135
136struct mpt_ioctl_diag_reset {
137 mpt_ioctl_header hdr;
138};
139
140
141
142
143
144struct mpt_ioctl_pci_info {
145 union {
146 struct {
147 unsigned int deviceNumber : 5;
148 unsigned int functionNumber : 3;
149 unsigned int busNumber : 24;
150 } bits;
151 unsigned int asUlong;
152 } u;
153};
154
155struct mpt_ioctl_pci_info2 {
156 union {
157 struct {
158 unsigned int deviceNumber : 5;
159 unsigned int functionNumber : 3;
160 unsigned int busNumber : 24;
161 } bits;
162 unsigned int asUlong;
163 } u;
164 int segmentID;
165};
166
167
168
169
170
171
172#define MPT_IOCTL_INTERFACE_SCSI (0x00)
173#define MPT_IOCTL_INTERFACE_FC (0x01)
174#define MPT_IOCTL_INTERFACE_FC_IP (0x02)
175#define MPT_IOCTL_INTERFACE_SAS (0x03)
176#define MPT_IOCTL_VERSION_LENGTH (32)
177
178struct mpt_ioctl_iocinfo {
179 mpt_ioctl_header hdr;
180 int adapterType;
181 int port;
182 int pciId;
183 int hwRev;
184 int subSystemDevice;
185 int subSystemVendor;
186 int numDevices;
187 int FWVersion;
188 int BIOSVersion;
189 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
190 char busChangeEvent;
191 char hostId;
192 char rsvd[2];
193 struct mpt_ioctl_pci_info2 pciInfo;
194};
195
196struct mpt_ioctl_iocinfo_rev1 {
197 mpt_ioctl_header hdr;
198 int adapterType;
199 int port;
200 int pciId;
201 int hwRev;
202 int subSystemDevice;
203 int subSystemVendor;
204 int numDevices;
205 int FWVersion;
206 int BIOSVersion;
207 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
208 char busChangeEvent;
209 char hostId;
210 char rsvd[2];
211 struct mpt_ioctl_pci_info pciInfo;
212};
213
214
215
216
217
218struct mpt_ioctl_iocinfo_rev0 {
219 mpt_ioctl_header hdr;
220 int adapterType;
221 int port;
222 int pciId;
223 int hwRev;
224 int subSystemDevice;
225 int subSystemVendor;
226 int numDevices;
227 int FWVersion;
228 int BIOSVersion;
229 char driverVersion[MPT_IOCTL_VERSION_LENGTH];
230 char busChangeEvent;
231 char hostId;
232 char rsvd[2];
233};
234
235
236
237
238
239
240
241
242
243
244
245struct mpt_ioctl_targetinfo {
246 mpt_ioctl_header hdr;
247 int numDevices;
248 int targetInfo[1];
249};
250
251
252
253
254
255
256struct mpt_ioctl_eventquery {
257 mpt_ioctl_header hdr;
258 unsigned short eventEntries;
259 unsigned short reserved;
260 unsigned int eventTypes;
261};
262
263struct mpt_ioctl_eventenable {
264 mpt_ioctl_header hdr;
265 unsigned int eventTypes;
266};
267
268#ifndef __KERNEL__
269typedef struct {
270 uint event;
271 uint eventContext;
272 uint data[2];
273} MPT_IOCTL_EVENTS;
274#endif
275
276struct mpt_ioctl_eventreport {
277 mpt_ioctl_header hdr;
278 MPT_IOCTL_EVENTS eventData[1];
279};
280
281#define MPT_MAX_NAME 32
282struct mpt_ioctl_test {
283 mpt_ioctl_header hdr;
284 u8 name[MPT_MAX_NAME];
285 int chip_type;
286 u8 product [MPT_PRODUCT_LENGTH];
287};
288
289
290
291
292
293typedef struct mpt_ioctl_replace_fw {
294 mpt_ioctl_header hdr;
295 int newImageSize;
296 u8 newImage[1];
297} mpt_ioctl_replace_fw_t;
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320struct mpt_ioctl_command {
321 mpt_ioctl_header hdr;
322 int timeout;
323 char __user *replyFrameBufPtr;
324 char __user *dataInBufPtr;
325 char __user *dataOutBufPtr;
326 char __user *senseDataPtr;
327 int maxReplyBytes;
328 int dataInSize;
329 int dataOutSize;
330 int maxSenseBytes;
331 int dataSgeOffset;
332 char MF[1];
333};
334
335
336
337
338#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
339struct mpt_ioctl_command32 {
340 mpt_ioctl_header hdr;
341 int timeout;
342 u32 replyFrameBufPtr;
343 u32 dataInBufPtr;
344 u32 dataOutBufPtr;
345 u32 senseDataPtr;
346 int maxReplyBytes;
347 int dataInSize;
348 int dataOutSize;
349 int maxSenseBytes;
350 int dataSgeOffset;
351 char MF[1];
352};
353#endif
354
355
356
357
358#define CPQFCTS_IOC_MAGIC 'Z'
359#define HP_IOC_MAGIC 'Z'
360#define HP_GETHOSTINFO _IOR(HP_IOC_MAGIC, 20, hp_host_info_t)
361#define HP_GETHOSTINFO1 _IOR(HP_IOC_MAGIC, 20, hp_host_info_rev0_t)
362#define HP_GETTARGETINFO _IOR(HP_IOC_MAGIC, 21, hp_target_info_t)
363
364typedef struct _hp_header {
365 unsigned int iocnum;
366 unsigned int host;
367 unsigned int channel;
368 unsigned int id;
369 unsigned int lun;
370} hp_header_t;
371
372
373
374
375
376
377
378
379
380typedef struct _hp_host_info {
381 hp_header_t hdr;
382 u16 vendor;
383 u16 device;
384 u16 subsystem_vendor;
385 u16 subsystem_id;
386 u8 devfn;
387 u8 bus;
388 ushort host_no;
389 u8 fw_version[16];
390 u8 serial_number[24];
391 u32 ioc_status;
392 u32 bus_phys_width;
393 u32 base_io_addr;
394 u32 rsvd;
395 unsigned int hard_resets;
396 unsigned int soft_resets;
397 unsigned int timeouts;
398} hp_host_info_t;
399
400
401
402
403typedef struct _hp_host_info_rev0 {
404 hp_header_t hdr;
405 u16 vendor;
406 u16 device;
407 u16 subsystem_vendor;
408 u16 subsystem_id;
409 u8 devfn;
410 u8 bus;
411 ushort host_no;
412 u8 fw_version[16];
413 u8 serial_number[24];
414 u32 ioc_status;
415 u32 bus_phys_width;
416 u32 base_io_addr;
417 u32 rsvd;
418 unsigned long hard_resets;
419 unsigned long soft_resets;
420 unsigned long timeouts;
421} hp_host_info_rev0_t;
422
423
424
425
426
427
428
429
430
431
432
433typedef struct _hp_target_info {
434 hp_header_t hdr;
435 u32 parity_errors;
436 u32 phase_errors;
437 u32 select_timeouts;
438 u32 message_rejects;
439 u32 negotiated_speed;
440 u8 negotiated_width;
441 u8 rsvd[7];
442} hp_target_info_t;
443
444#define HP_STATUS_OTHER 1
445#define HP_STATUS_OK 2
446#define HP_STATUS_FAILED 3
447
448#define HP_BUS_WIDTH_UNK 1
449#define HP_BUS_WIDTH_8 2
450#define HP_BUS_WIDTH_16 3
451#define HP_BUS_WIDTH_32 4
452
453#define HP_DEV_SPEED_ASYNC 2
454#define HP_DEV_SPEED_FAST 3
455#define HP_DEV_SPEED_ULTRA 4
456#define HP_DEV_SPEED_ULTRA2 5
457#define HP_DEV_SPEED_ULTRA160 6
458#define HP_DEV_SPEED_SCSI1 7
459#define HP_DEV_SPEED_ULTRA320 8
460
461
462
463
464
465
466#endif
467
468