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18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/errno.h>
21#include <linux/module.h>
22#include <linux/device.h>
23#include <linux/interrupt.h>
24#include <linux/mutex.h>
25#include <linux/math64.h>
26#include <linux/slab.h>
27#include <linux/sched.h>
28#include <linux/mod_devicetable.h>
29
30#include <linux/mtd/cfi.h>
31#include <linux/mtd/mtd.h>
32#include <linux/mtd/partitions.h>
33
34#include <linux/spi/spi.h>
35#include <linux/spi/flash.h>
36
37
38#define OPCODE_WREN 0x06
39#define OPCODE_RDSR 0x05
40#define OPCODE_WRSR 0x01
41#define OPCODE_NORM_READ 0x03
42#define OPCODE_FAST_READ 0x0b
43#define OPCODE_PP 0x02
44#define OPCODE_BE_4K 0x20
45#define OPCODE_BE_32K 0x52
46#define OPCODE_CHIP_ERASE 0xc7
47#define OPCODE_SE 0xd8
48#define OPCODE_RDID 0x9f
49
50
51#define OPCODE_BP 0x02
52#define OPCODE_WRDI 0x04
53#define OPCODE_AAI_WP 0xad
54
55
56#define OPCODE_EN4B 0xb7
57#define OPCODE_EX4B 0xe9
58
59
60#define OPCODE_BRWR 0x17
61
62
63#define SR_WIP 1
64#define SR_WEL 2
65
66#define SR_BP0 4
67#define SR_BP1 8
68#define SR_BP2 0x10
69#define SR_SRWD 0x80
70
71
72#define MAX_READY_WAIT_JIFFIES (40 * HZ)
73#define MAX_CMD_SIZE 5
74
75#ifdef CONFIG_M25PXX_USE_FAST_READ
76#define OPCODE_READ OPCODE_FAST_READ
77#define FAST_READ_DUMMY_BYTE 1
78#else
79#define OPCODE_READ OPCODE_NORM_READ
80#define FAST_READ_DUMMY_BYTE 0
81#endif
82
83#define JEDEC_MFR(_jedec_id) ((_jedec_id) >> 16)
84
85
86
87struct m25p {
88 struct spi_device *spi;
89 struct mutex lock;
90 struct mtd_info mtd;
91 unsigned partitioned:1;
92 u16 page_size;
93 u16 addr_width;
94 u8 erase_opcode;
95 u8 *command;
96};
97
98static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd)
99{
100 return container_of(mtd, struct m25p, mtd);
101}
102
103
104
105
106
107
108
109
110
111
112
113
114static int read_sr(struct m25p *flash)
115{
116 ssize_t retval;
117 u8 code = OPCODE_RDSR;
118 u8 val;
119
120 retval = spi_write_then_read(flash->spi, &code, 1, &val, 1);
121
122 if (retval < 0) {
123 dev_err(&flash->spi->dev, "error %d reading SR\n",
124 (int) retval);
125 return retval;
126 }
127
128 return val;
129}
130
131
132
133
134
135static int write_sr(struct m25p *flash, u8 val)
136{
137 flash->command[0] = OPCODE_WRSR;
138 flash->command[1] = val;
139
140 return spi_write(flash->spi, flash->command, 2);
141}
142
143
144
145
146
147static inline int write_enable(struct m25p *flash)
148{
149 u8 code = OPCODE_WREN;
150
151 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
152}
153
154
155
156
157static inline int write_disable(struct m25p *flash)
158{
159 u8 code = OPCODE_WRDI;
160
161 return spi_write_then_read(flash->spi, &code, 1, NULL, 0);
162}
163
164
165
166
167static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable)
168{
169 switch (JEDEC_MFR(jedec_id)) {
170 case CFI_MFR_MACRONIX:
171 flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B;
172 return spi_write(flash->spi, flash->command, 1);
173 default:
174
175 flash->command[0] = OPCODE_BRWR;
176 flash->command[1] = enable << 7;
177 return spi_write(flash->spi, flash->command, 2);
178 }
179}
180
181
182
183
184
185static int wait_till_ready(struct m25p *flash)
186{
187 unsigned long deadline;
188 int sr;
189
190 deadline = jiffies + MAX_READY_WAIT_JIFFIES;
191
192 do {
193 if ((sr = read_sr(flash)) < 0)
194 break;
195 else if (!(sr & SR_WIP))
196 return 0;
197
198 cond_resched();
199
200 } while (!time_after_eq(jiffies, deadline));
201
202 return 1;
203}
204
205
206
207
208
209
210static int erase_chip(struct m25p *flash)
211{
212 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %lldKiB\n",
213 dev_name(&flash->spi->dev), __func__,
214 (long long)(flash->mtd.size >> 10));
215
216
217 if (wait_till_ready(flash))
218 return 1;
219
220
221 write_enable(flash);
222
223
224 flash->command[0] = OPCODE_CHIP_ERASE;
225
226 spi_write(flash->spi, flash->command, 1);
227
228 return 0;
229}
230
231static void m25p_addr2cmd(struct m25p *flash, unsigned int addr, u8 *cmd)
232{
233
234 cmd[1] = addr >> (flash->addr_width * 8 - 8);
235 cmd[2] = addr >> (flash->addr_width * 8 - 16);
236 cmd[3] = addr >> (flash->addr_width * 8 - 24);
237 cmd[4] = addr >> (flash->addr_width * 8 - 32);
238}
239
240static int m25p_cmdsz(struct m25p *flash)
241{
242 return 1 + flash->addr_width;
243}
244
245
246
247
248
249
250
251static int erase_sector(struct m25p *flash, u32 offset)
252{
253 DEBUG(MTD_DEBUG_LEVEL3, "%s: %s %dKiB at 0x%08x\n",
254 dev_name(&flash->spi->dev), __func__,
255 flash->mtd.erasesize / 1024, offset);
256
257
258 if (wait_till_ready(flash))
259 return 1;
260
261
262 write_enable(flash);
263
264
265 flash->command[0] = flash->erase_opcode;
266 m25p_addr2cmd(flash, offset, flash->command);
267
268 spi_write(flash->spi, flash->command, m25p_cmdsz(flash));
269
270 return 0;
271}
272
273
274
275
276
277
278
279
280
281
282
283static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
284{
285 struct m25p *flash = mtd_to_m25p(mtd);
286 u32 addr,len;
287 uint32_t rem;
288
289 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%llx, len %lld\n",
290 dev_name(&flash->spi->dev), __func__, "at",
291 (long long)instr->addr, (long long)instr->len);
292
293
294 if (instr->addr + instr->len > flash->mtd.size)
295 return -EINVAL;
296 div_u64_rem(instr->len, mtd->erasesize, &rem);
297 if (rem)
298 return -EINVAL;
299
300 addr = instr->addr;
301 len = instr->len;
302
303 mutex_lock(&flash->lock);
304
305
306 if (len == flash->mtd.size) {
307 if (erase_chip(flash)) {
308 instr->state = MTD_ERASE_FAILED;
309 mutex_unlock(&flash->lock);
310 return -EIO;
311 }
312
313
314
315
316
317
318
319 } else {
320 while (len) {
321 if (erase_sector(flash, addr)) {
322 instr->state = MTD_ERASE_FAILED;
323 mutex_unlock(&flash->lock);
324 return -EIO;
325 }
326
327 addr += mtd->erasesize;
328 len -= mtd->erasesize;
329 }
330 }
331
332 mutex_unlock(&flash->lock);
333
334 instr->state = MTD_ERASE_DONE;
335 mtd_erase_callback(instr);
336
337 return 0;
338}
339
340
341
342
343
344static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
345 size_t *retlen, u_char *buf)
346{
347 struct m25p *flash = mtd_to_m25p(mtd);
348 struct spi_transfer t[2];
349 struct spi_message m;
350
351 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
352 dev_name(&flash->spi->dev), __func__, "from",
353 (u32)from, len);
354
355
356 if (!len)
357 return 0;
358
359 if (from + len > flash->mtd.size)
360 return -EINVAL;
361
362 spi_message_init(&m);
363 memset(t, 0, (sizeof t));
364
365
366
367
368
369 t[0].tx_buf = flash->command;
370 t[0].len = m25p_cmdsz(flash) + FAST_READ_DUMMY_BYTE;
371 spi_message_add_tail(&t[0], &m);
372
373 t[1].rx_buf = buf;
374 t[1].len = len;
375 spi_message_add_tail(&t[1], &m);
376
377
378 *retlen = 0;
379
380 mutex_lock(&flash->lock);
381
382
383 if (wait_till_ready(flash)) {
384
385 mutex_unlock(&flash->lock);
386 return 1;
387 }
388
389
390
391
392
393
394
395 flash->command[0] = OPCODE_READ;
396 m25p_addr2cmd(flash, from, flash->command);
397
398 spi_sync(flash->spi, &m);
399
400 *retlen = m.actual_length - m25p_cmdsz(flash) - FAST_READ_DUMMY_BYTE;
401
402 mutex_unlock(&flash->lock);
403
404 return 0;
405}
406
407
408
409
410
411
412static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len,
413 size_t *retlen, const u_char *buf)
414{
415 struct m25p *flash = mtd_to_m25p(mtd);
416 u32 page_offset, page_size;
417 struct spi_transfer t[2];
418 struct spi_message m;
419
420 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
421 dev_name(&flash->spi->dev), __func__, "to",
422 (u32)to, len);
423
424 *retlen = 0;
425
426
427 if (!len)
428 return(0);
429
430 if (to + len > flash->mtd.size)
431 return -EINVAL;
432
433 spi_message_init(&m);
434 memset(t, 0, (sizeof t));
435
436 t[0].tx_buf = flash->command;
437 t[0].len = m25p_cmdsz(flash);
438 spi_message_add_tail(&t[0], &m);
439
440 t[1].tx_buf = buf;
441 spi_message_add_tail(&t[1], &m);
442
443 mutex_lock(&flash->lock);
444
445
446 if (wait_till_ready(flash)) {
447 mutex_unlock(&flash->lock);
448 return 1;
449 }
450
451 write_enable(flash);
452
453
454 flash->command[0] = OPCODE_PP;
455 m25p_addr2cmd(flash, to, flash->command);
456
457 page_offset = to & (flash->page_size - 1);
458
459
460 if (page_offset + len <= flash->page_size) {
461 t[1].len = len;
462
463 spi_sync(flash->spi, &m);
464
465 *retlen = m.actual_length - m25p_cmdsz(flash);
466 } else {
467 u32 i;
468
469
470 page_size = flash->page_size - page_offset;
471
472 t[1].len = page_size;
473 spi_sync(flash->spi, &m);
474
475 *retlen = m.actual_length - m25p_cmdsz(flash);
476
477
478 for (i = page_size; i < len; i += page_size) {
479 page_size = len - i;
480 if (page_size > flash->page_size)
481 page_size = flash->page_size;
482
483
484 m25p_addr2cmd(flash, to + i, flash->command);
485
486 t[1].tx_buf = buf + i;
487 t[1].len = page_size;
488
489 wait_till_ready(flash);
490
491 write_enable(flash);
492
493 spi_sync(flash->spi, &m);
494
495 *retlen += m.actual_length - m25p_cmdsz(flash);
496 }
497 }
498
499 mutex_unlock(&flash->lock);
500
501 return 0;
502}
503
504static int sst_write(struct mtd_info *mtd, loff_t to, size_t len,
505 size_t *retlen, const u_char *buf)
506{
507 struct m25p *flash = mtd_to_m25p(mtd);
508 struct spi_transfer t[2];
509 struct spi_message m;
510 size_t actual;
511 int cmd_sz, ret;
512
513 DEBUG(MTD_DEBUG_LEVEL2, "%s: %s %s 0x%08x, len %zd\n",
514 dev_name(&flash->spi->dev), __func__, "to",
515 (u32)to, len);
516
517 *retlen = 0;
518
519
520 if (!len)
521 return 0;
522
523 if (to + len > flash->mtd.size)
524 return -EINVAL;
525
526 spi_message_init(&m);
527 memset(t, 0, (sizeof t));
528
529 t[0].tx_buf = flash->command;
530 t[0].len = m25p_cmdsz(flash);
531 spi_message_add_tail(&t[0], &m);
532
533 t[1].tx_buf = buf;
534 spi_message_add_tail(&t[1], &m);
535
536 mutex_lock(&flash->lock);
537
538
539 ret = wait_till_ready(flash);
540 if (ret)
541 goto time_out;
542
543 write_enable(flash);
544
545 actual = to % 2;
546
547 if (actual) {
548 flash->command[0] = OPCODE_BP;
549 m25p_addr2cmd(flash, to, flash->command);
550
551
552 t[1].len = 1;
553 spi_sync(flash->spi, &m);
554 ret = wait_till_ready(flash);
555 if (ret)
556 goto time_out;
557 *retlen += m.actual_length - m25p_cmdsz(flash);
558 }
559 to += actual;
560
561 flash->command[0] = OPCODE_AAI_WP;
562 m25p_addr2cmd(flash, to, flash->command);
563
564
565 cmd_sz = m25p_cmdsz(flash);
566 for (; actual < len - 1; actual += 2) {
567 t[0].len = cmd_sz;
568
569 t[1].len = 2;
570 t[1].tx_buf = buf + actual;
571
572 spi_sync(flash->spi, &m);
573 ret = wait_till_ready(flash);
574 if (ret)
575 goto time_out;
576 *retlen += m.actual_length - cmd_sz;
577 cmd_sz = 1;
578 to += 2;
579 }
580 write_disable(flash);
581 ret = wait_till_ready(flash);
582 if (ret)
583 goto time_out;
584
585
586 if (actual != len) {
587 write_enable(flash);
588 flash->command[0] = OPCODE_BP;
589 m25p_addr2cmd(flash, to, flash->command);
590 t[0].len = m25p_cmdsz(flash);
591 t[1].len = 1;
592 t[1].tx_buf = buf + actual;
593
594 spi_sync(flash->spi, &m);
595 ret = wait_till_ready(flash);
596 if (ret)
597 goto time_out;
598 *retlen += m.actual_length - m25p_cmdsz(flash);
599 write_disable(flash);
600 }
601
602time_out:
603 mutex_unlock(&flash->lock);
604 return ret;
605}
606
607
608
609
610
611
612
613struct flash_info {
614
615
616
617
618 u32 jedec_id;
619 u16 ext_id;
620
621
622
623
624 unsigned sector_size;
625 u16 n_sectors;
626
627 u16 page_size;
628 u16 addr_width;
629
630 u16 flags;
631#define SECT_4K 0x01
632#define M25P_NO_ERASE 0x02
633};
634
635#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
636 ((kernel_ulong_t)&(struct flash_info) { \
637 .jedec_id = (_jedec_id), \
638 .ext_id = (_ext_id), \
639 .sector_size = (_sector_size), \
640 .n_sectors = (_n_sectors), \
641 .page_size = 256, \
642 .flags = (_flags), \
643 })
644
645#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width) \
646 ((kernel_ulong_t)&(struct flash_info) { \
647 .sector_size = (_sector_size), \
648 .n_sectors = (_n_sectors), \
649 .page_size = (_page_size), \
650 .addr_width = (_addr_width), \
651 .flags = M25P_NO_ERASE, \
652 })
653
654
655
656
657
658static const struct spi_device_id m25p_ids[] = {
659
660 { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K) },
661 { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) },
662
663 { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) },
664 { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
665
666 { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
667 { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
668 { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
669 { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
670
671
672 { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SECT_4K) },
673 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) },
674 { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
675
676
677 { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) },
678 { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) },
679 { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) },
680
681
682 { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) },
683 { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) },
684 { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
685 { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
686 { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
687 { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
688 { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
689 { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
690 { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
691
692
693
694
695 { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
696 { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
697 { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) },
698 { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, 0) },
699 { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SECT_4K) },
700 { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, 0) },
701 { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
702 { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, 0) },
703 { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, 0) },
704 { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
705 { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
706 { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
707 { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
708 { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) },
709 { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SECT_4K) },
710 { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
711
712
713 { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SECT_4K) },
714 { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SECT_4K) },
715 { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SECT_4K) },
716 { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SECT_4K) },
717 { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K) },
718 { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K) },
719 { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K) },
720 { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K) },
721
722
723 { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, 0) },
724 { "m25p10", INFO(0x202011, 0, 32 * 1024, 4, 0) },
725 { "m25p20", INFO(0x202012, 0, 64 * 1024, 4, 0) },
726 { "m25p40", INFO(0x202013, 0, 64 * 1024, 8, 0) },
727 { "m25p80", INFO(0x202014, 0, 64 * 1024, 16, 0) },
728 { "m25p16", INFO(0x202015, 0, 64 * 1024, 32, 0) },
729 { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, 0) },
730 { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) },
731 { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) },
732
733 { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) },
734 { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) },
735 { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4, 0) },
736 { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8, 0) },
737 { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16, 0) },
738 { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32, 0) },
739 { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64, 0) },
740 { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128, 0) },
741 { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64, 0) },
742
743 { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2, 0) },
744 { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) },
745 { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) },
746
747 { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, 0) },
748 { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SECT_4K) },
749
750 { "m25px32", INFO(0x207116, 0, 64 * 1024, 64, SECT_4K) },
751 { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SECT_4K) },
752 { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SECT_4K) },
753 { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, 0) },
754
755
756 { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SECT_4K) },
757 { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4, SECT_4K) },
758 { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SECT_4K) },
759 { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) },
760 { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) },
761 { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) },
762 { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) },
763 { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
764 { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
765
766
767 { "cat25c11", CAT25_INFO( 16, 8, 16, 1) },
768 { "cat25c03", CAT25_INFO( 32, 8, 16, 2) },
769 { "cat25c09", CAT25_INFO( 128, 8, 32, 2) },
770 { "cat25c17", CAT25_INFO( 256, 8, 32, 2) },
771 { "cat25128", CAT25_INFO(2048, 8, 64, 2) },
772 { },
773};
774MODULE_DEVICE_TABLE(spi, m25p_ids);
775
776static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi)
777{
778 int tmp;
779 u8 code = OPCODE_RDID;
780 u8 id[5];
781 u32 jedec;
782 u16 ext_jedec;
783 struct flash_info *info;
784
785
786
787
788
789 tmp = spi_write_then_read(spi, &code, 1, id, 5);
790 if (tmp < 0) {
791 DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n",
792 dev_name(&spi->dev), tmp);
793 return ERR_PTR(tmp);
794 }
795 jedec = id[0];
796 jedec = jedec << 8;
797 jedec |= id[1];
798 jedec = jedec << 8;
799 jedec |= id[2];
800
801 ext_jedec = id[3] << 8 | id[4];
802
803 for (tmp = 0; tmp < ARRAY_SIZE(m25p_ids) - 1; tmp++) {
804 info = (void *)m25p_ids[tmp].driver_data;
805 if (info->jedec_id == jedec) {
806 if (info->ext_id != 0 && info->ext_id != ext_jedec)
807 continue;
808 return &m25p_ids[tmp];
809 }
810 }
811 dev_err(&spi->dev, "unrecognized JEDEC id %06x\n", jedec);
812 return ERR_PTR(-ENODEV);
813}
814
815
816
817
818
819
820
821static int __devinit m25p_probe(struct spi_device *spi)
822{
823 const struct spi_device_id *id = spi_get_device_id(spi);
824 struct flash_platform_data *data;
825 struct m25p *flash;
826 struct flash_info *info;
827 unsigned i;
828 struct mtd_partition *parts = NULL;
829 int nr_parts = 0;
830
831
832
833
834
835
836 data = spi->dev.platform_data;
837 if (data && data->type) {
838 const struct spi_device_id *plat_id;
839
840 for (i = 0; i < ARRAY_SIZE(m25p_ids) - 1; i++) {
841 plat_id = &m25p_ids[i];
842 if (strcmp(data->type, plat_id->name))
843 continue;
844 break;
845 }
846
847 if (i < ARRAY_SIZE(m25p_ids) - 1)
848 id = plat_id;
849 else
850 dev_warn(&spi->dev, "unrecognized id %s\n", data->type);
851 }
852
853 info = (void *)id->driver_data;
854
855 if (info->jedec_id) {
856 const struct spi_device_id *jid;
857
858 jid = jedec_probe(spi);
859 if (IS_ERR(jid)) {
860 return PTR_ERR(jid);
861 } else if (jid != id) {
862
863
864
865
866
867
868
869 dev_warn(&spi->dev, "found %s, expected %s\n",
870 jid->name, id->name);
871 id = jid;
872 info = (void *)jid->driver_data;
873 }
874 }
875
876 flash = kzalloc(sizeof *flash, GFP_KERNEL);
877 if (!flash)
878 return -ENOMEM;
879 flash->command = kmalloc(MAX_CMD_SIZE + FAST_READ_DUMMY_BYTE, GFP_KERNEL);
880 if (!flash->command) {
881 kfree(flash);
882 return -ENOMEM;
883 }
884
885 flash->spi = spi;
886 mutex_init(&flash->lock);
887 dev_set_drvdata(&spi->dev, flash);
888
889
890
891
892
893
894 if (JEDEC_MFR(info->jedec_id) == CFI_MFR_ATMEL ||
895 JEDEC_MFR(info->jedec_id) == CFI_MFR_INTEL ||
896 JEDEC_MFR(info->jedec_id) == CFI_MFR_SST) {
897 write_enable(flash);
898 write_sr(flash, 0);
899 }
900
901 if (data && data->name)
902 flash->mtd.name = data->name;
903 else
904 flash->mtd.name = dev_name(&spi->dev);
905
906 flash->mtd.type = MTD_NORFLASH;
907 flash->mtd.writesize = 1;
908 flash->mtd.flags = MTD_CAP_NORFLASH;
909 flash->mtd.size = info->sector_size * info->n_sectors;
910 flash->mtd.erase = m25p80_erase;
911 flash->mtd.read = m25p80_read;
912
913
914 if (JEDEC_MFR(info->jedec_id) == CFI_MFR_SST)
915 flash->mtd.write = sst_write;
916 else
917 flash->mtd.write = m25p80_write;
918
919
920 if (info->flags & SECT_4K) {
921 flash->erase_opcode = OPCODE_BE_4K;
922 flash->mtd.erasesize = 4096;
923 } else {
924 flash->erase_opcode = OPCODE_SE;
925 flash->mtd.erasesize = info->sector_size;
926 }
927
928 if (info->flags & M25P_NO_ERASE)
929 flash->mtd.flags |= MTD_NO_ERASE;
930
931 flash->mtd.dev.parent = &spi->dev;
932 flash->page_size = info->page_size;
933
934 if (info->addr_width)
935 flash->addr_width = info->addr_width;
936 else {
937
938 if (flash->mtd.size > 0x1000000) {
939 flash->addr_width = 4;
940 set_4byte(flash, info->jedec_id, 1);
941 } else
942 flash->addr_width = 3;
943 }
944
945 dev_info(&spi->dev, "%s (%lld Kbytes)\n", id->name,
946 (long long)flash->mtd.size >> 10);
947
948 DEBUG(MTD_DEBUG_LEVEL2,
949 "mtd .name = %s, .size = 0x%llx (%lldMiB) "
950 ".erasesize = 0x%.8x (%uKiB) .numeraseregions = %d\n",
951 flash->mtd.name,
952 (long long)flash->mtd.size, (long long)(flash->mtd.size >> 20),
953 flash->mtd.erasesize, flash->mtd.erasesize / 1024,
954 flash->mtd.numeraseregions);
955
956 if (flash->mtd.numeraseregions)
957 for (i = 0; i < flash->mtd.numeraseregions; i++)
958 DEBUG(MTD_DEBUG_LEVEL2,
959 "mtd.eraseregions[%d] = { .offset = 0x%llx, "
960 ".erasesize = 0x%.8x (%uKiB), "
961 ".numblocks = %d }\n",
962 i, (long long)flash->mtd.eraseregions[i].offset,
963 flash->mtd.eraseregions[i].erasesize,
964 flash->mtd.eraseregions[i].erasesize / 1024,
965 flash->mtd.eraseregions[i].numblocks);
966
967
968
969
970
971 if (mtd_has_cmdlinepart()) {
972 static const char *part_probes[]
973 = { "cmdlinepart", NULL, };
974
975 nr_parts = parse_mtd_partitions(&flash->mtd,
976 part_probes, &parts, 0);
977 }
978
979 if (nr_parts <= 0 && data && data->parts) {
980 parts = data->parts;
981 nr_parts = data->nr_parts;
982 }
983
984#ifdef CONFIG_MTD_OF_PARTS
985 if (nr_parts <= 0 && spi->dev.of_node) {
986 nr_parts = of_mtd_parse_partitions(&spi->dev,
987 spi->dev.of_node, &parts);
988 }
989#endif
990
991 if (nr_parts > 0) {
992 for (i = 0; i < nr_parts; i++) {
993 DEBUG(MTD_DEBUG_LEVEL2, "partitions[%d] = "
994 "{.name = %s, .offset = 0x%llx, "
995 ".size = 0x%llx (%lldKiB) }\n",
996 i, parts[i].name,
997 (long long)parts[i].offset,
998 (long long)parts[i].size,
999 (long long)(parts[i].size >> 10));
1000 }
1001 flash->partitioned = 1;
1002 }
1003
1004 return mtd_device_register(&flash->mtd, parts, nr_parts) == 1 ?
1005 -ENODEV : 0;
1006}
1007
1008
1009static int __devexit m25p_remove(struct spi_device *spi)
1010{
1011 struct m25p *flash = dev_get_drvdata(&spi->dev);
1012 int status;
1013
1014
1015 status = mtd_device_unregister(&flash->mtd);
1016 if (status == 0) {
1017 kfree(flash->command);
1018 kfree(flash);
1019 }
1020 return 0;
1021}
1022
1023
1024static struct spi_driver m25p80_driver = {
1025 .driver = {
1026 .name = "m25p80",
1027 .bus = &spi_bus_type,
1028 .owner = THIS_MODULE,
1029 },
1030 .id_table = m25p_ids,
1031 .probe = m25p_probe,
1032 .remove = __devexit_p(m25p_remove),
1033
1034
1035
1036
1037
1038};
1039
1040
1041static int __init m25p80_init(void)
1042{
1043 return spi_register_driver(&m25p80_driver);
1044}
1045
1046
1047static void __exit m25p80_exit(void)
1048{
1049 spi_unregister_driver(&m25p80_driver);
1050}
1051
1052
1053module_init(m25p80_init);
1054module_exit(m25p80_exit);
1055
1056MODULE_LICENSE("GPL");
1057MODULE_AUTHOR("Mike Lavender");
1058MODULE_DESCRIPTION("MTD SPI driver for ST M25Pxx flash chips");
1059