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23#ifndef __LINUX_USB_GADGET_PXA27X_H
24#define __LINUX_USB_GADGET_PXA27X_H
25
26#include <linux/types.h>
27#include <linux/spinlock.h>
28#include <linux/io.h>
29#include <linux/usb/otg.h>
30
31
32
33
34
35#define UDCCR 0x0000
36#define UDCICR0 0x0004
37#define UDCICR1 0x0008
38#define UDCISR0 0x000C
39#define UDCISR1 0x0010
40#define UDCFNR 0x0014
41#define UDCOTGICR 0x0018
42#define UP2OCR 0x0020
43#define UP3OCR 0x0024
44#define UDCCSRn(x) (0x0100 + ((x)<<2))
45#define UDCBCRn(x) (0x0200 + ((x)<<2))
46#define UDCDRn(x) (0x0300 + ((x)<<2))
47#define UDCCRn(x) (0x0400 + ((x)<<2))
48
49#define UDCCR_OEN (1 << 31)
50#define UDCCR_AALTHNP (1 << 30)
51
52#define UDCCR_AHNP (1 << 29)
53
54#define UDCCR_BHNP (1 << 28)
55
56#define UDCCR_DWRE (1 << 16)
57#define UDCCR_ACN (0x03 << 11)
58#define UDCCR_ACN_S 11
59#define UDCCR_AIN (0x07 << 8)
60#define UDCCR_AIN_S 8
61#define UDCCR_AAISN (0x07 << 5)
62
63#define UDCCR_AAISN_S 5
64#define UDCCR_SMAC (1 << 4)
65
66#define UDCCR_EMCE (1 << 3)
67
68#define UDCCR_UDR (1 << 2)
69#define UDCCR_UDA (1 << 1)
70#define UDCCR_UDE (1 << 0)
71
72#define UDCICR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
73#define UDCICR1_IECC (1 << 31)
74#define UDCICR1_IESOF (1 << 30)
75#define UDCICR1_IERU (1 << 29)
76#define UDCICR1_IESU (1 << 28)
77#define UDCICR1_IERS (1 << 27)
78#define UDCICR_FIFOERR (1 << 1)
79#define UDCICR_PKTCOMPL (1 << 0)
80#define UDCICR_INT_MASK (UDCICR_FIFOERR | UDCICR_PKTCOMPL)
81
82#define UDCISR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2))
83#define UDCISR1_IRCC (1 << 31)
84#define UDCISR1_IRSOF (1 << 30)
85#define UDCISR1_IRRU (1 << 29)
86#define UDCISR1_IRSU (1 << 28)
87#define UDCISR1_IRRS (1 << 27)
88#define UDCISR_INT_MASK (UDCICR_FIFOERR | UDCICR_PKTCOMPL)
89
90#define UDCOTGICR_IESF (1 << 24)
91#define UDCOTGICR_IEXR (1 << 17)
92
93#define UDCOTGICR_IEXF (1 << 16)
94
95#define UDCOTGICR_IEVV40R (1 << 9)
96
97#define UDCOTGICR_IEVV40F (1 << 8)
98
99#define UDCOTGICR_IEVV44R (1 << 7)
100
101#define UDCOTGICR_IEVV44F (1 << 6)
102
103#define UDCOTGICR_IESVR (1 << 5)
104
105#define UDCOTGICR_IESVF (1 << 4)
106
107#define UDCOTGICR_IESDR (1 << 3)
108
109#define UDCOTGICR_IESDF (1 << 2)
110
111#define UDCOTGICR_IEIDR (1 << 1)
112
113#define UDCOTGICR_IEIDF (1 << 0)
114
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116
117#define UP2OCR_CPVEN (1 << 0)
118#define UP2OCR_CPVPE (1 << 1)
119
120#define UP2OCR_DPPDE (1 << 2)
121#define UP2OCR_DMPDE (1 << 3)
122#define UP2OCR_DPPUE (1 << 4)
123#define UP2OCR_DMPUE (1 << 5)
124#define UP2OCR_DPPUBE (1 << 6)
125#define UP2OCR_DMPUBE (1 << 7)
126#define UP2OCR_EXSP (1 << 8)
127#define UP2OCR_EXSUS (1 << 9)
128#define UP2OCR_IDON (1 << 10)
129#define UP2OCR_HXS (1 << 16)
130#define UP2OCR_HXOE (1 << 17)
131#define UP2OCR_SEOS (1 << 24)
132
133#define UDCCSR0_ACM (1 << 9)
134#define UDCCSR0_AREN (1 << 8)
135#define UDCCSR0_SA (1 << 7)
136#define UDCCSR0_RNE (1 << 6)
137#define UDCCSR0_FST (1 << 5)
138#define UDCCSR0_SST (1 << 4)
139#define UDCCSR0_DME (1 << 3)
140#define UDCCSR0_FTF (1 << 2)
141#define UDCCSR0_IPR (1 << 1)
142#define UDCCSR0_OPC (1 << 0)
143
144#define UDCCSR_DPE (1 << 9)
145#define UDCCSR_FEF (1 << 8)
146#define UDCCSR_SP (1 << 7)
147#define UDCCSR_BNE (1 << 6)
148#define UDCCSR_BNF (1 << 6)
149#define UDCCSR_FST (1 << 5)
150#define UDCCSR_SST (1 << 4)
151#define UDCCSR_DME (1 << 3)
152#define UDCCSR_TRN (1 << 2)
153#define UDCCSR_PC (1 << 1)
154#define UDCCSR_FS (1 << 0)
155
156#define UDCCONR_CN (0x03 << 25)
157#define UDCCONR_CN_S 25
158#define UDCCONR_IN (0x07 << 22)
159#define UDCCONR_IN_S 22
160#define UDCCONR_AISN (0x07 << 19)
161#define UDCCONR_AISN_S 19
162#define UDCCONR_EN (0x0f << 15)
163#define UDCCONR_EN_S 15
164#define UDCCONR_ET (0x03 << 13)
165#define UDCCONR_ET_S 13
166#define UDCCONR_ET_INT (0x03 << 13)
167#define UDCCONR_ET_BULK (0x02 << 13)
168#define UDCCONR_ET_ISO (0x01 << 13)
169#define UDCCONR_ET_NU (0x00 << 13)
170#define UDCCONR_ED (1 << 12)
171#define UDCCONR_MPS (0x3ff << 2)
172#define UDCCONR_MPS_S 2
173#define UDCCONR_DE (1 << 1)
174#define UDCCONR_EE (1 << 0)
175
176#define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_SMAC | UDCCR_UDR | UDCCR_UDE)
177#define UDCCSR_WR_MASK (UDCCSR_DME | UDCCSR_FST)
178#define UDC_FNR_MASK (0x7ff)
179#define UDC_BCR_MASK (0x3ff)
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186
187#define ofs_UDCCR(ep) (UDCCRn(ep->idx))
188#define ofs_UDCCSR(ep) (UDCCSRn(ep->idx))
189#define ofs_UDCBCR(ep) (UDCBCRn(ep->idx))
190#define ofs_UDCDR(ep) (UDCDRn(ep->idx))
191
192
193#define udc_ep_readl(ep, reg) \
194 __raw_readl((ep)->dev->regs + ofs_##reg(ep))
195#define udc_ep_writel(ep, reg, value) \
196 __raw_writel((value), ep->dev->regs + ofs_##reg(ep))
197#define udc_ep_readb(ep, reg) \
198 __raw_readb((ep)->dev->regs + ofs_##reg(ep))
199#define udc_ep_writeb(ep, reg, value) \
200 __raw_writeb((value), ep->dev->regs + ofs_##reg(ep))
201#define udc_readl(dev, reg) \
202 __raw_readl((dev)->regs + (reg))
203#define udc_writel(udc, reg, value) \
204 __raw_writel((value), (udc)->regs + (reg))
205
206#define UDCCSR_MASK (UDCCSR_FST | UDCCSR_DME)
207#define UDCCISR0_EP_MASK ~0
208#define UDCCISR1_EP_MASK 0xffff
209#define UDCCSR0_CTRL_REQ_MASK (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE)
210
211#define EPIDX(ep) (ep->idx)
212#define EPADDR(ep) (ep->addr)
213#define EPXFERTYPE(ep) (ep->type)
214#define EPNAME(ep) (ep->name)
215#define is_ep0(ep) (!ep->idx)
216#define EPXFERTYPE_is_ISO(ep) (EPXFERTYPE(ep) == USB_ENDPOINT_XFER_ISOC)
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246#define USB_EP_DEF(addr, bname, dir, type, maxpkt) \
247{ .usb_ep = { .name = bname, .ops = &pxa_ep_ops, .maxpacket = maxpkt, }, \
248 .desc = { .bEndpointAddress = addr | (dir ? USB_DIR_IN : 0), \
249 .bmAttributes = type, \
250 .wMaxPacketSize = maxpkt, }, \
251 .dev = &memory \
252}
253#define USB_EP_BULK(addr, bname, dir) \
254 USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_BULK, BULK_FIFO_SIZE)
255#define USB_EP_ISO(addr, bname, dir) \
256 USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_ISOC, ISO_FIFO_SIZE)
257#define USB_EP_INT(addr, bname, dir) \
258 USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_INT, INT_FIFO_SIZE)
259#define USB_EP_IN_BULK(n) USB_EP_BULK(n, "ep" #n "in-bulk", 1)
260#define USB_EP_OUT_BULK(n) USB_EP_BULK(n, "ep" #n "out-bulk", 0)
261#define USB_EP_IN_ISO(n) USB_EP_ISO(n, "ep" #n "in-iso", 1)
262#define USB_EP_OUT_ISO(n) USB_EP_ISO(n, "ep" #n "out-iso", 0)
263#define USB_EP_IN_INT(n) USB_EP_INT(n, "ep" #n "in-int", 1)
264#define USB_EP_CTRL USB_EP_DEF(0, "ep0", 0, 0, EP0_FIFO_SIZE)
265
266#define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \
267{ \
268 .dev = &memory, \
269 .name = "ep" #_idx, \
270 .idx = _idx, .enabled = 0, \
271 .dir_in = dir, .addr = _addr, \
272 .config = _config, .interface = iface, .alternate = altset, \
273 .type = _type, .fifo_size = maxpkt, \
274}
275#define PXA_EP_BULK(_idx, addr, dir, config, iface, alt) \
276 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_BULK, BULK_FIFO_SIZE, \
277 config, iface, alt)
278#define PXA_EP_ISO(_idx, addr, dir, config, iface, alt) \
279 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_ISOC, ISO_FIFO_SIZE, \
280 config, iface, alt)
281#define PXA_EP_INT(_idx, addr, dir, config, iface, alt) \
282 PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_INT, INT_FIFO_SIZE, \
283 config, iface, alt)
284#define PXA_EP_IN_BULK(i, adr, c, f, a) PXA_EP_BULK(i, adr, 1, c, f, a)
285#define PXA_EP_OUT_BULK(i, adr, c, f, a) PXA_EP_BULK(i, adr, 0, c, f, a)
286#define PXA_EP_IN_ISO(i, adr, c, f, a) PXA_EP_ISO(i, adr, 1, c, f, a)
287#define PXA_EP_OUT_ISO(i, adr, c, f, a) PXA_EP_ISO(i, adr, 0, c, f, a)
288#define PXA_EP_IN_INT(i, adr, c, f, a) PXA_EP_INT(i, adr, 1, c, f, a)
289#define PXA_EP_CTRL PXA_EP_DEF(0, 0, 0, 0, EP0_FIFO_SIZE, 0, 0, 0)
290
291struct pxa27x_udc;
292
293struct stats {
294 unsigned long in_ops;
295 unsigned long out_ops;
296 unsigned long in_bytes;
297 unsigned long out_bytes;
298 unsigned long irqs;
299};
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308struct udc_usb_ep {
309 struct usb_ep usb_ep;
310 struct usb_endpoint_descriptor desc;
311 struct pxa_udc *dev;
312 struct pxa_ep *pxa_ep;
313};
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347struct pxa_ep {
348 struct pxa_udc *dev;
349
350 struct list_head queue;
351 spinlock_t lock;
352
353 unsigned enabled:1;
354 unsigned in_handle_ep:1;
355
356 unsigned idx:5;
357 char *name;
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362 unsigned dir_in:1;
363 unsigned addr:4;
364 unsigned config:2;
365 unsigned interface:3;
366 unsigned alternate:3;
367 unsigned fifo_size;
368 unsigned type;
369
370#ifdef CONFIG_PM
371 u32 udccsr_value;
372 u32 udccr_value;
373#endif
374 struct stats stats;
375};
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384struct pxa27x_request {
385 struct usb_request req;
386 struct udc_usb_ep *udc_usb_ep;
387 unsigned in_use:1;
388 struct list_head queue;
389};
390
391enum ep0_state {
392 WAIT_FOR_SETUP,
393 SETUP_STAGE,
394 IN_DATA_STAGE,
395 OUT_DATA_STAGE,
396 IN_STATUS_STAGE,
397 OUT_STATUS_STAGE,
398 STALL,
399 WAIT_ACK_SET_CONF_INTERF
400};
401
402static char *ep0_state_name[] = {
403 "WAIT_FOR_SETUP", "SETUP_STAGE", "IN_DATA_STAGE", "OUT_DATA_STAGE",
404 "IN_STATUS_STAGE", "OUT_STATUS_STAGE", "STALL",
405 "WAIT_ACK_SET_CONF_INTERF"
406};
407#define EP0_STNAME(udc) ep0_state_name[(udc)->ep0state]
408
409#define EP0_FIFO_SIZE 16U
410#define BULK_FIFO_SIZE 64U
411#define ISO_FIFO_SIZE 256U
412#define INT_FIFO_SIZE 16U
413
414struct udc_stats {
415 unsigned long irqs_reset;
416 unsigned long irqs_suspend;
417 unsigned long irqs_resume;
418 unsigned long irqs_reconfig;
419};
420
421#define NR_USB_ENDPOINTS (1 + 5)
422#define NR_PXA_ENDPOINTS (1 + 14)
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450struct pxa_udc {
451 void __iomem *regs;
452 int irq;
453 struct clk *clk;
454
455 struct usb_gadget gadget;
456 struct usb_gadget_driver *driver;
457 struct device *dev;
458 struct pxa2xx_udc_mach_info *mach;
459 struct otg_transceiver *transceiver;
460
461 enum ep0_state ep0state;
462 struct udc_stats stats;
463
464 struct udc_usb_ep udc_usb_ep[NR_USB_ENDPOINTS];
465 struct pxa_ep pxa_ep[NR_PXA_ENDPOINTS];
466
467 unsigned enabled:1;
468 unsigned pullup_on:1;
469 unsigned pullup_resume:1;
470 unsigned vbus_sensed:1;
471 unsigned config:2;
472 unsigned last_interface:3;
473 unsigned last_alternate:3;
474
475#ifdef CONFIG_PM
476 unsigned udccsr0;
477#endif
478#ifdef CONFIG_USB_GADGET_DEBUG_FS
479 struct dentry *debugfs_root;
480 struct dentry *debugfs_state;
481 struct dentry *debugfs_queues;
482 struct dentry *debugfs_eps;
483#endif
484};
485
486static inline struct pxa_udc *to_gadget_udc(struct usb_gadget *gadget)
487{
488 return container_of(gadget, struct pxa_udc, gadget);
489}
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493
494#define ep_dbg(ep, fmt, arg...) \
495 dev_dbg(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg)
496#define ep_vdbg(ep, fmt, arg...) \
497 dev_vdbg(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg)
498#define ep_err(ep, fmt, arg...) \
499 dev_err(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg)
500#define ep_info(ep, fmt, arg...) \
501 dev_info(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg)
502#define ep_warn(ep, fmt, arg...) \
503 dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg)
504
505#endif
506