linux/sound/pci/es1968.c
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   1/*
   2 *  Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
   3 *  Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
   4 *                   Takashi Iwai <tiwai@suse.de>
   5 *                  
   6 *  Most of the driver code comes from Zach Brown(zab@redhat.com)
   7 *      Alan Cox OSS Driver
   8 *  Rewritted from card-es1938.c source.
   9 *
  10 *  TODO:
  11 *   Perhaps Synth
  12 *
  13 *   This program is free software; you can redistribute it and/or modify
  14 *   it under the terms of the GNU General Public License as published by
  15 *   the Free Software Foundation; either version 2 of the License, or
  16 *   (at your option) any later version.
  17 *
  18 *   This program is distributed in the hope that it will be useful,
  19 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 *   GNU General Public License for more details.
  22 *
  23 *   You should have received a copy of the GNU General Public License
  24 *   along with this program; if not, write to the Free Software
  25 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  26 *
  27 *
  28 *  Notes from Zach Brown about the driver code
  29 *
  30 *  Hardware Description
  31 *
  32 *      A working Maestro setup contains the Maestro chip wired to a 
  33 *      codec or 2.  In the Maestro we have the APUs, the ASSP, and the
  34 *      Wavecache.  The APUs can be though of as virtual audio routing
  35 *      channels.  They can take data from a number of sources and perform
  36 *      basic encodings of the data.  The wavecache is a storehouse for
  37 *      PCM data.  Typically it deals with PCI and interracts with the
  38 *      APUs.  The ASSP is a wacky DSP like device that ESS is loth
  39 *      to release docs on.  Thankfully it isn't required on the Maestro
  40 *      until you start doing insane things like FM emulation and surround
  41 *      encoding.  The codecs are almost always AC-97 compliant codecs, 
  42 *      but it appears that early Maestros may have had PT101 (an ESS
  43 *      part?) wired to them.  The only real difference in the Maestro
  44 *      families is external goop like docking capability, memory for
  45 *      the ASSP, and initialization differences.
  46 *
  47 *  Driver Operation
  48 *
  49 *      We only drive the APU/Wavecache as typical DACs and drive the
  50 *      mixers in the codecs.  There are 64 APUs.  We assign 6 to each
  51 *      /dev/dsp? device.  2 channels for output, and 4 channels for
  52 *      input.
  53 *
  54 *      Each APU can do a number of things, but we only really use
  55 *      3 basic functions.  For playback we use them to convert PCM
  56 *      data fetched over PCI by the wavecahche into analog data that
  57 *      is handed to the codec.  One APU for mono, and a pair for stereo.
  58 *      When in stereo, the combination of smarts in the APU and Wavecache
  59 *      decide which wavecache gets the left or right channel.
  60 *
  61 *      For record we still use the old overly mono system.  For each in
  62 *      coming channel the data comes in from the codec, through a 'input'
  63 *      APU, through another rate converter APU, and then into memory via
  64 *      the wavecache and PCI.  If its stereo, we mash it back into LRLR in
  65 *      software.  The pass between the 2 APUs is supposedly what requires us
  66 *      to have a 512 byte buffer sitting around in wavecache/memory.
  67 *
  68 *      The wavecache makes our life even more fun.  First off, it can
  69 *      only address the first 28 bits of PCI address space, making it
  70 *      useless on quite a few architectures.  Secondly, its insane.
  71 *      It claims to fetch from 4 regions of PCI space, each 4 meg in length.
  72 *      But that doesn't really work.  You can only use 1 region.  So all our
  73 *      allocations have to be in 4meg of each other.  Booo.  Hiss.
  74 *      So we have a module parameter, dsps_order, that is the order of
  75 *      the number of dsps to provide.  All their buffer space is allocated
  76 *      on open time.  The sonicvibes OSS routines we inherited really want
  77 *      power of 2 buffers, so we have all those next to each other, then
  78 *      512 byte regions for the recording wavecaches.  This ends up
  79 *      wasting quite a bit of memory.  The only fixes I can see would be 
  80 *      getting a kernel allocator that could work in zones, or figuring out
  81 *      just how to coerce the WP into doing what we want.
  82 *
  83 *      The indirection of the various registers means we have to spinlock
  84 *      nearly all register accesses.  We have the main register indirection
  85 *      like the wave cache, maestro registers, etc.  Then we have beasts
  86 *      like the APU interface that is indirect registers gotten at through
  87 *      the main maestro indirection.  Ouch.  We spinlock around the actual
  88 *      ports on a per card basis.  This means spinlock activity at each IO
  89 *      operation, but the only IO operation clusters are in non critical 
  90 *      paths and it makes the code far easier to follow.  Interrupts are
  91 *      blocked while holding the locks because the int handler has to
  92 *      get at some of them :(.  The mixer interface doesn't, however.
  93 *      We also have an OSS state lock that is thrown around in a few
  94 *      places.
  95 */
  96
  97#include <asm/io.h>
  98#include <linux/delay.h>
  99#include <linux/interrupt.h>
 100#include <linux/init.h>
 101#include <linux/pci.h>
 102#include <linux/dma-mapping.h>
 103#include <linux/slab.h>
 104#include <linux/gameport.h>
 105#include <linux/moduleparam.h>
 106#include <linux/mutex.h>
 107#include <linux/input.h>
 108
 109#include <sound/core.h>
 110#include <sound/pcm.h>
 111#include <sound/mpu401.h>
 112#include <sound/ac97_codec.h>
 113#include <sound/initval.h>
 114
 115#ifdef CONFIG_SND_ES1968_RADIO
 116#include <sound/tea575x-tuner.h>
 117#endif
 118
 119#define CARD_NAME "ESS Maestro1/2"
 120#define DRIVER_NAME "ES1968"
 121
 122MODULE_DESCRIPTION("ESS Maestro");
 123MODULE_LICENSE("GPL");
 124MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
 125                "{ESS,Maestro 2},"
 126                "{ESS,Maestro 1},"
 127                "{TerraTec,DMX}}");
 128
 129#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 130#define SUPPORT_JOYSTICK 1
 131#endif
 132
 133static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 1-MAX */
 134static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 135static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 136static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
 137static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
 138static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
 139static int clock[SNDRV_CARDS];
 140static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 141static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
 142#ifdef SUPPORT_JOYSTICK
 143static int joystick[SNDRV_CARDS];
 144#endif
 145
 146module_param_array(index, int, NULL, 0444);
 147MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
 148module_param_array(id, charp, NULL, 0444);
 149MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
 150module_param_array(enable, bool, NULL, 0444);
 151MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
 152module_param_array(total_bufsize, int, NULL, 0444);
 153MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");
 154module_param_array(pcm_substreams_p, int, NULL, 0444);
 155MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");
 156module_param_array(pcm_substreams_c, int, NULL, 0444);
 157MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");
 158module_param_array(clock, int, NULL, 0444);
 159MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard.  (0 = auto-detect)");
 160module_param_array(use_pm, int, NULL, 0444);
 161MODULE_PARM_DESC(use_pm, "Toggle power-management.  (0 = off, 1 = on, 2 = auto)");
 162module_param_array(enable_mpu, int, NULL, 0444);
 163MODULE_PARM_DESC(enable_mpu, "Enable MPU401.  (0 = off, 1 = on, 2 = auto)");
 164#ifdef SUPPORT_JOYSTICK
 165module_param_array(joystick, bool, NULL, 0444);
 166MODULE_PARM_DESC(joystick, "Enable joystick.");
 167#endif
 168
 169
 170#define NR_APUS                 64
 171#define NR_APU_REGS             16
 172
 173/* NEC Versas ? */
 174#define NEC_VERSA_SUBID1        0x80581033
 175#define NEC_VERSA_SUBID2        0x803c1033
 176
 177/* Mode Flags */
 178#define ESS_FMT_STEREO          0x01
 179#define ESS_FMT_16BIT           0x02
 180
 181#define DAC_RUNNING             1
 182#define ADC_RUNNING             2
 183
 184/* Values for the ESM_LEGACY_AUDIO_CONTROL */
 185
 186#define ESS_DISABLE_AUDIO       0x8000
 187#define ESS_ENABLE_SERIAL_IRQ   0x4000
 188#define IO_ADRESS_ALIAS         0x0020
 189#define MPU401_IRQ_ENABLE       0x0010
 190#define MPU401_IO_ENABLE        0x0008
 191#define GAME_IO_ENABLE          0x0004
 192#define FM_IO_ENABLE            0x0002
 193#define SB_IO_ENABLE            0x0001
 194
 195/* Values for the ESM_CONFIG_A */
 196
 197#define PIC_SNOOP1              0x4000
 198#define PIC_SNOOP2              0x2000
 199#define SAFEGUARD               0x0800
 200#define DMA_CLEAR               0x0700
 201#define DMA_DDMA                0x0000
 202#define DMA_TDMA                0x0100
 203#define DMA_PCPCI               0x0200
 204#define POST_WRITE              0x0080
 205#define PCI_TIMING              0x0040
 206#define SWAP_LR                 0x0020
 207#define SUBTR_DECODE            0x0002
 208
 209/* Values for the ESM_CONFIG_B */
 210
 211#define SPDIF_CONFB             0x0100
 212#define HWV_CONFB               0x0080
 213#define DEBOUNCE                0x0040
 214#define GPIO_CONFB              0x0020
 215#define CHI_CONFB               0x0010
 216#define IDMA_CONFB              0x0008  /*undoc */
 217#define MIDI_FIX                0x0004  /*undoc */
 218#define IRQ_TO_ISA              0x0001  /*undoc */
 219
 220/* Values for Ring Bus Control B */
 221#define RINGB_2CODEC_ID_MASK    0x0003
 222#define RINGB_DIS_VALIDATION    0x0008
 223#define RINGB_EN_SPDIF          0x0010
 224#define RINGB_EN_2CODEC         0x0020
 225#define RINGB_SING_BIT_DUAL     0x0040
 226
 227/* ****Port Addresses**** */
 228
 229/*   Write & Read */
 230#define ESM_INDEX               0x02
 231#define ESM_DATA                0x00
 232
 233/*   AC97 + RingBus */
 234#define ESM_AC97_INDEX          0x30
 235#define ESM_AC97_DATA           0x32
 236#define ESM_RING_BUS_DEST       0x34
 237#define ESM_RING_BUS_CONTR_A    0x36
 238#define ESM_RING_BUS_CONTR_B    0x38
 239#define ESM_RING_BUS_SDO        0x3A
 240
 241/*   WaveCache*/
 242#define WC_INDEX                0x10
 243#define WC_DATA                 0x12
 244#define WC_CONTROL              0x14
 245
 246/*   ASSP*/
 247#define ASSP_INDEX              0x80
 248#define ASSP_MEMORY             0x82
 249#define ASSP_DATA               0x84
 250#define ASSP_CONTROL_A          0xA2
 251#define ASSP_CONTROL_B          0xA4
 252#define ASSP_CONTROL_C          0xA6
 253#define ASSP_HOSTW_INDEX        0xA8
 254#define ASSP_HOSTW_DATA         0xAA
 255#define ASSP_HOSTW_IRQ          0xAC
 256/* Midi */
 257#define ESM_MPU401_PORT         0x98
 258/* Others */
 259#define ESM_PORT_HOST_IRQ       0x18
 260
 261#define IDR0_DATA_PORT          0x00
 262#define IDR1_CRAM_POINTER       0x01
 263#define IDR2_CRAM_DATA          0x02
 264#define IDR3_WAVE_DATA          0x03
 265#define IDR4_WAVE_PTR_LOW       0x04
 266#define IDR5_WAVE_PTR_HI        0x05
 267#define IDR6_TIMER_CTRL         0x06
 268#define IDR7_WAVE_ROMRAM        0x07
 269
 270#define WRITEABLE_MAP           0xEFFFFF
 271#define READABLE_MAP            0x64003F
 272
 273/* PCI Register */
 274
 275#define ESM_LEGACY_AUDIO_CONTROL 0x40
 276#define ESM_ACPI_COMMAND        0x54
 277#define ESM_CONFIG_A            0x50
 278#define ESM_CONFIG_B            0x52
 279#define ESM_DDMA                0x60
 280
 281/* Bob Bits */
 282#define ESM_BOB_ENABLE          0x0001
 283#define ESM_BOB_START           0x0001
 284
 285/* Host IRQ Control Bits */
 286#define ESM_RESET_MAESTRO       0x8000
 287#define ESM_RESET_DIRECTSOUND   0x4000
 288#define ESM_HIRQ_ClkRun         0x0100
 289#define ESM_HIRQ_HW_VOLUME      0x0040
 290#define ESM_HIRQ_HARPO          0x0030  /* What's that? */
 291#define ESM_HIRQ_ASSP           0x0010
 292#define ESM_HIRQ_DSIE           0x0004
 293#define ESM_HIRQ_MPU401         0x0002
 294#define ESM_HIRQ_SB             0x0001
 295
 296/* Host IRQ Status Bits */
 297#define ESM_MPU401_IRQ          0x02
 298#define ESM_SB_IRQ              0x01
 299#define ESM_SOUND_IRQ           0x04
 300#define ESM_ASSP_IRQ            0x10
 301#define ESM_HWVOL_IRQ           0x40
 302
 303#define ESS_SYSCLK              50000000
 304#define ESM_BOB_FREQ            200
 305#define ESM_BOB_FREQ_MAX        800
 306
 307#define ESM_FREQ_ESM1           (49152000L / 1024L)     /* default rate 48000 */
 308#define ESM_FREQ_ESM2           (50000000L / 1024L)
 309
 310/* APU Modes: reg 0x00, bit 4-7 */
 311#define ESM_APU_MODE_SHIFT      4
 312#define ESM_APU_MODE_MASK       (0xf << 4)
 313#define ESM_APU_OFF             0x00
 314#define ESM_APU_16BITLINEAR     0x01    /* 16-Bit Linear Sample Player */
 315#define ESM_APU_16BITSTEREO     0x02    /* 16-Bit Stereo Sample Player */
 316#define ESM_APU_8BITLINEAR      0x03    /* 8-Bit Linear Sample Player */
 317#define ESM_APU_8BITSTEREO      0x04    /* 8-Bit Stereo Sample Player */
 318#define ESM_APU_8BITDIFF        0x05    /* 8-Bit Differential Sample Playrer */
 319#define ESM_APU_DIGITALDELAY    0x06    /* Digital Delay Line */
 320#define ESM_APU_DUALTAP         0x07    /* Dual Tap Reader */
 321#define ESM_APU_CORRELATOR      0x08    /* Correlator */
 322#define ESM_APU_INPUTMIXER      0x09    /* Input Mixer */
 323#define ESM_APU_WAVETABLE       0x0A    /* Wave Table Mode */
 324#define ESM_APU_SRCONVERTOR     0x0B    /* Sample Rate Convertor */
 325#define ESM_APU_16BITPINGPONG   0x0C    /* 16-Bit Ping-Pong Sample Player */
 326#define ESM_APU_RESERVED1       0x0D    /* Reserved 1 */
 327#define ESM_APU_RESERVED2       0x0E    /* Reserved 2 */
 328#define ESM_APU_RESERVED3       0x0F    /* Reserved 3 */
 329
 330/* reg 0x00 */
 331#define ESM_APU_FILTER_Q_SHIFT          0
 332#define ESM_APU_FILTER_Q_MASK           (3 << 0)
 333/* APU Filtey Q Control */
 334#define ESM_APU_FILTER_LESSQ    0x00
 335#define ESM_APU_FILTER_MOREQ    0x03
 336
 337#define ESM_APU_FILTER_TYPE_SHIFT       2
 338#define ESM_APU_FILTER_TYPE_MASK        (3 << 2)
 339#define ESM_APU_ENV_TYPE_SHIFT          8
 340#define ESM_APU_ENV_TYPE_MASK           (3 << 8)
 341#define ESM_APU_ENV_STATE_SHIFT         10
 342#define ESM_APU_ENV_STATE_MASK          (3 << 10)
 343#define ESM_APU_END_CURVE               (1 << 12)
 344#define ESM_APU_INT_ON_LOOP             (1 << 13)
 345#define ESM_APU_DMA_ENABLE              (1 << 14)
 346
 347/* reg 0x02 */
 348#define ESM_APU_SUBMIX_GROUP_SHIRT      0
 349#define ESM_APU_SUBMIX_GROUP_MASK       (7 << 0)
 350#define ESM_APU_SUBMIX_MODE             (1 << 3)
 351#define ESM_APU_6dB                     (1 << 4)
 352#define ESM_APU_DUAL_EFFECT             (1 << 5)
 353#define ESM_APU_EFFECT_CHANNELS_SHIFT   6
 354#define ESM_APU_EFFECT_CHANNELS_MASK    (3 << 6)
 355
 356/* reg 0x03 */
 357#define ESM_APU_STEP_SIZE_MASK          0x0fff
 358
 359/* reg 0x04 */
 360#define ESM_APU_PHASE_SHIFT             0
 361#define ESM_APU_PHASE_MASK              (0xff << 0)
 362#define ESM_APU_WAVE64K_PAGE_SHIFT      8       /* most 8bit of wave start offset */
 363#define ESM_APU_WAVE64K_PAGE_MASK       (0xff << 8)
 364
 365/* reg 0x05 - wave start offset */
 366/* reg 0x06 - wave end offset */
 367/* reg 0x07 - wave loop length */
 368
 369/* reg 0x08 */
 370#define ESM_APU_EFFECT_GAIN_SHIFT       0
 371#define ESM_APU_EFFECT_GAIN_MASK        (0xff << 0)
 372#define ESM_APU_TREMOLO_DEPTH_SHIFT     8
 373#define ESM_APU_TREMOLO_DEPTH_MASK      (0xf << 8)
 374#define ESM_APU_TREMOLO_RATE_SHIFT      12
 375#define ESM_APU_TREMOLO_RATE_MASK       (0xf << 12)
 376
 377/* reg 0x09 */
 378/* bit 0-7 amplitude dest? */
 379#define ESM_APU_AMPLITUDE_NOW_SHIFT     8
 380#define ESM_APU_AMPLITUDE_NOW_MASK      (0xff << 8)
 381
 382/* reg 0x0a */
 383#define ESM_APU_POLAR_PAN_SHIFT         0
 384#define ESM_APU_POLAR_PAN_MASK          (0x3f << 0)
 385/* Polar Pan Control */
 386#define ESM_APU_PAN_CENTER_CIRCLE               0x00
 387#define ESM_APU_PAN_MIDDLE_RADIUS               0x01
 388#define ESM_APU_PAN_OUTSIDE_RADIUS              0x02
 389
 390#define ESM_APU_FILTER_TUNING_SHIFT     8
 391#define ESM_APU_FILTER_TUNING_MASK      (0xff << 8)
 392
 393/* reg 0x0b */
 394#define ESM_APU_DATA_SRC_A_SHIFT        0
 395#define ESM_APU_DATA_SRC_A_MASK         (0x7f << 0)
 396#define ESM_APU_INV_POL_A               (1 << 7)
 397#define ESM_APU_DATA_SRC_B_SHIFT        8
 398#define ESM_APU_DATA_SRC_B_MASK         (0x7f << 8)
 399#define ESM_APU_INV_POL_B               (1 << 15)
 400
 401#define ESM_APU_VIBRATO_RATE_SHIFT      0
 402#define ESM_APU_VIBRATO_RATE_MASK       (0xf << 0)
 403#define ESM_APU_VIBRATO_DEPTH_SHIFT     4
 404#define ESM_APU_VIBRATO_DEPTH_MASK      (0xf << 4)
 405#define ESM_APU_VIBRATO_PHASE_SHIFT     8
 406#define ESM_APU_VIBRATO_PHASE_MASK      (0xff << 8)
 407
 408/* reg 0x0c */
 409#define ESM_APU_RADIUS_SELECT           (1 << 6)
 410
 411/* APU Filter Control */
 412#define ESM_APU_FILTER_2POLE_LOPASS     0x00
 413#define ESM_APU_FILTER_2POLE_BANDPASS   0x01
 414#define ESM_APU_FILTER_2POLE_HIPASS     0x02
 415#define ESM_APU_FILTER_1POLE_LOPASS     0x03
 416#define ESM_APU_FILTER_1POLE_HIPASS     0x04
 417#define ESM_APU_FILTER_OFF              0x05
 418
 419/* APU ATFP Type */
 420#define ESM_APU_ATFP_AMPLITUDE                  0x00
 421#define ESM_APU_ATFP_TREMELO                    0x01
 422#define ESM_APU_ATFP_FILTER                     0x02
 423#define ESM_APU_ATFP_PAN                        0x03
 424
 425/* APU ATFP Flags */
 426#define ESM_APU_ATFP_FLG_OFF                    0x00
 427#define ESM_APU_ATFP_FLG_WAIT                   0x01
 428#define ESM_APU_ATFP_FLG_DONE                   0x02
 429#define ESM_APU_ATFP_FLG_INPROCESS              0x03
 430
 431
 432/* capture mixing buffer size */
 433#define ESM_MEM_ALIGN           0x1000
 434#define ESM_MIXBUF_SIZE         0x400
 435
 436#define ESM_MODE_PLAY           0
 437#define ESM_MODE_CAPTURE        1
 438
 439
 440/* APU use in the driver */
 441enum snd_enum_apu_type {
 442        ESM_APU_PCM_PLAY,
 443        ESM_APU_PCM_CAPTURE,
 444        ESM_APU_PCM_RATECONV,
 445        ESM_APU_FREE
 446};
 447
 448/* chip type */
 449enum {
 450        TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E
 451};
 452
 453/* DMA Hack! */
 454struct esm_memory {
 455        struct snd_dma_buffer buf;
 456        int empty;      /* status */
 457        struct list_head list;
 458};
 459
 460/* Playback Channel */
 461struct esschan {
 462        int running;
 463
 464        u8 apu[4];
 465        u8 apu_mode[4];
 466
 467        /* playback/capture pcm buffer */
 468        struct esm_memory *memory;
 469        /* capture mixer buffer */
 470        struct esm_memory *mixbuf;
 471
 472        unsigned int hwptr;     /* current hw pointer in bytes */
 473        unsigned int count;     /* sample counter in bytes */
 474        unsigned int dma_size;  /* total buffer size in bytes */
 475        unsigned int frag_size; /* period size in bytes */
 476        unsigned int wav_shift;
 477        u16 base[4];            /* offset for ptr */
 478
 479        /* stereo/16bit flag */
 480        unsigned char fmt;
 481        int mode;       /* playback / capture */
 482
 483        int bob_freq;   /* required timer frequency */
 484
 485        struct snd_pcm_substream *substream;
 486
 487        /* linked list */
 488        struct list_head list;
 489
 490#ifdef CONFIG_PM
 491        u16 wc_map[4];
 492#endif
 493};
 494
 495struct es1968 {
 496        /* Module Config */
 497        int total_bufsize;                      /* in bytes */
 498
 499        int playback_streams, capture_streams;
 500
 501        unsigned int clock;             /* clock */
 502        /* for clock measurement */
 503        unsigned int in_measurement: 1;
 504        unsigned int measure_apu;
 505        unsigned int measure_lastpos;
 506        unsigned int measure_count;
 507
 508        /* buffer */
 509        struct snd_dma_buffer dma;
 510
 511        /* Resources... */
 512        int irq;
 513        unsigned long io_port;
 514        int type;
 515        struct pci_dev *pci;
 516        struct snd_card *card;
 517        struct snd_pcm *pcm;
 518        int do_pm;              /* power-management enabled */
 519
 520        /* DMA memory block */
 521        struct list_head buf_list;
 522
 523        /* ALSA Stuff */
 524        struct snd_ac97 *ac97;
 525        struct snd_rawmidi *rmidi;
 526
 527        spinlock_t reg_lock;
 528        unsigned int in_suspend;
 529
 530        /* Maestro Stuff */
 531        u16 maestro_map[32];
 532        int bobclient;          /* active timer instancs */
 533        int bob_freq;           /* timer frequency */
 534        struct mutex memory_mutex;      /* memory lock */
 535
 536        /* APU states */
 537        unsigned char apu[NR_APUS];
 538
 539        /* active substreams */
 540        struct list_head substream_list;
 541        spinlock_t substream_lock;
 542
 543#ifdef CONFIG_PM
 544        u16 apu_map[NR_APUS][NR_APU_REGS];
 545#endif
 546
 547#ifdef SUPPORT_JOYSTICK
 548        struct gameport *gameport;
 549#endif
 550
 551#ifdef CONFIG_SND_ES1968_INPUT
 552        struct input_dev *input_dev;
 553        char phys[64];                  /* physical device path */
 554#else
 555        struct snd_kcontrol *master_switch; /* for h/w volume control */
 556        struct snd_kcontrol *master_volume;
 557        spinlock_t ac97_lock;
 558        struct tasklet_struct hwvol_tq;
 559#endif
 560
 561#ifdef CONFIG_SND_ES1968_RADIO
 562        struct snd_tea575x tea;
 563#endif
 564};
 565
 566static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);
 567
 568static DEFINE_PCI_DEVICE_TABLE(snd_es1968_ids) = {
 569        /* Maestro 1 */
 570        { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
 571        /* Maestro 2 */
 572        { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },
 573        /* Maestro 2E */
 574        { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },
 575        { 0, }
 576};
 577
 578MODULE_DEVICE_TABLE(pci, snd_es1968_ids);
 579
 580/* *********************
 581   * Low Level Funcs!  *
 582   *********************/
 583
 584/* no spinlock */
 585static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)
 586{
 587        outw(reg, chip->io_port + ESM_INDEX);
 588        outw(data, chip->io_port + ESM_DATA);
 589        chip->maestro_map[reg] = data;
 590}
 591
 592static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)
 593{
 594        unsigned long flags;
 595        spin_lock_irqsave(&chip->reg_lock, flags);
 596        __maestro_write(chip, reg, data);
 597        spin_unlock_irqrestore(&chip->reg_lock, flags);
 598}
 599
 600/* no spinlock */
 601static u16 __maestro_read(struct es1968 *chip, u16 reg)
 602{
 603        if (READABLE_MAP & (1 << reg)) {
 604                outw(reg, chip->io_port + ESM_INDEX);
 605                chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);
 606        }
 607        return chip->maestro_map[reg];
 608}
 609
 610static inline u16 maestro_read(struct es1968 *chip, u16 reg)
 611{
 612        unsigned long flags;
 613        u16 result;
 614        spin_lock_irqsave(&chip->reg_lock, flags);
 615        result = __maestro_read(chip, reg);
 616        spin_unlock_irqrestore(&chip->reg_lock, flags);
 617        return result;
 618}
 619
 620/* Wait for the codec bus to be free */
 621static int snd_es1968_ac97_wait(struct es1968 *chip)
 622{
 623        int timeout = 100000;
 624
 625        while (timeout-- > 0) {
 626                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 627                        return 0;
 628                cond_resched();
 629        }
 630        snd_printd("es1968: ac97 timeout\n");
 631        return 1; /* timeout */
 632}
 633
 634static int snd_es1968_ac97_wait_poll(struct es1968 *chip)
 635{
 636        int timeout = 100000;
 637
 638        while (timeout-- > 0) {
 639                if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
 640                        return 0;
 641        }
 642        snd_printd("es1968: ac97 timeout\n");
 643        return 1; /* timeout */
 644}
 645
 646static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
 647{
 648        struct es1968 *chip = ac97->private_data;
 649#ifndef CONFIG_SND_ES1968_INPUT
 650        unsigned long flags;
 651#endif
 652
 653        snd_es1968_ac97_wait(chip);
 654
 655        /* Write the bus */
 656#ifndef CONFIG_SND_ES1968_INPUT
 657        spin_lock_irqsave(&chip->ac97_lock, flags);
 658#endif
 659        outw(val, chip->io_port + ESM_AC97_DATA);
 660        /*msleep(1);*/
 661        outb(reg, chip->io_port + ESM_AC97_INDEX);
 662        /*msleep(1);*/
 663#ifndef CONFIG_SND_ES1968_INPUT
 664        spin_unlock_irqrestore(&chip->ac97_lock, flags);
 665#endif
 666}
 667
 668static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
 669{
 670        u16 data = 0;
 671        struct es1968 *chip = ac97->private_data;
 672#ifndef CONFIG_SND_ES1968_INPUT
 673        unsigned long flags;
 674#endif
 675
 676        snd_es1968_ac97_wait(chip);
 677
 678#ifndef CONFIG_SND_ES1968_INPUT
 679        spin_lock_irqsave(&chip->ac97_lock, flags);
 680#endif
 681        outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);
 682        /*msleep(1);*/
 683
 684        if (!snd_es1968_ac97_wait_poll(chip)) {
 685                data = inw(chip->io_port + ESM_AC97_DATA);
 686                /*msleep(1);*/
 687        }
 688#ifndef CONFIG_SND_ES1968_INPUT
 689        spin_unlock_irqrestore(&chip->ac97_lock, flags);
 690#endif
 691
 692        return data;
 693}
 694
 695/* no spinlock */
 696static void apu_index_set(struct es1968 *chip, u16 index)
 697{
 698        int i;
 699        __maestro_write(chip, IDR1_CRAM_POINTER, index);
 700        for (i = 0; i < 1000; i++)
 701                if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)
 702                        return;
 703        snd_printd("es1968: APU register select failed. (Timeout)\n");
 704}
 705
 706/* no spinlock */
 707static void apu_data_set(struct es1968 *chip, u16 data)
 708{
 709        int i;
 710        for (i = 0; i < 1000; i++) {
 711                if (__maestro_read(chip, IDR0_DATA_PORT) == data)
 712                        return;
 713                __maestro_write(chip, IDR0_DATA_PORT, data);
 714        }
 715        snd_printd("es1968: APU register set probably failed (Timeout)!\n");
 716}
 717
 718/* no spinlock */
 719static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 720{
 721        if (snd_BUG_ON(channel >= NR_APUS))
 722                return;
 723#ifdef CONFIG_PM
 724        chip->apu_map[channel][reg] = data;
 725#endif
 726        reg |= (channel << 4);
 727        apu_index_set(chip, reg);
 728        apu_data_set(chip, data);
 729}
 730
 731static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
 732{
 733        unsigned long flags;
 734        spin_lock_irqsave(&chip->reg_lock, flags);
 735        __apu_set_register(chip, channel, reg, data);
 736        spin_unlock_irqrestore(&chip->reg_lock, flags);
 737}
 738
 739static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 740{
 741        if (snd_BUG_ON(channel >= NR_APUS))
 742                return 0;
 743        reg |= (channel << 4);
 744        apu_index_set(chip, reg);
 745        return __maestro_read(chip, IDR0_DATA_PORT);
 746}
 747
 748static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
 749{
 750        unsigned long flags;
 751        u16 v;
 752        spin_lock_irqsave(&chip->reg_lock, flags);
 753        v = __apu_get_register(chip, channel, reg);
 754        spin_unlock_irqrestore(&chip->reg_lock, flags);
 755        return v;
 756}
 757
 758#if 0 /* ASSP is not supported */
 759
 760static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)
 761{
 762        unsigned long flags;
 763
 764        spin_lock_irqsave(&chip->reg_lock, flags);
 765        outl(reg, chip->io_port + ASSP_INDEX);
 766        outl(value, chip->io_port + ASSP_DATA);
 767        spin_unlock_irqrestore(&chip->reg_lock, flags);
 768}
 769
 770static u32 assp_get_register(struct es1968 *chip, u32 reg)
 771{
 772        unsigned long flags;
 773        u32 value;
 774
 775        spin_lock_irqsave(&chip->reg_lock, flags);
 776        outl(reg, chip->io_port + ASSP_INDEX);
 777        value = inl(chip->io_port + ASSP_DATA);
 778        spin_unlock_irqrestore(&chip->reg_lock, flags);
 779
 780        return value;
 781}
 782
 783#endif
 784
 785static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)
 786{
 787        unsigned long flags;
 788
 789        spin_lock_irqsave(&chip->reg_lock, flags);
 790        outw(reg, chip->io_port + WC_INDEX);
 791        outw(value, chip->io_port + WC_DATA);
 792        spin_unlock_irqrestore(&chip->reg_lock, flags);
 793}
 794
 795static u16 wave_get_register(struct es1968 *chip, u16 reg)
 796{
 797        unsigned long flags;
 798        u16 value;
 799
 800        spin_lock_irqsave(&chip->reg_lock, flags);
 801        outw(reg, chip->io_port + WC_INDEX);
 802        value = inw(chip->io_port + WC_DATA);
 803        spin_unlock_irqrestore(&chip->reg_lock, flags);
 804
 805        return value;
 806}
 807
 808/* *******************
 809   * Bob the Timer!  *
 810   *******************/
 811
 812static void snd_es1968_bob_stop(struct es1968 *chip)
 813{
 814        u16 reg;
 815
 816        reg = __maestro_read(chip, 0x11);
 817        reg &= ~ESM_BOB_ENABLE;
 818        __maestro_write(chip, 0x11, reg);
 819        reg = __maestro_read(chip, 0x17);
 820        reg &= ~ESM_BOB_START;
 821        __maestro_write(chip, 0x17, reg);
 822}
 823
 824static void snd_es1968_bob_start(struct es1968 *chip)
 825{
 826        int prescale;
 827        int divide;
 828
 829        /* compute ideal interrupt frequency for buffer size & play rate */
 830        /* first, find best prescaler value to match freq */
 831        for (prescale = 5; prescale < 12; prescale++)
 832                if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))
 833                        break;
 834
 835        /* next, back off prescaler whilst getting divider into optimum range */
 836        divide = 1;
 837        while ((prescale > 5) && (divide < 32)) {
 838                prescale--;
 839                divide <<= 1;
 840        }
 841        divide >>= 1;
 842
 843        /* now fine-tune the divider for best match */
 844        for (; divide < 31; divide++)
 845                if (chip->bob_freq >
 846                    ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;
 847
 848        /* divide = 0 is illegal, but don't let prescale = 4! */
 849        if (divide == 0) {
 850                divide++;
 851                if (prescale > 5)
 852                        prescale--;
 853        } else if (divide > 1)
 854                divide--;
 855
 856        __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide);    /* set reg */
 857
 858        /* Now set IDR 11/17 */
 859        __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);
 860        __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);
 861}
 862
 863/* call with substream spinlock */
 864static void snd_es1968_bob_inc(struct es1968 *chip, int freq)
 865{
 866        chip->bobclient++;
 867        if (chip->bobclient == 1) {
 868                chip->bob_freq = freq;
 869                snd_es1968_bob_start(chip);
 870        } else if (chip->bob_freq < freq) {
 871                snd_es1968_bob_stop(chip);
 872                chip->bob_freq = freq;
 873                snd_es1968_bob_start(chip);
 874        }
 875}
 876
 877/* call with substream spinlock */
 878static void snd_es1968_bob_dec(struct es1968 *chip)
 879{
 880        chip->bobclient--;
 881        if (chip->bobclient <= 0)
 882                snd_es1968_bob_stop(chip);
 883        else if (chip->bob_freq > ESM_BOB_FREQ) {
 884                /* check reduction of timer frequency */
 885                int max_freq = ESM_BOB_FREQ;
 886                struct esschan *es;
 887                list_for_each_entry(es, &chip->substream_list, list) {
 888                        if (max_freq < es->bob_freq)
 889                                max_freq = es->bob_freq;
 890                }
 891                if (max_freq != chip->bob_freq) {
 892                        snd_es1968_bob_stop(chip);
 893                        chip->bob_freq = max_freq;
 894                        snd_es1968_bob_start(chip);
 895                }
 896        }
 897}
 898
 899static int
 900snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,
 901                         struct snd_pcm_runtime *runtime)
 902{
 903        /* we acquire 4 interrupts per period for precise control.. */
 904        int freq = runtime->rate * 4;
 905        if (es->fmt & ESS_FMT_STEREO)
 906                freq <<= 1;
 907        if (es->fmt & ESS_FMT_16BIT)
 908                freq <<= 1;
 909        freq /= es->frag_size;
 910        if (freq < ESM_BOB_FREQ)
 911                freq = ESM_BOB_FREQ;
 912        else if (freq > ESM_BOB_FREQ_MAX)
 913                freq = ESM_BOB_FREQ_MAX;
 914        return freq;
 915}
 916
 917
 918/*************
 919 *  PCM Part *
 920 *************/
 921
 922static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)
 923{
 924        u32 rate = (freq << 16) / chip->clock;
 925#if 0 /* XXX: do we need this? */ 
 926        if (rate > 0x10000)
 927                rate = 0x10000;
 928#endif
 929        return rate;
 930}
 931
 932/* get current pointer */
 933static inline unsigned int
 934snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)
 935{
 936        unsigned int offset;
 937
 938        offset = apu_get_register(chip, es->apu[0], 5);
 939
 940        offset -= es->base[0];
 941
 942        return (offset & 0xFFFE);       /* hardware is in words */
 943}
 944
 945static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)
 946{
 947        apu_set_register(chip, apu, 2,
 948                           (apu_get_register(chip, apu, 2) & 0x00FF) |
 949                           ((freq & 0xff) << 8) | 0x10);
 950        apu_set_register(chip, apu, 3, freq >> 8);
 951}
 952
 953/* spin lock held */
 954static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)
 955{
 956        /* set the APU mode */
 957        __apu_set_register(esm, apu, 0,
 958                           (__apu_get_register(esm, apu, 0) & 0xff0f) |
 959                           (mode << 4));
 960}
 961
 962static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)
 963{
 964        spin_lock(&chip->reg_lock);
 965        __apu_set_register(chip, es->apu[0], 5, es->base[0]);
 966        snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);
 967        if (es->mode == ESM_MODE_CAPTURE) {
 968                __apu_set_register(chip, es->apu[2], 5, es->base[2]);
 969                snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);
 970        }
 971        if (es->fmt & ESS_FMT_STEREO) {
 972                __apu_set_register(chip, es->apu[1], 5, es->base[1]);
 973                snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);
 974                if (es->mode == ESM_MODE_CAPTURE) {
 975                        __apu_set_register(chip, es->apu[3], 5, es->base[3]);
 976                        snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);
 977                }
 978        }
 979        spin_unlock(&chip->reg_lock);
 980}
 981
 982static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)
 983{
 984        spin_lock(&chip->reg_lock);
 985        snd_es1968_trigger_apu(chip, es->apu[0], 0);
 986        snd_es1968_trigger_apu(chip, es->apu[1], 0);
 987        if (es->mode == ESM_MODE_CAPTURE) {
 988                snd_es1968_trigger_apu(chip, es->apu[2], 0);
 989                snd_es1968_trigger_apu(chip, es->apu[3], 0);
 990        }
 991        spin_unlock(&chip->reg_lock);
 992}
 993
 994/* set the wavecache control reg */
 995static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,
 996                                         int channel, u32 addr, int capture)
 997{
 998        u32 tmpval = (addr - 0x10) & 0xFFF8;
 999
1000        if (! capture) {
1001                if (!(es->fmt & ESS_FMT_16BIT))
1002                        tmpval |= 4;    /* 8bit */
1003                if (es->fmt & ESS_FMT_STEREO)
1004                        tmpval |= 2;    /* stereo */
1005        }
1006
1007        /* set the wavecache control reg */
1008        wave_set_register(chip, es->apu[channel] << 3, tmpval);
1009
1010#ifdef CONFIG_PM
1011        es->wc_map[channel] = tmpval;
1012#endif
1013}
1014
1015
1016static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,
1017                                      struct snd_pcm_runtime *runtime)
1018{
1019        u32 pa;
1020        int high_apu = 0;
1021        int channel, apu;
1022        int i, size;
1023        unsigned long flags;
1024        u32 freq;
1025
1026        size = es->dma_size >> es->wav_shift;
1027
1028        if (es->fmt & ESS_FMT_STEREO)
1029                high_apu++;
1030
1031        for (channel = 0; channel <= high_apu; channel++) {
1032                apu = es->apu[channel];
1033
1034                snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);
1035
1036                /* Offset to PCMBAR */
1037                pa = es->memory->buf.addr;
1038                pa -= chip->dma.addr;
1039                pa >>= 1;       /* words */
1040
1041                pa |= 0x00400000;       /* System RAM (Bit 22) */
1042
1043                if (es->fmt & ESS_FMT_STEREO) {
1044                        /* Enable stereo */
1045                        if (channel)
1046                                pa |= 0x00800000;       /* (Bit 23) */
1047                        if (es->fmt & ESS_FMT_16BIT)
1048                                pa >>= 1;
1049                }
1050
1051                /* base offset of dma calcs when reading the pointer
1052                   on this left one */
1053                es->base[channel] = pa & 0xFFFF;
1054
1055                for (i = 0; i < 16; i++)
1056                        apu_set_register(chip, apu, i, 0x0000);
1057
1058                /* Load the buffer into the wave engine */
1059                apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1060                apu_set_register(chip, apu, 5, pa & 0xFFFF);
1061                apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);
1062                /* setting loop == sample len */
1063                apu_set_register(chip, apu, 7, size);
1064
1065                /* clear effects/env.. */
1066                apu_set_register(chip, apu, 8, 0x0000);
1067                /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1068                apu_set_register(chip, apu, 9, 0xD000);
1069
1070                /* clear routing stuff */
1071                apu_set_register(chip, apu, 11, 0x0000);
1072                /* dma on, no envelopes, filter to all 1s) */
1073                apu_set_register(chip, apu, 0, 0x400F);
1074
1075                if (es->fmt & ESS_FMT_16BIT)
1076                        es->apu_mode[channel] = ESM_APU_16BITLINEAR;
1077                else
1078                        es->apu_mode[channel] = ESM_APU_8BITLINEAR;
1079
1080                if (es->fmt & ESS_FMT_STEREO) {
1081                        /* set panning: left or right */
1082                        /* Check: different panning. On my Canyon 3D Chipset the
1083                           Channels are swapped. I don't know, about the output
1084                           to the SPDif Link. Perhaps you have to change this
1085                           and not the APU Regs 4-5. */
1086                        apu_set_register(chip, apu, 10,
1087                                         0x8F00 | (channel ? 0 : 0x10));
1088                        es->apu_mode[channel] += 1;     /* stereo */
1089                } else
1090                        apu_set_register(chip, apu, 10, 0x8F08);
1091        }
1092
1093        spin_lock_irqsave(&chip->reg_lock, flags);
1094        /* clear WP interrupts */
1095        outw(1, chip->io_port + 0x04);
1096        /* enable WP ints */
1097        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1098        spin_unlock_irqrestore(&chip->reg_lock, flags);
1099
1100        freq = runtime->rate;
1101        /* set frequency */
1102        if (freq > 48000)
1103                freq = 48000;
1104        if (freq < 4000)
1105                freq = 4000;
1106
1107        /* hmmm.. */
1108        if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))
1109                freq >>= 1;
1110
1111        freq = snd_es1968_compute_rate(chip, freq);
1112
1113        /* Load the frequency, turn on 6dB */
1114        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1115        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1116}
1117
1118
1119static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,
1120                             unsigned int pa, unsigned int bsize,
1121                             int mode, int route)
1122{
1123        int i, apu = es->apu[channel];
1124
1125        es->apu_mode[channel] = mode;
1126
1127        /* set the wavecache control reg */
1128        snd_es1968_program_wavecache(chip, es, channel, pa, 1);
1129
1130        /* Offset to PCMBAR */
1131        pa -= chip->dma.addr;
1132        pa >>= 1;       /* words */
1133
1134        /* base offset of dma calcs when reading the pointer
1135           on this left one */
1136        es->base[channel] = pa & 0xFFFF;
1137        pa |= 0x00400000;       /* bit 22 -> System RAM */
1138
1139        /* Begin loading the APU */
1140        for (i = 0; i < 16; i++)
1141                apu_set_register(chip, apu, i, 0x0000);
1142
1143        /* need to enable subgroups.. and we should probably
1144           have different groups for different /dev/dsps..  */
1145        apu_set_register(chip, apu, 2, 0x8);
1146
1147        /* Load the buffer into the wave engine */
1148        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1149        apu_set_register(chip, apu, 5, pa & 0xFFFF);
1150        apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);
1151        apu_set_register(chip, apu, 7, bsize);
1152        /* clear effects/env.. */
1153        apu_set_register(chip, apu, 8, 0x00F0);
1154        /* amplitude now?  sure.  why not.  */
1155        apu_set_register(chip, apu, 9, 0x0000);
1156        /* set filter tune, radius, polar pan */
1157        apu_set_register(chip, apu, 10, 0x8F08);
1158        /* route input */
1159        apu_set_register(chip, apu, 11, route);
1160        /* dma on, no envelopes, filter to all 1s) */
1161        apu_set_register(chip, apu, 0, 0x400F);
1162}
1163
1164static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,
1165                                     struct snd_pcm_runtime *runtime)
1166{
1167        int size;
1168        u32 freq;
1169        unsigned long flags;
1170
1171        size = es->dma_size >> es->wav_shift;
1172
1173        /* APU assignments:
1174           0 = mono/left SRC
1175           1 = right SRC
1176           2 = mono/left Input Mixer
1177           3 = right Input Mixer
1178        */
1179        /* data seems to flow from the codec, through an apu into
1180           the 'mixbuf' bit of page, then through the SRC apu
1181           and out to the real 'buffer'.  ok.  sure.  */
1182
1183        /* input mixer (left/mono) */
1184        /* parallel in crap, see maestro reg 0xC [8-11] */
1185        init_capture_apu(chip, es, 2,
1186                         es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */
1187                         ESM_APU_INPUTMIXER, 0x14);
1188        /* SRC (left/mono); get input from inputing apu */
1189        init_capture_apu(chip, es, 0, es->memory->buf.addr, size,
1190                         ESM_APU_SRCONVERTOR, es->apu[2]);
1191        if (es->fmt & ESS_FMT_STEREO) {
1192                /* input mixer (right) */
1193                init_capture_apu(chip, es, 3,
1194                                 es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,
1195                                 ESM_MIXBUF_SIZE/4, /* in words */
1196                                 ESM_APU_INPUTMIXER, 0x15);
1197                /* SRC (right) */
1198                init_capture_apu(chip, es, 1,
1199                                 es->memory->buf.addr + size*2, size,
1200                                 ESM_APU_SRCONVERTOR, es->apu[3]);
1201        }
1202
1203        freq = runtime->rate;
1204        /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1205        if (freq > 47999)
1206                freq = 47999;
1207        if (freq < 4000)
1208                freq = 4000;
1209
1210        freq = snd_es1968_compute_rate(chip, freq);
1211
1212        /* Load the frequency, turn on 6dB */
1213        snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1214        snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1215
1216        /* fix mixer rate at 48khz.  and its _must_ be 0x10000. */
1217        freq = 0x10000;
1218        snd_es1968_apu_set_freq(chip, es->apu[2], freq);
1219        snd_es1968_apu_set_freq(chip, es->apu[3], freq);
1220
1221        spin_lock_irqsave(&chip->reg_lock, flags);
1222        /* clear WP interrupts */
1223        outw(1, chip->io_port + 0x04);
1224        /* enable WP ints */
1225        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1226        spin_unlock_irqrestore(&chip->reg_lock, flags);
1227}
1228
1229/*******************
1230 *  ALSA Interface *
1231 *******************/
1232
1233static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)
1234{
1235        struct es1968 *chip = snd_pcm_substream_chip(substream);
1236        struct snd_pcm_runtime *runtime = substream->runtime;
1237        struct esschan *es = runtime->private_data;
1238
1239        es->dma_size = snd_pcm_lib_buffer_bytes(substream);
1240        es->frag_size = snd_pcm_lib_period_bytes(substream);
1241
1242        es->wav_shift = 1; /* maestro handles always 16bit */
1243        es->fmt = 0;
1244        if (snd_pcm_format_width(runtime->format) == 16)
1245                es->fmt |= ESS_FMT_16BIT;
1246        if (runtime->channels > 1) {
1247                es->fmt |= ESS_FMT_STEREO;
1248                if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */
1249                        es->wav_shift++;
1250        }
1251        es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);
1252
1253        switch (es->mode) {
1254        case ESM_MODE_PLAY:
1255                snd_es1968_playback_setup(chip, es, runtime);
1256                break;
1257        case ESM_MODE_CAPTURE:
1258                snd_es1968_capture_setup(chip, es, runtime);
1259                break;
1260        }
1261
1262        return 0;
1263}
1264
1265static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1266{
1267        struct es1968 *chip = snd_pcm_substream_chip(substream);
1268        struct esschan *es = substream->runtime->private_data;
1269
1270        spin_lock(&chip->substream_lock);
1271        switch (cmd) {
1272        case SNDRV_PCM_TRIGGER_START:
1273        case SNDRV_PCM_TRIGGER_RESUME:
1274                if (es->running)
1275                        break;
1276                snd_es1968_bob_inc(chip, es->bob_freq);
1277                es->count = 0;
1278                es->hwptr = 0;
1279                snd_es1968_pcm_start(chip, es);
1280                es->running = 1;
1281                break;
1282        case SNDRV_PCM_TRIGGER_STOP:
1283        case SNDRV_PCM_TRIGGER_SUSPEND:
1284                if (! es->running)
1285                        break;
1286                snd_es1968_pcm_stop(chip, es);
1287                es->running = 0;
1288                snd_es1968_bob_dec(chip);
1289                break;
1290        }
1291        spin_unlock(&chip->substream_lock);
1292        return 0;
1293}
1294
1295static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)
1296{
1297        struct es1968 *chip = snd_pcm_substream_chip(substream);
1298        struct esschan *es = substream->runtime->private_data;
1299        unsigned int ptr;
1300
1301        ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1302        
1303        return bytes_to_frames(substream->runtime, ptr % es->dma_size);
1304}
1305
1306static struct snd_pcm_hardware snd_es1968_playback = {
1307        .info =                 (SNDRV_PCM_INFO_MMAP |
1308                                 SNDRV_PCM_INFO_MMAP_VALID |
1309                                 SNDRV_PCM_INFO_INTERLEAVED |
1310                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1311                                 /*SNDRV_PCM_INFO_PAUSE |*/
1312                                 SNDRV_PCM_INFO_RESUME),
1313        .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1314        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1315        .rate_min =             4000,
1316        .rate_max =             48000,
1317        .channels_min =         1,
1318        .channels_max =         2,
1319        .buffer_bytes_max =     65536,
1320        .period_bytes_min =     256,
1321        .period_bytes_max =     65536,
1322        .periods_min =          1,
1323        .periods_max =          1024,
1324        .fifo_size =            0,
1325};
1326
1327static struct snd_pcm_hardware snd_es1968_capture = {
1328        .info =                 (SNDRV_PCM_INFO_NONINTERLEAVED |
1329                                 SNDRV_PCM_INFO_MMAP |
1330                                 SNDRV_PCM_INFO_MMAP_VALID |
1331                                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1332                                 /*SNDRV_PCM_INFO_PAUSE |*/
1333                                 SNDRV_PCM_INFO_RESUME),
1334        .formats =              /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,
1335        .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1336        .rate_min =             4000,
1337        .rate_max =             48000,
1338        .channels_min =         1,
1339        .channels_max =         2,
1340        .buffer_bytes_max =     65536,
1341        .period_bytes_min =     256,
1342        .period_bytes_max =     65536,
1343        .periods_min =          1,
1344        .periods_max =          1024,
1345        .fifo_size =            0,
1346};
1347
1348/* *************************
1349   * DMA memory management *
1350   *************************/
1351
1352/* Because the Maestro can only take addresses relative to the PCM base address
1353   register :( */
1354
1355static int calc_available_memory_size(struct es1968 *chip)
1356{
1357        int max_size = 0;
1358        struct esm_memory *buf;
1359
1360        mutex_lock(&chip->memory_mutex);
1361        list_for_each_entry(buf, &chip->buf_list, list) {
1362                if (buf->empty && buf->buf.bytes > max_size)
1363                        max_size = buf->buf.bytes;
1364        }
1365        mutex_unlock(&chip->memory_mutex);
1366        if (max_size >= 128*1024)
1367                max_size = 127*1024;
1368        return max_size;
1369}
1370
1371/* allocate a new memory chunk with the specified size */
1372static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)
1373{
1374        struct esm_memory *buf;
1375
1376        size = ALIGN(size, ESM_MEM_ALIGN);
1377        mutex_lock(&chip->memory_mutex);
1378        list_for_each_entry(buf, &chip->buf_list, list) {
1379                if (buf->empty && buf->buf.bytes >= size)
1380                        goto __found;
1381        }
1382        mutex_unlock(&chip->memory_mutex);
1383        return NULL;
1384
1385__found:
1386        if (buf->buf.bytes > size) {
1387                struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1388                if (chunk == NULL) {
1389                        mutex_unlock(&chip->memory_mutex);
1390                        return NULL;
1391                }
1392                chunk->buf = buf->buf;
1393                chunk->buf.bytes -= size;
1394                chunk->buf.area += size;
1395                chunk->buf.addr += size;
1396                chunk->empty = 1;
1397                buf->buf.bytes = size;
1398                list_add(&chunk->list, &buf->list);
1399        }
1400        buf->empty = 0;
1401        mutex_unlock(&chip->memory_mutex);
1402        return buf;
1403}
1404
1405/* free a memory chunk */
1406static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)
1407{
1408        struct esm_memory *chunk;
1409
1410        mutex_lock(&chip->memory_mutex);
1411        buf->empty = 1;
1412        if (buf->list.prev != &chip->buf_list) {
1413                chunk = list_entry(buf->list.prev, struct esm_memory, list);
1414                if (chunk->empty) {
1415                        chunk->buf.bytes += buf->buf.bytes;
1416                        list_del(&buf->list);
1417                        kfree(buf);
1418                        buf = chunk;
1419                }
1420        }
1421        if (buf->list.next != &chip->buf_list) {
1422                chunk = list_entry(buf->list.next, struct esm_memory, list);
1423                if (chunk->empty) {
1424                        buf->buf.bytes += chunk->buf.bytes;
1425                        list_del(&chunk->list);
1426                        kfree(chunk);
1427                }
1428        }
1429        mutex_unlock(&chip->memory_mutex);
1430}
1431
1432static void snd_es1968_free_dmabuf(struct es1968 *chip)
1433{
1434        struct list_head *p;
1435
1436        if (! chip->dma.area)
1437                return;
1438        snd_dma_reserve_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci));
1439        while ((p = chip->buf_list.next) != &chip->buf_list) {
1440                struct esm_memory *chunk = list_entry(p, struct esm_memory, list);
1441                list_del(p);
1442                kfree(chunk);
1443        }
1444}
1445
1446static int __devinit
1447snd_es1968_init_dmabuf(struct es1968 *chip)
1448{
1449        int err;
1450        struct esm_memory *chunk;
1451
1452        chip->dma.dev.type = SNDRV_DMA_TYPE_DEV;
1453        chip->dma.dev.dev = snd_dma_pci_data(chip->pci);
1454        if (! snd_dma_get_reserved_buf(&chip->dma, snd_dma_pci_buf_id(chip->pci))) {
1455                err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,
1456                                                   snd_dma_pci_data(chip->pci),
1457                                                   chip->total_bufsize, &chip->dma);
1458                if (err < 0 || ! chip->dma.area) {
1459                        snd_printk(KERN_ERR "es1968: can't allocate dma pages for size %d\n",
1460                                   chip->total_bufsize);
1461                        return -ENOMEM;
1462                }
1463                if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {
1464                        snd_dma_free_pages(&chip->dma);
1465                        snd_printk(KERN_ERR "es1968: DMA buffer beyond 256MB.\n");
1466                        return -ENOMEM;
1467                }
1468        }
1469
1470        INIT_LIST_HEAD(&chip->buf_list);
1471        /* allocate an empty chunk */
1472        chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1473        if (chunk == NULL) {
1474                snd_es1968_free_dmabuf(chip);
1475                return -ENOMEM;
1476        }
1477        memset(chip->dma.area, 0, ESM_MEM_ALIGN);
1478        chunk->buf = chip->dma;
1479        chunk->buf.area += ESM_MEM_ALIGN;
1480        chunk->buf.addr += ESM_MEM_ALIGN;
1481        chunk->buf.bytes -= ESM_MEM_ALIGN;
1482        chunk->empty = 1;
1483        list_add(&chunk->list, &chip->buf_list);
1484
1485        return 0;
1486}
1487
1488/* setup the dma_areas */
1489/* buffer is extracted from the pre-allocated memory chunk */
1490static int snd_es1968_hw_params(struct snd_pcm_substream *substream,
1491                                struct snd_pcm_hw_params *hw_params)
1492{
1493        struct es1968 *chip = snd_pcm_substream_chip(substream);
1494        struct snd_pcm_runtime *runtime = substream->runtime;
1495        struct esschan *chan = runtime->private_data;
1496        int size = params_buffer_bytes(hw_params);
1497
1498        if (chan->memory) {
1499                if (chan->memory->buf.bytes >= size) {
1500                        runtime->dma_bytes = size;
1501                        return 0;
1502                }
1503                snd_es1968_free_memory(chip, chan->memory);
1504        }
1505        chan->memory = snd_es1968_new_memory(chip, size);
1506        if (chan->memory == NULL) {
1507                // snd_printd("cannot allocate dma buffer: size = %d\n", size);
1508                return -ENOMEM;
1509        }
1510        snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);
1511        return 1; /* area was changed */
1512}
1513
1514/* remove dma areas if allocated */
1515static int snd_es1968_hw_free(struct snd_pcm_substream *substream)
1516{
1517        struct es1968 *chip = snd_pcm_substream_chip(substream);
1518        struct snd_pcm_runtime *runtime = substream->runtime;
1519        struct esschan *chan;
1520        
1521        if (runtime->private_data == NULL)
1522                return 0;
1523        chan = runtime->private_data;
1524        if (chan->memory) {
1525                snd_es1968_free_memory(chip, chan->memory);
1526                chan->memory = NULL;
1527        }
1528        return 0;
1529}
1530
1531
1532/*
1533 * allocate APU pair
1534 */
1535static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)
1536{
1537        int apu;
1538
1539        for (apu = 0; apu < NR_APUS; apu += 2) {
1540                if (chip->apu[apu] == ESM_APU_FREE &&
1541                    chip->apu[apu + 1] == ESM_APU_FREE) {
1542                        chip->apu[apu] = chip->apu[apu + 1] = type;
1543                        return apu;
1544                }
1545        }
1546        return -EBUSY;
1547}
1548
1549/*
1550 * release APU pair
1551 */
1552static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)
1553{
1554        chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;
1555}
1556
1557
1558/******************
1559 * PCM open/close *
1560 ******************/
1561
1562static int snd_es1968_playback_open(struct snd_pcm_substream *substream)
1563{
1564        struct es1968 *chip = snd_pcm_substream_chip(substream);
1565        struct snd_pcm_runtime *runtime = substream->runtime;
1566        struct esschan *es;
1567        int apu1;
1568
1569        /* search 2 APUs */
1570        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);
1571        if (apu1 < 0)
1572                return apu1;
1573
1574        es = kzalloc(sizeof(*es), GFP_KERNEL);
1575        if (!es) {
1576                snd_es1968_free_apu_pair(chip, apu1);
1577                return -ENOMEM;
1578        }
1579
1580        es->apu[0] = apu1;
1581        es->apu[1] = apu1 + 1;
1582        es->apu_mode[0] = 0;
1583        es->apu_mode[1] = 0;
1584        es->running = 0;
1585        es->substream = substream;
1586        es->mode = ESM_MODE_PLAY;
1587
1588        runtime->private_data = es;
1589        runtime->hw = snd_es1968_playback;
1590        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1591                calc_available_memory_size(chip);
1592
1593        spin_lock_irq(&chip->substream_lock);
1594        list_add(&es->list, &chip->substream_list);
1595        spin_unlock_irq(&chip->substream_lock);
1596
1597        return 0;
1598}
1599
1600static int snd_es1968_capture_open(struct snd_pcm_substream *substream)
1601{
1602        struct snd_pcm_runtime *runtime = substream->runtime;
1603        struct es1968 *chip = snd_pcm_substream_chip(substream);
1604        struct esschan *es;
1605        int apu1, apu2;
1606
1607        apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);
1608        if (apu1 < 0)
1609                return apu1;
1610        apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);
1611        if (apu2 < 0) {
1612                snd_es1968_free_apu_pair(chip, apu1);
1613                return apu2;
1614        }
1615        
1616        es = kzalloc(sizeof(*es), GFP_KERNEL);
1617        if (!es) {
1618                snd_es1968_free_apu_pair(chip, apu1);
1619                snd_es1968_free_apu_pair(chip, apu2);
1620                return -ENOMEM;
1621        }
1622
1623        es->apu[0] = apu1;
1624        es->apu[1] = apu1 + 1;
1625        es->apu[2] = apu2;
1626        es->apu[3] = apu2 + 1;
1627        es->apu_mode[0] = 0;
1628        es->apu_mode[1] = 0;
1629        es->apu_mode[2] = 0;
1630        es->apu_mode[3] = 0;
1631        es->running = 0;
1632        es->substream = substream;
1633        es->mode = ESM_MODE_CAPTURE;
1634
1635        /* get mixbuffer */
1636        if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) {
1637                snd_es1968_free_apu_pair(chip, apu1);
1638                snd_es1968_free_apu_pair(chip, apu2);
1639                kfree(es);
1640                return -ENOMEM;
1641        }
1642        memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);
1643
1644        runtime->private_data = es;
1645        runtime->hw = snd_es1968_capture;
1646        runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1647                calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */
1648        snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
1649
1650        spin_lock_irq(&chip->substream_lock);
1651        list_add(&es->list, &chip->substream_list);
1652        spin_unlock_irq(&chip->substream_lock);
1653
1654        return 0;
1655}
1656
1657static int snd_es1968_playback_close(struct snd_pcm_substream *substream)
1658{
1659        struct es1968 *chip = snd_pcm_substream_chip(substream);
1660        struct esschan *es;
1661
1662        if (substream->runtime->private_data == NULL)
1663                return 0;
1664        es = substream->runtime->private_data;
1665        spin_lock_irq(&chip->substream_lock);
1666        list_del(&es->list);
1667        spin_unlock_irq(&chip->substream_lock);
1668        snd_es1968_free_apu_pair(chip, es->apu[0]);
1669        kfree(es);
1670
1671        return 0;
1672}
1673
1674static int snd_es1968_capture_close(struct snd_pcm_substream *substream)
1675{
1676        struct es1968 *chip = snd_pcm_substream_chip(substream);
1677        struct esschan *es;
1678
1679        if (substream->runtime->private_data == NULL)
1680                return 0;
1681        es = substream->runtime->private_data;
1682        spin_lock_irq(&chip->substream_lock);
1683        list_del(&es->list);
1684        spin_unlock_irq(&chip->substream_lock);
1685        snd_es1968_free_memory(chip, es->mixbuf);
1686        snd_es1968_free_apu_pair(chip, es->apu[0]);
1687        snd_es1968_free_apu_pair(chip, es->apu[2]);
1688        kfree(es);
1689
1690        return 0;
1691}
1692
1693static struct snd_pcm_ops snd_es1968_playback_ops = {
1694        .open =         snd_es1968_playback_open,
1695        .close =        snd_es1968_playback_close,
1696        .ioctl =        snd_pcm_lib_ioctl,
1697        .hw_params =    snd_es1968_hw_params,
1698        .hw_free =      snd_es1968_hw_free,
1699        .prepare =      snd_es1968_pcm_prepare,
1700        .trigger =      snd_es1968_pcm_trigger,
1701        .pointer =      snd_es1968_pcm_pointer,
1702};
1703
1704static struct snd_pcm_ops snd_es1968_capture_ops = {
1705        .open =         snd_es1968_capture_open,
1706        .close =        snd_es1968_capture_close,
1707        .ioctl =        snd_pcm_lib_ioctl,
1708        .hw_params =    snd_es1968_hw_params,
1709        .hw_free =      snd_es1968_hw_free,
1710        .prepare =      snd_es1968_pcm_prepare,
1711        .trigger =      snd_es1968_pcm_trigger,
1712        .pointer =      snd_es1968_pcm_pointer,
1713};
1714
1715
1716/*
1717 * measure clock
1718 */
1719#define CLOCK_MEASURE_BUFSIZE   16768   /* enough large for a single shot */
1720
1721static void __devinit es1968_measure_clock(struct es1968 *chip)
1722{
1723        int i, apu;
1724        unsigned int pa, offset, t;
1725        struct esm_memory *memory;
1726        struct timeval start_time, stop_time;
1727
1728        if (chip->clock == 0)
1729                chip->clock = 48000; /* default clock value */
1730
1731        /* search 2 APUs (although one apu is enough) */
1732        if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) {
1733                snd_printk(KERN_ERR "Hmm, cannot find empty APU pair!?\n");
1734                return;
1735        }
1736        if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) {
1737                snd_printk(KERN_ERR "cannot allocate dma buffer - using default clock %d\n", chip->clock);
1738                snd_es1968_free_apu_pair(chip, apu);
1739                return;
1740        }
1741
1742        memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);
1743
1744        wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);
1745
1746        pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);
1747        pa |= 0x00400000;       /* System RAM (Bit 22) */
1748
1749        /* initialize apu */
1750        for (i = 0; i < 16; i++)
1751                apu_set_register(chip, apu, i, 0x0000);
1752
1753        apu_set_register(chip, apu, 0, 0x400f);
1754        apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);
1755        apu_set_register(chip, apu, 5, pa & 0xffff);
1756        apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);
1757        apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);
1758        apu_set_register(chip, apu, 8, 0x0000);
1759        apu_set_register(chip, apu, 9, 0xD000);
1760        apu_set_register(chip, apu, 10, 0x8F08);
1761        apu_set_register(chip, apu, 11, 0x0000);
1762        spin_lock_irq(&chip->reg_lock);
1763        outw(1, chip->io_port + 0x04); /* clear WP interrupts */
1764        outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
1765        spin_unlock_irq(&chip->reg_lock);
1766
1767        snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */
1768
1769        chip->in_measurement = 1;
1770        chip->measure_apu = apu;
1771        spin_lock_irq(&chip->reg_lock);
1772        snd_es1968_bob_inc(chip, ESM_BOB_FREQ);
1773        __apu_set_register(chip, apu, 5, pa & 0xffff);
1774        snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);
1775        do_gettimeofday(&start_time);
1776        spin_unlock_irq(&chip->reg_lock);
1777        msleep(50);
1778        spin_lock_irq(&chip->reg_lock);
1779        offset = __apu_get_register(chip, apu, 5);
1780        do_gettimeofday(&stop_time);
1781        snd_es1968_trigger_apu(chip, apu, 0); /* stop */
1782        snd_es1968_bob_dec(chip);
1783        chip->in_measurement = 0;
1784        spin_unlock_irq(&chip->reg_lock);
1785
1786        /* check the current position */
1787        offset -= (pa & 0xffff);
1788        offset &= 0xfffe;
1789        offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);
1790
1791        t = stop_time.tv_sec - start_time.tv_sec;
1792        t *= 1000000;
1793        if (stop_time.tv_usec < start_time.tv_usec)
1794                t -= start_time.tv_usec - stop_time.tv_usec;
1795        else
1796                t += stop_time.tv_usec - start_time.tv_usec;
1797        if (t == 0) {
1798                snd_printk(KERN_ERR "?? calculation error..\n");
1799        } else {
1800                offset *= 1000;
1801                offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;
1802                if (offset < 47500 || offset > 48500) {
1803                        if (offset >= 40000 && offset <= 50000)
1804                                chip->clock = (chip->clock * offset) / 48000;
1805                }
1806                printk(KERN_INFO "es1968: clocking to %d\n", chip->clock);
1807        }
1808        snd_es1968_free_memory(chip, memory);
1809        snd_es1968_free_apu_pair(chip, apu);
1810}
1811
1812
1813/*
1814 */
1815
1816static void snd_es1968_pcm_free(struct snd_pcm *pcm)
1817{
1818        struct es1968 *esm = pcm->private_data;
1819        snd_es1968_free_dmabuf(esm);
1820        esm->pcm = NULL;
1821}
1822
1823static int __devinit
1824snd_es1968_pcm(struct es1968 *chip, int device)
1825{
1826        struct snd_pcm *pcm;
1827        int err;
1828
1829        /* get DMA buffer */
1830        if ((err = snd_es1968_init_dmabuf(chip)) < 0)
1831                return err;
1832
1833        /* set PCMBAR */
1834        wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
1835        wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);
1836        wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);
1837        wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);
1838
1839        if ((err = snd_pcm_new(chip->card, "ESS Maestro", device,
1840                               chip->playback_streams,
1841                               chip->capture_streams, &pcm)) < 0)
1842                return err;
1843
1844        pcm->private_data = chip;
1845        pcm->private_free = snd_es1968_pcm_free;
1846
1847        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);
1848        snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);
1849
1850        pcm->info_flags = 0;
1851
1852        strcpy(pcm->name, "ESS Maestro");
1853
1854        chip->pcm = pcm;
1855
1856        return 0;
1857}
1858/*
1859 * suppress jitter on some maestros when playing stereo
1860 */
1861static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)
1862{
1863        unsigned int cp1;
1864        unsigned int cp2;
1865        unsigned int diff;
1866
1867        cp1 = __apu_get_register(chip, 0, 5);
1868        cp2 = __apu_get_register(chip, 1, 5);
1869        diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);
1870
1871        if (diff > 1)
1872                __maestro_write(chip, IDR0_DATA_PORT, cp1);
1873}
1874
1875/*
1876 * update pointer
1877 */
1878static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)
1879{
1880        unsigned int hwptr;
1881        unsigned int diff;
1882        struct snd_pcm_substream *subs = es->substream;
1883        
1884        if (subs == NULL || !es->running)
1885                return;
1886
1887        hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1888        hwptr %= es->dma_size;
1889
1890        diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;
1891
1892        es->hwptr = hwptr;
1893        es->count += diff;
1894
1895        if (es->count > es->frag_size) {
1896                spin_unlock(&chip->substream_lock);
1897                snd_pcm_period_elapsed(subs);
1898                spin_lock(&chip->substream_lock);
1899                es->count %= es->frag_size;
1900        }
1901}
1902
1903/* The hardware volume works by incrementing / decrementing 2 counters
1904   (without wrap around) in response to volume button presses and then
1905   generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7
1906   of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1907static void es1968_update_hw_volume(unsigned long private_data)
1908{
1909        struct es1968 *chip = (struct es1968 *) private_data;
1910        int x, val;
1911#ifndef CONFIG_SND_ES1968_INPUT
1912        unsigned long flags;
1913#endif
1914
1915        /* Figure out which volume control button was pushed,
1916           based on differences from the default register
1917           values. */
1918        x = inb(chip->io_port + 0x1c) & 0xee;
1919        /* Reset the volume control registers. */
1920        outb(0x88, chip->io_port + 0x1c);
1921        outb(0x88, chip->io_port + 0x1d);
1922        outb(0x88, chip->io_port + 0x1e);
1923        outb(0x88, chip->io_port + 0x1f);
1924
1925        if (chip->in_suspend)
1926                return;
1927
1928#ifndef CONFIG_SND_ES1968_INPUT
1929        if (! chip->master_switch || ! chip->master_volume)
1930                return;
1931
1932        /* FIXME: we can't call snd_ac97_* functions since here is in tasklet. */
1933        spin_lock_irqsave(&chip->ac97_lock, flags);
1934        val = chip->ac97->regs[AC97_MASTER];
1935        switch (x) {
1936        case 0x88:
1937                /* mute */
1938                val ^= 0x8000;
1939                chip->ac97->regs[AC97_MASTER] = val;
1940                outw(val, chip->io_port + ESM_AC97_DATA);
1941                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1942                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1943                               &chip->master_switch->id);
1944                break;
1945        case 0xaa:
1946                /* volume up */
1947                if ((val & 0x7f) > 0)
1948                        val--;
1949                if ((val & 0x7f00) > 0)
1950                        val -= 0x0100;
1951                chip->ac97->regs[AC97_MASTER] = val;
1952                outw(val, chip->io_port + ESM_AC97_DATA);
1953                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1954                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1955                               &chip->master_volume->id);
1956                break;
1957        case 0x66:
1958                /* volume down */
1959                if ((val & 0x7f) < 0x1f)
1960                        val++;
1961                if ((val & 0x7f00) < 0x1f00)
1962                        val += 0x0100;
1963                chip->ac97->regs[AC97_MASTER] = val;
1964                outw(val, chip->io_port + ESM_AC97_DATA);
1965                outb(AC97_MASTER, chip->io_port + ESM_AC97_INDEX);
1966                snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1967                               &chip->master_volume->id);
1968                break;
1969        }
1970        spin_unlock_irqrestore(&chip->ac97_lock, flags);
1971#else
1972        if (!chip->input_dev)
1973                return;
1974
1975        val = 0;
1976        switch (x) {
1977        case 0x88:
1978                /* The counters have not changed, yet we've received a HV
1979                   interrupt. According to tests run by various people this
1980                   happens when pressing the mute button. */
1981                val = KEY_MUTE;
1982                break;
1983        case 0xaa:
1984                /* counters increased by 1 -> volume up */
1985                val = KEY_VOLUMEUP;
1986                break;
1987        case 0x66:
1988                /* counters decreased by 1 -> volume down */
1989                val = KEY_VOLUMEDOWN;
1990                break;
1991        }
1992
1993        if (val) {
1994                input_report_key(chip->input_dev, val, 1);
1995                input_sync(chip->input_dev);
1996                input_report_key(chip->input_dev, val, 0);
1997                input_sync(chip->input_dev);
1998        }
1999#endif
2000}
2001
2002/*
2003 * interrupt handler
2004 */
2005static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)
2006{
2007        struct es1968 *chip = dev_id;
2008        u32 event;
2009
2010        if (!(event = inb(chip->io_port + 0x1A)))
2011                return IRQ_NONE;
2012
2013        outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);
2014
2015        if (event & ESM_HWVOL_IRQ)
2016#ifdef CONFIG_SND_ES1968_INPUT
2017                es1968_update_hw_volume((unsigned long)chip);
2018#else
2019                tasklet_schedule(&chip->hwvol_tq); /* we'll do this later */
2020#endif
2021
2022        /* else ack 'em all, i imagine */
2023        outb(0xFF, chip->io_port + 0x1A);
2024
2025        if ((event & ESM_MPU401_IRQ) && chip->rmidi) {
2026                snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
2027        }
2028
2029        if (event & ESM_SOUND_IRQ) {
2030                struct esschan *es;
2031                spin_lock(&chip->substream_lock);
2032                list_for_each_entry(es, &chip->substream_list, list) {
2033                        if (es->running) {
2034                                snd_es1968_update_pcm(chip, es);
2035                                if (es->fmt & ESS_FMT_STEREO)
2036                                        snd_es1968_suppress_jitter(chip, es);
2037                        }
2038                }
2039                spin_unlock(&chip->substream_lock);
2040                if (chip->in_measurement) {
2041                        unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);
2042                        if (curp < chip->measure_lastpos)
2043                                chip->measure_count++;
2044                        chip->measure_lastpos = curp;
2045                }
2046        }
2047
2048        return IRQ_HANDLED;
2049}
2050
2051/*
2052 *  Mixer stuff
2053 */
2054
2055static int __devinit
2056snd_es1968_mixer(struct es1968 *chip)
2057{
2058        struct snd_ac97_bus *pbus;
2059        struct snd_ac97_template ac97;
2060#ifndef CONFIG_SND_ES1968_INPUT
2061        struct snd_ctl_elem_id elem_id;
2062#endif
2063        int err;
2064        static struct snd_ac97_bus_ops ops = {
2065                .write = snd_es1968_ac97_write,
2066                .read = snd_es1968_ac97_read,
2067        };
2068
2069        if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
2070                return err;
2071        pbus->no_vra = 1; /* ES1968 doesn't need VRA */
2072
2073        memset(&ac97, 0, sizeof(ac97));
2074        ac97.private_data = chip;
2075        if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0)
2076                return err;
2077
2078#ifndef CONFIG_SND_ES1968_INPUT
2079        /* attach master switch / volumes for h/w volume control */
2080        memset(&elem_id, 0, sizeof(elem_id));
2081        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2082        strcpy(elem_id.name, "Master Playback Switch");
2083        chip->master_switch = snd_ctl_find_id(chip->card, &elem_id);
2084        memset(&elem_id, 0, sizeof(elem_id));
2085        elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2086        strcpy(elem_id.name, "Master Playback Volume");
2087        chip->master_volume = snd_ctl_find_id(chip->card, &elem_id);
2088#endif
2089
2090        return 0;
2091}
2092
2093/*
2094 * reset ac97 codec
2095 */
2096
2097static void snd_es1968_ac97_reset(struct es1968 *chip)
2098{
2099        unsigned long ioaddr = chip->io_port;
2100
2101        unsigned short save_ringbus_a;
2102        unsigned short save_68;
2103        unsigned short w;
2104        unsigned int vend;
2105
2106        /* save configuration */
2107        save_ringbus_a = inw(ioaddr + 0x36);
2108
2109        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2110        /* set command/status address i/o to 1st codec */
2111        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2112        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2113
2114        /* disable ac link */
2115        outw(0x0000, ioaddr + 0x36);
2116        save_68 = inw(ioaddr + 0x68);
2117        pci_read_config_word(chip->pci, 0x58, &w);      /* something magical with gpio and bus arb. */
2118        pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2119        if (w & 1)
2120                save_68 |= 0x10;
2121        outw(0xfffe, ioaddr + 0x64);    /* unmask gpio 0 */
2122        outw(0x0001, ioaddr + 0x68);    /* gpio write */
2123        outw(0x0000, ioaddr + 0x60);    /* write 0 to gpio 0 */
2124        udelay(20);
2125        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio 1 */
2126        msleep(20);
2127
2128        outw(save_68 | 0x1, ioaddr + 0x68);     /* now restore .. */
2129        outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
2130        outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);
2131        outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);
2132
2133        /* now the second codec */
2134        /* disable ac link */
2135        outw(0x0000, ioaddr + 0x36);
2136        outw(0xfff7, ioaddr + 0x64);    /* unmask gpio 3 */
2137        save_68 = inw(ioaddr + 0x68);
2138        outw(0x0009, ioaddr + 0x68);    /* gpio write 0 & 3 ?? */
2139        outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio */
2140        udelay(20);
2141        outw(0x0009, ioaddr + 0x60);    /* write 9 to gpio */
2142        msleep(500);
2143        //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2144        outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2145        outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2146
2147#if 0                           /* the loop here needs to be much better if we want it.. */
2148        snd_printk(KERN_INFO "trying software reset\n");
2149        /* try and do a software reset */
2150        outb(0x80 | 0x7c, ioaddr + 0x30);
2151        for (w = 0;; w++) {
2152                if ((inw(ioaddr + 0x30) & 1) == 0) {
2153                        if (inb(ioaddr + 0x32) != 0)
2154                                break;
2155
2156                        outb(0x80 | 0x7d, ioaddr + 0x30);
2157                        if (((inw(ioaddr + 0x30) & 1) == 0)
2158                            && (inb(ioaddr + 0x32) != 0))
2159                                break;
2160                        outb(0x80 | 0x7f, ioaddr + 0x30);
2161                        if (((inw(ioaddr + 0x30) & 1) == 0)
2162                            && (inb(ioaddr + 0x32) != 0))
2163                                break;
2164                }
2165
2166                if (w > 10000) {
2167                        outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
2168                        msleep(500);    /* oh my.. */
2169                        outb(inb(ioaddr + 0x37) & ~0x08,
2170                                ioaddr + 0x37);
2171                        udelay(1);
2172                        outw(0x80, ioaddr + 0x30);
2173                        for (w = 0; w < 10000; w++) {
2174                                if ((inw(ioaddr + 0x30) & 1) == 0)
2175                                        break;
2176                        }
2177                }
2178        }
2179#endif
2180        if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
2181                /* turn on external amp? */
2182                outw(0xf9ff, ioaddr + 0x64);
2183                outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);
2184                outw(0x0209, ioaddr + 0x60);
2185        }
2186
2187        /* restore.. */
2188        outw(save_ringbus_a, ioaddr + 0x36);
2189
2190        /* Turn on the 978 docking chip.
2191           First frob the "master output enable" bit,
2192           then set most of the playback volume control registers to max. */
2193        outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
2194        outb(0xff, ioaddr+0xc3);
2195        outb(0xff, ioaddr+0xc4);
2196        outb(0xff, ioaddr+0xc6);
2197        outb(0xff, ioaddr+0xc8);
2198        outb(0x3f, ioaddr+0xcf);
2199        outb(0x3f, ioaddr+0xd0);
2200}
2201
2202static void snd_es1968_reset(struct es1968 *chip)
2203{
2204        /* Reset */
2205        outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,
2206             chip->io_port + ESM_PORT_HOST_IRQ);
2207        udelay(10);
2208        outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);
2209        udelay(10);
2210}
2211
2212/*
2213 * initialize maestro chip
2214 */
2215static void snd_es1968_chip_init(struct es1968 *chip)
2216{
2217        struct pci_dev *pci = chip->pci;
2218        int i;
2219        unsigned long iobase  = chip->io_port;
2220        u16 w;
2221        u32 n;
2222
2223        /* We used to muck around with pci config space that
2224         * we had no business messing with.  We don't know enough
2225         * about the machine to know which DMA mode is appropriate, 
2226         * etc.  We were guessing wrong on some machines and making
2227         * them unhappy.  We now trust in the BIOS to do things right,
2228         * which almost certainly means a new host of problems will
2229         * arise with broken BIOS implementations.  screw 'em. 
2230         * We're already intolerant of machines that don't assign
2231         * IRQs.
2232         */
2233        
2234        /* Config Reg A */
2235        pci_read_config_word(pci, ESM_CONFIG_A, &w);
2236
2237        w &= ~DMA_CLEAR;        /* Clear DMA bits */
2238        w &= ~(PIC_SNOOP1 | PIC_SNOOP2);        /* Clear Pic Snoop Mode Bits */
2239        w &= ~SAFEGUARD;        /* Safeguard off */
2240        w |= POST_WRITE;        /* Posted write */
2241        w |= PCI_TIMING;        /* PCI timing on */
2242        /* XXX huh?  claims to be reserved.. */
2243        w &= ~SWAP_LR;          /* swap left/right 
2244                                   seems to only have effect on SB
2245                                   Emulation */
2246        w &= ~SUBTR_DECODE;     /* Subtractive decode off */
2247
2248        pci_write_config_word(pci, ESM_CONFIG_A, w);
2249
2250        /* Config Reg B */
2251
2252        pci_read_config_word(pci, ESM_CONFIG_B, &w);
2253
2254        w &= ~(1 << 15);        /* Turn off internal clock multiplier */
2255        /* XXX how do we know which to use? */
2256        w &= ~(1 << 14);        /* External clock */
2257
2258        w &= ~SPDIF_CONFB;      /* disable S/PDIF output */
2259        w |= HWV_CONFB;         /* HWV on */
2260        w |= DEBOUNCE;          /* Debounce off: easier to push the HW buttons */
2261        w &= ~GPIO_CONFB;       /* GPIO 4:5 */
2262        w |= CHI_CONFB;         /* Disconnect from the CHI.  Enabling this made a dell 7500 work. */
2263        w &= ~IDMA_CONFB;       /* IDMA off (undocumented) */
2264        w &= ~MIDI_FIX;         /* MIDI fix off (undoc) */
2265        w &= ~(1 << 1);         /* reserved, always write 0 */
2266        w &= ~IRQ_TO_ISA;       /* IRQ to ISA off (undoc) */
2267
2268        pci_write_config_word(pci, ESM_CONFIG_B, w);
2269
2270        /* DDMA off */
2271
2272        pci_read_config_word(pci, ESM_DDMA, &w);
2273        w &= ~(1 << 0);
2274        pci_write_config_word(pci, ESM_DDMA, w);
2275
2276        /*
2277         *      Legacy mode
2278         */
2279
2280        pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);
2281
2282        w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */
2283        w &= ~ESS_ENABLE_SERIAL_IRQ;    /* Disable SIRQ */
2284        w &= ~(0x1f);           /* disable mpu irq/io, game port, fm, SB */
2285
2286        pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);
2287
2288        /* Set up 978 docking control chip. */
2289        pci_read_config_word(pci, 0x58, &w);
2290        w|=1<<2;        /* Enable 978. */
2291        w|=1<<3;        /* Turn on 978 hardware volume control. */
2292        w&=~(1<<11);    /* Turn on 978 mixer volume control. */
2293        pci_write_config_word(pci, 0x58, w);
2294        
2295        /* Sound Reset */
2296
2297        snd_es1968_reset(chip);
2298
2299        /*
2300         *      Ring Bus Setup
2301         */
2302
2303        /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2304        outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */
2305        udelay(20);
2306        outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */
2307        udelay(20);
2308
2309        /*
2310         *      Reset the CODEC
2311         */
2312         
2313        snd_es1968_ac97_reset(chip);
2314
2315        /* Ring Bus Control B */
2316
2317        n = inl(iobase + ESM_RING_BUS_CONTR_B);
2318        n &= ~RINGB_EN_SPDIF;   /* SPDIF off */
2319        //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2320        outl(n, iobase + ESM_RING_BUS_CONTR_B);
2321
2322        /* Set hardware volume control registers to midpoints.
2323           We can tell which button was pushed based on how they change. */
2324        outb(0x88, iobase+0x1c);
2325        outb(0x88, iobase+0x1d);
2326        outb(0x88, iobase+0x1e);
2327        outb(0x88, iobase+0x1f);
2328
2329        /* it appears some maestros (dell 7500) only work if these are set,
2330           regardless of wether we use the assp or not. */
2331
2332        outb(0, iobase + ASSP_CONTROL_B);
2333        outb(3, iobase + ASSP_CONTROL_A);       /* M: Reserved bits... */
2334        outb(0, iobase + ASSP_CONTROL_C);       /* M: Disable ASSP, ASSP IRQ's and FM Port */
2335
2336        /*
2337         * set up wavecache
2338         */
2339        for (i = 0; i < 16; i++) {
2340                /* Write 0 into the buffer area 0x1E0->1EF */
2341                outw(0x01E0 + i, iobase + WC_INDEX);
2342                outw(0x0000, iobase + WC_DATA);
2343
2344                /* The 1.10 test program seem to write 0 into the buffer area
2345                 * 0x1D0-0x1DF too.*/
2346                outw(0x01D0 + i, iobase + WC_INDEX);
2347                outw(0x0000, iobase + WC_DATA);
2348        }
2349        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2350                          (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));
2351        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2352                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);
2353        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2354                          wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);
2355        wave_set_register(chip, IDR7_WAVE_ROMRAM,
2356                          wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);
2357
2358
2359        maestro_write(chip, IDR2_CRAM_DATA, 0x0000);
2360        /* Now back to the DirectSound stuff */
2361        /* audio serial configuration.. ? */
2362        maestro_write(chip, 0x08, 0xB004);
2363        maestro_write(chip, 0x09, 0x001B);
2364        maestro_write(chip, 0x0A, 0x8000);
2365        maestro_write(chip, 0x0B, 0x3F37);
2366        maestro_write(chip, 0x0C, 0x0098);
2367
2368        /* parallel in, has something to do with recording :) */
2369        maestro_write(chip, 0x0C,
2370                      (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);
2371        /* parallel out */
2372        maestro_write(chip, 0x0C,
2373                      (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);
2374
2375        maestro_write(chip, 0x0D, 0x7632);
2376
2377        /* Wave cache control on - test off, sg off, 
2378           enable, enable extra chans 1Mb */
2379
2380        w = inw(iobase + WC_CONTROL);
2381
2382        w &= ~0xFA00;           /* Seems to be reserved? I don't know */
2383        w |= 0xA000;            /* reserved... I don't know */
2384        w &= ~0x0200;           /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2385                                   Seems to crash the Computer if enabled... */
2386        w |= 0x0100;            /* Wave Cache Operation Enabled */
2387        w |= 0x0080;            /* Channels 60/61 as Placback/Record enabled */
2388        w &= ~0x0060;           /* Clear Wavtable Size */
2389        w |= 0x0020;            /* Wavetable Size : 1MB */
2390        /* Bit 4 is reserved */
2391        w &= ~0x000C;           /* DMA Stuff? I don't understand what the datasheet means */
2392        /* Bit 1 is reserved */
2393        w &= ~0x0001;           /* Test Mode off */
2394
2395        outw(w, iobase + WC_CONTROL);
2396
2397        /* Now clear the APU control ram */
2398        for (i = 0; i < NR_APUS; i++) {
2399                for (w = 0; w < NR_APU_REGS; w++)
2400                        apu_set_register(chip, i, w, 0);
2401
2402        }
2403}
2404
2405/* Enable IRQ's */
2406static void snd_es1968_start_irq(struct es1968 *chip)
2407{
2408        unsigned short w;
2409        w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;
2410        if (chip->rmidi)
2411                w |= ESM_HIRQ_MPU401;
2412        outb(w, chip->io_port + 0x1A);
2413        outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
2414}
2415
2416#ifdef CONFIG_PM
2417/*
2418 * PM support
2419 */
2420static int es1968_suspend(struct pci_dev *pci, pm_message_t state)
2421{
2422        struct snd_card *card = pci_get_drvdata(pci);
2423        struct es1968 *chip = card->private_data;
2424
2425        if (! chip->do_pm)
2426                return 0;
2427
2428        chip->in_suspend = 1;
2429        snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2430        snd_pcm_suspend_all(chip->pcm);
2431        snd_ac97_suspend(chip->ac97);
2432        snd_es1968_bob_stop(chip);
2433
2434        pci_disable_device(pci);
2435        pci_save_state(pci);
2436        pci_set_power_state(pci, pci_choose_state(pci, state));
2437        return 0;
2438}
2439
2440static int es1968_resume(struct pci_dev *pci)
2441{
2442        struct snd_card *card = pci_get_drvdata(pci);
2443        struct es1968 *chip = card->private_data;
2444        struct esschan *es;
2445
2446        if (! chip->do_pm)
2447                return 0;
2448
2449        /* restore all our config */
2450        pci_set_power_state(pci, PCI_D0);
2451        pci_restore_state(pci);
2452        if (pci_enable_device(pci) < 0) {
2453                printk(KERN_ERR "es1968: pci_enable_device failed, "
2454                       "disabling device\n");
2455                snd_card_disconnect(card);
2456                return -EIO;
2457        }
2458        pci_set_master(pci);
2459
2460        snd_es1968_chip_init(chip);
2461
2462        /* need to restore the base pointers.. */ 
2463        if (chip->dma.addr) {
2464                /* set PCMBAR */
2465                wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
2466        }
2467
2468        snd_es1968_start_irq(chip);
2469
2470        /* restore ac97 state */
2471        snd_ac97_resume(chip->ac97);
2472
2473        list_for_each_entry(es, &chip->substream_list, list) {
2474                switch (es->mode) {
2475                case ESM_MODE_PLAY:
2476                        snd_es1968_playback_setup(chip, es, es->substream->runtime);
2477                        break;
2478                case ESM_MODE_CAPTURE:
2479                        snd_es1968_capture_setup(chip, es, es->substream->runtime);
2480                        break;
2481                }
2482        }
2483
2484        /* start timer again */
2485        if (chip->bobclient)
2486                snd_es1968_bob_start(chip);
2487
2488        snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2489        chip->in_suspend = 0;
2490        return 0;
2491}
2492#endif /* CONFIG_PM */
2493
2494#ifdef SUPPORT_JOYSTICK
2495#define JOYSTICK_ADDR   0x200
2496static int __devinit snd_es1968_create_gameport(struct es1968 *chip, int dev)
2497{
2498        struct gameport *gp;
2499        struct resource *r;
2500        u16 val;
2501
2502        if (!joystick[dev])
2503                return -ENODEV;
2504
2505        r = request_region(JOYSTICK_ADDR, 8, "ES1968 gameport");
2506        if (!r)
2507                return -EBUSY;
2508
2509        chip->gameport = gp = gameport_allocate_port();
2510        if (!gp) {
2511                printk(KERN_ERR "es1968: cannot allocate memory for gameport\n");
2512                release_and_free_resource(r);
2513                return -ENOMEM;
2514        }
2515
2516        pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);
2517        pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);
2518
2519        gameport_set_name(gp, "ES1968 Gameport");
2520        gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2521        gameport_set_dev_parent(gp, &chip->pci->dev);
2522        gp->io = JOYSTICK_ADDR;
2523        gameport_set_port_data(gp, r);
2524
2525        gameport_register_port(gp);
2526
2527        return 0;
2528}
2529
2530static void snd_es1968_free_gameport(struct es1968 *chip)
2531{
2532        if (chip->gameport) {
2533                struct resource *r = gameport_get_port_data(chip->gameport);
2534
2535                gameport_unregister_port(chip->gameport);
2536                chip->gameport = NULL;
2537
2538                release_and_free_resource(r);
2539        }
2540}
2541#else
2542static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }
2543static inline void snd_es1968_free_gameport(struct es1968 *chip) { }
2544#endif
2545
2546#ifdef CONFIG_SND_ES1968_INPUT
2547static int __devinit snd_es1968_input_register(struct es1968 *chip)
2548{
2549        struct input_dev *input_dev;
2550        int err;
2551
2552        input_dev = input_allocate_device();
2553        if (!input_dev)
2554                return -ENOMEM;
2555
2556        snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0",
2557                 pci_name(chip->pci));
2558
2559        input_dev->name = chip->card->driver;
2560        input_dev->phys = chip->phys;
2561        input_dev->id.bustype = BUS_PCI;
2562        input_dev->id.vendor  = chip->pci->vendor;
2563        input_dev->id.product = chip->pci->device;
2564        input_dev->dev.parent = &chip->pci->dev;
2565
2566        __set_bit(EV_KEY, input_dev->evbit);
2567        __set_bit(KEY_MUTE, input_dev->keybit);
2568        __set_bit(KEY_VOLUMEDOWN, input_dev->keybit);
2569        __set_bit(KEY_VOLUMEUP, input_dev->keybit);
2570
2571        err = input_register_device(input_dev);
2572        if (err) {
2573                input_free_device(input_dev);
2574                return err;
2575        }
2576
2577        chip->input_dev = input_dev;
2578        return 0;
2579}
2580#endif /* CONFIG_SND_ES1968_INPUT */
2581
2582#ifdef CONFIG_SND_ES1968_RADIO
2583#define GPIO_DATA       0x60
2584#define IO_MASK         4      /* mask      register offset from GPIO_DATA
2585                                bits 1=unmask write to given bit */
2586#define IO_DIR          8      /* direction register offset from GPIO_DATA
2587                                bits 0/1=read/write direction */
2588/* mask bits for GPIO lines */
2589#define STR_DATA        0x0040 /* GPIO6 */
2590#define STR_CLK         0x0080 /* GPIO7 */
2591#define STR_WREN        0x0100 /* GPIO8 */
2592#define STR_MOST        0x0200 /* GPIO9 */
2593
2594static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
2595{
2596        struct es1968 *chip = tea->private_data;
2597        unsigned long io = chip->io_port + GPIO_DATA;
2598        u16 val = 0;
2599
2600        val |= (pins & TEA575X_DATA) ? STR_DATA : 0;
2601        val |= (pins & TEA575X_CLK)  ? STR_CLK  : 0;
2602        val |= (pins & TEA575X_WREN) ? STR_WREN : 0;
2603
2604        outw(val, io);
2605}
2606
2607static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea)
2608{
2609        struct es1968 *chip = tea->private_data;
2610        unsigned long io = chip->io_port + GPIO_DATA;
2611        u16 val = inw(io);
2612
2613        return  (val & STR_DATA) ? TEA575X_DATA : 0 |
2614                (val & STR_MOST) ? TEA575X_MOST : 0;
2615}
2616
2617static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)
2618{
2619        struct es1968 *chip = tea->private_data;
2620        unsigned long io = chip->io_port + GPIO_DATA;
2621        u16 odir = inw(io + IO_DIR);
2622
2623        if (output) {
2624                outw(~(STR_DATA | STR_CLK | STR_WREN), io + IO_MASK);
2625                outw(odir | STR_DATA | STR_CLK | STR_WREN, io + IO_DIR);
2626        } else {
2627                outw(~(STR_CLK | STR_WREN | STR_DATA | STR_MOST), io + IO_MASK);
2628                outw((odir & ~(STR_DATA | STR_MOST)) | STR_CLK | STR_WREN, io + IO_DIR);
2629        }
2630}
2631
2632static struct snd_tea575x_ops snd_es1968_tea_ops = {
2633        .set_pins = snd_es1968_tea575x_set_pins,
2634        .get_pins = snd_es1968_tea575x_get_pins,
2635        .set_direction = snd_es1968_tea575x_set_direction,
2636};
2637#endif
2638
2639static int snd_es1968_free(struct es1968 *chip)
2640{
2641#ifdef CONFIG_SND_ES1968_INPUT
2642        if (chip->input_dev)
2643                input_unregister_device(chip->input_dev);
2644#endif
2645
2646        if (chip->io_port) {
2647                if (chip->irq >= 0)
2648                        synchronize_irq(chip->irq);
2649                outw(1, chip->io_port + 0x04); /* clear WP interrupts */
2650                outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */
2651        }
2652
2653#ifdef CONFIG_SND_ES1968_RADIO
2654        snd_tea575x_exit(&chip->tea);
2655#endif
2656
2657        if (chip->irq >= 0)
2658                free_irq(chip->irq, chip);
2659        snd_es1968_free_gameport(chip);
2660        pci_release_regions(chip->pci);
2661        pci_disable_device(chip->pci);
2662        kfree(chip);
2663        return 0;
2664}
2665
2666static int snd_es1968_dev_free(struct snd_device *device)
2667{
2668        struct es1968 *chip = device->device_data;
2669        return snd_es1968_free(chip);
2670}
2671
2672struct ess_device_list {
2673        unsigned short type;    /* chip type */
2674        unsigned short vendor;  /* subsystem vendor id */
2675};
2676
2677static struct ess_device_list pm_whitelist[] __devinitdata = {
2678        { TYPE_MAESTRO2E, 0x0e11 },     /* Compaq Armada */
2679        { TYPE_MAESTRO2E, 0x1028 },
2680        { TYPE_MAESTRO2E, 0x103c },
2681        { TYPE_MAESTRO2E, 0x1179 },
2682        { TYPE_MAESTRO2E, 0x14c0 },     /* HP omnibook 4150 */
2683        { TYPE_MAESTRO2E, 0x1558 },
2684};
2685
2686static struct ess_device_list mpu_blacklist[] __devinitdata = {
2687        { TYPE_MAESTRO2, 0x125d },
2688};
2689
2690static int __devinit snd_es1968_create(struct snd_card *card,
2691                                       struct pci_dev *pci,
2692                                       int total_bufsize,
2693                                       int play_streams,
2694                                       int capt_streams,
2695                                       int chip_type,
2696                                       int do_pm,
2697                                       struct es1968 **chip_ret)
2698{
2699        static struct snd_device_ops ops = {
2700                .dev_free =     snd_es1968_dev_free,
2701        };
2702        struct es1968 *chip;
2703        int i, err;
2704
2705        *chip_ret = NULL;
2706
2707        /* enable PCI device */
2708        if ((err = pci_enable_device(pci)) < 0)
2709                return err;
2710        /* check, if we can restrict PCI DMA transfers to 28 bits */
2711        if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2712            pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2713                snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2714                pci_disable_device(pci);
2715                return -ENXIO;
2716        }
2717
2718        chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2719        if (! chip) {
2720                pci_disable_device(pci);
2721                return -ENOMEM;
2722        }
2723
2724        /* Set Vars */
2725        chip->type = chip_type;
2726        spin_lock_init(&chip->reg_lock);
2727        spin_lock_init(&chip->substream_lock);
2728        INIT_LIST_HEAD(&chip->buf_list);
2729        INIT_LIST_HEAD(&chip->substream_list);
2730        mutex_init(&chip->memory_mutex);
2731#ifndef CONFIG_SND_ES1968_INPUT
2732        spin_lock_init(&chip->ac97_lock);
2733        tasklet_init(&chip->hwvol_tq, es1968_update_hw_volume, (unsigned long)chip);
2734#endif
2735        chip->card = card;
2736        chip->pci = pci;
2737        chip->irq = -1;
2738        chip->total_bufsize = total_bufsize;    /* in bytes */
2739        chip->playback_streams = play_streams;
2740        chip->capture_streams = capt_streams;
2741
2742        if ((err = pci_request_regions(pci, "ESS Maestro")) < 0) {
2743                kfree(chip);
2744                pci_disable_device(pci);
2745                return err;
2746        }
2747        chip->io_port = pci_resource_start(pci, 0);
2748        if (request_irq(pci->irq, snd_es1968_interrupt, IRQF_SHARED,
2749                        "ESS Maestro", chip)) {
2750                snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2751                snd_es1968_free(chip);
2752                return -EBUSY;
2753        }
2754        chip->irq = pci->irq;
2755                
2756        /* Clear Maestro_map */
2757        for (i = 0; i < 32; i++)
2758                chip->maestro_map[i] = 0;
2759
2760        /* Clear Apu Map */
2761        for (i = 0; i < NR_APUS; i++)
2762                chip->apu[i] = ESM_APU_FREE;
2763
2764        /* just to be sure */
2765        pci_set_master(pci);
2766
2767        if (do_pm > 1) {
2768                /* disable power-management if not on the whitelist */
2769                unsigned short vend;
2770                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2771                for (i = 0; i < (int)ARRAY_SIZE(pm_whitelist); i++) {
2772                        if (chip->type == pm_whitelist[i].type &&
2773                            vend == pm_whitelist[i].vendor) {
2774                                do_pm = 1;
2775                                break;
2776                        }
2777                }
2778                if (do_pm > 1) {
2779                        /* not matched; disabling pm */
2780                        printk(KERN_INFO "es1968: not attempting power management.\n");
2781                        do_pm = 0;
2782                }
2783        }
2784        chip->do_pm = do_pm;
2785
2786        snd_es1968_chip_init(chip);
2787
2788        if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2789                snd_es1968_free(chip);
2790                return err;
2791        }
2792
2793        snd_card_set_dev(card, &pci->dev);
2794
2795#ifdef CONFIG_SND_ES1968_RADIO
2796        chip->tea.private_data = chip;
2797        chip->tea.ops = &snd_es1968_tea_ops;
2798        strlcpy(chip->tea.card, "SF64-PCE2", sizeof(chip->tea.card));
2799        sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
2800        if (!snd_tea575x_init(&chip->tea))
2801                printk(KERN_INFO "es1968: detected TEA575x radio\n");
2802#endif
2803
2804        *chip_ret = chip;
2805
2806        return 0;
2807}
2808
2809
2810/*
2811 */
2812static int __devinit snd_es1968_probe(struct pci_dev *pci,
2813                                      const struct pci_device_id *pci_id)
2814{
2815        static int dev;
2816        struct snd_card *card;
2817        struct es1968 *chip;
2818        unsigned int i;
2819        int err;
2820
2821        if (dev >= SNDRV_CARDS)
2822                return -ENODEV;
2823        if (!enable[dev]) {
2824                dev++;
2825                return -ENOENT;
2826        }
2827
2828        err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2829        if (err < 0)
2830                return err;
2831                
2832        if (total_bufsize[dev] < 128)
2833                total_bufsize[dev] = 128;
2834        if (total_bufsize[dev] > 4096)
2835                total_bufsize[dev] = 4096;
2836        if ((err = snd_es1968_create(card, pci,
2837                                     total_bufsize[dev] * 1024, /* in bytes */
2838                                     pcm_substreams_p[dev], 
2839                                     pcm_substreams_c[dev],
2840                                     pci_id->driver_data,
2841                                     use_pm[dev],
2842                                     &chip)) < 0) {
2843                snd_card_free(card);
2844                return err;
2845        }
2846        card->private_data = chip;
2847
2848        switch (chip->type) {
2849        case TYPE_MAESTRO2E:
2850                strcpy(card->driver, "ES1978");
2851                strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");
2852                break;
2853        case TYPE_MAESTRO2:
2854                strcpy(card->driver, "ES1968");
2855                strcpy(card->shortname, "ESS ES1968 (Maestro 2)");
2856                break;
2857        case TYPE_MAESTRO:
2858                strcpy(card->driver, "ESM1");
2859                strcpy(card->shortname, "ESS Maestro 1");
2860                break;
2861        }
2862
2863        if ((err = snd_es1968_pcm(chip, 0)) < 0) {
2864                snd_card_free(card);
2865                return err;
2866        }
2867
2868        if ((err = snd_es1968_mixer(chip)) < 0) {
2869                snd_card_free(card);
2870                return err;
2871        }
2872
2873        if (enable_mpu[dev] == 2) {
2874                /* check the black list */
2875                unsigned short vend;
2876                pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2877                for (i = 0; i < ARRAY_SIZE(mpu_blacklist); i++) {
2878                        if (chip->type == mpu_blacklist[i].type &&
2879                            vend == mpu_blacklist[i].vendor) {
2880                                enable_mpu[dev] = 0;
2881                                break;
2882                        }
2883                }
2884        }
2885        if (enable_mpu[dev]) {
2886                if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
2887                                               chip->io_port + ESM_MPU401_PORT,
2888                                               MPU401_INFO_INTEGRATED,
2889                                               chip->irq, 0, &chip->rmidi)) < 0) {
2890                        printk(KERN_WARNING "es1968: skipping MPU-401 MIDI support..\n");
2891                }
2892        }
2893
2894        snd_es1968_create_gameport(chip, dev);
2895
2896#ifdef CONFIG_SND_ES1968_INPUT
2897        err = snd_es1968_input_register(chip);
2898        if (err)
2899                snd_printk(KERN_WARNING "Input device registration "
2900                        "failed with error %i", err);
2901#endif
2902
2903        snd_es1968_start_irq(chip);
2904
2905        chip->clock = clock[dev];
2906        if (! chip->clock)
2907                es1968_measure_clock(chip);
2908
2909        sprintf(card->longname, "%s at 0x%lx, irq %i",
2910                card->shortname, chip->io_port, chip->irq);
2911
2912        if ((err = snd_card_register(card)) < 0) {
2913                snd_card_free(card);
2914                return err;
2915        }
2916        pci_set_drvdata(pci, card);
2917        dev++;
2918        return 0;
2919}
2920
2921static void __devexit snd_es1968_remove(struct pci_dev *pci)
2922{
2923        snd_card_free(pci_get_drvdata(pci));
2924        pci_set_drvdata(pci, NULL);
2925}
2926
2927static struct pci_driver driver = {
2928        .name = "ES1968 (ESS Maestro)",
2929        .id_table = snd_es1968_ids,
2930        .probe = snd_es1968_probe,
2931        .remove = __devexit_p(snd_es1968_remove),
2932#ifdef CONFIG_PM
2933        .suspend = es1968_suspend,
2934        .resume = es1968_resume,
2935#endif
2936};
2937
2938static int __init alsa_card_es1968_init(void)
2939{
2940        return pci_register_driver(&driver);
2941}
2942
2943static void __exit alsa_card_es1968_exit(void)
2944{
2945        pci_unregister_driver(&driver);
2946}
2947
2948module_init(alsa_card_es1968_init)
2949module_exit(alsa_card_es1968_exit)
2950