linux/arch/mips/pnx833x/common/platform.c
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   1/*
   2 *  platform.c: platform support for PNX833X.
   3 *
   4 *  Copyright 2008 NXP Semiconductors
   5 *        Chris Steel <chris.steel@nxp.com>
   6 *    Daniel Laird <daniel.j.laird@nxp.com>
   7 *
   8 *  Based on software written by:
   9 *      Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
  10 *
  11 *  This program is free software; you can redistribute it and/or modify
  12 *  it under the terms of the GNU General Public License as published by
  13 *  the Free Software Foundation; either version 2 of the License, or
  14 *  (at your option) any later version.
  15 *
  16 *  This program is distributed in the hope that it will be useful,
  17 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 *  GNU General Public License for more details.
  20 *
  21 *  You should have received a copy of the GNU General Public License
  22 *  along with this program; if not, write to the Free Software
  23 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24 */
  25#include <linux/device.h>
  26#include <linux/dma-mapping.h>
  27#include <linux/platform_device.h>
  28#include <linux/kernel.h>
  29#include <linux/init.h>
  30#include <linux/resource.h>
  31#include <linux/serial.h>
  32#include <linux/serial_pnx8xxx.h>
  33#include <linux/mtd/nand.h>
  34#include <linux/mtd/partitions.h>
  35
  36#ifdef CONFIG_I2C_PNX0105
  37/* Until i2c driver available in kernel.*/
  38#include <linux/i2c-pnx0105.h>
  39#endif
  40
  41#include <irq.h>
  42#include <irq-mapping.h>
  43#include <pnx833x.h>
  44
  45static u64 uart_dmamask     = DMA_BIT_MASK(32);
  46
  47static struct resource pnx833x_uart_resources[] = {
  48        [0] = {
  49                .start          = PNX833X_UART0_PORTS_START,
  50                .end            = PNX833X_UART0_PORTS_END,
  51                .flags          = IORESOURCE_MEM,
  52        },
  53        [1] = {
  54                .start          = PNX833X_PIC_UART0_INT,
  55                .end            = PNX833X_PIC_UART0_INT,
  56                .flags          = IORESOURCE_IRQ,
  57        },
  58        [2] = {
  59                .start          = PNX833X_UART1_PORTS_START,
  60                .end            = PNX833X_UART1_PORTS_END,
  61                .flags          = IORESOURCE_MEM,
  62        },
  63        [3] = {
  64                .start          = PNX833X_PIC_UART1_INT,
  65                .end            = PNX833X_PIC_UART1_INT,
  66                .flags          = IORESOURCE_IRQ,
  67        },
  68};
  69
  70struct pnx8xxx_port pnx8xxx_ports[] = {
  71        [0] = {
  72                .port   = {
  73                        .type           = PORT_PNX8XXX,
  74                        .iotype         = UPIO_MEM,
  75                        .membase        = (void __iomem *)PNX833X_UART0_PORTS_START,
  76                        .mapbase        = PNX833X_UART0_PORTS_START,
  77                        .irq            = PNX833X_PIC_UART0_INT,
  78                        .uartclk        = 3692300,
  79                        .fifosize       = 16,
  80                        .flags          = UPF_BOOT_AUTOCONF,
  81                        .line           = 0,
  82                },
  83        },
  84        [1] = {
  85                .port   = {
  86                        .type           = PORT_PNX8XXX,
  87                        .iotype         = UPIO_MEM,
  88                        .membase        = (void __iomem *)PNX833X_UART1_PORTS_START,
  89                        .mapbase        = PNX833X_UART1_PORTS_START,
  90                        .irq            = PNX833X_PIC_UART1_INT,
  91                        .uartclk        = 3692300,
  92                        .fifosize       = 16,
  93                        .flags          = UPF_BOOT_AUTOCONF,
  94                        .line           = 1,
  95                },
  96        },
  97};
  98
  99static struct platform_device pnx833x_uart_device = {
 100        .name           = "pnx8xxx-uart",
 101        .id             = -1,
 102        .dev = {
 103                .dma_mask               = &uart_dmamask,
 104                .coherent_dma_mask      = DMA_BIT_MASK(32),
 105                .platform_data          = pnx8xxx_ports,
 106        },
 107        .num_resources  = ARRAY_SIZE(pnx833x_uart_resources),
 108        .resource       = pnx833x_uart_resources,
 109};
 110
 111static u64 ehci_dmamask     = DMA_BIT_MASK(32);
 112
 113static struct resource pnx833x_usb_ehci_resources[] = {
 114        [0] = {
 115                .start          = PNX833X_USB_PORTS_START,
 116                .end            = PNX833X_USB_PORTS_END,
 117                .flags          = IORESOURCE_MEM,
 118        },
 119        [1] = {
 120                .start          = PNX833X_PIC_USB_INT,
 121                .end            = PNX833X_PIC_USB_INT,
 122                .flags          = IORESOURCE_IRQ,
 123        },
 124};
 125
 126static struct platform_device pnx833x_usb_ehci_device = {
 127        .name           = "pnx833x-ehci",
 128        .id             = -1,
 129        .dev = {
 130                .dma_mask               = &ehci_dmamask,
 131                .coherent_dma_mask      = DMA_BIT_MASK(32),
 132        },
 133        .num_resources  = ARRAY_SIZE(pnx833x_usb_ehci_resources),
 134        .resource       = pnx833x_usb_ehci_resources,
 135};
 136
 137#ifdef CONFIG_I2C_PNX0105
 138static struct resource pnx833x_i2c0_resources[] = {
 139        {
 140                .start          = PNX833X_I2C0_PORTS_START,
 141                .end            = PNX833X_I2C0_PORTS_END,
 142                .flags          = IORESOURCE_MEM,
 143        },
 144        {
 145                .start          = PNX833X_PIC_I2C0_INT,
 146                .end            = PNX833X_PIC_I2C0_INT,
 147                .flags          = IORESOURCE_IRQ,
 148        },
 149};
 150
 151static struct resource pnx833x_i2c1_resources[] = {
 152        {
 153                .start          = PNX833X_I2C1_PORTS_START,
 154                .end            = PNX833X_I2C1_PORTS_END,
 155                .flags          = IORESOURCE_MEM,
 156        },
 157        {
 158                .start          = PNX833X_PIC_I2C1_INT,
 159                .end            = PNX833X_PIC_I2C1_INT,
 160                .flags          = IORESOURCE_IRQ,
 161        },
 162};
 163
 164static struct i2c_pnx0105_dev pnx833x_i2c_dev[] = {
 165        {
 166                .base = PNX833X_I2C0_PORTS_START,
 167                .irq = -1, /* should be PNX833X_PIC_I2C0_INT but polling is faster */
 168                .clock = 6,     /* 0 == 400 kHz, 4 == 100 kHz(Maximum HDMI), 6 = 50kHz(Preferred HDCP) */
 169                .bus_addr = 0,  /* no slave support */
 170        },
 171        {
 172                .base = PNX833X_I2C1_PORTS_START,
 173                .irq = -1,      /* on high freq, polling is faster */
 174                /*.irq = PNX833X_PIC_I2C1_INT,*/
 175                .clock = 4,     /* 0 == 400 kHz, 4 == 100 kHz. 100 kHz seems a safe default for now */
 176                .bus_addr = 0,  /* no slave support */
 177        },
 178};
 179
 180static struct platform_device pnx833x_i2c0_device = {
 181        .name           = "i2c-pnx0105",
 182        .id             = 0,
 183        .dev = {
 184                .platform_data = &pnx833x_i2c_dev[0],
 185        },
 186        .num_resources  = ARRAY_SIZE(pnx833x_i2c0_resources),
 187        .resource       = pnx833x_i2c0_resources,
 188};
 189
 190static struct platform_device pnx833x_i2c1_device = {
 191        .name           = "i2c-pnx0105",
 192        .id             = 1,
 193        .dev = {
 194                .platform_data = &pnx833x_i2c_dev[1],
 195        },
 196        .num_resources  = ARRAY_SIZE(pnx833x_i2c1_resources),
 197        .resource       = pnx833x_i2c1_resources,
 198};
 199#endif
 200
 201static u64 ethernet_dmamask = DMA_BIT_MASK(32);
 202
 203static struct resource pnx833x_ethernet_resources[] = {
 204        [0] = {
 205                .start = PNX8335_IP3902_PORTS_START,
 206                .end   = PNX8335_IP3902_PORTS_END,
 207                .flags = IORESOURCE_MEM,
 208        },
 209        [1] = {
 210                .start = PNX8335_PIC_ETHERNET_INT,
 211                .end   = PNX8335_PIC_ETHERNET_INT,
 212                .flags = IORESOURCE_IRQ,
 213        },
 214};
 215
 216static struct platform_device pnx833x_ethernet_device = {
 217        .name = "ip3902-eth",
 218        .id   = -1,
 219        .dev  = {
 220                .dma_mask          = &ethernet_dmamask,
 221                .coherent_dma_mask = DMA_BIT_MASK(32),
 222        },
 223        .num_resources = ARRAY_SIZE(pnx833x_ethernet_resources),
 224        .resource      = pnx833x_ethernet_resources,
 225};
 226
 227static struct resource pnx833x_sata_resources[] = {
 228        [0] = {
 229                .start = PNX8335_SATA_PORTS_START,
 230                .end   = PNX8335_SATA_PORTS_END,
 231                .flags = IORESOURCE_MEM,
 232        },
 233        [1] = {
 234                .start = PNX8335_PIC_SATA_INT,
 235                .end   = PNX8335_PIC_SATA_INT,
 236                .flags = IORESOURCE_IRQ,
 237        },
 238};
 239
 240static struct platform_device pnx833x_sata_device = {
 241        .name          = "pnx833x-sata",
 242        .id            = -1,
 243        .num_resources = ARRAY_SIZE(pnx833x_sata_resources),
 244        .resource      = pnx833x_sata_resources,
 245};
 246
 247static const char *part_probes[] = {
 248        "cmdlinepart",
 249        NULL
 250};
 251
 252static void
 253pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 254{
 255        struct nand_chip *this = mtd->priv;
 256        unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
 257
 258        if (cmd == NAND_CMD_NONE)
 259                return;
 260
 261        if (ctrl & NAND_CLE)
 262                writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_CLE_MASK));
 263        else
 264                writeb(cmd, (void __iomem *)(nandaddr + PNX8335_NAND_ALE_MASK));
 265}
 266
 267static struct platform_nand_data pnx833x_flash_nand_data = {
 268        .chip = {
 269                .nr_chips               = 1,
 270                .chip_delay             = 25,
 271                .part_probe_types       = part_probes,
 272        },
 273        .ctrl = {
 274                .cmd_ctrl               = pnx833x_flash_nand_cmd_ctrl
 275        }
 276};
 277
 278/*
 279 * Set start to be the correct address (PNX8335_NAND_BASE with no 0xb!!),
 280 * 12 bytes more seems to be the standard that allows for NAND access.
 281 */
 282static struct resource pnx833x_flash_nand_resource = {
 283        .start  = PNX8335_NAND_BASE,
 284        .end    = PNX8335_NAND_BASE + 12,
 285        .flags  = IORESOURCE_MEM,
 286};
 287
 288static struct platform_device pnx833x_flash_nand = {
 289        .name           = "gen_nand",
 290        .id                     = -1,
 291        .num_resources  = 1,
 292        .resource           = &pnx833x_flash_nand_resource,
 293        .dev            = {
 294                .platform_data = &pnx833x_flash_nand_data,
 295        },
 296};
 297
 298static struct platform_device *pnx833x_platform_devices[] __initdata = {
 299        &pnx833x_uart_device,
 300        &pnx833x_usb_ehci_device,
 301#ifdef CONFIG_I2C_PNX0105
 302        &pnx833x_i2c0_device,
 303        &pnx833x_i2c1_device,
 304#endif
 305        &pnx833x_ethernet_device,
 306        &pnx833x_sata_device,
 307        &pnx833x_flash_nand,
 308};
 309
 310static int __init pnx833x_platform_init(void)
 311{
 312        int res;
 313
 314        res = platform_add_devices(pnx833x_platform_devices,
 315                                   ARRAY_SIZE(pnx833x_platform_devices));
 316
 317        return res;
 318}
 319
 320arch_initcall(pnx833x_platform_init);
 321