1
2
3
4
5
6
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/fs.h>
10#include <linux/mm.h>
11#include <linux/i2c.h>
12#include <linux/interrupt.h>
13#include <linux/spinlock.h>
14#include <linux/slab.h>
15#include <linux/device.h>
16#include <linux/wait.h>
17#include <linux/list.h>
18#include <linux/dma-mapping.h>
19#include <linux/delay.h>
20#include <linux/vmalloc.h>
21#include <linux/io.h>
22#include <linux/videodev2.h>
23#include <media/v4l2-device.h>
24#include <media/v4l2-ioctl.h>
25#include <media/v4l2-chip-ident.h>
26#include <media/ov7670.h>
27#include <media/videobuf2-vmalloc.h>
28#include <media/videobuf2-dma-contig.h>
29#include <media/videobuf2-dma-sg.h>
30
31#include "mcam-core.h"
32
33
34
35
36static int frames;
37static int singles;
38static int delivered;
39
40#ifdef MCAM_MODE_VMALLOC
41
42
43
44
45
46
47
48
49
50
51
52
53
54static int alloc_bufs_at_read;
55module_param(alloc_bufs_at_read, bool, 0444);
56MODULE_PARM_DESC(alloc_bufs_at_read,
57 "Non-zero value causes DMA buffers to be allocated when the "
58 "video capture device is read, rather than at module load "
59 "time. This saves memory, but decreases the chances of "
60 "successfully getting those buffers. This parameter is "
61 "only used in the vmalloc buffer mode");
62
63static int n_dma_bufs = 3;
64module_param(n_dma_bufs, uint, 0644);
65MODULE_PARM_DESC(n_dma_bufs,
66 "The number of DMA buffers to allocate. Can be either two "
67 "(saves memory, makes timing tighter) or three.");
68
69static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2;
70module_param(dma_buf_size, uint, 0444);
71MODULE_PARM_DESC(dma_buf_size,
72 "The size of the allocated DMA buffers. If actual operating "
73 "parameters require larger buffers, an attempt to reallocate "
74 "will be made.");
75#else
76static const int alloc_bufs_at_read = 0;
77static const int n_dma_bufs = 3;
78#endif
79
80static int flip;
81module_param(flip, bool, 0444);
82MODULE_PARM_DESC(flip,
83 "If set, the sensor will be instructed to flip the image "
84 "vertically.");
85
86static int buffer_mode = -1;
87module_param(buffer_mode, int, 0444);
88MODULE_PARM_DESC(buffer_mode,
89 "Set the buffer mode to be used; default is to go with what "
90 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
91 "DMA contiguous.");
92
93
94
95
96#define CF_BUF0_VALID 0
97#define CF_BUF1_VALID 1
98#define CF_BUF2_VALID 2
99#define CF_DMA_ACTIVE 3
100#define CF_CONFIG_NEEDED 4
101#define CF_SINGLE_BUFFER 5
102#define CF_SG_RESTART 6
103
104#define sensor_call(cam, o, f, args...) \
105 v4l2_subdev_call(cam->sensor, o, f, ##args)
106
107static struct mcam_format_struct {
108 __u8 *desc;
109 __u32 pixelformat;
110 int bpp;
111 enum v4l2_mbus_pixelcode mbus_code;
112} mcam_formats[] = {
113 {
114 .desc = "YUYV 4:2:2",
115 .pixelformat = V4L2_PIX_FMT_YUYV,
116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
117 .bpp = 2,
118 },
119 {
120 .desc = "RGB 444",
121 .pixelformat = V4L2_PIX_FMT_RGB444,
122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
123 .bpp = 2,
124 },
125 {
126 .desc = "RGB 565",
127 .pixelformat = V4L2_PIX_FMT_RGB565,
128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
129 .bpp = 2,
130 },
131 {
132 .desc = "Raw RGB Bayer",
133 .pixelformat = V4L2_PIX_FMT_SBGGR8,
134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
135 .bpp = 1
136 },
137};
138#define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
139
140static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
141{
142 unsigned i;
143
144 for (i = 0; i < N_MCAM_FMTS; i++)
145 if (mcam_formats[i].pixelformat == pixelformat)
146 return mcam_formats + i;
147
148 return mcam_formats;
149}
150
151
152
153
154static const struct v4l2_pix_format mcam_def_pix_format = {
155 .width = VGA_WIDTH,
156 .height = VGA_HEIGHT,
157 .pixelformat = V4L2_PIX_FMT_YUYV,
158 .field = V4L2_FIELD_NONE,
159 .bytesperline = VGA_WIDTH*2,
160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
161};
162
163static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
164 V4L2_MBUS_FMT_YUYV8_2X8;
165
166
167
168
169
170
171
172
173struct mcam_dma_desc {
174 u32 dma_addr;
175 u32 segment_len;
176};
177
178
179
180
181
182
183struct mcam_vb_buffer {
184 struct vb2_buffer vb_buf;
185 struct list_head queue;
186 struct mcam_dma_desc *dma_desc;
187 dma_addr_t dma_desc_pa;
188 int dma_desc_nent;
189};
190
191static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
192{
193 return container_of(vb, struct mcam_vb_buffer, vb_buf);
194}
195
196
197
198
199static void mcam_buffer_done(struct mcam_camera *cam, int frame,
200 struct vb2_buffer *vbuf)
201{
202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
206}
207
208
209
210
211
212
213#define cam_err(cam, fmt, arg...) \
214 dev_err((cam)->dev, fmt, ##arg);
215#define cam_warn(cam, fmt, arg...) \
216 dev_warn((cam)->dev, fmt, ##arg);
217#define cam_dbg(cam, fmt, arg...) \
218 dev_dbg((cam)->dev, fmt, ##arg);
219
220
221
222
223
224static void mcam_reset_buffers(struct mcam_camera *cam)
225{
226 int i;
227
228 cam->next_buf = -1;
229 for (i = 0; i < cam->nbufs; i++)
230 clear_bit(i, &cam->flags);
231}
232
233static inline int mcam_needs_config(struct mcam_camera *cam)
234{
235 return test_bit(CF_CONFIG_NEEDED, &cam->flags);
236}
237
238static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
239{
240 if (needed)
241 set_bit(CF_CONFIG_NEEDED, &cam->flags);
242 else
243 clear_bit(CF_CONFIG_NEEDED, &cam->flags);
244}
245
246
247
248
249
250
251static void mcam_ctlr_start(struct mcam_camera *cam)
252{
253
254
255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
256}
257
258static void mcam_ctlr_stop(struct mcam_camera *cam)
259{
260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
261}
262
263
264
265#ifdef MCAM_MODE_VMALLOC
266
267
268
269
270
271
272
273static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
274{
275 int i;
276
277 mcam_set_config_needed(cam, 1);
278 if (loadtime)
279 cam->dma_buf_size = dma_buf_size;
280 else
281 cam->dma_buf_size = cam->pix_format.sizeimage;
282 if (n_dma_bufs > 3)
283 n_dma_bufs = 3;
284
285 cam->nbufs = 0;
286 for (i = 0; i < n_dma_bufs; i++) {
287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
288 cam->dma_buf_size, cam->dma_handles + i,
289 GFP_KERNEL);
290 if (cam->dma_bufs[i] == NULL) {
291 cam_warn(cam, "Failed to allocate DMA buffer\n");
292 break;
293 }
294 (cam->nbufs)++;
295 }
296
297 switch (cam->nbufs) {
298 case 1:
299 dma_free_coherent(cam->dev, cam->dma_buf_size,
300 cam->dma_bufs[0], cam->dma_handles[0]);
301 cam->nbufs = 0;
302 case 0:
303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
304 return -ENOMEM;
305
306 case 2:
307 if (n_dma_bufs > 2)
308 cam_warn(cam, "Will limp along with only 2 buffers\n");
309 break;
310 }
311 return 0;
312}
313
314static void mcam_free_dma_bufs(struct mcam_camera *cam)
315{
316 int i;
317
318 for (i = 0; i < cam->nbufs; i++) {
319 dma_free_coherent(cam->dev, cam->dma_buf_size,
320 cam->dma_bufs[i], cam->dma_handles[i]);
321 cam->dma_bufs[i] = NULL;
322 }
323 cam->nbufs = 0;
324}
325
326
327
328
329
330static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
331{
332
333
334
335
336
337
338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
340 if (cam->nbufs > 2) {
341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
343 } else
344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
345 if (cam->chip_id == V4L2_IDENT_CAFE)
346 mcam_reg_write(cam, REG_UBAR, 0);
347}
348
349
350
351
352static void mcam_frame_tasklet(unsigned long data)
353{
354 struct mcam_camera *cam = (struct mcam_camera *) data;
355 int i;
356 unsigned long flags;
357 struct mcam_vb_buffer *buf;
358
359 spin_lock_irqsave(&cam->dev_lock, flags);
360 for (i = 0; i < cam->nbufs; i++) {
361 int bufno = cam->next_buf;
362
363 if (cam->state != S_STREAMING || bufno < 0)
364 break;
365 if (++(cam->next_buf) >= cam->nbufs)
366 cam->next_buf = 0;
367 if (!test_bit(bufno, &cam->flags))
368 continue;
369 if (list_empty(&cam->buffers)) {
370 singles++;
371 break;
372 }
373 delivered++;
374 clear_bit(bufno, &cam->flags);
375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
376 queue);
377 list_del_init(&buf->queue);
378
379
380
381 spin_unlock_irqrestore(&cam->dev_lock, flags);
382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
383 cam->pix_format.sizeimage);
384 mcam_buffer_done(cam, bufno, &buf->vb_buf);
385 spin_lock_irqsave(&cam->dev_lock, flags);
386 }
387 spin_unlock_irqrestore(&cam->dev_lock, flags);
388}
389
390
391
392
393
394static int mcam_check_dma_buffers(struct mcam_camera *cam)
395{
396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
397 mcam_free_dma_bufs(cam);
398 if (cam->nbufs == 0)
399 return mcam_alloc_dma_bufs(cam, 0);
400 return 0;
401}
402
403static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
404{
405 tasklet_schedule(&cam->s_tasklet);
406}
407
408#else
409
410static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
411{
412 return 0;
413}
414
415static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
416{
417 return;
418}
419
420static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
421{
422 return 0;
423}
424
425
426
427#endif
428
429
430#ifdef MCAM_MODE_DMA_CONTIG
431
432
433
434
435
436
437
438
439
440
441
442
443static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
444{
445 struct mcam_vb_buffer *buf;
446
447
448
449 if (list_empty(&cam->buffers)) {
450 buf = cam->vb_bufs[frame ^ 0x1];
451 cam->vb_bufs[frame] = buf;
452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
453 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
454 set_bit(CF_SINGLE_BUFFER, &cam->flags);
455 singles++;
456 return;
457 }
458
459
460
461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
462 list_del_init(&buf->queue);
463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
464 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
465 cam->vb_bufs[frame] = buf;
466 clear_bit(CF_SINGLE_BUFFER, &cam->flags);
467}
468
469
470
471
472static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
473{
474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
475 cam->nbufs = 2;
476 mcam_set_contig_buffer(cam, 0);
477 mcam_set_contig_buffer(cam, 1);
478}
479
480
481
482
483static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
484{
485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
486
487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
488 delivered++;
489 mcam_buffer_done(cam, frame, &buf->vb_buf);
490 }
491 mcam_set_contig_buffer(cam, frame);
492}
493
494#endif
495
496#ifdef MCAM_MODE_DMA_SG
497
498
499
500
501
502
503
504
505
506static void mcam_sg_next_buffer(struct mcam_camera *cam)
507{
508 struct mcam_vb_buffer *buf;
509
510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
511 list_del_init(&buf->queue);
512 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
513 mcam_reg_write(cam, REG_DESC_LEN_Y,
514 buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
515 mcam_reg_write(cam, REG_DESC_LEN_U, 0);
516 mcam_reg_write(cam, REG_DESC_LEN_V, 0);
517 cam->vb_bufs[0] = buf;
518}
519
520
521
522
523static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
524{
525 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
526 mcam_sg_next_buffer(cam);
527 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
528 cam->nbufs = 3;
529}
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
546{
547 struct mcam_vb_buffer *buf = cam->vb_bufs[0];
548
549
550
551
552
553 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
554
555
556
557
558 if (!list_empty(&cam->buffers)) {
559 mcam_sg_next_buffer(cam);
560 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
561 mcam_ctlr_start(cam);
562
563
564
565
566 } else {
567 set_bit(CF_SG_RESTART, &cam->flags);
568 singles++;
569 }
570
571
572
573 delivered++;
574 mcam_buffer_done(cam, frame, &buf->vb_buf);
575}
576
577
578
579
580
581
582
583
584static void mcam_sg_restart(struct mcam_camera *cam)
585{
586 mcam_ctlr_dma_sg(cam);
587 mcam_ctlr_start(cam);
588 clear_bit(CF_SG_RESTART, &cam->flags);
589}
590
591#else
592
593static inline void mcam_sg_restart(struct mcam_camera *cam)
594{
595 return;
596}
597
598#endif
599
600
601
602
603
604
605
606
607
608static void mcam_ctlr_image(struct mcam_camera *cam)
609{
610 int imgsz;
611 struct v4l2_pix_format *fmt = &cam->pix_format;
612
613 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
614 (fmt->bytesperline & IMGSZ_H_MASK);
615 mcam_reg_write(cam, REG_IMGSIZE, imgsz);
616 mcam_reg_write(cam, REG_IMGOFFSET, 0);
617
618 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
619 IMGP_YP_MASK);
620
621
622
623 switch (cam->pix_format.pixelformat) {
624 case V4L2_PIX_FMT_YUYV:
625 mcam_reg_write_mask(cam, REG_CTRL0,
626 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
627 C0_DF_MASK);
628 break;
629
630 case V4L2_PIX_FMT_RGB444:
631 mcam_reg_write_mask(cam, REG_CTRL0,
632 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
633 C0_DF_MASK);
634
635 break;
636
637 case V4L2_PIX_FMT_RGB565:
638 mcam_reg_write_mask(cam, REG_CTRL0,
639 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
640 C0_DF_MASK);
641 break;
642
643 default:
644 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
645 break;
646 }
647
648
649
650 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
651 C0_SIFM_MASK);
652}
653
654
655
656
657
658
659static int mcam_ctlr_configure(struct mcam_camera *cam)
660{
661 unsigned long flags;
662
663 spin_lock_irqsave(&cam->dev_lock, flags);
664 cam->dma_setup(cam);
665 mcam_ctlr_image(cam);
666 mcam_set_config_needed(cam, 0);
667 clear_bit(CF_SG_RESTART, &cam->flags);
668 spin_unlock_irqrestore(&cam->dev_lock, flags);
669 return 0;
670}
671
672static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
673{
674
675
676
677
678 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
679 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
680}
681
682static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
683{
684 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
685}
686
687
688
689static void mcam_ctlr_init(struct mcam_camera *cam)
690{
691 unsigned long flags;
692
693 spin_lock_irqsave(&cam->dev_lock, flags);
694
695
696
697 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
698
699
700
701
702 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
703
704
705
706
707 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
708 spin_unlock_irqrestore(&cam->dev_lock, flags);
709}
710
711
712
713
714
715
716static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
717{
718 unsigned long flags;
719
720
721
722
723
724
725 spin_lock_irqsave(&cam->dev_lock, flags);
726 clear_bit(CF_SG_RESTART, &cam->flags);
727 mcam_ctlr_stop(cam);
728 cam->state = S_IDLE;
729 spin_unlock_irqrestore(&cam->dev_lock, flags);
730 msleep(40);
731 if (test_bit(CF_DMA_ACTIVE, &cam->flags))
732 cam_err(cam, "Timeout waiting for DMA to end\n");
733
734 spin_lock_irqsave(&cam->dev_lock, flags);
735 mcam_ctlr_irq_disable(cam);
736 spin_unlock_irqrestore(&cam->dev_lock, flags);
737}
738
739
740
741
742static void mcam_ctlr_power_up(struct mcam_camera *cam)
743{
744 unsigned long flags;
745
746 spin_lock_irqsave(&cam->dev_lock, flags);
747 cam->plat_power_up(cam);
748 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
749 spin_unlock_irqrestore(&cam->dev_lock, flags);
750 msleep(5);
751}
752
753static void mcam_ctlr_power_down(struct mcam_camera *cam)
754{
755 unsigned long flags;
756
757 spin_lock_irqsave(&cam->dev_lock, flags);
758
759
760
761
762
763 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
764 cam->plat_power_down(cam);
765 spin_unlock_irqrestore(&cam->dev_lock, flags);
766}
767
768
769
770
771
772
773static int __mcam_cam_reset(struct mcam_camera *cam)
774{
775 return sensor_call(cam, core, reset, 0);
776}
777
778
779
780
781
782static int mcam_cam_init(struct mcam_camera *cam)
783{
784 struct v4l2_dbg_chip_ident chip;
785 int ret;
786
787 mutex_lock(&cam->s_mutex);
788 if (cam->state != S_NOTREADY)
789 cam_warn(cam, "Cam init with device in funky state %d",
790 cam->state);
791 ret = __mcam_cam_reset(cam);
792 if (ret)
793 goto out;
794 chip.ident = V4L2_IDENT_NONE;
795 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
796 chip.match.addr = cam->sensor_addr;
797 ret = sensor_call(cam, core, g_chip_ident, &chip);
798 if (ret)
799 goto out;
800 cam->sensor_type = chip.ident;
801 if (cam->sensor_type != V4L2_IDENT_OV7670) {
802 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
803 ret = -EINVAL;
804 goto out;
805 }
806
807 ret = 0;
808 cam->state = S_IDLE;
809out:
810 mcam_ctlr_power_down(cam);
811 mutex_unlock(&cam->s_mutex);
812 return ret;
813}
814
815
816
817
818
819static int mcam_cam_set_flip(struct mcam_camera *cam)
820{
821 struct v4l2_control ctrl;
822
823 memset(&ctrl, 0, sizeof(ctrl));
824 ctrl.id = V4L2_CID_VFLIP;
825 ctrl.value = flip;
826 return sensor_call(cam, core, s_ctrl, &ctrl);
827}
828
829
830static int mcam_cam_configure(struct mcam_camera *cam)
831{
832 struct v4l2_mbus_framefmt mbus_fmt;
833 int ret;
834
835 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
836 ret = sensor_call(cam, core, init, 0);
837 if (ret == 0)
838 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
839
840
841
842 ret += mcam_cam_set_flip(cam);
843 return ret;
844}
845
846
847
848
849static int mcam_read_setup(struct mcam_camera *cam)
850{
851 int ret;
852 unsigned long flags;
853
854
855
856
857
858 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
859 mcam_alloc_dma_bufs(cam, 0))
860 return -ENOMEM;
861
862 if (mcam_needs_config(cam)) {
863 mcam_cam_configure(cam);
864 ret = mcam_ctlr_configure(cam);
865 if (ret)
866 return ret;
867 }
868
869
870
871
872 spin_lock_irqsave(&cam->dev_lock, flags);
873 mcam_reset_buffers(cam);
874 mcam_ctlr_irq_enable(cam);
875 cam->state = S_STREAMING;
876 mcam_ctlr_start(cam);
877 spin_unlock_irqrestore(&cam->dev_lock, flags);
878 return 0;
879}
880
881
882
883
884
885
886static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs,
887 unsigned int *num_planes, unsigned long sizes[],
888 void *alloc_ctxs[])
889{
890 struct mcam_camera *cam = vb2_get_drv_priv(vq);
891 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
892
893 sizes[0] = cam->pix_format.sizeimage;
894 *num_planes = 1;
895 if (*nbufs < minbufs)
896 *nbufs = minbufs;
897 if (cam->buffer_mode == B_DMA_contig)
898 alloc_ctxs[0] = cam->vb_alloc_ctx;
899 return 0;
900}
901
902
903static void mcam_vb_buf_queue(struct vb2_buffer *vb)
904{
905 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
906 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
907 unsigned long flags;
908 int start;
909
910 spin_lock_irqsave(&cam->dev_lock, flags);
911 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
912 list_add(&mvb->queue, &cam->buffers);
913 if (test_bit(CF_SG_RESTART, &cam->flags))
914 mcam_sg_restart(cam);
915 spin_unlock_irqrestore(&cam->dev_lock, flags);
916 if (start)
917 mcam_read_setup(cam);
918}
919
920
921
922
923
924
925
926static void mcam_vb_wait_prepare(struct vb2_queue *vq)
927{
928 struct mcam_camera *cam = vb2_get_drv_priv(vq);
929
930 mutex_unlock(&cam->s_mutex);
931}
932
933static void mcam_vb_wait_finish(struct vb2_queue *vq)
934{
935 struct mcam_camera *cam = vb2_get_drv_priv(vq);
936
937 mutex_lock(&cam->s_mutex);
938}
939
940
941
942
943static int mcam_vb_start_streaming(struct vb2_queue *vq)
944{
945 struct mcam_camera *cam = vb2_get_drv_priv(vq);
946
947 if (cam->state != S_IDLE)
948 return -EINVAL;
949 cam->sequence = 0;
950
951
952
953
954
955
956
957 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
958 cam->state = S_BUFWAIT;
959 return 0;
960 }
961 return mcam_read_setup(cam);
962}
963
964static int mcam_vb_stop_streaming(struct vb2_queue *vq)
965{
966 struct mcam_camera *cam = vb2_get_drv_priv(vq);
967 unsigned long flags;
968
969 if (cam->state == S_BUFWAIT) {
970
971 cam->state = S_IDLE;
972 return 0;
973 }
974 if (cam->state != S_STREAMING)
975 return -EINVAL;
976 mcam_ctlr_stop_dma(cam);
977
978
979
980
981 spin_lock_irqsave(&cam->dev_lock, flags);
982 INIT_LIST_HEAD(&cam->buffers);
983 spin_unlock_irqrestore(&cam->dev_lock, flags);
984 return 0;
985}
986
987
988static const struct vb2_ops mcam_vb2_ops = {
989 .queue_setup = mcam_vb_queue_setup,
990 .buf_queue = mcam_vb_buf_queue,
991 .start_streaming = mcam_vb_start_streaming,
992 .stop_streaming = mcam_vb_stop_streaming,
993 .wait_prepare = mcam_vb_wait_prepare,
994 .wait_finish = mcam_vb_wait_finish,
995};
996
997
998#ifdef MCAM_MODE_DMA_SG
999
1000
1001
1002
1003static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
1004{
1005 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1006 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1007 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1008
1009 mvb->dma_desc = dma_alloc_coherent(cam->dev,
1010 ndesc * sizeof(struct mcam_dma_desc),
1011 &mvb->dma_desc_pa, GFP_KERNEL);
1012 if (mvb->dma_desc == NULL) {
1013 cam_err(cam, "Unable to get DMA descriptor array\n");
1014 return -ENOMEM;
1015 }
1016 return 0;
1017}
1018
1019static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
1020{
1021 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1022 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1023 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1024 struct mcam_dma_desc *desc = mvb->dma_desc;
1025 struct scatterlist *sg;
1026 int i;
1027
1028 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
1029 DMA_FROM_DEVICE);
1030 if (mvb->dma_desc_nent <= 0)
1031 return -EIO;
1032 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
1033 desc->dma_addr = sg_dma_address(sg);
1034 desc->segment_len = sg_dma_len(sg);
1035 desc++;
1036 }
1037 return 0;
1038}
1039
1040static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
1041{
1042 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1043 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1044
1045 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
1046 return 0;
1047}
1048
1049static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
1050{
1051 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1052 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1053 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1054
1055 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
1056 mvb->dma_desc, mvb->dma_desc_pa);
1057}
1058
1059
1060static const struct vb2_ops mcam_vb2_sg_ops = {
1061 .queue_setup = mcam_vb_queue_setup,
1062 .buf_init = mcam_vb_sg_buf_init,
1063 .buf_prepare = mcam_vb_sg_buf_prepare,
1064 .buf_queue = mcam_vb_buf_queue,
1065 .buf_finish = mcam_vb_sg_buf_finish,
1066 .buf_cleanup = mcam_vb_sg_buf_cleanup,
1067 .start_streaming = mcam_vb_start_streaming,
1068 .stop_streaming = mcam_vb_stop_streaming,
1069 .wait_prepare = mcam_vb_wait_prepare,
1070 .wait_finish = mcam_vb_wait_finish,
1071};
1072
1073#endif
1074
1075static int mcam_setup_vb2(struct mcam_camera *cam)
1076{
1077 struct vb2_queue *vq = &cam->vb_queue;
1078
1079 memset(vq, 0, sizeof(*vq));
1080 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1081 vq->drv_priv = cam;
1082 INIT_LIST_HEAD(&cam->buffers);
1083 switch (cam->buffer_mode) {
1084 case B_DMA_contig:
1085#ifdef MCAM_MODE_DMA_CONTIG
1086 vq->ops = &mcam_vb2_ops;
1087 vq->mem_ops = &vb2_dma_contig_memops;
1088 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
1089 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1090 cam->dma_setup = mcam_ctlr_dma_contig;
1091 cam->frame_complete = mcam_dma_contig_done;
1092#endif
1093 break;
1094 case B_DMA_sg:
1095#ifdef MCAM_MODE_DMA_SG
1096 vq->ops = &mcam_vb2_sg_ops;
1097 vq->mem_ops = &vb2_dma_sg_memops;
1098 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1099 cam->dma_setup = mcam_ctlr_dma_sg;
1100 cam->frame_complete = mcam_dma_sg_done;
1101#endif
1102 break;
1103 case B_vmalloc:
1104#ifdef MCAM_MODE_VMALLOC
1105 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
1106 (unsigned long) cam);
1107 vq->ops = &mcam_vb2_ops;
1108 vq->mem_ops = &vb2_vmalloc_memops;
1109 vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
1110 vq->io_modes = VB2_MMAP;
1111 cam->dma_setup = mcam_ctlr_dma_vmalloc;
1112 cam->frame_complete = mcam_vmalloc_done;
1113#endif
1114 break;
1115 }
1116 return vb2_queue_init(vq);
1117}
1118
1119static void mcam_cleanup_vb2(struct mcam_camera *cam)
1120{
1121 vb2_queue_release(&cam->vb_queue);
1122#ifdef MCAM_MODE_DMA_CONTIG
1123 if (cam->buffer_mode == B_DMA_contig)
1124 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
1125#endif
1126}
1127
1128
1129
1130
1131
1132
1133
1134static int mcam_vidioc_streamon(struct file *filp, void *priv,
1135 enum v4l2_buf_type type)
1136{
1137 struct mcam_camera *cam = filp->private_data;
1138 int ret;
1139
1140 mutex_lock(&cam->s_mutex);
1141 ret = vb2_streamon(&cam->vb_queue, type);
1142 mutex_unlock(&cam->s_mutex);
1143 return ret;
1144}
1145
1146
1147static int mcam_vidioc_streamoff(struct file *filp, void *priv,
1148 enum v4l2_buf_type type)
1149{
1150 struct mcam_camera *cam = filp->private_data;
1151 int ret;
1152
1153 mutex_lock(&cam->s_mutex);
1154 ret = vb2_streamoff(&cam->vb_queue, type);
1155 mutex_unlock(&cam->s_mutex);
1156 return ret;
1157}
1158
1159
1160static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
1161 struct v4l2_requestbuffers *req)
1162{
1163 struct mcam_camera *cam = filp->private_data;
1164 int ret;
1165
1166 mutex_lock(&cam->s_mutex);
1167 ret = vb2_reqbufs(&cam->vb_queue, req);
1168 mutex_unlock(&cam->s_mutex);
1169 return ret;
1170}
1171
1172
1173static int mcam_vidioc_querybuf(struct file *filp, void *priv,
1174 struct v4l2_buffer *buf)
1175{
1176 struct mcam_camera *cam = filp->private_data;
1177 int ret;
1178
1179 mutex_lock(&cam->s_mutex);
1180 ret = vb2_querybuf(&cam->vb_queue, buf);
1181 mutex_unlock(&cam->s_mutex);
1182 return ret;
1183}
1184
1185static int mcam_vidioc_qbuf(struct file *filp, void *priv,
1186 struct v4l2_buffer *buf)
1187{
1188 struct mcam_camera *cam = filp->private_data;
1189 int ret;
1190
1191 mutex_lock(&cam->s_mutex);
1192 ret = vb2_qbuf(&cam->vb_queue, buf);
1193 mutex_unlock(&cam->s_mutex);
1194 return ret;
1195}
1196
1197static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
1198 struct v4l2_buffer *buf)
1199{
1200 struct mcam_camera *cam = filp->private_data;
1201 int ret;
1202
1203 mutex_lock(&cam->s_mutex);
1204 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
1205 mutex_unlock(&cam->s_mutex);
1206 return ret;
1207}
1208
1209
1210
1211static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
1212 struct v4l2_queryctrl *qc)
1213{
1214 struct mcam_camera *cam = priv;
1215 int ret;
1216
1217 mutex_lock(&cam->s_mutex);
1218 ret = sensor_call(cam, core, queryctrl, qc);
1219 mutex_unlock(&cam->s_mutex);
1220 return ret;
1221}
1222
1223
1224static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
1225 struct v4l2_control *ctrl)
1226{
1227 struct mcam_camera *cam = priv;
1228 int ret;
1229
1230 mutex_lock(&cam->s_mutex);
1231 ret = sensor_call(cam, core, g_ctrl, ctrl);
1232 mutex_unlock(&cam->s_mutex);
1233 return ret;
1234}
1235
1236
1237static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
1238 struct v4l2_control *ctrl)
1239{
1240 struct mcam_camera *cam = priv;
1241 int ret;
1242
1243 mutex_lock(&cam->s_mutex);
1244 ret = sensor_call(cam, core, s_ctrl, ctrl);
1245 mutex_unlock(&cam->s_mutex);
1246 return ret;
1247}
1248
1249
1250static int mcam_vidioc_querycap(struct file *file, void *priv,
1251 struct v4l2_capability *cap)
1252{
1253 strcpy(cap->driver, "marvell_ccic");
1254 strcpy(cap->card, "marvell_ccic");
1255 cap->version = 1;
1256 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1257 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1258 return 0;
1259}
1260
1261
1262static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
1263 void *priv, struct v4l2_fmtdesc *fmt)
1264{
1265 if (fmt->index >= N_MCAM_FMTS)
1266 return -EINVAL;
1267 strlcpy(fmt->description, mcam_formats[fmt->index].desc,
1268 sizeof(fmt->description));
1269 fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
1270 return 0;
1271}
1272
1273static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
1274 struct v4l2_format *fmt)
1275{
1276 struct mcam_camera *cam = priv;
1277 struct mcam_format_struct *f;
1278 struct v4l2_pix_format *pix = &fmt->fmt.pix;
1279 struct v4l2_mbus_framefmt mbus_fmt;
1280 int ret;
1281
1282 f = mcam_find_format(pix->pixelformat);
1283 pix->pixelformat = f->pixelformat;
1284 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
1285 mutex_lock(&cam->s_mutex);
1286 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
1287 mutex_unlock(&cam->s_mutex);
1288 v4l2_fill_pix_format(pix, &mbus_fmt);
1289 pix->bytesperline = pix->width * f->bpp;
1290 pix->sizeimage = pix->height * pix->bytesperline;
1291 return ret;
1292}
1293
1294static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
1295 struct v4l2_format *fmt)
1296{
1297 struct mcam_camera *cam = priv;
1298 struct mcam_format_struct *f;
1299 int ret;
1300
1301
1302
1303
1304
1305 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
1306 return -EBUSY;
1307
1308 f = mcam_find_format(fmt->fmt.pix.pixelformat);
1309
1310
1311
1312
1313 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
1314 if (ret)
1315 return ret;
1316
1317
1318
1319
1320 mutex_lock(&cam->s_mutex);
1321 cam->pix_format = fmt->fmt.pix;
1322 cam->mbus_code = f->mbus_code;
1323
1324
1325
1326
1327 if (cam->buffer_mode == B_vmalloc) {
1328 ret = mcam_check_dma_buffers(cam);
1329 if (ret)
1330 goto out;
1331 }
1332 mcam_set_config_needed(cam, 1);
1333 ret = 0;
1334out:
1335 mutex_unlock(&cam->s_mutex);
1336 return ret;
1337}
1338
1339
1340
1341
1342
1343
1344static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
1345 struct v4l2_format *f)
1346{
1347 struct mcam_camera *cam = priv;
1348
1349 f->fmt.pix = cam->pix_format;
1350 return 0;
1351}
1352
1353
1354
1355
1356static int mcam_vidioc_enum_input(struct file *filp, void *priv,
1357 struct v4l2_input *input)
1358{
1359 if (input->index != 0)
1360 return -EINVAL;
1361
1362 input->type = V4L2_INPUT_TYPE_CAMERA;
1363 input->std = V4L2_STD_ALL;
1364 strcpy(input->name, "Camera");
1365 return 0;
1366}
1367
1368static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
1369{
1370 *i = 0;
1371 return 0;
1372}
1373
1374static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
1375{
1376 if (i != 0)
1377 return -EINVAL;
1378 return 0;
1379}
1380
1381
1382static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
1383{
1384 return 0;
1385}
1386
1387
1388
1389
1390
1391static int mcam_vidioc_g_parm(struct file *filp, void *priv,
1392 struct v4l2_streamparm *parms)
1393{
1394 struct mcam_camera *cam = priv;
1395 int ret;
1396
1397 mutex_lock(&cam->s_mutex);
1398 ret = sensor_call(cam, video, g_parm, parms);
1399 mutex_unlock(&cam->s_mutex);
1400 parms->parm.capture.readbuffers = n_dma_bufs;
1401 return ret;
1402}
1403
1404static int mcam_vidioc_s_parm(struct file *filp, void *priv,
1405 struct v4l2_streamparm *parms)
1406{
1407 struct mcam_camera *cam = priv;
1408 int ret;
1409
1410 mutex_lock(&cam->s_mutex);
1411 ret = sensor_call(cam, video, s_parm, parms);
1412 mutex_unlock(&cam->s_mutex);
1413 parms->parm.capture.readbuffers = n_dma_bufs;
1414 return ret;
1415}
1416
1417static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
1418 struct v4l2_dbg_chip_ident *chip)
1419{
1420 struct mcam_camera *cam = priv;
1421
1422 chip->ident = V4L2_IDENT_NONE;
1423 chip->revision = 0;
1424 if (v4l2_chip_match_host(&chip->match)) {
1425 chip->ident = cam->chip_id;
1426 return 0;
1427 }
1428 return sensor_call(cam, core, g_chip_ident, chip);
1429}
1430
1431static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
1432 struct v4l2_frmsizeenum *sizes)
1433{
1434 struct mcam_camera *cam = priv;
1435 int ret;
1436
1437 mutex_lock(&cam->s_mutex);
1438 ret = sensor_call(cam, video, enum_framesizes, sizes);
1439 mutex_unlock(&cam->s_mutex);
1440 return ret;
1441}
1442
1443static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
1444 struct v4l2_frmivalenum *interval)
1445{
1446 struct mcam_camera *cam = priv;
1447 int ret;
1448
1449 mutex_lock(&cam->s_mutex);
1450 ret = sensor_call(cam, video, enum_frameintervals, interval);
1451 mutex_unlock(&cam->s_mutex);
1452 return ret;
1453}
1454
1455#ifdef CONFIG_VIDEO_ADV_DEBUG
1456static int mcam_vidioc_g_register(struct file *file, void *priv,
1457 struct v4l2_dbg_register *reg)
1458{
1459 struct mcam_camera *cam = priv;
1460
1461 if (v4l2_chip_match_host(®->match)) {
1462 reg->val = mcam_reg_read(cam, reg->reg);
1463 reg->size = 4;
1464 return 0;
1465 }
1466 return sensor_call(cam, core, g_register, reg);
1467}
1468
1469static int mcam_vidioc_s_register(struct file *file, void *priv,
1470 struct v4l2_dbg_register *reg)
1471{
1472 struct mcam_camera *cam = priv;
1473
1474 if (v4l2_chip_match_host(®->match)) {
1475 mcam_reg_write(cam, reg->reg, reg->val);
1476 return 0;
1477 }
1478 return sensor_call(cam, core, s_register, reg);
1479}
1480#endif
1481
1482static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
1483 .vidioc_querycap = mcam_vidioc_querycap,
1484 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
1485 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
1486 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
1487 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
1488 .vidioc_enum_input = mcam_vidioc_enum_input,
1489 .vidioc_g_input = mcam_vidioc_g_input,
1490 .vidioc_s_input = mcam_vidioc_s_input,
1491 .vidioc_s_std = mcam_vidioc_s_std,
1492 .vidioc_reqbufs = mcam_vidioc_reqbufs,
1493 .vidioc_querybuf = mcam_vidioc_querybuf,
1494 .vidioc_qbuf = mcam_vidioc_qbuf,
1495 .vidioc_dqbuf = mcam_vidioc_dqbuf,
1496 .vidioc_streamon = mcam_vidioc_streamon,
1497 .vidioc_streamoff = mcam_vidioc_streamoff,
1498 .vidioc_queryctrl = mcam_vidioc_queryctrl,
1499 .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
1500 .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
1501 .vidioc_g_parm = mcam_vidioc_g_parm,
1502 .vidioc_s_parm = mcam_vidioc_s_parm,
1503 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
1504 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
1505 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
1506#ifdef CONFIG_VIDEO_ADV_DEBUG
1507 .vidioc_g_register = mcam_vidioc_g_register,
1508 .vidioc_s_register = mcam_vidioc_s_register,
1509#endif
1510};
1511
1512
1513
1514
1515
1516static int mcam_v4l_open(struct file *filp)
1517{
1518 struct mcam_camera *cam = video_drvdata(filp);
1519 int ret = 0;
1520
1521 filp->private_data = cam;
1522
1523 frames = singles = delivered = 0;
1524 mutex_lock(&cam->s_mutex);
1525 if (cam->users == 0) {
1526 ret = mcam_setup_vb2(cam);
1527 if (ret)
1528 goto out;
1529 mcam_ctlr_power_up(cam);
1530 __mcam_cam_reset(cam);
1531 mcam_set_config_needed(cam, 1);
1532 }
1533 (cam->users)++;
1534out:
1535 mutex_unlock(&cam->s_mutex);
1536 return ret;
1537}
1538
1539
1540static int mcam_v4l_release(struct file *filp)
1541{
1542 struct mcam_camera *cam = filp->private_data;
1543
1544 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
1545 singles, delivered);
1546 mutex_lock(&cam->s_mutex);
1547 (cam->users)--;
1548 if (filp == cam->owner) {
1549 mcam_ctlr_stop_dma(cam);
1550 cam->owner = NULL;
1551 }
1552 if (cam->users == 0) {
1553 mcam_cleanup_vb2(cam);
1554 mcam_ctlr_power_down(cam);
1555 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
1556 mcam_free_dma_bufs(cam);
1557 }
1558 mutex_unlock(&cam->s_mutex);
1559 return 0;
1560}
1561
1562static ssize_t mcam_v4l_read(struct file *filp,
1563 char __user *buffer, size_t len, loff_t *pos)
1564{
1565 struct mcam_camera *cam = filp->private_data;
1566 int ret;
1567
1568 mutex_lock(&cam->s_mutex);
1569 ret = vb2_read(&cam->vb_queue, buffer, len, pos,
1570 filp->f_flags & O_NONBLOCK);
1571 mutex_unlock(&cam->s_mutex);
1572 return ret;
1573}
1574
1575
1576
1577static unsigned int mcam_v4l_poll(struct file *filp,
1578 struct poll_table_struct *pt)
1579{
1580 struct mcam_camera *cam = filp->private_data;
1581 int ret;
1582
1583 mutex_lock(&cam->s_mutex);
1584 ret = vb2_poll(&cam->vb_queue, filp, pt);
1585 mutex_unlock(&cam->s_mutex);
1586 return ret;
1587}
1588
1589
1590static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
1591{
1592 struct mcam_camera *cam = filp->private_data;
1593 int ret;
1594
1595 mutex_lock(&cam->s_mutex);
1596 ret = vb2_mmap(&cam->vb_queue, vma);
1597 mutex_unlock(&cam->s_mutex);
1598 return ret;
1599}
1600
1601
1602
1603static const struct v4l2_file_operations mcam_v4l_fops = {
1604 .owner = THIS_MODULE,
1605 .open = mcam_v4l_open,
1606 .release = mcam_v4l_release,
1607 .read = mcam_v4l_read,
1608 .poll = mcam_v4l_poll,
1609 .mmap = mcam_v4l_mmap,
1610 .unlocked_ioctl = video_ioctl2,
1611};
1612
1613
1614
1615
1616
1617
1618static struct video_device mcam_v4l_template = {
1619 .name = "mcam",
1620 .tvnorms = V4L2_STD_NTSC_M,
1621 .current_norm = V4L2_STD_NTSC_M,
1622
1623 .fops = &mcam_v4l_fops,
1624 .ioctl_ops = &mcam_v4l_ioctl_ops,
1625 .release = video_device_release_empty,
1626};
1627
1628
1629
1630
1631
1632static void mcam_frame_complete(struct mcam_camera *cam, int frame)
1633{
1634
1635
1636
1637 set_bit(frame, &cam->flags);
1638 clear_bit(CF_DMA_ACTIVE, &cam->flags);
1639 cam->next_buf = frame;
1640 cam->buf_seq[frame] = ++(cam->sequence);
1641 frames++;
1642
1643
1644
1645 if (cam->state != S_STREAMING)
1646 return;
1647
1648
1649
1650 cam->frame_complete(cam, frame);
1651}
1652
1653
1654
1655
1656
1657
1658int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
1659{
1660 unsigned int frame, handled = 0;
1661
1662 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673 for (frame = 0; frame < cam->nbufs; frame++)
1674 if (irqs & (IRQ_EOF0 << frame)) {
1675 mcam_frame_complete(cam, frame);
1676 handled = 1;
1677 }
1678
1679
1680
1681
1682
1683 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
1684 set_bit(CF_DMA_ACTIVE, &cam->flags);
1685 handled = 1;
1686 if (cam->buffer_mode == B_DMA_sg)
1687 mcam_ctlr_stop(cam);
1688 }
1689 return handled;
1690}
1691
1692
1693
1694
1695
1696static struct ov7670_config sensor_cfg = {
1697
1698
1699
1700
1701 .min_width = 320,
1702 .min_height = 240,
1703};
1704
1705
1706int mccic_register(struct mcam_camera *cam)
1707{
1708 struct i2c_board_info ov7670_info = {
1709 .type = "ov7670",
1710 .addr = 0x42 >> 1,
1711 .platform_data = &sensor_cfg,
1712 };
1713 int ret;
1714
1715
1716
1717
1718 if (buffer_mode >= 0)
1719 cam->buffer_mode = buffer_mode;
1720 if (cam->buffer_mode == B_DMA_sg &&
1721 cam->chip_id == V4L2_IDENT_CAFE) {
1722 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
1723 "attempting vmalloc mode instead\n");
1724 cam->buffer_mode = B_vmalloc;
1725 }
1726 if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
1727 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
1728 cam->buffer_mode);
1729 return -EINVAL;
1730 }
1731
1732
1733
1734 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
1735 if (ret)
1736 return ret;
1737
1738 mutex_init(&cam->s_mutex);
1739 cam->state = S_NOTREADY;
1740 mcam_set_config_needed(cam, 1);
1741 cam->pix_format = mcam_def_pix_format;
1742 cam->mbus_code = mcam_def_mbus_code;
1743 INIT_LIST_HEAD(&cam->buffers);
1744 mcam_ctlr_init(cam);
1745
1746
1747
1748
1749 sensor_cfg.clock_speed = cam->clock_speed;
1750 sensor_cfg.use_smbus = cam->use_smbus;
1751 cam->sensor_addr = ov7670_info.addr;
1752 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
1753 cam->i2c_adapter, &ov7670_info, NULL);
1754 if (cam->sensor == NULL) {
1755 ret = -ENODEV;
1756 goto out_unregister;
1757 }
1758
1759 ret = mcam_cam_init(cam);
1760 if (ret)
1761 goto out_unregister;
1762
1763
1764
1765 mutex_lock(&cam->s_mutex);
1766 cam->vdev = mcam_v4l_template;
1767 cam->vdev.debug = 0;
1768 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1769 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1770 if (ret)
1771 goto out;
1772 video_set_drvdata(&cam->vdev, cam);
1773
1774
1775
1776
1777 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
1778 if (mcam_alloc_dma_bufs(cam, 1))
1779 cam_warn(cam, "Unable to alloc DMA buffers at load"
1780 " will try again later.");
1781 }
1782
1783out:
1784 mutex_unlock(&cam->s_mutex);
1785 return ret;
1786out_unregister:
1787 v4l2_device_unregister(&cam->v4l2_dev);
1788 return ret;
1789}
1790
1791
1792void mccic_shutdown(struct mcam_camera *cam)
1793{
1794
1795
1796
1797
1798
1799
1800 if (cam->users > 0) {
1801 cam_warn(cam, "Removing a device with users!\n");
1802 mcam_ctlr_power_down(cam);
1803 }
1804 vb2_queue_release(&cam->vb_queue);
1805 if (cam->buffer_mode == B_vmalloc)
1806 mcam_free_dma_bufs(cam);
1807 video_unregister_device(&cam->vdev);
1808 v4l2_device_unregister(&cam->v4l2_dev);
1809}
1810
1811
1812
1813
1814#ifdef CONFIG_PM
1815
1816void mccic_suspend(struct mcam_camera *cam)
1817{
1818 enum mcam_state cstate = cam->state;
1819
1820 mcam_ctlr_stop_dma(cam);
1821 mcam_ctlr_power_down(cam);
1822 cam->state = cstate;
1823}
1824
1825int mccic_resume(struct mcam_camera *cam)
1826{
1827 int ret = 0;
1828
1829 mutex_lock(&cam->s_mutex);
1830 if (cam->users > 0) {
1831 mcam_ctlr_power_up(cam);
1832 __mcam_cam_reset(cam);
1833 } else {
1834 mcam_ctlr_power_down(cam);
1835 }
1836 mutex_unlock(&cam->s_mutex);
1837
1838 set_bit(CF_CONFIG_NEEDED, &cam->flags);
1839 if (cam->state == S_STREAMING)
1840 ret = mcam_read_setup(cam);
1841 return ret;
1842}
1843#endif
1844