1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34static const char version[] =
35"atp.c:v1.09=ac 2002/10/01 Donald Becker <becker@scyld.com>\n";
36
37
38
39
40static int debug = 1;
41#define net_debug debug
42
43
44static int max_interrupt_work = 15;
45
46#define NUM_UNITS 2
47
48static int io[NUM_UNITS];
49static int irq[NUM_UNITS];
50static int xcvr[NUM_UNITS];
51
52
53
54
55#define TX_TIMEOUT (400*HZ/1000)
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125#include <linux/kernel.h>
126#include <linux/module.h>
127#include <linux/types.h>
128#include <linux/fcntl.h>
129#include <linux/interrupt.h>
130#include <linux/ioport.h>
131#include <linux/in.h>
132#include <linux/string.h>
133#include <linux/errno.h>
134#include <linux/init.h>
135#include <linux/crc32.h>
136#include <linux/netdevice.h>
137#include <linux/etherdevice.h>
138#include <linux/skbuff.h>
139#include <linux/spinlock.h>
140#include <linux/delay.h>
141#include <linux/bitops.h>
142
143#include <asm/system.h>
144#include <asm/io.h>
145#include <asm/dma.h>
146
147#include "atp.h"
148
149MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
150MODULE_DESCRIPTION("RealTek RTL8002/8012 parallel port Ethernet driver");
151MODULE_LICENSE("GPL");
152
153module_param(max_interrupt_work, int, 0);
154module_param(debug, int, 0);
155module_param_array(io, int, NULL, 0);
156module_param_array(irq, int, NULL, 0);
157module_param_array(xcvr, int, NULL, 0);
158MODULE_PARM_DESC(max_interrupt_work, "ATP maximum events handled per interrupt");
159MODULE_PARM_DESC(debug, "ATP debug level (0-7)");
160MODULE_PARM_DESC(io, "ATP I/O base address(es)");
161MODULE_PARM_DESC(irq, "ATP IRQ number(s)");
162MODULE_PARM_DESC(xcvr, "ATP transceiver(s) (0=internal, 1=external)");
163
164
165#define ETHERCARD_TOTAL_SIZE 3
166
167
168static char mux_8012[] = { 0xff, 0xf7, 0xff, 0xfb, 0xf3, 0xfb, 0xff, 0xf7,};
169
170struct net_local {
171 spinlock_t lock;
172 struct net_device *next_module;
173 struct timer_list timer;
174 long last_rx_time;
175 int saved_tx_size;
176 unsigned int tx_unit_busy:1;
177 unsigned char re_tx,
178 addr_mode,
179 pac_cnt_in_tx_buf,
180 chip_type;
181};
182
183
184
185
186#define TIMED_CHECKER (HZ/4)
187#ifdef TIMED_CHECKER
188#include <linux/timer.h>
189static void atp_timed_checker(unsigned long ignored);
190#endif
191
192
193
194static int atp_probe1(long ioaddr);
195static void get_node_ID(struct net_device *dev);
196static unsigned short eeprom_op(long ioaddr, unsigned int cmd);
197static int net_open(struct net_device *dev);
198static void hardware_init(struct net_device *dev);
199static void write_packet(long ioaddr, int length, unsigned char *packet, int pad, int mode);
200static void trigger_send(long ioaddr, int length);
201static netdev_tx_t atp_send_packet(struct sk_buff *skb,
202 struct net_device *dev);
203static irqreturn_t atp_interrupt(int irq, void *dev_id);
204static void net_rx(struct net_device *dev);
205static void read_block(long ioaddr, int length, unsigned char *buffer, int data_mode);
206static int net_close(struct net_device *dev);
207static void set_rx_mode(struct net_device *dev);
208static void tx_timeout(struct net_device *dev);
209
210
211
212static struct net_device *root_atp_dev;
213
214
215
216
217
218
219
220
221
222static int __init atp_init(void)
223{
224 int *port, ports[] = {0x378, 0x278, 0x3bc, 0};
225 int base_addr = io[0];
226
227 if (base_addr > 0x1ff)
228 return atp_probe1(base_addr);
229 else if (base_addr == 1)
230 return -ENXIO;
231
232 for (port = ports; *port; port++) {
233 long ioaddr = *port;
234 outb(0x57, ioaddr + PAR_DATA);
235 if (inb(ioaddr + PAR_DATA) != 0x57)
236 continue;
237 if (atp_probe1(ioaddr) == 0)
238 return 0;
239 }
240
241 return -ENODEV;
242}
243
244static const struct net_device_ops atp_netdev_ops = {
245 .ndo_open = net_open,
246 .ndo_stop = net_close,
247 .ndo_start_xmit = atp_send_packet,
248 .ndo_set_multicast_list = set_rx_mode,
249 .ndo_tx_timeout = tx_timeout,
250 .ndo_change_mtu = eth_change_mtu,
251 .ndo_set_mac_address = eth_mac_addr,
252 .ndo_validate_addr = eth_validate_addr,
253};
254
255static int __init atp_probe1(long ioaddr)
256{
257 struct net_device *dev = NULL;
258 struct net_local *lp;
259 int saved_ctrl_reg, status, i;
260 int res;
261
262 outb(0xff, ioaddr + PAR_DATA);
263
264
265 saved_ctrl_reg = inb(ioaddr + PAR_CONTROL);
266 if (net_debug > 3)
267 printk("atp: Control register was %#2.2x.\n", saved_ctrl_reg);
268
269 outb(0x04, ioaddr + PAR_CONTROL);
270#ifndef final_version
271 if (net_debug > 3) {
272
273 for (i = 0; i < 8; i++)
274 outb(mux_8012[i], ioaddr + PAR_DATA);
275 write_reg(ioaddr, MODSEL, 0x00);
276 printk("atp: Registers are ");
277 for (i = 0; i < 32; i++)
278 printk(" %2.2x", read_nibble(ioaddr, i));
279 printk(".\n");
280 }
281#endif
282
283 for (i = 0; i < 8; i++)
284 outb(mux_8012[i], ioaddr + PAR_DATA);
285 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
286
287 status = read_nibble(ioaddr, CMR1);
288
289 if (net_debug > 3) {
290 printk(KERN_DEBUG "atp: Status nibble was %#2.2x..", status);
291 for (i = 0; i < 32; i++)
292 printk(" %2.2x", read_nibble(ioaddr, i));
293 printk("\n");
294 }
295
296 if ((status & 0x78) != 0x08) {
297
298 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
299 return -ENODEV;
300 }
301 status = read_nibble(ioaddr, CMR2_h);
302 if ((status & 0x78) != 0x10) {
303 outb(saved_ctrl_reg, ioaddr + PAR_CONTROL);
304 return -ENODEV;
305 }
306
307 dev = alloc_etherdev(sizeof(struct net_local));
308 if (!dev)
309 return -ENOMEM;
310
311
312 write_reg_byte(ioaddr, CMR2, 0x01);
313 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
314
315
316 if (irq[0])
317 dev->irq = irq[0];
318 else if (ioaddr == 0x378)
319 dev->irq = 7;
320 else
321 dev->irq = 5;
322 write_reg_high(ioaddr, CMR1, CMR1h_TxRxOFF);
323 write_reg(ioaddr, CMR2, CMR2_NULL);
324
325 dev->base_addr = ioaddr;
326
327
328 get_node_ID(dev);
329
330#ifndef MODULE
331 if (net_debug)
332 printk(KERN_INFO "%s", version);
333#endif
334
335 printk(KERN_NOTICE "%s: Pocket adapter found at %#3lx, IRQ %d, "
336 "SAPROM %pM.\n",
337 dev->name, dev->base_addr, dev->irq, dev->dev_addr);
338
339
340 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
341
342 lp = netdev_priv(dev);
343 lp->chip_type = RTL8002;
344 lp->addr_mode = CMR2h_Normal;
345 spin_lock_init(&lp->lock);
346
347
348 if (xcvr[0])
349 dev->if_port = xcvr[0];
350 else
351 dev->if_port = (dev->mem_start & 0xf) ? (dev->mem_start & 0x7) : 4;
352 if (dev->mem_end & 0xf)
353 net_debug = dev->mem_end & 7;
354
355 dev->netdev_ops = &atp_netdev_ops;
356 dev->watchdog_timeo = TX_TIMEOUT;
357
358 res = register_netdev(dev);
359 if (res) {
360 free_netdev(dev);
361 return res;
362 }
363
364 lp->next_module = root_atp_dev;
365 root_atp_dev = dev;
366
367 return 0;
368}
369
370
371static void __init get_node_ID(struct net_device *dev)
372{
373 long ioaddr = dev->base_addr;
374 int sa_offset = 0;
375 int i;
376
377 write_reg(ioaddr, CMR2, CMR2_EEPROM);
378
379
380
381 if (eeprom_op(ioaddr, EE_READ(0)) == 0xffff)
382 sa_offset = 15;
383
384 for (i = 0; i < 3; i++)
385 ((__be16 *)dev->dev_addr)[i] =
386 cpu_to_be16(eeprom_op(ioaddr, EE_READ(sa_offset + i)));
387
388 write_reg(ioaddr, CMR2, CMR2_NULL);
389}
390
391
392
393
394
395
396
397
398
399
400
401
402
403static unsigned short __init eeprom_op(long ioaddr, u32 cmd)
404{
405 unsigned eedata_out = 0;
406 int num_bits = EE_CMD_SIZE;
407
408 while (--num_bits >= 0) {
409 char outval = (cmd & (1<<num_bits)) ? EE_DATA_WRITE : 0;
410 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_LOW);
411 write_reg_high(ioaddr, PROM_CMD, outval | EE_CLK_HIGH);
412 eedata_out <<= 1;
413 if (read_nibble(ioaddr, PROM_DATA) & EE_DATA_READ)
414 eedata_out++;
415 }
416 write_reg_high(ioaddr, PROM_CMD, EE_CLK_LOW & ~EE_CS);
417 return eedata_out;
418}
419
420
421
422
423
424
425
426
427
428
429
430
431static int net_open(struct net_device *dev)
432{
433 struct net_local *lp = netdev_priv(dev);
434 int ret;
435
436
437
438
439 ret = request_irq(dev->irq, atp_interrupt, 0, dev->name, dev);
440 if (ret)
441 return ret;
442
443 hardware_init(dev);
444
445 init_timer(&lp->timer);
446 lp->timer.expires = jiffies + TIMED_CHECKER;
447 lp->timer.data = (unsigned long)dev;
448 lp->timer.function = atp_timed_checker;
449 add_timer(&lp->timer);
450
451 netif_start_queue(dev);
452 return 0;
453}
454
455
456
457static void hardware_init(struct net_device *dev)
458{
459 struct net_local *lp = netdev_priv(dev);
460 long ioaddr = dev->base_addr;
461 int i;
462
463
464 for (i = 0; i < 8; i++)
465 outb(mux_8012[i], ioaddr + PAR_DATA);
466 write_reg_high(ioaddr, CMR1, CMR1h_RESET);
467
468 for (i = 0; i < 6; i++)
469 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
470
471 write_reg_high(ioaddr, CMR2, lp->addr_mode);
472
473 if (net_debug > 2) {
474 printk(KERN_DEBUG "%s: Reset: current Rx mode %d.\n", dev->name,
475 (read_nibble(ioaddr, CMR2_h) >> 3) & 0x0f);
476 }
477
478 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
479 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
480
481
482 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
483
484
485 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
486 write_reg_high(ioaddr, IMR, ISRh_RxErr);
487
488 lp->tx_unit_busy = 0;
489 lp->pac_cnt_in_tx_buf = 0;
490 lp->saved_tx_size = 0;
491}
492
493static void trigger_send(long ioaddr, int length)
494{
495 write_reg_byte(ioaddr, TxCNT0, length & 0xff);
496 write_reg(ioaddr, TxCNT1, length >> 8);
497 write_reg(ioaddr, CMR1, CMR1_Xmit);
498}
499
500static void write_packet(long ioaddr, int length, unsigned char *packet, int pad_len, int data_mode)
501{
502 if (length & 1)
503 {
504 length++;
505 pad_len++;
506 }
507
508 outb(EOC+MAR, ioaddr + PAR_DATA);
509 if ((data_mode & 1) == 0) {
510
511 outb(WrAddr+MAR, ioaddr + PAR_DATA);
512 do {
513 write_byte_mode0(ioaddr, *packet++);
514 } while (--length > pad_len) ;
515 do {
516 write_byte_mode0(ioaddr, 0);
517 } while (--length > 0) ;
518 } else {
519
520 unsigned char outbyte = *packet++;
521
522 outb(Ctrl_LNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
523 outb(WrAddr+MAR, ioaddr + PAR_DATA);
524
525 outb((outbyte & 0x0f)|0x40, ioaddr + PAR_DATA);
526 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
527 outbyte >>= 4;
528 outb(outbyte & 0x0f, ioaddr + PAR_DATA);
529 outb(Ctrl_HNibWrite + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
530 while (--length > pad_len)
531 write_byte_mode1(ioaddr, *packet++);
532 while (--length > 0)
533 write_byte_mode1(ioaddr, 0);
534 }
535
536 outb(0xff, ioaddr + PAR_DATA);
537 outb(Ctrl_HNibWrite | Ctrl_SelData | Ctrl_IRQEN, ioaddr + PAR_CONTROL);
538}
539
540static void tx_timeout(struct net_device *dev)
541{
542 long ioaddr = dev->base_addr;
543
544 printk(KERN_WARNING "%s: Transmit timed out, %s?\n", dev->name,
545 inb(ioaddr + PAR_CONTROL) & 0x10 ? "network cable problem"
546 : "IRQ conflict");
547 dev->stats.tx_errors++;
548
549 hardware_init(dev);
550 dev->trans_start = jiffies;
551 netif_wake_queue(dev);
552 dev->stats.tx_errors++;
553}
554
555static netdev_tx_t atp_send_packet(struct sk_buff *skb,
556 struct net_device *dev)
557{
558 struct net_local *lp = netdev_priv(dev);
559 long ioaddr = dev->base_addr;
560 int length;
561 unsigned long flags;
562
563 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
564
565 netif_stop_queue(dev);
566
567
568
569
570 spin_lock_irqsave(&lp->lock, flags);
571 write_reg(ioaddr, IMR, 0);
572 write_reg_high(ioaddr, IMR, 0);
573 spin_unlock_irqrestore(&lp->lock, flags);
574
575 write_packet(ioaddr, length, skb->data, length-skb->len, dev->if_port);
576
577 lp->pac_cnt_in_tx_buf++;
578 if (lp->tx_unit_busy == 0) {
579 trigger_send(ioaddr, length);
580 lp->saved_tx_size = 0;
581 lp->re_tx = 0;
582 lp->tx_unit_busy = 1;
583 } else
584 lp->saved_tx_size = length;
585
586 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
587 write_reg_high(ioaddr, IMR, ISRh_RxErr);
588
589 dev_kfree_skb (skb);
590 return NETDEV_TX_OK;
591}
592
593
594
595
596static irqreturn_t atp_interrupt(int irq, void *dev_instance)
597{
598 struct net_device *dev = dev_instance;
599 struct net_local *lp;
600 long ioaddr;
601 static int num_tx_since_rx;
602 int boguscount = max_interrupt_work;
603 int handled = 0;
604
605 ioaddr = dev->base_addr;
606 lp = netdev_priv(dev);
607
608 spin_lock(&lp->lock);
609
610
611 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
612
613
614 write_reg(ioaddr, CMR2, CMR2_NULL);
615 write_reg(ioaddr, IMR, 0);
616
617 if (net_debug > 5) printk(KERN_DEBUG "%s: In interrupt ", dev->name);
618 while (--boguscount > 0) {
619 int status = read_nibble(ioaddr, ISR);
620 if (net_debug > 5) printk("loop status %02x..", status);
621
622 if (status & (ISR_RxOK<<3)) {
623 handled = 1;
624 write_reg(ioaddr, ISR, ISR_RxOK);
625 do {
626 int read_status = read_nibble(ioaddr, CMR1);
627 if (net_debug > 6)
628 printk("handling Rx packet %02x..", read_status);
629
630
631 if (read_status & (CMR1_IRQ << 3)) {
632 dev->stats.rx_over_errors++;
633
634 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
635 net_rx(dev);
636
637 write_reg_high(ioaddr, ISR, ISRh_RxErr);
638 write_reg_high(ioaddr, CMR2, lp->addr_mode);
639 } else if ((read_status & (CMR1_BufEnb << 3)) == 0) {
640 net_rx(dev);
641 num_tx_since_rx = 0;
642 } else
643 break;
644 } while (--boguscount > 0);
645 } else if (status & ((ISR_TxErr + ISR_TxOK)<<3)) {
646 handled = 1;
647 if (net_debug > 6) printk("handling Tx done..");
648
649
650 write_reg(ioaddr, ISR, ISR_TxErr + ISR_TxOK);
651 if (status & (ISR_TxErr<<3)) {
652 dev->stats.collisions++;
653 if (++lp->re_tx > 15) {
654 dev->stats.tx_aborted_errors++;
655 hardware_init(dev);
656 break;
657 }
658
659 if (net_debug > 6) printk("attempting to ReTx");
660 write_reg(ioaddr, CMR1, CMR1_ReXmit + CMR1_Xmit);
661 } else {
662
663 dev->stats.tx_packets++;
664 lp->pac_cnt_in_tx_buf--;
665 if ( lp->saved_tx_size) {
666 trigger_send(ioaddr, lp->saved_tx_size);
667 lp->saved_tx_size = 0;
668 lp->re_tx = 0;
669 } else
670 lp->tx_unit_busy = 0;
671 netif_wake_queue(dev);
672 }
673 num_tx_since_rx++;
674 } else if (num_tx_since_rx > 8 &&
675 time_after(jiffies, dev->last_rx + HZ)) {
676 if (net_debug > 2)
677 printk(KERN_DEBUG "%s: Missed packet? No Rx after %d Tx and "
678 "%ld jiffies status %02x CMR1 %02x.\n", dev->name,
679 num_tx_since_rx, jiffies - dev->last_rx, status,
680 (read_nibble(ioaddr, CMR1) >> 3) & 15);
681 dev->stats.rx_missed_errors++;
682 hardware_init(dev);
683 num_tx_since_rx = 0;
684 break;
685 } else
686 break;
687 }
688
689
690
691 {
692 int i;
693 for (i = 0; i < 6; i++)
694 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
695#if 0 && defined(TIMED_CHECKER)
696 mod_timer(&lp->timer, jiffies + TIMED_CHECKER);
697#endif
698 }
699
700
701 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
702
703 outb(Ctrl_SelData + Ctrl_IRQEN, ioaddr + PAR_CONTROL);
704
705 write_reg(ioaddr, IMR, ISR_RxOK | ISR_TxErr | ISR_TxOK);
706 write_reg_high(ioaddr, IMR, ISRh_RxErr);
707
708 spin_unlock(&lp->lock);
709
710 if (net_debug > 5) printk("exiting interrupt.\n");
711 return IRQ_RETVAL(handled);
712}
713
714#ifdef TIMED_CHECKER
715
716
717static void atp_timed_checker(unsigned long data)
718{
719 struct net_device *dev = (struct net_device *)data;
720 long ioaddr = dev->base_addr;
721 struct net_local *lp = netdev_priv(dev);
722 int tickssofar = jiffies - lp->last_rx_time;
723 int i;
724
725 spin_lock(&lp->lock);
726 if (tickssofar > 2*HZ) {
727#if 1
728 for (i = 0; i < 6; i++)
729 write_reg_byte(ioaddr, PAR0 + i, dev->dev_addr[i]);
730 lp->last_rx_time = jiffies;
731#else
732 for (i = 0; i < 6; i++)
733 if (read_cmd_byte(ioaddr, PAR0 + i) != atp_timed_dev->dev_addr[i])
734 {
735 struct net_local *lp = netdev_priv(atp_timed_dev);
736 write_reg_byte(ioaddr, PAR0 + i, atp_timed_dev->dev_addr[i]);
737 if (i == 2)
738 dev->stats.tx_errors++;
739 else if (i == 3)
740 dev->stats.tx_dropped++;
741 else if (i == 4)
742 dev->stats.collisions++;
743 else
744 dev->stats.rx_errors++;
745 }
746#endif
747 }
748 spin_unlock(&lp->lock);
749 lp->timer.expires = jiffies + TIMED_CHECKER;
750 add_timer(&lp->timer);
751}
752#endif
753
754
755static void net_rx(struct net_device *dev)
756{
757 struct net_local *lp = netdev_priv(dev);
758 long ioaddr = dev->base_addr;
759 struct rx_header rx_head;
760
761
762 outb(EOC+MAR, ioaddr + PAR_DATA);
763 read_block(ioaddr, 8, (unsigned char*)&rx_head, dev->if_port);
764 if (net_debug > 5)
765 printk(KERN_DEBUG " rx_count %04x %04x %04x %04x..", rx_head.pad,
766 rx_head.rx_count, rx_head.rx_status, rx_head.cur_addr);
767 if ((rx_head.rx_status & 0x77) != 0x01) {
768 dev->stats.rx_errors++;
769 if (rx_head.rx_status & 0x0004) dev->stats.rx_frame_errors++;
770 else if (rx_head.rx_status & 0x0002) dev->stats.rx_crc_errors++;
771 if (net_debug > 3)
772 printk(KERN_DEBUG "%s: Unknown ATP Rx error %04x.\n",
773 dev->name, rx_head.rx_status);
774 if (rx_head.rx_status & 0x0020) {
775 dev->stats.rx_fifo_errors++;
776 write_reg_high(ioaddr, CMR1, CMR1h_TxENABLE);
777 write_reg_high(ioaddr, CMR1, CMR1h_RxENABLE | CMR1h_TxENABLE);
778 } else if (rx_head.rx_status & 0x0050)
779 hardware_init(dev);
780 return;
781 } else {
782
783 int pkt_len = (rx_head.rx_count & 0x7ff) - 4;
784 struct sk_buff *skb;
785
786 skb = dev_alloc_skb(pkt_len + 2);
787 if (skb == NULL) {
788 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n",
789 dev->name);
790 dev->stats.rx_dropped++;
791 goto done;
792 }
793
794 skb_reserve(skb, 2);
795 read_block(ioaddr, pkt_len, skb_put(skb,pkt_len), dev->if_port);
796 skb->protocol = eth_type_trans(skb, dev);
797 netif_rx(skb);
798 dev->last_rx = jiffies;
799 dev->stats.rx_packets++;
800 dev->stats.rx_bytes += pkt_len;
801 }
802 done:
803 write_reg(ioaddr, CMR1, CMR1_NextPkt);
804 lp->last_rx_time = jiffies;
805}
806
807static void read_block(long ioaddr, int length, unsigned char *p, int data_mode)
808{
809 if (data_mode <= 3) {
810 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL);
811 outb(length == 8 ? RdAddr | HNib | MAR : RdAddr | MAR,
812 ioaddr + PAR_DATA);
813 if (data_mode <= 1) {
814 do { *p++ = read_byte_mode0(ioaddr); } while (--length > 0);
815 } else {
816 do { *p++ = read_byte_mode2(ioaddr); } while (--length > 0);
817 }
818 } else if (data_mode <= 5) {
819 do { *p++ = read_byte_mode4(ioaddr); } while (--length > 0);
820 } else {
821 do { *p++ = read_byte_mode6(ioaddr); } while (--length > 0);
822 }
823
824 outb(EOC+HNib+MAR, ioaddr + PAR_DATA);
825 outb(Ctrl_SelData, ioaddr + PAR_CONTROL);
826}
827
828
829static int
830net_close(struct net_device *dev)
831{
832 struct net_local *lp = netdev_priv(dev);
833 long ioaddr = dev->base_addr;
834
835 netif_stop_queue(dev);
836
837 del_timer_sync(&lp->timer);
838
839
840 lp->addr_mode = CMR2h_OFF;
841 write_reg_high(ioaddr, CMR2, CMR2h_OFF);
842
843
844 outb(0x00, ioaddr + PAR_CONTROL);
845 free_irq(dev->irq, dev);
846
847
848 write_reg_high(ioaddr, CMR1, CMR1h_RESET | CMR1h_MUX);
849 return 0;
850}
851
852
853
854
855
856static void set_rx_mode_8002(struct net_device *dev)
857{
858 struct net_local *lp = netdev_priv(dev);
859 long ioaddr = dev->base_addr;
860
861 if (!netdev_mc_empty(dev) || (dev->flags & (IFF_ALLMULTI|IFF_PROMISC)))
862 lp->addr_mode = CMR2h_PROMISC;
863 else
864 lp->addr_mode = CMR2h_Normal;
865 write_reg_high(ioaddr, CMR2, lp->addr_mode);
866}
867
868static void set_rx_mode_8012(struct net_device *dev)
869{
870 struct net_local *lp = netdev_priv(dev);
871 long ioaddr = dev->base_addr;
872 unsigned char new_mode, mc_filter[8];
873 int i;
874
875 if (dev->flags & IFF_PROMISC) {
876 new_mode = CMR2h_PROMISC;
877 } else if ((netdev_mc_count(dev) > 1000) ||
878 (dev->flags & IFF_ALLMULTI)) {
879
880 memset(mc_filter, 0xff, sizeof(mc_filter));
881 new_mode = CMR2h_Normal;
882 } else {
883 struct netdev_hw_addr *ha;
884
885 memset(mc_filter, 0, sizeof(mc_filter));
886 netdev_for_each_mc_addr(ha, dev) {
887 int filterbit = ether_crc_le(ETH_ALEN, ha->addr) & 0x3f;
888 mc_filter[filterbit >> 5] |= 1 << (filterbit & 31);
889 }
890 new_mode = CMR2h_Normal;
891 }
892 lp->addr_mode = new_mode;
893 write_reg(ioaddr, CMR2, CMR2_IRQOUT | 0x04);
894 for (i = 0; i < 8; i++)
895 write_reg_byte(ioaddr, i, mc_filter[i]);
896 if (net_debug > 2 || 1) {
897 lp->addr_mode = 1;
898 printk(KERN_DEBUG "%s: Mode %d, setting multicast filter to",
899 dev->name, lp->addr_mode);
900 for (i = 0; i < 8; i++)
901 printk(" %2.2x", mc_filter[i]);
902 printk(".\n");
903 }
904
905 write_reg_high(ioaddr, CMR2, lp->addr_mode);
906 write_reg(ioaddr, CMR2, CMR2_IRQOUT);
907}
908
909static void set_rx_mode(struct net_device *dev)
910{
911 struct net_local *lp = netdev_priv(dev);
912
913 if (lp->chip_type == RTL8002)
914 return set_rx_mode_8002(dev);
915 else
916 return set_rx_mode_8012(dev);
917}
918
919
920static int __init atp_init_module(void) {
921 if (debug)
922 printk(KERN_INFO "%s", version);
923 return atp_init();
924}
925
926static void __exit atp_cleanup_module(void) {
927 struct net_device *next_dev;
928
929 while (root_atp_dev) {
930 struct net_local *atp_local = netdev_priv(root_atp_dev);
931 next_dev = atp_local->next_module;
932 unregister_netdev(root_atp_dev);
933
934 free_netdev(root_atp_dev);
935 root_atp_dev = next_dev;
936 }
937}
938
939module_init(atp_init_module);
940module_exit(atp_cleanup_module);
941